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15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/err.h>
18#include <linux/delay.h>
19#include <linux/regmap.h>
20#include <linux/acpi.h>
21
22#include <linux/iio/iio.h>
23#include <linux/iio/events.h>
24#include <linux/iio/sysfs.h>
25#include <linux/iio/trigger_consumer.h>
26#include <linux/iio/buffer.h>
27#include <linux/iio/triggered_buffer.h>
28
29#define LTR501_DRV_NAME "ltr501"
30
31#define LTR501_ALS_CONTR 0x80
32#define LTR501_PS_CONTR 0x81
33#define LTR501_PS_MEAS_RATE 0x84
34#define LTR501_ALS_MEAS_RATE 0x85
35#define LTR501_PART_ID 0x86
36#define LTR501_MANUFAC_ID 0x87
37#define LTR501_ALS_DATA1 0x88
38#define LTR501_ALS_DATA0 0x8a
39#define LTR501_ALS_PS_STATUS 0x8c
40#define LTR501_PS_DATA 0x8d
41#define LTR501_INTR 0x8f
42#define LTR501_PS_THRESH_UP 0x90
43#define LTR501_PS_THRESH_LOW 0x92
44#define LTR501_ALS_THRESH_UP 0x97
45#define LTR501_ALS_THRESH_LOW 0x99
46#define LTR501_INTR_PRST 0x9e
47#define LTR501_MAX_REG 0x9f
48
49#define LTR501_ALS_CONTR_SW_RESET BIT(2)
50#define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
51#define LTR501_CONTR_PS_GAIN_SHIFT 2
52#define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
53#define LTR501_CONTR_ACTIVE BIT(1)
54
55#define LTR501_STATUS_ALS_INTR BIT(3)
56#define LTR501_STATUS_ALS_RDY BIT(2)
57#define LTR501_STATUS_PS_INTR BIT(1)
58#define LTR501_STATUS_PS_RDY BIT(0)
59
60#define LTR501_PS_DATA_MASK 0x7ff
61#define LTR501_PS_THRESH_MASK 0x7ff
62#define LTR501_ALS_THRESH_MASK 0xffff
63
64#define LTR501_ALS_DEF_PERIOD 500000
65#define LTR501_PS_DEF_PERIOD 100000
66
67#define LTR501_REGMAP_NAME "ltr501_regmap"
68
69#define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
70 ((vis_coeff * vis_data) - (ir_coeff * ir_data))
71
72static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
73
74static const struct reg_field reg_field_it =
75 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
76static const struct reg_field reg_field_als_intr =
77 REG_FIELD(LTR501_INTR, 1, 1);
78static const struct reg_field reg_field_ps_intr =
79 REG_FIELD(LTR501_INTR, 0, 0);
80static const struct reg_field reg_field_als_rate =
81 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
82static const struct reg_field reg_field_ps_rate =
83 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
84static const struct reg_field reg_field_als_prst =
85 REG_FIELD(LTR501_INTR_PRST, 0, 3);
86static const struct reg_field reg_field_ps_prst =
87 REG_FIELD(LTR501_INTR_PRST, 4, 7);
88
89struct ltr501_samp_table {
90 int freq_val;
91 int time_val;
92};
93
94#define LTR501_RESERVED_GAIN -1
95
96enum {
97 ltr501 = 0,
98 ltr559,
99 ltr301,
100};
101
102struct ltr501_gain {
103 int scale;
104 int uscale;
105};
106
107static struct ltr501_gain ltr501_als_gain_tbl[] = {
108 {1, 0},
109 {0, 5000},
110};
111
112static struct ltr501_gain ltr559_als_gain_tbl[] = {
113 {1, 0},
114 {0, 500000},
115 {0, 250000},
116 {0, 125000},
117 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
118 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
119 {0, 20000},
120 {0, 10000},
121};
122
123static struct ltr501_gain ltr501_ps_gain_tbl[] = {
124 {1, 0},
125 {0, 250000},
126 {0, 125000},
127 {0, 62500},
128};
129
130static struct ltr501_gain ltr559_ps_gain_tbl[] = {
131 {0, 62500},
132 {0, 31250},
133 {0, 15625},
134 {0, 15624},
135};
136
137struct ltr501_chip_info {
138 u8 partid;
139 struct ltr501_gain *als_gain;
140 int als_gain_tbl_size;
141 struct ltr501_gain *ps_gain;
142 int ps_gain_tbl_size;
143 u8 als_mode_active;
144 u8 als_gain_mask;
145 u8 als_gain_shift;
146 struct iio_chan_spec const *channels;
147 const int no_channels;
148 const struct iio_info *info;
149 const struct iio_info *info_no_irq;
150};
151
152struct ltr501_data {
153 struct i2c_client *client;
154 struct mutex lock_als, lock_ps;
155 struct ltr501_chip_info *chip_info;
156 u8 als_contr, ps_contr;
157 int als_period, ps_period;
158 struct regmap *regmap;
159 struct regmap_field *reg_it;
160 struct regmap_field *reg_als_intr;
161 struct regmap_field *reg_ps_intr;
162 struct regmap_field *reg_als_rate;
163 struct regmap_field *reg_ps_rate;
164 struct regmap_field *reg_als_prst;
165 struct regmap_field *reg_ps_prst;
166};
167
168static const struct ltr501_samp_table ltr501_als_samp_table[] = {
169 {20000000, 50000}, {10000000, 100000},
170 {5000000, 200000}, {2000000, 500000},
171 {1000000, 1000000}, {500000, 2000000},
172 {500000, 2000000}, {500000, 2000000}
173};
174
175static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
176 {20000000, 50000}, {14285714, 70000},
177 {10000000, 100000}, {5000000, 200000},
178 {2000000, 500000}, {1000000, 1000000},
179 {500000, 2000000}, {500000, 2000000},
180 {500000, 2000000}
181};
182
183static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
184 int len, int val, int val2)
185{
186 int i, freq;
187
188 freq = val * 1000000 + val2;
189
190 for (i = 0; i < len; i++) {
191 if (tab[i].freq_val == freq)
192 return i;
193 }
194
195 return -EINVAL;
196}
197
198static int ltr501_als_read_samp_freq(struct ltr501_data *data,
199 int *val, int *val2)
200{
201 int ret, i;
202
203 ret = regmap_field_read(data->reg_als_rate, &i);
204 if (ret < 0)
205 return ret;
206
207 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
208 return -EINVAL;
209
210 *val = ltr501_als_samp_table[i].freq_val / 1000000;
211 *val2 = ltr501_als_samp_table[i].freq_val % 1000000;
212
213 return IIO_VAL_INT_PLUS_MICRO;
214}
215
216static int ltr501_ps_read_samp_freq(struct ltr501_data *data,
217 int *val, int *val2)
218{
219 int ret, i;
220
221 ret = regmap_field_read(data->reg_ps_rate, &i);
222 if (ret < 0)
223 return ret;
224
225 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
226 return -EINVAL;
227
228 *val = ltr501_ps_samp_table[i].freq_val / 1000000;
229 *val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
230
231 return IIO_VAL_INT_PLUS_MICRO;
232}
233
234static int ltr501_als_write_samp_freq(struct ltr501_data *data,
235 int val, int val2)
236{
237 int i, ret;
238
239 i = ltr501_match_samp_freq(ltr501_als_samp_table,
240 ARRAY_SIZE(ltr501_als_samp_table),
241 val, val2);
242
243 if (i < 0)
244 return i;
245
246 mutex_lock(&data->lock_als);
247 ret = regmap_field_write(data->reg_als_rate, i);
248 mutex_unlock(&data->lock_als);
249
250 return ret;
251}
252
253static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
254 int val, int val2)
255{
256 int i, ret;
257
258 i = ltr501_match_samp_freq(ltr501_ps_samp_table,
259 ARRAY_SIZE(ltr501_ps_samp_table),
260 val, val2);
261
262 if (i < 0)
263 return i;
264
265 mutex_lock(&data->lock_ps);
266 ret = regmap_field_write(data->reg_ps_rate, i);
267 mutex_unlock(&data->lock_ps);
268
269 return ret;
270}
271
272static int ltr501_als_read_samp_period(struct ltr501_data *data, int *val)
273{
274 int ret, i;
275
276 ret = regmap_field_read(data->reg_als_rate, &i);
277 if (ret < 0)
278 return ret;
279
280 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
281 return -EINVAL;
282
283 *val = ltr501_als_samp_table[i].time_val;
284
285 return IIO_VAL_INT;
286}
287
288static int ltr501_ps_read_samp_period(struct ltr501_data *data, int *val)
289{
290 int ret, i;
291
292 ret = regmap_field_read(data->reg_ps_rate, &i);
293 if (ret < 0)
294 return ret;
295
296 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
297 return -EINVAL;
298
299 *val = ltr501_ps_samp_table[i].time_val;
300
301 return IIO_VAL_INT;
302}
303
304
305static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
306{
307 unsigned long ratio, lux;
308
309 if (vis_data == 0)
310 return 0;
311
312
313 ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
314
315 if (ratio < 45)
316 lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
317 else if (ratio >= 45 && ratio < 64)
318 lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
319 else if (ratio >= 64 && ratio < 85)
320 lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
321 else
322 lux = 0;
323
324 return lux / 1000;
325}
326
327static int ltr501_drdy(struct ltr501_data *data, u8 drdy_mask)
328{
329 int tries = 100;
330 int ret, status;
331
332 while (tries--) {
333 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
334 if (ret < 0)
335 return ret;
336 if ((status & drdy_mask) == drdy_mask)
337 return 0;
338 msleep(25);
339 }
340
341 dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
342 return -EIO;
343}
344
345static int ltr501_set_it_time(struct ltr501_data *data, int it)
346{
347 int ret, i, index = -1, status;
348
349 for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
350 if (int_time_mapping[i] == it) {
351 index = i;
352 break;
353 }
354 }
355
356 if (index < 0)
357 return -EINVAL;
358
359 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
360 if (ret < 0)
361 return ret;
362
363 if (status & LTR501_CONTR_ALS_GAIN_MASK) {
364
365
366
367
368 if (index > 1)
369 return -EINVAL;
370 } else
371
372 if (index == 1)
373 return -EINVAL;
374
375 return regmap_field_write(data->reg_it, index);
376}
377
378
379static int ltr501_read_it_time(struct ltr501_data *data, int *val, int *val2)
380{
381 int ret, index;
382
383 ret = regmap_field_read(data->reg_it, &index);
384 if (ret < 0)
385 return ret;
386
387
388 if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
389 return -EINVAL;
390
391 *val2 = int_time_mapping[index];
392 *val = 0;
393
394 return IIO_VAL_INT_PLUS_MICRO;
395}
396
397static int ltr501_read_als(struct ltr501_data *data, __le16 buf[2])
398{
399 int ret;
400
401 ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
402 if (ret < 0)
403 return ret;
404
405 return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
406 buf, 2 * sizeof(__le16));
407}
408
409static int ltr501_read_ps(struct ltr501_data *data)
410{
411 int ret, status;
412
413 ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
414 if (ret < 0)
415 return ret;
416
417 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
418 &status, 2);
419 if (ret < 0)
420 return ret;
421
422 return status;
423}
424
425static int ltr501_read_intr_prst(struct ltr501_data *data,
426 enum iio_chan_type type,
427 int *val2)
428{
429 int ret, samp_period, prst;
430
431 switch (type) {
432 case IIO_INTENSITY:
433 ret = regmap_field_read(data->reg_als_prst, &prst);
434 if (ret < 0)
435 return ret;
436
437 ret = ltr501_als_read_samp_period(data, &samp_period);
438
439 if (ret < 0)
440 return ret;
441 *val2 = samp_period * prst;
442 return IIO_VAL_INT_PLUS_MICRO;
443 case IIO_PROXIMITY:
444 ret = regmap_field_read(data->reg_ps_prst, &prst);
445 if (ret < 0)
446 return ret;
447
448 ret = ltr501_ps_read_samp_period(data, &samp_period);
449
450 if (ret < 0)
451 return ret;
452
453 *val2 = samp_period * prst;
454 return IIO_VAL_INT_PLUS_MICRO;
455 default:
456 return -EINVAL;
457 }
458
459 return -EINVAL;
460}
461
462static int ltr501_write_intr_prst(struct ltr501_data *data,
463 enum iio_chan_type type,
464 int val, int val2)
465{
466 int ret, samp_period, new_val;
467 unsigned long period;
468
469 if (val < 0 || val2 < 0)
470 return -EINVAL;
471
472
473 period = ((val * 1000000) + val2);
474
475 switch (type) {
476 case IIO_INTENSITY:
477 ret = ltr501_als_read_samp_period(data, &samp_period);
478 if (ret < 0)
479 return ret;
480
481
482 if (period < samp_period)
483 return -EINVAL;
484
485 new_val = DIV_ROUND_UP(period, samp_period);
486 if (new_val < 0 || new_val > 0x0f)
487 return -EINVAL;
488
489 mutex_lock(&data->lock_als);
490 ret = regmap_field_write(data->reg_als_prst, new_val);
491 mutex_unlock(&data->lock_als);
492 if (ret >= 0)
493 data->als_period = period;
494
495 return ret;
496 case IIO_PROXIMITY:
497 ret = ltr501_ps_read_samp_period(data, &samp_period);
498 if (ret < 0)
499 return ret;
500
501
502 if (period < samp_period)
503 return -EINVAL;
504
505 new_val = DIV_ROUND_UP(period, samp_period);
506 if (new_val < 0 || new_val > 0x0f)
507 return -EINVAL;
508
509 mutex_lock(&data->lock_ps);
510 ret = regmap_field_write(data->reg_ps_prst, new_val);
511 mutex_unlock(&data->lock_ps);
512 if (ret >= 0)
513 data->ps_period = period;
514
515 return ret;
516 default:
517 return -EINVAL;
518 }
519
520 return -EINVAL;
521}
522
523static const struct iio_event_spec ltr501_als_event_spec[] = {
524 {
525 .type = IIO_EV_TYPE_THRESH,
526 .dir = IIO_EV_DIR_RISING,
527 .mask_separate = BIT(IIO_EV_INFO_VALUE),
528 }, {
529 .type = IIO_EV_TYPE_THRESH,
530 .dir = IIO_EV_DIR_FALLING,
531 .mask_separate = BIT(IIO_EV_INFO_VALUE),
532 }, {
533 .type = IIO_EV_TYPE_THRESH,
534 .dir = IIO_EV_DIR_EITHER,
535 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
536 BIT(IIO_EV_INFO_PERIOD),
537 },
538
539};
540
541static const struct iio_event_spec ltr501_pxs_event_spec[] = {
542 {
543 .type = IIO_EV_TYPE_THRESH,
544 .dir = IIO_EV_DIR_RISING,
545 .mask_separate = BIT(IIO_EV_INFO_VALUE),
546 }, {
547 .type = IIO_EV_TYPE_THRESH,
548 .dir = IIO_EV_DIR_FALLING,
549 .mask_separate = BIT(IIO_EV_INFO_VALUE),
550 }, {
551 .type = IIO_EV_TYPE_THRESH,
552 .dir = IIO_EV_DIR_EITHER,
553 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
554 BIT(IIO_EV_INFO_PERIOD),
555 },
556};
557
558#define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
559 _evspec, _evsize) { \
560 .type = IIO_INTENSITY, \
561 .modified = 1, \
562 .address = (_addr), \
563 .channel2 = (_mod), \
564 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
565 .info_mask_shared_by_type = (_shared), \
566 .scan_index = (_idx), \
567 .scan_type = { \
568 .sign = 'u', \
569 .realbits = 16, \
570 .storagebits = 16, \
571 .endianness = IIO_CPU, \
572 }, \
573 .event_spec = _evspec,\
574 .num_event_specs = _evsize,\
575}
576
577#define LTR501_LIGHT_CHANNEL() { \
578 .type = IIO_LIGHT, \
579 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
580 .scan_index = -1, \
581}
582
583static const struct iio_chan_spec ltr501_channels[] = {
584 LTR501_LIGHT_CHANNEL(),
585 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
586 ltr501_als_event_spec,
587 ARRAY_SIZE(ltr501_als_event_spec)),
588 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
589 BIT(IIO_CHAN_INFO_SCALE) |
590 BIT(IIO_CHAN_INFO_INT_TIME) |
591 BIT(IIO_CHAN_INFO_SAMP_FREQ),
592 NULL, 0),
593 {
594 .type = IIO_PROXIMITY,
595 .address = LTR501_PS_DATA,
596 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
597 BIT(IIO_CHAN_INFO_SCALE),
598 .scan_index = 2,
599 .scan_type = {
600 .sign = 'u',
601 .realbits = 11,
602 .storagebits = 16,
603 .endianness = IIO_CPU,
604 },
605 .event_spec = ltr501_pxs_event_spec,
606 .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
607 },
608 IIO_CHAN_SOFT_TIMESTAMP(3),
609};
610
611static const struct iio_chan_spec ltr301_channels[] = {
612 LTR501_LIGHT_CHANNEL(),
613 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
614 ltr501_als_event_spec,
615 ARRAY_SIZE(ltr501_als_event_spec)),
616 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
617 BIT(IIO_CHAN_INFO_SCALE) |
618 BIT(IIO_CHAN_INFO_INT_TIME) |
619 BIT(IIO_CHAN_INFO_SAMP_FREQ),
620 NULL, 0),
621 IIO_CHAN_SOFT_TIMESTAMP(2),
622};
623
624static int ltr501_read_raw(struct iio_dev *indio_dev,
625 struct iio_chan_spec const *chan,
626 int *val, int *val2, long mask)
627{
628 struct ltr501_data *data = iio_priv(indio_dev);
629 __le16 buf[2];
630 int ret, i;
631
632 switch (mask) {
633 case IIO_CHAN_INFO_PROCESSED:
634 switch (chan->type) {
635 case IIO_LIGHT:
636 ret = iio_device_claim_direct_mode(indio_dev);
637 if (ret)
638 return ret;
639
640 mutex_lock(&data->lock_als);
641 ret = ltr501_read_als(data, buf);
642 mutex_unlock(&data->lock_als);
643 iio_device_release_direct_mode(indio_dev);
644 if (ret < 0)
645 return ret;
646 *val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
647 le16_to_cpu(buf[0]));
648 return IIO_VAL_INT;
649 default:
650 return -EINVAL;
651 }
652 case IIO_CHAN_INFO_RAW:
653 ret = iio_device_claim_direct_mode(indio_dev);
654 if (ret)
655 return ret;
656
657 switch (chan->type) {
658 case IIO_INTENSITY:
659 mutex_lock(&data->lock_als);
660 ret = ltr501_read_als(data, buf);
661 mutex_unlock(&data->lock_als);
662 if (ret < 0)
663 break;
664 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
665 buf[0] : buf[1]);
666 ret = IIO_VAL_INT;
667 break;
668 case IIO_PROXIMITY:
669 mutex_lock(&data->lock_ps);
670 ret = ltr501_read_ps(data);
671 mutex_unlock(&data->lock_ps);
672 if (ret < 0)
673 break;
674 *val = ret & LTR501_PS_DATA_MASK;
675 ret = IIO_VAL_INT;
676 break;
677 default:
678 ret = -EINVAL;
679 break;
680 }
681
682 iio_device_release_direct_mode(indio_dev);
683 return ret;
684
685 case IIO_CHAN_INFO_SCALE:
686 switch (chan->type) {
687 case IIO_INTENSITY:
688 i = (data->als_contr & data->chip_info->als_gain_mask)
689 >> data->chip_info->als_gain_shift;
690 *val = data->chip_info->als_gain[i].scale;
691 *val2 = data->chip_info->als_gain[i].uscale;
692 return IIO_VAL_INT_PLUS_MICRO;
693 case IIO_PROXIMITY:
694 i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
695 LTR501_CONTR_PS_GAIN_SHIFT;
696 *val = data->chip_info->ps_gain[i].scale;
697 *val2 = data->chip_info->ps_gain[i].uscale;
698 return IIO_VAL_INT_PLUS_MICRO;
699 default:
700 return -EINVAL;
701 }
702 case IIO_CHAN_INFO_INT_TIME:
703 switch (chan->type) {
704 case IIO_INTENSITY:
705 return ltr501_read_it_time(data, val, val2);
706 default:
707 return -EINVAL;
708 }
709 case IIO_CHAN_INFO_SAMP_FREQ:
710 switch (chan->type) {
711 case IIO_INTENSITY:
712 return ltr501_als_read_samp_freq(data, val, val2);
713 case IIO_PROXIMITY:
714 return ltr501_ps_read_samp_freq(data, val, val2);
715 default:
716 return -EINVAL;
717 }
718 }
719 return -EINVAL;
720}
721
722static int ltr501_get_gain_index(struct ltr501_gain *gain, int size,
723 int val, int val2)
724{
725 int i;
726
727 for (i = 0; i < size; i++)
728 if (val == gain[i].scale && val2 == gain[i].uscale)
729 return i;
730
731 return -1;
732}
733
734static int ltr501_write_raw(struct iio_dev *indio_dev,
735 struct iio_chan_spec const *chan,
736 int val, int val2, long mask)
737{
738 struct ltr501_data *data = iio_priv(indio_dev);
739 int i, ret, freq_val, freq_val2;
740 struct ltr501_chip_info *info = data->chip_info;
741
742 ret = iio_device_claim_direct_mode(indio_dev);
743 if (ret)
744 return ret;
745
746 switch (mask) {
747 case IIO_CHAN_INFO_SCALE:
748 switch (chan->type) {
749 case IIO_INTENSITY:
750 i = ltr501_get_gain_index(info->als_gain,
751 info->als_gain_tbl_size,
752 val, val2);
753 if (i < 0) {
754 ret = -EINVAL;
755 break;
756 }
757
758 data->als_contr &= ~info->als_gain_mask;
759 data->als_contr |= i << info->als_gain_shift;
760
761 ret = regmap_write(data->regmap, LTR501_ALS_CONTR,
762 data->als_contr);
763 break;
764 case IIO_PROXIMITY:
765 i = ltr501_get_gain_index(info->ps_gain,
766 info->ps_gain_tbl_size,
767 val, val2);
768 if (i < 0) {
769 ret = -EINVAL;
770 break;
771 }
772 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
773 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
774
775 ret = regmap_write(data->regmap, LTR501_PS_CONTR,
776 data->ps_contr);
777 break;
778 default:
779 ret = -EINVAL;
780 break;
781 }
782 break;
783
784 case IIO_CHAN_INFO_INT_TIME:
785 switch (chan->type) {
786 case IIO_INTENSITY:
787 if (val != 0) {
788 ret = -EINVAL;
789 break;
790 }
791 mutex_lock(&data->lock_als);
792 ret = ltr501_set_it_time(data, val2);
793 mutex_unlock(&data->lock_als);
794 break;
795 default:
796 ret = -EINVAL;
797 break;
798 }
799 break;
800
801 case IIO_CHAN_INFO_SAMP_FREQ:
802 switch (chan->type) {
803 case IIO_INTENSITY:
804 ret = ltr501_als_read_samp_freq(data, &freq_val,
805 &freq_val2);
806 if (ret < 0)
807 break;
808
809 ret = ltr501_als_write_samp_freq(data, val, val2);
810 if (ret < 0)
811 break;
812
813
814 ret = ltr501_write_intr_prst(data, chan->type,
815 0, data->als_period);
816
817 if (ret < 0)
818 ret = ltr501_als_write_samp_freq(data, freq_val,
819 freq_val2);
820 break;
821 case IIO_PROXIMITY:
822 ret = ltr501_ps_read_samp_freq(data, &freq_val,
823 &freq_val2);
824 if (ret < 0)
825 break;
826
827 ret = ltr501_ps_write_samp_freq(data, val, val2);
828 if (ret < 0)
829 break;
830
831
832 ret = ltr501_write_intr_prst(data, chan->type,
833 0, data->ps_period);
834
835 if (ret < 0)
836 ret = ltr501_ps_write_samp_freq(data, freq_val,
837 freq_val2);
838 break;
839 default:
840 ret = -EINVAL;
841 break;
842 }
843 break;
844
845 default:
846 ret = -EINVAL;
847 break;
848 }
849
850 iio_device_release_direct_mode(indio_dev);
851 return ret;
852}
853
854static int ltr501_read_thresh(struct iio_dev *indio_dev,
855 const struct iio_chan_spec *chan,
856 enum iio_event_type type,
857 enum iio_event_direction dir,
858 enum iio_event_info info,
859 int *val, int *val2)
860{
861 struct ltr501_data *data = iio_priv(indio_dev);
862 int ret, thresh_data;
863
864 switch (chan->type) {
865 case IIO_INTENSITY:
866 switch (dir) {
867 case IIO_EV_DIR_RISING:
868 ret = regmap_bulk_read(data->regmap,
869 LTR501_ALS_THRESH_UP,
870 &thresh_data, 2);
871 if (ret < 0)
872 return ret;
873 *val = thresh_data & LTR501_ALS_THRESH_MASK;
874 return IIO_VAL_INT;
875 case IIO_EV_DIR_FALLING:
876 ret = regmap_bulk_read(data->regmap,
877 LTR501_ALS_THRESH_LOW,
878 &thresh_data, 2);
879 if (ret < 0)
880 return ret;
881 *val = thresh_data & LTR501_ALS_THRESH_MASK;
882 return IIO_VAL_INT;
883 default:
884 return -EINVAL;
885 }
886 case IIO_PROXIMITY:
887 switch (dir) {
888 case IIO_EV_DIR_RISING:
889 ret = regmap_bulk_read(data->regmap,
890 LTR501_PS_THRESH_UP,
891 &thresh_data, 2);
892 if (ret < 0)
893 return ret;
894 *val = thresh_data & LTR501_PS_THRESH_MASK;
895 return IIO_VAL_INT;
896 case IIO_EV_DIR_FALLING:
897 ret = regmap_bulk_read(data->regmap,
898 LTR501_PS_THRESH_LOW,
899 &thresh_data, 2);
900 if (ret < 0)
901 return ret;
902 *val = thresh_data & LTR501_PS_THRESH_MASK;
903 return IIO_VAL_INT;
904 default:
905 return -EINVAL;
906 }
907 default:
908 return -EINVAL;
909 }
910
911 return -EINVAL;
912}
913
914static int ltr501_write_thresh(struct iio_dev *indio_dev,
915 const struct iio_chan_spec *chan,
916 enum iio_event_type type,
917 enum iio_event_direction dir,
918 enum iio_event_info info,
919 int val, int val2)
920{
921 struct ltr501_data *data = iio_priv(indio_dev);
922 int ret;
923
924 if (val < 0)
925 return -EINVAL;
926
927 switch (chan->type) {
928 case IIO_INTENSITY:
929 if (val > LTR501_ALS_THRESH_MASK)
930 return -EINVAL;
931 switch (dir) {
932 case IIO_EV_DIR_RISING:
933 mutex_lock(&data->lock_als);
934 ret = regmap_bulk_write(data->regmap,
935 LTR501_ALS_THRESH_UP,
936 &val, 2);
937 mutex_unlock(&data->lock_als);
938 return ret;
939 case IIO_EV_DIR_FALLING:
940 mutex_lock(&data->lock_als);
941 ret = regmap_bulk_write(data->regmap,
942 LTR501_ALS_THRESH_LOW,
943 &val, 2);
944 mutex_unlock(&data->lock_als);
945 return ret;
946 default:
947 return -EINVAL;
948 }
949 case IIO_PROXIMITY:
950 if (val > LTR501_PS_THRESH_MASK)
951 return -EINVAL;
952 switch (dir) {
953 case IIO_EV_DIR_RISING:
954 mutex_lock(&data->lock_ps);
955 ret = regmap_bulk_write(data->regmap,
956 LTR501_PS_THRESH_UP,
957 &val, 2);
958 mutex_unlock(&data->lock_ps);
959 return ret;
960 case IIO_EV_DIR_FALLING:
961 mutex_lock(&data->lock_ps);
962 ret = regmap_bulk_write(data->regmap,
963 LTR501_PS_THRESH_LOW,
964 &val, 2);
965 mutex_unlock(&data->lock_ps);
966 return ret;
967 default:
968 return -EINVAL;
969 }
970 default:
971 return -EINVAL;
972 }
973
974 return -EINVAL;
975}
976
977static int ltr501_read_event(struct iio_dev *indio_dev,
978 const struct iio_chan_spec *chan,
979 enum iio_event_type type,
980 enum iio_event_direction dir,
981 enum iio_event_info info,
982 int *val, int *val2)
983{
984 int ret;
985
986 switch (info) {
987 case IIO_EV_INFO_VALUE:
988 return ltr501_read_thresh(indio_dev, chan, type, dir,
989 info, val, val2);
990 case IIO_EV_INFO_PERIOD:
991 ret = ltr501_read_intr_prst(iio_priv(indio_dev),
992 chan->type, val2);
993 *val = *val2 / 1000000;
994 *val2 = *val2 % 1000000;
995 return ret;
996 default:
997 return -EINVAL;
998 }
999
1000 return -EINVAL;
1001}
1002
1003static int ltr501_write_event(struct iio_dev *indio_dev,
1004 const struct iio_chan_spec *chan,
1005 enum iio_event_type type,
1006 enum iio_event_direction dir,
1007 enum iio_event_info info,
1008 int val, int val2)
1009{
1010 switch (info) {
1011 case IIO_EV_INFO_VALUE:
1012 if (val2 != 0)
1013 return -EINVAL;
1014 return ltr501_write_thresh(indio_dev, chan, type, dir,
1015 info, val, val2);
1016 case IIO_EV_INFO_PERIOD:
1017 return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
1018 val, val2);
1019 default:
1020 return -EINVAL;
1021 }
1022
1023 return -EINVAL;
1024}
1025
1026static int ltr501_read_event_config(struct iio_dev *indio_dev,
1027 const struct iio_chan_spec *chan,
1028 enum iio_event_type type,
1029 enum iio_event_direction dir)
1030{
1031 struct ltr501_data *data = iio_priv(indio_dev);
1032 int ret, status;
1033
1034 switch (chan->type) {
1035 case IIO_INTENSITY:
1036 ret = regmap_field_read(data->reg_als_intr, &status);
1037 if (ret < 0)
1038 return ret;
1039 return status;
1040 case IIO_PROXIMITY:
1041 ret = regmap_field_read(data->reg_ps_intr, &status);
1042 if (ret < 0)
1043 return ret;
1044 return status;
1045 default:
1046 return -EINVAL;
1047 }
1048
1049 return -EINVAL;
1050}
1051
1052static int ltr501_write_event_config(struct iio_dev *indio_dev,
1053 const struct iio_chan_spec *chan,
1054 enum iio_event_type type,
1055 enum iio_event_direction dir, int state)
1056{
1057 struct ltr501_data *data = iio_priv(indio_dev);
1058 int ret;
1059
1060
1061 if (state != 1 && state != 0)
1062 return -EINVAL;
1063
1064 switch (chan->type) {
1065 case IIO_INTENSITY:
1066 mutex_lock(&data->lock_als);
1067 ret = regmap_field_write(data->reg_als_intr, state);
1068 mutex_unlock(&data->lock_als);
1069 return ret;
1070 case IIO_PROXIMITY:
1071 mutex_lock(&data->lock_ps);
1072 ret = regmap_field_write(data->reg_ps_intr, state);
1073 mutex_unlock(&data->lock_ps);
1074 return ret;
1075 default:
1076 return -EINVAL;
1077 }
1078
1079 return -EINVAL;
1080}
1081
1082static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
1083 struct device_attribute *attr,
1084 char *buf)
1085{
1086 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1087 struct ltr501_chip_info *info = data->chip_info;
1088 ssize_t len = 0;
1089 int i;
1090
1091 for (i = 0; i < info->ps_gain_tbl_size; i++) {
1092 if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
1093 continue;
1094 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1095 info->ps_gain[i].scale,
1096 info->ps_gain[i].uscale);
1097 }
1098
1099 buf[len - 1] = '\n';
1100
1101 return len;
1102}
1103
1104static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
1105 struct device_attribute *attr,
1106 char *buf)
1107{
1108 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1109 struct ltr501_chip_info *info = data->chip_info;
1110 ssize_t len = 0;
1111 int i;
1112
1113 for (i = 0; i < info->als_gain_tbl_size; i++) {
1114 if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
1115 continue;
1116 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1117 info->als_gain[i].scale,
1118 info->als_gain[i].uscale);
1119 }
1120
1121 buf[len - 1] = '\n';
1122
1123 return len;
1124}
1125
1126static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
1127static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
1128
1129static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
1130 ltr501_show_proximity_scale_avail, NULL, 0);
1131static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
1132 ltr501_show_intensity_scale_avail, NULL, 0);
1133
1134static struct attribute *ltr501_attributes[] = {
1135 &iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
1136 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1137 &iio_const_attr_integration_time_available.dev_attr.attr,
1138 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1139 NULL
1140};
1141
1142static struct attribute *ltr301_attributes[] = {
1143 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1144 &iio_const_attr_integration_time_available.dev_attr.attr,
1145 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1146 NULL
1147};
1148
1149static const struct attribute_group ltr501_attribute_group = {
1150 .attrs = ltr501_attributes,
1151};
1152
1153static const struct attribute_group ltr301_attribute_group = {
1154 .attrs = ltr301_attributes,
1155};
1156
1157static const struct iio_info ltr501_info_no_irq = {
1158 .read_raw = ltr501_read_raw,
1159 .write_raw = ltr501_write_raw,
1160 .attrs = <r501_attribute_group,
1161 .driver_module = THIS_MODULE,
1162};
1163
1164static const struct iio_info ltr501_info = {
1165 .read_raw = ltr501_read_raw,
1166 .write_raw = ltr501_write_raw,
1167 .attrs = <r501_attribute_group,
1168 .read_event_value = <r501_read_event,
1169 .write_event_value = <r501_write_event,
1170 .read_event_config = <r501_read_event_config,
1171 .write_event_config = <r501_write_event_config,
1172 .driver_module = THIS_MODULE,
1173};
1174
1175static const struct iio_info ltr301_info_no_irq = {
1176 .read_raw = ltr501_read_raw,
1177 .write_raw = ltr501_write_raw,
1178 .attrs = <r301_attribute_group,
1179 .driver_module = THIS_MODULE,
1180};
1181
1182static const struct iio_info ltr301_info = {
1183 .read_raw = ltr501_read_raw,
1184 .write_raw = ltr501_write_raw,
1185 .attrs = <r301_attribute_group,
1186 .read_event_value = <r501_read_event,
1187 .write_event_value = <r501_write_event,
1188 .read_event_config = <r501_read_event_config,
1189 .write_event_config = <r501_write_event_config,
1190 .driver_module = THIS_MODULE,
1191};
1192
1193static struct ltr501_chip_info ltr501_chip_info_tbl[] = {
1194 [ltr501] = {
1195 .partid = 0x08,
1196 .als_gain = ltr501_als_gain_tbl,
1197 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1198 .ps_gain = ltr501_ps_gain_tbl,
1199 .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
1200 .als_mode_active = BIT(0) | BIT(1),
1201 .als_gain_mask = BIT(3),
1202 .als_gain_shift = 3,
1203 .info = <r501_info,
1204 .info_no_irq = <r501_info_no_irq,
1205 .channels = ltr501_channels,
1206 .no_channels = ARRAY_SIZE(ltr501_channels),
1207 },
1208 [ltr559] = {
1209 .partid = 0x09,
1210 .als_gain = ltr559_als_gain_tbl,
1211 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1212 .ps_gain = ltr559_ps_gain_tbl,
1213 .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
1214 .als_mode_active = BIT(1),
1215 .als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1216 .als_gain_shift = 2,
1217 .info = <r501_info,
1218 .info_no_irq = <r501_info_no_irq,
1219 .channels = ltr501_channels,
1220 .no_channels = ARRAY_SIZE(ltr501_channels),
1221 },
1222 [ltr301] = {
1223 .partid = 0x08,
1224 .als_gain = ltr501_als_gain_tbl,
1225 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1226 .als_mode_active = BIT(0) | BIT(1),
1227 .als_gain_mask = BIT(3),
1228 .als_gain_shift = 3,
1229 .info = <r301_info,
1230 .info_no_irq = <r301_info_no_irq,
1231 .channels = ltr301_channels,
1232 .no_channels = ARRAY_SIZE(ltr301_channels),
1233 },
1234};
1235
1236static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
1237{
1238 int ret;
1239
1240 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
1241 if (ret < 0)
1242 return ret;
1243
1244 return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
1245}
1246
1247static irqreturn_t ltr501_trigger_handler(int irq, void *p)
1248{
1249 struct iio_poll_func *pf = p;
1250 struct iio_dev *indio_dev = pf->indio_dev;
1251 struct ltr501_data *data = iio_priv(indio_dev);
1252 u16 buf[8];
1253 __le16 als_buf[2];
1254 u8 mask = 0;
1255 int j = 0;
1256 int ret, psdata;
1257
1258 memset(buf, 0, sizeof(buf));
1259
1260
1261 if (test_bit(0, indio_dev->active_scan_mask) ||
1262 test_bit(1, indio_dev->active_scan_mask))
1263 mask |= LTR501_STATUS_ALS_RDY;
1264 if (test_bit(2, indio_dev->active_scan_mask))
1265 mask |= LTR501_STATUS_PS_RDY;
1266
1267 ret = ltr501_drdy(data, mask);
1268 if (ret < 0)
1269 goto done;
1270
1271 if (mask & LTR501_STATUS_ALS_RDY) {
1272 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
1273 (u8 *)als_buf, sizeof(als_buf));
1274 if (ret < 0)
1275 return ret;
1276 if (test_bit(0, indio_dev->active_scan_mask))
1277 buf[j++] = le16_to_cpu(als_buf[1]);
1278 if (test_bit(1, indio_dev->active_scan_mask))
1279 buf[j++] = le16_to_cpu(als_buf[0]);
1280 }
1281
1282 if (mask & LTR501_STATUS_PS_RDY) {
1283 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
1284 &psdata, 2);
1285 if (ret < 0)
1286 goto done;
1287 buf[j++] = psdata & LTR501_PS_DATA_MASK;
1288 }
1289
1290 iio_push_to_buffers_with_timestamp(indio_dev, buf,
1291 iio_get_time_ns(indio_dev));
1292
1293done:
1294 iio_trigger_notify_done(indio_dev->trig);
1295
1296 return IRQ_HANDLED;
1297}
1298
1299static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1300{
1301 struct iio_dev *indio_dev = private;
1302 struct ltr501_data *data = iio_priv(indio_dev);
1303 int ret, status;
1304
1305 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
1306 if (ret < 0) {
1307 dev_err(&data->client->dev,
1308 "irq read int reg failed\n");
1309 return IRQ_HANDLED;
1310 }
1311
1312 if (status & LTR501_STATUS_ALS_INTR)
1313 iio_push_event(indio_dev,
1314 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1315 IIO_EV_TYPE_THRESH,
1316 IIO_EV_DIR_EITHER),
1317 iio_get_time_ns(indio_dev));
1318
1319 if (status & LTR501_STATUS_PS_INTR)
1320 iio_push_event(indio_dev,
1321 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1322 IIO_EV_TYPE_THRESH,
1323 IIO_EV_DIR_EITHER),
1324 iio_get_time_ns(indio_dev));
1325
1326 return IRQ_HANDLED;
1327}
1328
1329static int ltr501_init(struct ltr501_data *data)
1330{
1331 int ret, status;
1332
1333 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
1334 if (ret < 0)
1335 return ret;
1336
1337 data->als_contr = status | data->chip_info->als_mode_active;
1338
1339 ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
1340 if (ret < 0)
1341 return ret;
1342
1343 data->ps_contr = status | LTR501_CONTR_ACTIVE;
1344
1345 ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
1346 if (ret < 0)
1347 return ret;
1348
1349 ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
1350 if (ret < 0)
1351 return ret;
1352
1353 return ltr501_write_contr(data, data->als_contr, data->ps_contr);
1354}
1355
1356static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1357{
1358 switch (reg) {
1359 case LTR501_ALS_DATA1:
1360 case LTR501_ALS_DATA0:
1361 case LTR501_ALS_PS_STATUS:
1362 case LTR501_PS_DATA:
1363 return true;
1364 default:
1365 return false;
1366 }
1367}
1368
1369static struct regmap_config ltr501_regmap_config = {
1370 .name = LTR501_REGMAP_NAME,
1371 .reg_bits = 8,
1372 .val_bits = 8,
1373 .max_register = LTR501_MAX_REG,
1374 .cache_type = REGCACHE_RBTREE,
1375 .volatile_reg = ltr501_is_volatile_reg,
1376};
1377
1378static int ltr501_powerdown(struct ltr501_data *data)
1379{
1380 return ltr501_write_contr(data, data->als_contr &
1381 ~data->chip_info->als_mode_active,
1382 data->ps_contr & ~LTR501_CONTR_ACTIVE);
1383}
1384
1385static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx)
1386{
1387 const struct acpi_device_id *id;
1388
1389 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1390 if (!id)
1391 return NULL;
1392 *chip_idx = id->driver_data;
1393 return dev_name(dev);
1394}
1395
1396static int ltr501_probe(struct i2c_client *client,
1397 const struct i2c_device_id *id)
1398{
1399 struct ltr501_data *data;
1400 struct iio_dev *indio_dev;
1401 struct regmap *regmap;
1402 int ret, partid, chip_idx = 0;
1403 const char *name = NULL;
1404
1405 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1406 if (!indio_dev)
1407 return -ENOMEM;
1408
1409 regmap = devm_regmap_init_i2c(client, <r501_regmap_config);
1410 if (IS_ERR(regmap)) {
1411 dev_err(&client->dev, "Regmap initialization failed.\n");
1412 return PTR_ERR(regmap);
1413 }
1414
1415 data = iio_priv(indio_dev);
1416 i2c_set_clientdata(client, indio_dev);
1417 data->client = client;
1418 data->regmap = regmap;
1419 mutex_init(&data->lock_als);
1420 mutex_init(&data->lock_ps);
1421
1422 data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
1423 reg_field_it);
1424 if (IS_ERR(data->reg_it)) {
1425 dev_err(&client->dev, "Integ time reg field init failed.\n");
1426 return PTR_ERR(data->reg_it);
1427 }
1428
1429 data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
1430 reg_field_als_intr);
1431 if (IS_ERR(data->reg_als_intr)) {
1432 dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1433 return PTR_ERR(data->reg_als_intr);
1434 }
1435
1436 data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
1437 reg_field_ps_intr);
1438 if (IS_ERR(data->reg_ps_intr)) {
1439 dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1440 return PTR_ERR(data->reg_ps_intr);
1441 }
1442
1443 data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
1444 reg_field_als_rate);
1445 if (IS_ERR(data->reg_als_rate)) {
1446 dev_err(&client->dev, "ALS samp rate field init failed.\n");
1447 return PTR_ERR(data->reg_als_rate);
1448 }
1449
1450 data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
1451 reg_field_ps_rate);
1452 if (IS_ERR(data->reg_ps_rate)) {
1453 dev_err(&client->dev, "PS samp rate field init failed.\n");
1454 return PTR_ERR(data->reg_ps_rate);
1455 }
1456
1457 data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
1458 reg_field_als_prst);
1459 if (IS_ERR(data->reg_als_prst)) {
1460 dev_err(&client->dev, "ALS prst reg field init failed\n");
1461 return PTR_ERR(data->reg_als_prst);
1462 }
1463
1464 data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
1465 reg_field_ps_prst);
1466 if (IS_ERR(data->reg_ps_prst)) {
1467 dev_err(&client->dev, "PS prst reg field init failed.\n");
1468 return PTR_ERR(data->reg_ps_prst);
1469 }
1470
1471 ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
1472 if (ret < 0)
1473 return ret;
1474
1475 if (id) {
1476 name = id->name;
1477 chip_idx = id->driver_data;
1478 } else if (ACPI_HANDLE(&client->dev)) {
1479 name = ltr501_match_acpi_device(&client->dev, &chip_idx);
1480 } else {
1481 return -ENODEV;
1482 }
1483
1484 data->chip_info = <r501_chip_info_tbl[chip_idx];
1485
1486 if ((partid >> 4) != data->chip_info->partid)
1487 return -ENODEV;
1488
1489 indio_dev->dev.parent = &client->dev;
1490 indio_dev->info = data->chip_info->info;
1491 indio_dev->channels = data->chip_info->channels;
1492 indio_dev->num_channels = data->chip_info->no_channels;
1493 indio_dev->name = name;
1494 indio_dev->modes = INDIO_DIRECT_MODE;
1495
1496 ret = ltr501_init(data);
1497 if (ret < 0)
1498 return ret;
1499
1500 if (client->irq > 0) {
1501 ret = devm_request_threaded_irq(&client->dev, client->irq,
1502 NULL, ltr501_interrupt_handler,
1503 IRQF_TRIGGER_FALLING |
1504 IRQF_ONESHOT,
1505 "ltr501_thresh_event",
1506 indio_dev);
1507 if (ret) {
1508 dev_err(&client->dev, "request irq (%d) failed\n",
1509 client->irq);
1510 return ret;
1511 }
1512 } else {
1513 indio_dev->info = data->chip_info->info_no_irq;
1514 }
1515
1516 ret = iio_triggered_buffer_setup(indio_dev, NULL,
1517 ltr501_trigger_handler, NULL);
1518 if (ret)
1519 goto powerdown_on_error;
1520
1521 ret = iio_device_register(indio_dev);
1522 if (ret)
1523 goto error_unreg_buffer;
1524
1525 return 0;
1526
1527error_unreg_buffer:
1528 iio_triggered_buffer_cleanup(indio_dev);
1529powerdown_on_error:
1530 ltr501_powerdown(data);
1531 return ret;
1532}
1533
1534static int ltr501_remove(struct i2c_client *client)
1535{
1536 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1537
1538 iio_device_unregister(indio_dev);
1539 iio_triggered_buffer_cleanup(indio_dev);
1540 ltr501_powerdown(iio_priv(indio_dev));
1541
1542 return 0;
1543}
1544
1545#ifdef CONFIG_PM_SLEEP
1546static int ltr501_suspend(struct device *dev)
1547{
1548 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1549 to_i2c_client(dev)));
1550 return ltr501_powerdown(data);
1551}
1552
1553static int ltr501_resume(struct device *dev)
1554{
1555 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1556 to_i2c_client(dev)));
1557
1558 return ltr501_write_contr(data, data->als_contr,
1559 data->ps_contr);
1560}
1561#endif
1562
1563static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1564
1565static const struct acpi_device_id ltr_acpi_match[] = {
1566 {"LTER0501", ltr501},
1567 {"LTER0559", ltr559},
1568 {"LTER0301", ltr301},
1569 { },
1570};
1571MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
1572
1573static const struct i2c_device_id ltr501_id[] = {
1574 { "ltr501", ltr501},
1575 { "ltr559", ltr559},
1576 { "ltr301", ltr301},
1577 { }
1578};
1579MODULE_DEVICE_TABLE(i2c, ltr501_id);
1580
1581static struct i2c_driver ltr501_driver = {
1582 .driver = {
1583 .name = LTR501_DRV_NAME,
1584 .pm = <r501_pm_ops,
1585 .acpi_match_table = ACPI_PTR(ltr_acpi_match),
1586 },
1587 .probe = ltr501_probe,
1588 .remove = ltr501_remove,
1589 .id_table = ltr501_id,
1590};
1591
1592module_i2c_driver(ltr501_driver);
1593
1594MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1595MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1596MODULE_LICENSE("GPL");
1597
