LXR linux/drivers/media/i2c/tvp7002.c

   1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
   2 * Digitizer with Horizontal PLL registers
   3 *
   4 * Copyright (C) 2009 Texas Instruments Inc
   5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
   6 *
   7 * This code is partially based upon the TVP5150 driver
   8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
   9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
  10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
  11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
  12 *
  13 * This program is free software; you can redistribute it and/or modify
  14 * it under the terms of the GNU General Public License as published by
  15 * the Free Software Foundation; either version 2 of the License, or
  16 * (at your option) any later version.
  17 *
  18 * This program is distributed in the hope that it will be useful,
  19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 * GNU General Public License for more details.
  22 */
  23#include <linux/delay.h>
  24#include <linux/i2c.h>
  25#include <linux/slab.h>
  26#include <linux/videodev2.h>
  27#include <linux/module.h>
  28#include <linux/of.h>
  29#include <linux/of_graph.h>
  30#include <linux/v4l2-dv-timings.h>
  31#include <media/i2c/tvp7002.h>
  32#include <media/v4l2-async.h>
  33#include <media/v4l2-device.h>
  34#include <media/v4l2-common.h>
  35#include <media/v4l2-ctrls.h>
  36#include <media/v4l2-fwnode.h>
  37
  38#include "tvp7002_reg.h"
  39
  40MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
  41MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
  42MODULE_LICENSE("GPL");
  43
  44/* I2C retry attempts */
  45#define I2C_RETRY_COUNT         (5)
  46
  47/* End of registers */
  48#define TVP7002_EOR             0x5c
  49
  50/* Read write definition for registers */
  51#define TVP7002_READ            0
  52#define TVP7002_WRITE           1
  53#define TVP7002_RESERVED        2
  54
  55/* Interlaced vs progressive mask and shift */
  56#define TVP7002_IP_SHIFT        5
  57#define TVP7002_INPR_MASK       (0x01 << TVP7002_IP_SHIFT)
  58
  59/* Shift for CPL and LPF registers */
  60#define TVP7002_CL_SHIFT        8
  61#define TVP7002_CL_MASK         0x0f
  62
  63/* Debug functions */
  64static bool debug;
  65module_param(debug, bool, 0644);
  66MODULE_PARM_DESC(debug, "Debug level (0-2)");
  67
  68/* Structure for register values */
  69struct i2c_reg_value {
  70        u8 reg;
  71        u8 value;
  72        u8 type;
  73};
  74
  75/*
  76 * Register default values (according to tvp7002 datasheet)
  77 * In the case of read-only registers, the value (0xff) is
  78 * never written. R/W functionality is controlled by the
  79 * writable bit in the register struct definition.
  80 */
  81static const struct i2c_reg_value tvp7002_init_default[] = {
  82        { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
  83        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  84        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
  85        { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  86        { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
  87        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  88        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  89        { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
  90        { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
  91        { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
  92        { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
  93        { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  94        { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  95        { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  96        { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
  97        { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
  98        { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
  99        { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
 100        { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
 101        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 102        { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
 103        { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
 104        { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
 105        { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
 106        { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
 107        { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
 108        { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
 109        { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
 110        { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
 111        { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
 112        { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
 113        { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
 114        { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
 115        { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
 116        { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
 117        { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
 118        { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
 119        { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
 120        { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
 121        { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
 122        { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
 123        { 0x29, 0x08, TVP7002_RESERVED },
 124        { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
 125        /* PWR_CTL is controlled only by the probe and reset functions */
 126        { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
 127        { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
 128        { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
 129        { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
 130        { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE },
 131        { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
 132        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 133        { 0x32, 0x18, TVP7002_RESERVED },
 134        { 0x33, 0x60, TVP7002_RESERVED },
 135        { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
 136        { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
 137        { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
 138        { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
 139        { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
 140        { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
 141        { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
 142        { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
 143        { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
 144        { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
 145        { 0x3e, 0x60, TVP7002_RESERVED },
 146        { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
 147        { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
 148        { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
 149        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 150        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
 151        { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
 152        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 153        { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
 154        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 155        { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
 156        { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 157        { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
 158        { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
 159        { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
 160        { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
 161        { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
 162        { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
 163        { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
 164        { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
 165        { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
 166        { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
 167        { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
 168        { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
 169        { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
 170        { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
 171        { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
 172        { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
 173        { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
 174        { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
 175        /* This signals end of register values */
 176        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 177};
 178
 179/* Register parameters for 480P */
 180static const struct i2c_reg_value tvp7002_parms_480P[] = {
 181        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
 182        { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
 183        { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
 184        { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
 185        { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 186        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
 187        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 188        { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
 189        { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
 190        { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
 191        { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
 192        { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
 193        { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
 194        { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
 195        { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
 196        { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
 197        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 198};
 199
 200/* Register parameters for 576P */
 201static const struct i2c_reg_value tvp7002_parms_576P[] = {
 202        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
 203        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
 204        { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
 205        { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
 206        { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 207        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
 208        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 209        { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
 210        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 211        { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
 212        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 213        { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
 214        { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
 215        { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
 216        { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
 217        { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
 218        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 219};
 220
 221/* Register parameters for 1080I60 */
 222static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
 223        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
 224        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
 225        { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
 226        { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 227        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 228        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
 229        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
 230        { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
 231        { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
 232        { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
 233        { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
 234        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 235        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 236        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 237        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 238        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 239        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 240};
 241
 242/* Register parameters for 1080P60 */
 243static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
 244        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
 245        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
 246        { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
 247        { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 248        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 249        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
 250        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
 251        { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
 252        { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
 253        { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
 254        { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
 255        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 256        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 257        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 258        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 259        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 260        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 261};
 262
 263/* Register parameters for 1080I50 */
 264static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
 265        { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
 266        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
 267        { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
 268        { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 269        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 270        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
 271        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
 272        { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
 273        { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
 274        { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
 275        { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
 276        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 277        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 278        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 279        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 280        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 281        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 282};
 283
 284/* Register parameters for 720P60 */
 285static const struct i2c_reg_value tvp7002_parms_720P60[] = {
 286        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
 287        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
 288        { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
 289        { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
 290        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 291        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
 292        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
 293        { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
 294        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 295        { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
 296        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 297        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 298        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 299        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 300        { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
 301        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 302        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 303};
 304
 305/* Register parameters for 720P50 */
 306static const struct i2c_reg_value tvp7002_parms_720P50[] = {
 307        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
 308        { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
 309        { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
 310        { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
 311        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 312        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
 313        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
 314        { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
 315        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 316        { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
 317        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 318        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 319        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 320        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 321        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 322        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 323        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 324};
 325
 326/* Timings definition for handling device operation */
 327struct tvp7002_timings_definition {
 328        struct v4l2_dv_timings timings;
 329        const struct i2c_reg_value *p_settings;
 330        enum v4l2_colorspace color_space;
 331        enum v4l2_field scanmode;
 332        u16 progressive;
 333        u16 lines_per_frame;
 334        u16 cpl_min;
 335        u16 cpl_max;
 336};
 337
 338/* Struct list for digital video timings */
 339static const struct tvp7002_timings_definition tvp7002_timings[] = {
 340        {
 341                V4L2_DV_BT_CEA_1280X720P60,
 342                tvp7002_parms_720P60,
 343                V4L2_COLORSPACE_REC709,
 344                V4L2_FIELD_NONE,
 345                1,
 346                0x2EE,
 347                135,
 348                153
 349        },
 350        {
 351                V4L2_DV_BT_CEA_1920X1080I60,
 352                tvp7002_parms_1080I60,
 353                V4L2_COLORSPACE_REC709,
 354                V4L2_FIELD_INTERLACED,
 355                0,
 356                0x465,
 357                181,
 358                205
 359        },
 360        {
 361                V4L2_DV_BT_CEA_1920X1080I50,
 362                tvp7002_parms_1080I50,
 363                V4L2_COLORSPACE_REC709,
 364                V4L2_FIELD_INTERLACED,
 365                0,
 366                0x465,
 367                217,
 368                245
 369        },
 370        {
 371                V4L2_DV_BT_CEA_1280X720P50,
 372                tvp7002_parms_720P50,
 373                V4L2_COLORSPACE_REC709,
 374                V4L2_FIELD_NONE,
 375                1,
 376                0x2EE,
 377                163,
 378                183
 379        },
 380        {
 381                V4L2_DV_BT_CEA_1920X1080P60,
 382                tvp7002_parms_1080P60,
 383                V4L2_COLORSPACE_REC709,
 384                V4L2_FIELD_NONE,
 385                1,
 386                0x465,
 387                90,
 388                102
 389        },
 390        {
 391                V4L2_DV_BT_CEA_720X480P59_94,
 392                tvp7002_parms_480P,
 393                V4L2_COLORSPACE_SMPTE170M,
 394                V4L2_FIELD_NONE,
 395                1,
 396                0x20D,
 397                0xffff,
 398                0xffff
 399        },
 400        {
 401                V4L2_DV_BT_CEA_720X576P50,
 402                tvp7002_parms_576P,
 403                V4L2_COLORSPACE_SMPTE170M,
 404                V4L2_FIELD_NONE,
 405                1,
 406                0x271,
 407                0xffff,
 408                0xffff
 409        }
 410};
 411
 412#define NUM_TIMINGS ARRAY_SIZE(tvp7002_timings)
 413
 414/* Device definition */
 415struct tvp7002 {
 416        struct v4l2_subdev sd;
 417        struct v4l2_ctrl_handler hdl;
 418        const struct tvp7002_config *pdata;
 419
 420        int ver;
 421        int streaming;
 422
 423        const struct tvp7002_timings_definition *current_timings;
 424        struct media_pad pad;
 425};
 426
 427/*
 428 * to_tvp7002 - Obtain device handler TVP7002
 429 * @sd: ptr to v4l2_subdev struct
 430 *
 431 * Returns device handler tvp7002.
 432 */
 433static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
 434{
 435        return container_of(sd, struct tvp7002, sd);
 436}
 437
 438static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
 439{
 440        return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
 441}
 442
 443/*
 444 * tvp7002_read - Read a value from a register in an TVP7002
 445 * @sd: ptr to v4l2_subdev struct
 446 * @addr: TVP7002 register address
 447 * @dst: pointer to 8-bit destination
 448 *
 449 * Returns value read if successful, or non-zero (-1) otherwise.
 450 */
 451static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
 452{
 453        struct i2c_client *c = v4l2_get_subdevdata(sd);
 454        int retry;
 455        int error;
 456
 457        for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
 458                error = i2c_smbus_read_byte_data(c, addr);
 459
 460                if (error >= 0) {
 461                        *dst = (u8)error;
 462                        return 0;
 463                }
 464
 465                msleep_interruptible(10);
 466        }
 467        v4l2_err(sd, "TVP7002 read error %d\n", error);
 468        return error;
 469}
 470
 471/*
 472 * tvp7002_read_err() - Read a register value with error code
 473 * @sd: pointer to standard V4L2 sub-device structure
 474 * @reg: destination register
 475 * @val: value to be read
 476 * @err: pointer to error value
 477 *
 478 * Read a value in a register and save error value in pointer.
 479 * Also update the register table if successful
 480 */
 481static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
 482                                                        u8 *dst, int *err)
 483{
 484        if (!*err)
 485                *err = tvp7002_read(sd, reg, dst);
 486}
 487
 488/*
 489 * tvp7002_write() - Write a value to a register in TVP7002
 490 * @sd: ptr to v4l2_subdev struct
 491 * @addr: TVP7002 register address
 492 * @value: value to be written to the register
 493 *
 494 * Write a value to a register in an TVP7002 decoder device.
 495 * Returns zero if successful, or non-zero otherwise.
 496 */
 497static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
 498{
 499        struct i2c_client *c;
 500        int retry;
 501        int error;
 502
 503        c = v4l2_get_subdevdata(sd);
 504
 505        for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
 506                error = i2c_smbus_write_byte_data(c, addr, value);
 507
 508                if (error >= 0)
 509                        return 0;
 510
 511                v4l2_warn(sd, "Write: retry ... %d\n", retry);
 512                msleep_interruptible(10);
 513        }
 514        v4l2_err(sd, "TVP7002 write error %d\n", error);
 515        return error;
 516}
 517
 518/*
 519 * tvp7002_write_err() - Write a register value with error code
 520 * @sd: pointer to standard V4L2 sub-device structure
 521 * @reg: destination register
 522 * @val: value to be written
 523 * @err: pointer to error value
 524 *
 525 * Write a value in a register and save error value in pointer.
 526 * Also update the register table if successful
 527 */
 528static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
 529                                                        u8 val, int *err)
 530{
 531        if (!*err)
 532                *err = tvp7002_write(sd, reg, val);
 533}
 534
 535/*
 536 * tvp7002_write_inittab() - Write initialization values
 537 * @sd: ptr to v4l2_subdev struct
 538 * @regs: ptr to i2c_reg_value struct
 539 *
 540 * Write initialization values.
 541 * Returns zero or -EINVAL if read operation fails.
 542 */
 543static int tvp7002_write_inittab(struct v4l2_subdev *sd,
 544                                        const struct i2c_reg_value *regs)
 545{
 546        int error = 0;
 547
 548        /* Initialize the first (defined) registers */
 549        while (TVP7002_EOR != regs->reg) {
 550                if (TVP7002_WRITE == regs->type)
 551                        tvp7002_write_err(sd, regs->reg, regs->value, &error);
 552                regs++;
 553        }
 554
 555        return error;
 556}
 557
 558static int tvp7002_s_dv_timings(struct v4l2_subdev *sd,
 559                                        struct v4l2_dv_timings *dv_timings)
 560{
 561        struct tvp7002 *device = to_tvp7002(sd);
 562        const struct v4l2_bt_timings *bt = &dv_timings->bt;
 563        int i;
 564
 565        if (dv_timings->type != V4L2_DV_BT_656_1120)
 566                return -EINVAL;
 567        for (i = 0; i < NUM_TIMINGS; i++) {
 568                const struct v4l2_bt_timings *t = &tvp7002_timings[i].timings.bt;
 569
 570                if (!memcmp(bt, t, &bt->standards - &bt->width)) {
 571                        device->current_timings = &tvp7002_timings[i];
 572                        return tvp7002_write_inittab(sd, tvp7002_timings[i].p_settings);
 573                }
 574        }
 575        return -EINVAL;
 576}
 577
 578static int tvp7002_g_dv_timings(struct v4l2_subdev *sd,
 579                                        struct v4l2_dv_timings *dv_timings)
 580{
 581        struct tvp7002 *device = to_tvp7002(sd);
 582
 583        *dv_timings = device->current_timings->timings;
 584        return 0;
 585}
 586
 587/*
 588 * tvp7002_s_ctrl() - Set a control
 589 * @ctrl: ptr to v4l2_ctrl struct
 590 *
 591 * Set a control in TVP7002 decoder device.
 592 * Returns zero when successful or -EINVAL if register access fails.
 593 */
 594static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
 595{
 596        struct v4l2_subdev *sd = to_sd(ctrl);
 597        int error = 0;
 598
 599        switch (ctrl->id) {
 600        case V4L2_CID_GAIN:
 601                tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
 602                tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
 603                tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
 604                return error;
 605        }
 606        return -EINVAL;
 607}
 608
 609/*
 610 * tvp7002_query_dv() - query DV timings
 611 * @sd: pointer to standard V4L2 sub-device structure
 612 * @index: index into the tvp7002_timings array
 613 *
 614 * Returns the current DV timings detected by TVP7002. If no active input is
 615 * detected, returns -EINVAL
 616 */
 617static int tvp7002_query_dv(struct v4l2_subdev *sd, int *index)
 618{
 619        const struct tvp7002_timings_definition *timings = tvp7002_timings;
 620        u8 progressive;
 621        u32 lpfr;
 622        u32 cpln;
 623        int error = 0;
 624        u8 lpf_lsb;
 625        u8 lpf_msb;
 626        u8 cpl_lsb;
 627        u8 cpl_msb;
 628
 629        /* Return invalid index if no active input is detected */
 630        *index = NUM_TIMINGS;
 631
 632        /* Read standards from device registers */
 633        tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
 634        tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
 635
 636        if (error < 0)
 637                return error;
 638
 639        tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
 640        tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
 641
 642        if (error < 0)
 643                return error;
 644
 645        /* Get lines per frame, clocks per line and interlaced/progresive */
 646        lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
 647        cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
 648        progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
 649
 650        /* Do checking of video modes */
 651        for (*index = 0; *index < NUM_TIMINGS; (*index)++, timings++)
 652                if (lpfr == timings->lines_per_frame &&
 653                        progressive == timings->progressive) {
 654                        if (timings->cpl_min == 0xffff)
 655                                break;
 656                        if (cpln >= timings->cpl_min && cpln <= timings->cpl_max)
 657                                break;
 658                }
 659
 660        if (*index == NUM_TIMINGS) {
 661                v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
 662                                                                lpfr, cpln);
 663                return -ENOLINK;
 664        }
 665
 666        /* Update lines per frame and clocks per line info */
 667        v4l2_dbg(1, debug, sd, "detected timings: %d\n", *index);
 668        return 0;
 669}
 670
 671static int tvp7002_query_dv_timings(struct v4l2_subdev *sd,
 672                                        struct v4l2_dv_timings *timings)
 673{
 674        int index;
 675        int err = tvp7002_query_dv(sd, &index);
 676
 677        if (err)
 678                return err;
 679        *timings = tvp7002_timings[index].timings;
 680        return 0;
 681}
 682
 683#ifdef CONFIG_VIDEO_ADV_DEBUG
 684/*
 685 * tvp7002_g_register() - Get the value of a register
 686 * @sd: ptr to v4l2_subdev struct
 687 * @reg: ptr to v4l2_dbg_register struct
 688 *
 689 * Get the value of a TVP7002 decoder device register.
 690 * Returns zero when successful, -EINVAL if register read fails or
 691 * access to I2C client fails.
 692 */
 693static int tvp7002_g_register(struct v4l2_subdev *sd,
 694                                                struct v4l2_dbg_register *reg)
 695{
 696        u8 val;
 697        int ret;
 698
 699        ret = tvp7002_read(sd, reg->reg & 0xff, &val);
 700        reg->val = val;
 701        reg->size = 1;
 702        return ret;
 703}
 704
 705/*
 706 * tvp7002_s_register() - set a control
 707 * @sd: ptr to v4l2_subdev struct
 708 * @reg: ptr to v4l2_dbg_register struct
 709 *
 710 * Get the value of a TVP7002 decoder device register.
 711 * Returns zero when successful, -EINVAL if register read fails.
 712 */
 713static int tvp7002_s_register(struct v4l2_subdev *sd,
 714                                                const struct v4l2_dbg_register *reg)
 715{
 716        return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
 717}
 718#endif
 719
 720/*
 721 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
 722 * @sd: pointer to standard V4L2 sub-device structure
 723 * @enable: streaming enable or disable
 724 *
 725 * Sets streaming to enable or disable, if possible.
 726 */
 727static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
 728{
 729        struct tvp7002 *device = to_tvp7002(sd);
 730        int error;
 731
 732        if (device->streaming == enable)
 733                return 0;
 734
 735        /* low impedance: on, high impedance: off */
 736        error = tvp7002_write(sd, TVP7002_MISC_CTL_2, enable ? 0x00 : 0x03);
 737        if (error) {
 738                v4l2_dbg(1, debug, sd, "Fail to set streaming\n");
 739                return error;
 740        }
 741
 742        device->streaming = enable;
 743        return 0;
 744}
 745
 746/*
 747 * tvp7002_log_status() - Print information about register settings
 748 * @sd: ptr to v4l2_subdev struct
 749 *
 750 * Log register values of a TVP7002 decoder device.
 751 * Returns zero or -EINVAL if read operation fails.
 752 */
 753static int tvp7002_log_status(struct v4l2_subdev *sd)
 754{
 755        struct tvp7002 *device = to_tvp7002(sd);
 756        const struct v4l2_bt_timings *bt;
 757        int detected;
 758
 759        /* Find my current timings */
 760        tvp7002_query_dv(sd, &detected);
 761
 762        bt = &device->current_timings->timings.bt;
 763        v4l2_info(sd, "Selected DV Timings: %ux%u\n", bt->width, bt->height);
 764        if (detected == NUM_TIMINGS) {
 765                v4l2_info(sd, "Detected DV Timings: None\n");
 766        } else {
 767                bt = &tvp7002_timings[detected].timings.bt;
 768                v4l2_info(sd, "Detected DV Timings: %ux%u\n",
 769                                bt->width, bt->height);
 770        }
 771        v4l2_info(sd, "Streaming enabled: %s\n",
 772                                        device->streaming ? "yes" : "no");
 773
 774        /* Print the current value of the gain control */
 775        v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
 776
 777        return 0;
 778}
 779
 780static int tvp7002_enum_dv_timings(struct v4l2_subdev *sd,
 781                struct v4l2_enum_dv_timings *timings)
 782{
 783        if (timings->pad != 0)
 784                return -EINVAL;
 785
 786        /* Check requested format index is within range */
 787        if (timings->index >= NUM_TIMINGS)
 788                return -EINVAL;
 789
 790        timings->timings = tvp7002_timings[timings->index].timings;
 791        return 0;
 792}
 793
 794static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
 795        .s_ctrl = tvp7002_s_ctrl,
 796};
 797
 798/*
 799 * tvp7002_enum_mbus_code() - Enum supported digital video format on pad
 800 * @sd: pointer to standard V4L2 sub-device structure
 801 * @cfg: pad configuration
 802 * @code: pointer to subdev enum mbus code struct
 803 *
 804 * Enumerate supported digital video formats for pad.
 805 */
 806static int
 807tvp7002_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
 808                       struct v4l2_subdev_mbus_code_enum *code)
 809{
 810        /* Check requested format index is within range */
 811        if (code->index != 0)
 812                return -EINVAL;
 813
 814        code->code = MEDIA_BUS_FMT_YUYV10_1X20;
 815
 816        return 0;
 817}
 818
 819/*
 820 * tvp7002_get_pad_format() - get video format on pad
 821 * @sd: pointer to standard V4L2 sub-device structure
 822 * @cfg: pad configuration
 823 * @fmt: pointer to subdev format struct
 824 *
 825 * get video format for pad.
 826 */
 827static int
 828tvp7002_get_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
 829                       struct v4l2_subdev_format *fmt)
 830{
 831        struct tvp7002 *tvp7002 = to_tvp7002(sd);
 832
 833        fmt->format.code = MEDIA_BUS_FMT_YUYV10_1X20;
 834        fmt->format.width = tvp7002->current_timings->timings.bt.width;
 835        fmt->format.height = tvp7002->current_timings->timings.bt.height;
 836        fmt->format.field = tvp7002->current_timings->scanmode;
 837        fmt->format.colorspace = tvp7002->current_timings->color_space;
 838
 839        return 0;
 840}
 841
 842/*
 843 * tvp7002_set_pad_format() - set video format on pad
 844 * @sd: pointer to standard V4L2 sub-device structure
 845 * @cfg: pad configuration
 846 * @fmt: pointer to subdev format struct
 847 *
 848 * set video format for pad.
 849 */
 850static int
 851tvp7002_set_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
 852                       struct v4l2_subdev_format *fmt)
 853{
 854        return tvp7002_get_pad_format(sd, cfg, fmt);
 855}
 856
 857/* V4L2 core operation handlers */
 858static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
 859        .log_status = tvp7002_log_status,
 860#ifdef CONFIG_VIDEO_ADV_DEBUG
 861        .g_register = tvp7002_g_register,
 862        .s_register = tvp7002_s_register,
 863#endif
 864};
 865
 866/* Specific video subsystem operation handlers */
 867static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
 868        .g_dv_timings = tvp7002_g_dv_timings,
 869        .s_dv_timings = tvp7002_s_dv_timings,
 870        .query_dv_timings = tvp7002_query_dv_timings,
 871        .s_stream = tvp7002_s_stream,
 872};
 873
 874/* media pad related operation handlers */
 875static const struct v4l2_subdev_pad_ops tvp7002_pad_ops = {
 876        .enum_mbus_code = tvp7002_enum_mbus_code,
 877        .get_fmt = tvp7002_get_pad_format,
 878        .set_fmt = tvp7002_set_pad_format,
 879        .enum_dv_timings = tvp7002_enum_dv_timings,
 880};
 881
 882/* V4L2 top level operation handlers */
 883static const struct v4l2_subdev_ops tvp7002_ops = {
 884        .core = &tvp7002_core_ops,
 885        .video = &tvp7002_video_ops,
 886        .pad = &tvp7002_pad_ops,
 887};
 888
 889static struct tvp7002_config *
 890tvp7002_get_pdata(struct i2c_client *client)
 891{
 892        struct v4l2_fwnode_endpoint bus_cfg;
 893        struct tvp7002_config *pdata = NULL;
 894        struct device_node *endpoint;
 895        unsigned int flags;
 896
 897        if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
 898                return client->dev.platform_data;
 899
 900        endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL);
 901        if (!endpoint)
 902                return NULL;
 903
 904        if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), &bus_cfg))
 905                goto done;
 906
 907        pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
 908        if (!pdata)
 909                goto done;
 910
 911        flags = bus_cfg.bus.parallel.flags;
 912
 913        if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
 914                pdata->hs_polarity = 1;
 915
 916        if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
 917                pdata->vs_polarity = 1;
 918
 919        if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
 920                pdata->clk_polarity = 1;
 921
 922        if (flags & V4L2_MBUS_FIELD_EVEN_HIGH)
 923                pdata->fid_polarity = 1;
 924
 925        if (flags & V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH)
 926                pdata->sog_polarity = 1;
 927
 928done:
 929        of_node_put(endpoint);
 930        return pdata;
 931}
 932
 933/*
 934 * tvp7002_probe - Probe a TVP7002 device
 935 * @c: ptr to i2c_client struct
 936 * @id: ptr to i2c_device_id struct
 937 *
 938 * Initialize the TVP7002 device
 939 * Returns zero when successful, -EINVAL if register read fails or
 940 * -EIO if i2c access is not available.
 941 */
 942static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
 943{
 944        struct tvp7002_config *pdata = tvp7002_get_pdata(c);
 945        struct v4l2_subdev *sd;
 946        struct tvp7002 *device;
 947        struct v4l2_dv_timings timings;
 948        int polarity_a;
 949        int polarity_b;
 950        u8 revision;
 951        int error;
 952
 953        if (pdata == NULL) {
 954                dev_err(&c->dev, "No platform data\n");
 955                return -EINVAL;
 956        }
 957
 958        /* Check if the adapter supports the needed features */
 959        if (!i2c_check_functionality(c->adapter,
 960                I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
 961                return -EIO;
 962
 963        device = devm_kzalloc(&c->dev, sizeof(struct tvp7002), GFP_KERNEL);
 964
 965        if (!device)
 966                return -ENOMEM;
 967
 968        sd = &device->sd;
 969        device->pdata = pdata;
 970        device->current_timings = tvp7002_timings;
 971
 972        /* Tell v4l2 the device is ready */
 973        v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
 974        v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
 975                                        c->addr, c->adapter->name);
 976
 977        error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
 978        if (error < 0)
 979                return error;
 980
 981        /* Get revision number */
 982        v4l2_info(sd, "Rev. %02x detected.\n", revision);
 983        if (revision != 0x02)
 984                v4l2_info(sd, "Unknown revision detected.\n");
 985
 986        /* Initializes TVP7002 to its default values */
 987        error = tvp7002_write_inittab(sd, tvp7002_init_default);
 988
 989        if (error < 0)
 990                return error;
 991
 992        /* Set polarity information after registers have been set */
 993        polarity_a = 0x20 | device->pdata->hs_polarity << 5
 994                        | device->pdata->vs_polarity << 2;
 995        error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
 996        if (error < 0)
 997                return error;
 998
 999        polarity_b = 0x01  | device->pdata->fid_polarity << 2
1000                        | device->pdata->sog_polarity << 1

1001                        | device->pdata->clk_polarity;
1002        error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1003        if (error < 0)
1004                return error;
1005
1006        /* Set registers according to default video mode */
1007        timings = device->current_timings->timings;
1008        error = tvp7002_s_dv_timings(sd, &timings);
1009
1010#if defined(CONFIG_MEDIA_CONTROLLER)
1011        device->pad.flags = MEDIA_PAD_FL_SOURCE;
1012        device->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1013        device->sd.entity.flags |= MEDIA_ENT_F_ATV_DECODER;
1014
1015        error = media_entity_pads_init(&device->sd.entity, 1, &device->pad);
1016        if (error < 0)
1017                return error;
1018#endif
1019
1020        v4l2_ctrl_handler_init(&device->hdl, 1);
1021        v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
1022                        V4L2_CID_GAIN, 0, 255, 1, 0);
1023        sd->ctrl_handler = &device->hdl;
1024        if (device->hdl.error) {
1025                error = device->hdl.error;
1026                goto error;
1027        }
1028        v4l2_ctrl_handler_setup(&device->hdl);
1029
1030        error = v4l2_async_register_subdev(&device->sd);
1031        if (error)
1032                goto error;
1033
1034        return 0;
1035
1036error:
1037        v4l2_ctrl_handler_free(&device->hdl);
1038#if defined(CONFIG_MEDIA_CONTROLLER)
1039        media_entity_cleanup(&device->sd.entity);
1040#endif
1041        return error;
1042}
1043
1044/*
1045 * tvp7002_remove - Remove TVP7002 device support
1046 * @c: ptr to i2c_client struct
1047 *
1048 * Reset the TVP7002 device
1049 * Returns zero.
1050 */
1051static int tvp7002_remove(struct i2c_client *c)
1052{
1053        struct v4l2_subdev *sd = i2c_get_clientdata(c);
1054        struct tvp7002 *device = to_tvp7002(sd);
1055
1056        v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1057                                "on address 0x%x\n", c->addr);
1058        v4l2_async_unregister_subdev(&device->sd);
1059#if defined(CONFIG_MEDIA_CONTROLLER)
1060        media_entity_cleanup(&device->sd.entity);
1061#endif
1062        v4l2_ctrl_handler_free(&device->hdl);
1063        return 0;
1064}
1065
1066/* I2C Device ID table */
1067static const struct i2c_device_id tvp7002_id[] = {
1068        { "tvp7002", 0 },
1069        { }
1070};
1071MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1072
1073#if IS_ENABLED(CONFIG_OF)
1074static const struct of_device_id tvp7002_of_match[] = {
1075        { .compatible = "ti,tvp7002", },
1076        { /* sentinel */ },
1077};
1078MODULE_DEVICE_TABLE(of, tvp7002_of_match);
1079#endif
1080
1081/* I2C driver data */
1082static struct i2c_driver tvp7002_driver = {
1083        .driver = {
1084                .of_match_table = of_match_ptr(tvp7002_of_match),
1085                .name = TVP7002_MODULE_NAME,
1086        },
1087        .probe = tvp7002_probe,
1088        .remove = tvp7002_remove,
1089        .id_table = tvp7002_id,
1090};
1091
1092module_i2c_driver(tvp7002_driver);
1093