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23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/poll.h>
29#include <linux/io.h>
30#include <linux/pci.h>
31#include <linux/pci_ids.h>
32#include <linux/timer.h>
33#include <linux/i2c.h>
34#include <linux/swab.h>
35#include <linux/vmalloc.h>
36
37#include "ddbridge.h"
38#include "ddbridge-i2c.h"
39#include "ddbridge-regs.h"
40#include "ddbridge-maxs8.h"
41#include "ddbridge-io.h"
42
43#include "tda18271c2dd.h"
44#include "stv6110x.h"
45#include "stv090x.h"
46#include "lnbh24.h"
47#include "drxk.h"
48#include "stv0367.h"
49#include "stv0367_priv.h"
50#include "cxd2841er.h"
51#include "tda18212.h"
52#include "stv0910.h"
53#include "stv6111.h"
54#include "lnbh25.h"
55#include "cxd2099.h"
56
57
58
59#define DDB_MAX_ADAPTER 64
60
61
62
63DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
64
65static int adapter_alloc;
66module_param(adapter_alloc, int, 0444);
67MODULE_PARM_DESC(adapter_alloc,
68 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
69
70
71
72static DEFINE_MUTEX(redirect_lock);
73
74struct workqueue_struct *ddb_wq;
75
76static struct ddb *ddbs[DDB_MAX_ADAPTER];
77
78
79
80
81
82static void ddb_set_dma_table(struct ddb_io *io)
83{
84 struct ddb *dev = io->port->dev;
85 struct ddb_dma *dma = io->dma;
86 u32 i;
87 u64 mem;
88
89 if (!dma)
90 return;
91 for (i = 0; i < dma->num; i++) {
92 mem = dma->pbuf[i];
93 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8);
94 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4);
95 }
96 dma->bufval = ((dma->div & 0x0f) << 16) |
97 ((dma->num & 0x1f) << 11) |
98 ((dma->size >> 7) & 0x7ff);
99}
100
101static void ddb_set_dma_tables(struct ddb *dev)
102{
103 u32 i;
104
105 for (i = 0; i < DDB_MAX_PORT; i++) {
106 if (dev->port[i].input[0])
107 ddb_set_dma_table(dev->port[i].input[0]);
108 if (dev->port[i].input[1])
109 ddb_set_dma_table(dev->port[i].input[1]);
110 if (dev->port[i].output)
111 ddb_set_dma_table(dev->port[i].output);
112 }
113}
114
115
116
117
118
119
120static void ddb_redirect_dma(struct ddb *dev,
121 struct ddb_dma *sdma,
122 struct ddb_dma *ddma)
123{
124 u32 i, base;
125 u64 mem;
126
127 sdma->bufval = ddma->bufval;
128 base = sdma->bufregs;
129 for (i = 0; i < ddma->num; i++) {
130 mem = ddma->pbuf[i];
131 ddbwritel(dev, mem & 0xffffffff, base + i * 8);
132 ddbwritel(dev, mem >> 32, base + i * 8 + 4);
133 }
134}
135
136static int ddb_unredirect(struct ddb_port *port)
137{
138 struct ddb_input *oredi, *iredi = NULL;
139 struct ddb_output *iredo = NULL;
140
141
142
143
144 mutex_lock(&redirect_lock);
145 if (port->output->dma->running) {
146 mutex_unlock(&redirect_lock);
147 return -EBUSY;
148 }
149 oredi = port->output->redi;
150 if (!oredi)
151 goto done;
152 if (port->input[0]) {
153 iredi = port->input[0]->redi;
154 iredo = port->input[0]->redo;
155
156 if (iredo) {
157 iredo->port->output->redi = oredi;
158 if (iredo->port->input[0]) {
159 iredo->port->input[0]->redi = iredi;
160 ddb_redirect_dma(oredi->port->dev,
161 oredi->dma, iredo->dma);
162 }
163 port->input[0]->redo = NULL;
164 ddb_set_dma_table(port->input[0]);
165 }
166 oredi->redi = iredi;
167 port->input[0]->redi = NULL;
168 }
169 oredi->redo = NULL;
170 port->output->redi = NULL;
171
172 ddb_set_dma_table(oredi);
173done:
174 mutex_unlock(&redirect_lock);
175 return 0;
176}
177
178static int ddb_redirect(u32 i, u32 p)
179{
180 struct ddb *idev = ddbs[(i >> 4) & 0x3f];
181 struct ddb_input *input, *input2;
182 struct ddb *pdev = ddbs[(p >> 4) & 0x3f];
183 struct ddb_port *port;
184
185 if (!idev || !pdev)
186 return -EINVAL;
187 if (!idev->has_dma || !pdev->has_dma)
188 return -EINVAL;
189
190 port = &pdev->port[p & 0x0f];
191 if (!port->output)
192 return -EINVAL;
193 if (ddb_unredirect(port))
194 return -EBUSY;
195
196 if (i == 8)
197 return 0;
198
199 input = &idev->input[i & 7];
200 if (!input)
201 return -EINVAL;
202
203 mutex_lock(&redirect_lock);
204 if (port->output->dma->running || input->dma->running) {
205 mutex_unlock(&redirect_lock);
206 return -EBUSY;
207 }
208 input2 = port->input[0];
209 if (input2) {
210 if (input->redi) {
211 input2->redi = input->redi;
212 input->redi = NULL;
213 } else
214 input2->redi = input;
215 }
216 input->redo = port->output;
217 port->output->redi = input;
218
219 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma);
220 mutex_unlock(&redirect_lock);
221 return 0;
222}
223
224
225
226
227
228static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
229{
230 int i;
231
232 if (!dma)
233 return;
234 for (i = 0; i < dma->num; i++) {
235 if (dma->vbuf[i]) {
236 if (alt_dma) {
237 dma_unmap_single(&pdev->dev, dma->pbuf[i],
238 dma->size,
239 dir ? DMA_TO_DEVICE :
240 DMA_FROM_DEVICE);
241 kfree(dma->vbuf[i]);
242 dma->vbuf[i] = NULL;
243 } else {
244 dma_free_coherent(&pdev->dev, dma->size,
245 dma->vbuf[i], dma->pbuf[i]);
246 }
247
248 dma->vbuf[i] = NULL;
249 }
250 }
251}
252
253static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
254{
255 int i;
256
257 if (!dma)
258 return 0;
259 for (i = 0; i < dma->num; i++) {
260 if (alt_dma) {
261 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL);
262 if (!dma->vbuf[i])
263 return -ENOMEM;
264 dma->pbuf[i] = dma_map_single(&pdev->dev,
265 dma->vbuf[i],
266 dma->size,
267 dir ? DMA_TO_DEVICE :
268 DMA_FROM_DEVICE);
269 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) {
270 kfree(dma->vbuf[i]);
271 dma->vbuf[i] = NULL;
272 return -ENOMEM;
273 }
274 } else {
275 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev,
276 dma->size,
277 &dma->pbuf[i],
278 GFP_KERNEL);
279 if (!dma->vbuf[i])
280 return -ENOMEM;
281 }
282 }
283 return 0;
284}
285
286int ddb_buffers_alloc(struct ddb *dev)
287{
288 int i;
289 struct ddb_port *port;
290
291 for (i = 0; i < dev->port_num; i++) {
292 port = &dev->port[i];
293 switch (port->class) {
294 case DDB_PORT_TUNER:
295 if (port->input[0]->dma)
296 if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
297 < 0)
298 return -1;
299 if (port->input[1]->dma)
300 if (dma_alloc(dev->pdev, port->input[1]->dma, 0)
301 < 0)
302 return -1;
303 break;
304 case DDB_PORT_CI:
305 case DDB_PORT_LOOP:
306 if (port->input[0]->dma)
307 if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
308 < 0)
309 return -1;
310 if (port->output->dma)
311 if (dma_alloc(dev->pdev, port->output->dma, 1)
312 < 0)
313 return -1;
314 break;
315 default:
316 break;
317 }
318 }
319 ddb_set_dma_tables(dev);
320 return 0;
321}
322
323void ddb_buffers_free(struct ddb *dev)
324{
325 int i;
326 struct ddb_port *port;
327
328 for (i = 0; i < dev->port_num; i++) {
329 port = &dev->port[i];
330
331 if (port->input[0] && port->input[0]->dma)
332 dma_free(dev->pdev, port->input[0]->dma, 0);
333 if (port->input[1] && port->input[1]->dma)
334 dma_free(dev->pdev, port->input[1]->dma, 0);
335 if (port->output && port->output->dma)
336 dma_free(dev->pdev, port->output->dma, 1);
337 }
338}
339
340static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
341{
342 struct ddb *dev = output->port->dev;
343 u32 bitrate = output->port->obr, max_bitrate = 72000;
344 u32 gap = 4, nco = 0;
345
346 *con = 0x1c;
347 if (output->port->gap != 0xffffffff) {
348 flags |= 1;
349 gap = output->port->gap;
350 max_bitrate = 0;
351 }
352 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) {
353 *con = 0x10c;
354 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) {
355 if (!(flags & 2)) {
356
357 max_bitrate = 0;
358 gap = 0;
359 if (bitrate != 72000) {
360 if (bitrate >= 96000)
361 *con |= 0x800;
362 else {
363 *con |= 0x1000;
364 nco = (bitrate * 8192 + 71999)
365 / 72000;
366 }
367 }
368 } else {
369
370 *con |= 0x1810;
371 if (bitrate <= 64000) {
372 max_bitrate = 64000;
373 nco = 8;
374 } else if (bitrate <= 72000) {
375 max_bitrate = 72000;
376 nco = 7;
377 } else {
378 max_bitrate = 96000;
379 nco = 5;
380 }
381 }
382 } else {
383 if (bitrate > 72000) {
384 *con |= 0x810;
385 max_bitrate = 96000;
386 }
387 *con |= 0x10;
388 }
389 }
390 if (max_bitrate > 0) {
391 if (bitrate > max_bitrate)
392 bitrate = max_bitrate;
393 if (bitrate < 31000)
394 bitrate = 31000;
395 gap = ((max_bitrate - bitrate) * 94) / bitrate;
396 if (gap < 2)
397 *con &= ~0x10;
398 else
399 gap -= 2;
400 if (gap > 127)
401 gap = 127;
402 }
403
404 *con2 = (nco << 16) | gap;
405}
406
407static void ddb_output_start(struct ddb_output *output)
408{
409 struct ddb *dev = output->port->dev;
410 u32 con = 0x11c, con2 = 0;
411
412 if (output->dma) {
413 spin_lock_irq(&output->dma->lock);
414 output->dma->cbuf = 0;
415 output->dma->coff = 0;
416 output->dma->stat = 0;
417 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
418 }
419
420 if (output->port->input[0]->port->class == DDB_PORT_LOOP)
421 con = (1UL << 13) | 0x14;
422 else
423 calc_con(output, &con, &con2, 0);
424
425 ddbwritel(dev, 0, TS_CONTROL(output));
426 ddbwritel(dev, 2, TS_CONTROL(output));
427 ddbwritel(dev, 0, TS_CONTROL(output));
428 ddbwritel(dev, con, TS_CONTROL(output));
429 ddbwritel(dev, con2, TS_CONTROL2(output));
430
431 if (output->dma) {
432 ddbwritel(dev, output->dma->bufval,
433 DMA_BUFFER_SIZE(output->dma));
434 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma));
435 ddbwritel(dev, 1, DMA_BASE_READ);
436 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma));
437 }
438
439 ddbwritel(dev, con | 1, TS_CONTROL(output));
440
441 if (output->dma) {
442 output->dma->running = 1;
443 spin_unlock_irq(&output->dma->lock);
444 }
445}
446
447static void ddb_output_stop(struct ddb_output *output)
448{
449 struct ddb *dev = output->port->dev;
450
451 if (output->dma)
452 spin_lock_irq(&output->dma->lock);
453
454 ddbwritel(dev, 0, TS_CONTROL(output));
455
456 if (output->dma) {
457 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
458 output->dma->running = 0;
459 spin_unlock_irq(&output->dma->lock);
460 }
461}
462
463static void ddb_input_stop(struct ddb_input *input)
464{
465 struct ddb *dev = input->port->dev;
466 u32 tag = DDB_LINK_TAG(input->port->lnr);
467
468 if (input->dma)
469 spin_lock_irq(&input->dma->lock);
470 ddbwritel(dev, 0, tag | TS_CONTROL(input));
471 if (input->dma) {
472 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
473 input->dma->running = 0;
474 spin_unlock_irq(&input->dma->lock);
475 }
476}
477
478static void ddb_input_start(struct ddb_input *input)
479{
480 struct ddb *dev = input->port->dev;
481
482 if (input->dma) {
483 spin_lock_irq(&input->dma->lock);
484 input->dma->cbuf = 0;
485 input->dma->coff = 0;
486 input->dma->stat = 0;
487 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
488 }
489 ddbwritel(dev, 0, TS_CONTROL(input));
490 ddbwritel(dev, 2, TS_CONTROL(input));
491 ddbwritel(dev, 0, TS_CONTROL(input));
492
493 if (input->dma) {
494 ddbwritel(dev, input->dma->bufval,
495 DMA_BUFFER_SIZE(input->dma));
496 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma));
497 ddbwritel(dev, 1, DMA_BASE_WRITE);
498 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma));
499 }
500
501 ddbwritel(dev, 0x09, TS_CONTROL(input));
502
503 if (input->dma) {
504 input->dma->running = 1;
505 spin_unlock_irq(&input->dma->lock);
506 }
507}
508
509
510static void ddb_input_start_all(struct ddb_input *input)
511{
512 struct ddb_input *i = input;
513 struct ddb_output *o;
514
515 mutex_lock(&redirect_lock);
516 while (i && (o = i->redo)) {
517 ddb_output_start(o);
518 i = o->port->input[0];
519 if (i)
520 ddb_input_start(i);
521 }
522 ddb_input_start(input);
523 mutex_unlock(&redirect_lock);
524}
525
526static void ddb_input_stop_all(struct ddb_input *input)
527{
528 struct ddb_input *i = input;
529 struct ddb_output *o;
530
531 mutex_lock(&redirect_lock);
532 ddb_input_stop(input);
533 while (i && (o = i->redo)) {
534 ddb_output_stop(o);
535 i = o->port->input[0];
536 if (i)
537 ddb_input_stop(i);
538 }
539 mutex_unlock(&redirect_lock);
540}
541
542static u32 ddb_output_free(struct ddb_output *output)
543{
544 u32 idx, off, stat = output->dma->stat;
545 s32 diff;
546
547 idx = (stat >> 11) & 0x1f;
548 off = (stat & 0x7ff) << 7;
549
550 if (output->dma->cbuf != idx) {
551 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
552 (output->dma->size - output->dma->coff <= 188))
553 return 0;
554 return 188;
555 }
556 diff = off - output->dma->coff;
557 if (diff <= 0 || diff > 188)
558 return 188;
559 return 0;
560}
561
562static ssize_t ddb_output_write(struct ddb_output *output,
563 const __user u8 *buf, size_t count)
564{
565 struct ddb *dev = output->port->dev;
566 u32 idx, off, stat = output->dma->stat;
567 u32 left = count, len;
568
569 idx = (stat >> 11) & 0x1f;
570 off = (stat & 0x7ff) << 7;
571
572 while (left) {
573 len = output->dma->size - output->dma->coff;
574 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
575 (off == 0)) {
576 if (len <= 188)
577 break;
578 len -= 188;
579 }
580 if (output->dma->cbuf == idx) {
581 if (off > output->dma->coff) {
582 len = off - output->dma->coff;
583 len -= (len % 188);
584 if (len <= 188)
585 break;
586 len -= 188;
587 }
588 }
589 if (len > left)
590 len = left;
591 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] +
592 output->dma->coff,
593 buf, len))
594 return -EIO;
595 if (alt_dma)
596 dma_sync_single_for_device(dev->dev,
597 output->dma->pbuf[output->dma->cbuf],
598 output->dma->size, DMA_TO_DEVICE);
599 left -= len;
600 buf += len;
601 output->dma->coff += len;
602 if (output->dma->coff == output->dma->size) {
603 output->dma->coff = 0;
604 output->dma->cbuf = ((output->dma->cbuf + 1) %
605 output->dma->num);
606 }
607 ddbwritel(dev,
608 (output->dma->cbuf << 11) |
609 (output->dma->coff >> 7),
610 DMA_BUFFER_ACK(output->dma));
611 }
612 return count - left;
613}
614
615static u32 ddb_input_avail(struct ddb_input *input)
616{
617 struct ddb *dev = input->port->dev;
618 u32 idx, off, stat = input->dma->stat;
619 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma));
620
621 idx = (stat >> 11) & 0x1f;
622 off = (stat & 0x7ff) << 7;
623
624 if (ctrl & 4) {
625 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl);
626 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma));
627 return 0;
628 }
629 if (input->dma->cbuf != idx)
630 return 188;
631 return 0;
632}
633
634static ssize_t ddb_input_read(struct ddb_input *input,
635 __user u8 *buf, size_t count)
636{
637 struct ddb *dev = input->port->dev;
638 u32 left = count;
639 u32 idx, free, stat = input->dma->stat;
640 int ret;
641
642 idx = (stat >> 11) & 0x1f;
643
644 while (left) {
645 if (input->dma->cbuf == idx)
646 return count - left;
647 free = input->dma->size - input->dma->coff;
648 if (free > left)
649 free = left;
650 if (alt_dma)
651 dma_sync_single_for_cpu(dev->dev,
652 input->dma->pbuf[input->dma->cbuf],
653 input->dma->size, DMA_FROM_DEVICE);
654 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] +
655 input->dma->coff, free);
656 if (ret)
657 return -EFAULT;
658 input->dma->coff += free;
659 if (input->dma->coff == input->dma->size) {
660 input->dma->coff = 0;
661 input->dma->cbuf = (input->dma->cbuf + 1) %
662 input->dma->num;
663 }
664 left -= free;
665 buf += free;
666 ddbwritel(dev,
667 (input->dma->cbuf << 11) | (input->dma->coff >> 7),
668 DMA_BUFFER_ACK(input->dma));
669 }
670 return count;
671}
672
673
674
675
676static ssize_t ts_write(struct file *file, const __user char *buf,
677 size_t count, loff_t *ppos)
678{
679 struct dvb_device *dvbdev = file->private_data;
680 struct ddb_output *output = dvbdev->priv;
681 struct ddb *dev = output->port->dev;
682 size_t left = count;
683 int stat;
684
685 if (!dev->has_dma)
686 return -EINVAL;
687 while (left) {
688 if (ddb_output_free(output) < 188) {
689 if (file->f_flags & O_NONBLOCK)
690 break;
691 if (wait_event_interruptible(
692 output->dma->wq,
693 ddb_output_free(output) >= 188) < 0)
694 break;
695 }
696 stat = ddb_output_write(output, buf, left);
697 if (stat < 0)
698 return stat;
699 buf += stat;
700 left -= stat;
701 }
702 return (left == count) ? -EAGAIN : (count - left);
703}
704
705static ssize_t ts_read(struct file *file, __user char *buf,
706 size_t count, loff_t *ppos)
707{
708 struct dvb_device *dvbdev = file->private_data;
709 struct ddb_output *output = dvbdev->priv;
710 struct ddb_input *input = output->port->input[0];
711 struct ddb *dev = output->port->dev;
712 size_t left = count;
713 int stat;
714
715 if (!dev->has_dma)
716 return -EINVAL;
717 while (left) {
718 if (ddb_input_avail(input) < 188) {
719 if (file->f_flags & O_NONBLOCK)
720 break;
721 if (wait_event_interruptible(
722 input->dma->wq,
723 ddb_input_avail(input) >= 188) < 0)
724 break;
725 }
726 stat = ddb_input_read(input, buf, left);
727 if (stat < 0)
728 return stat;
729 left -= stat;
730 buf += stat;
731 }
732 return (count && (left == count)) ? -EAGAIN : (count - left);
733}
734
735static unsigned int ts_poll(struct file *file, poll_table *wait)
736{
737 struct dvb_device *dvbdev = file->private_data;
738 struct ddb_output *output = dvbdev->priv;
739 struct ddb_input *input = output->port->input[0];
740
741 unsigned int mask = 0;
742
743 poll_wait(file, &input->dma->wq, wait);
744 poll_wait(file, &output->dma->wq, wait);
745 if (ddb_input_avail(input) >= 188)
746 mask |= POLLIN | POLLRDNORM;
747 if (ddb_output_free(output) >= 188)
748 mask |= POLLOUT | POLLWRNORM;
749 return mask;
750}
751
752static int ts_release(struct inode *inode, struct file *file)
753{
754 struct dvb_device *dvbdev = file->private_data;
755 struct ddb_output *output = NULL;
756 struct ddb_input *input = NULL;
757
758 if (dvbdev) {
759 output = dvbdev->priv;
760 input = output->port->input[0];
761 }
762
763 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
764 if (!input)
765 return -EINVAL;
766 ddb_input_stop(input);
767 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
768 if (!output)
769 return -EINVAL;
770 ddb_output_stop(output);
771 }
772 return dvb_generic_release(inode, file);
773}
774
775static int ts_open(struct inode *inode, struct file *file)
776{
777 int err;
778 struct dvb_device *dvbdev = file->private_data;
779 struct ddb_output *output = NULL;
780 struct ddb_input *input = NULL;
781
782 if (dvbdev) {
783 output = dvbdev->priv;
784 input = output->port->input[0];
785 }
786
787 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
788 if (!input)
789 return -EINVAL;
790 if (input->redo || input->redi)
791 return -EBUSY;
792 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
793 if (!output)
794 return -EINVAL;
795 } else
796 return -EINVAL;
797 err = dvb_generic_open(inode, file);
798 if (err < 0)
799 return err;
800 if ((file->f_flags & O_ACCMODE) == O_RDONLY)
801 ddb_input_start(input);
802 else if ((file->f_flags & O_ACCMODE) == O_WRONLY)
803 ddb_output_start(output);
804 return err;
805}
806
807static const struct file_operations ci_fops = {
808 .owner = THIS_MODULE,
809 .read = ts_read,
810 .write = ts_write,
811 .open = ts_open,
812 .release = ts_release,
813 .poll = ts_poll,
814 .mmap = NULL,
815};
816
817static struct dvb_device dvbdev_ci = {
818 .priv = NULL,
819 .readers = 1,
820 .writers = 1,
821 .users = 2,
822 .fops = &ci_fops,
823};
824
825
826
827
828
829static int locked_gate_ctrl(struct dvb_frontend *fe, int enable)
830{
831 struct ddb_input *input = fe->sec_priv;
832 struct ddb_port *port = input->port;
833 struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
834 int status;
835
836 if (enable) {
837 mutex_lock(&port->i2c_gate_lock);
838 status = dvb->i2c_gate_ctrl(fe, 1);
839 } else {
840 status = dvb->i2c_gate_ctrl(fe, 0);
841 mutex_unlock(&port->i2c_gate_lock);
842 }
843 return status;
844}
845
846static int demod_attach_drxk(struct ddb_input *input)
847{
848 struct i2c_adapter *i2c = &input->port->i2c->adap;
849 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
850 struct device *dev = input->port->dev->dev;
851 struct dvb_frontend *fe;
852 struct drxk_config config;
853
854 memset(&config, 0, sizeof(config));
855 config.adr = 0x29 + (input->nr & 1);
856 config.microcode_name = "drxk_a3.mc";
857
858 fe = dvb->fe = dvb_attach(drxk_attach, &config, i2c);
859 if (!fe) {
860 dev_err(dev, "No DRXK found!\n");
861 return -ENODEV;
862 }
863 fe->sec_priv = input;
864 dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
865 fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
866 return 0;
867}
868
869static int tuner_attach_tda18271(struct ddb_input *input)
870{
871 struct i2c_adapter *i2c = &input->port->i2c->adap;
872 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
873 struct device *dev = input->port->dev->dev;
874 struct dvb_frontend *fe;
875
876 if (dvb->fe->ops.i2c_gate_ctrl)
877 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
878 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60);
879 if (dvb->fe->ops.i2c_gate_ctrl)
880 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
881 if (!fe) {
882 dev_err(dev, "No TDA18271 found!\n");
883 return -ENODEV;
884 }
885 return 0;
886}
887
888
889
890
891
892static struct stv0367_config ddb_stv0367_config[] = {
893 {
894 .demod_address = 0x1f,
895 .xtal = 27000000,
896 .if_khz = 0,
897 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
898 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
899 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
900 }, {
901 .demod_address = 0x1e,
902 .xtal = 27000000,
903 .if_khz = 0,
904 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
905 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
906 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
907 },
908};
909
910static int demod_attach_stv0367(struct ddb_input *input)
911{
912 struct i2c_adapter *i2c = &input->port->i2c->adap;
913 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
914 struct device *dev = input->port->dev->dev;
915 struct dvb_frontend *fe;
916
917
918 fe = dvb->fe = dvb_attach(stv0367ddb_attach,
919 &ddb_stv0367_config[(input->nr & 1)], i2c);
920
921 if (!dvb->fe) {
922 dev_err(dev, "No stv0367 found!\n");
923 return -ENODEV;
924 }
925 fe->sec_priv = input;
926 dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
927 fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
928 return 0;
929}
930
931static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr)
932{
933 struct i2c_adapter *adapter = &input->port->i2c->adap;
934 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
935 struct device *dev = input->port->dev->dev;
936 u8 tda_id[2];
937 u8 subaddr = 0x00;
938
939 dev_dbg(dev, "stv0367-tda18212 tuner ping\n");
940 if (dvb->fe->ops.i2c_gate_ctrl)
941 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
942
943 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
944 dev_dbg(dev, "tda18212 ping 1 fail\n");
945 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
946 dev_warn(dev, "tda18212 ping failed, expect problems\n");
947
948 if (dvb->fe->ops.i2c_gate_ctrl)
949 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
950
951 return 0;
952}
953
954static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24)
955{
956 struct i2c_adapter *i2c = &input->port->i2c->adap;
957 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
958 struct device *dev = input->port->dev->dev;
959 struct dvb_frontend *fe;
960 struct cxd2841er_config cfg;
961
962
963 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1;
964
965 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500;
966 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE |
967 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG |
968 CXD2841ER_TSBITS;
969
970 if (!par)
971 cfg.flags |= CXD2841ER_TS_SERIAL;
972
973
974 fe = dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c);
975
976 if (!dvb->fe) {
977 dev_err(dev, "No cxd2837/38/43/54 found!\n");
978 return -ENODEV;
979 }
980 fe->sec_priv = input;
981 dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
982 fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
983 return 0;
984}
985
986static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype)
987{
988 struct i2c_adapter *adapter = &input->port->i2c->adap;
989 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
990 struct device *dev = input->port->dev->dev;
991 struct i2c_client *client;
992 struct tda18212_config config = {
993 .fe = dvb->fe,
994 .if_dvbt_6 = 3550,
995 .if_dvbt_7 = 3700,
996 .if_dvbt_8 = 4150,
997 .if_dvbt2_6 = 3250,
998 .if_dvbt2_7 = 4000,
999 .if_dvbt2_8 = 4000,
1000 .if_dvbc = 5000,
1001 };
1002 struct i2c_board_info board_info = {
1003 .type = "tda18212",
1004 .platform_data = &config,
1005 };
1006
1007 if (input->nr & 1)
1008 board_info.addr = 0x63;
1009 else
1010 board_info.addr = 0x60;
1011
1012
1013
1014
1015
1016 if (porttype == DDB_TUNER_DVBCT_ST)
1017 tuner_tda18212_ping(input, board_info.addr);
1018
1019 request_module(board_info.type);
1020
1021
1022 client = i2c_new_device(adapter, &board_info);
1023 if (client == NULL || client->dev.driver == NULL)
1024 goto err;
1025
1026 if (!try_module_get(client->dev.driver->owner)) {
1027 i2c_unregister_device(client);
1028 goto err;
1029 }
1030
1031 dvb->i2c_client[0] = client;
1032
1033 return 0;
1034err:
1035 dev_notice(dev, "TDA18212 tuner not found. Device is not fully operational.\n");
1036 return -ENODEV;
1037}
1038
1039
1040
1041
1042
1043static struct stv090x_config stv0900 = {
1044 .device = STV0900,
1045 .demod_mode = STV090x_DUAL,
1046 .clk_mode = STV090x_CLK_EXT,
1047
1048 .xtal = 27000000,
1049 .address = 0x69,
1050
1051 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1052 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1053
1054 .ts1_tei = 1,
1055 .ts2_tei = 1,
1056
1057 .repeater_level = STV090x_RPTLEVEL_16,
1058
1059 .adc1_range = STV090x_ADC_1Vpp,
1060 .adc2_range = STV090x_ADC_1Vpp,
1061
1062 .diseqc_envelope_mode = true,
1063};
1064
1065static struct stv090x_config stv0900_aa = {
1066 .device = STV0900,
1067 .demod_mode = STV090x_DUAL,
1068 .clk_mode = STV090x_CLK_EXT,
1069
1070 .xtal = 27000000,
1071 .address = 0x68,
1072
1073 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1074 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1075
1076 .ts1_tei = 1,
1077 .ts2_tei = 1,
1078
1079 .repeater_level = STV090x_RPTLEVEL_16,
1080
1081 .adc1_range = STV090x_ADC_1Vpp,
1082 .adc2_range = STV090x_ADC_1Vpp,
1083
1084 .diseqc_envelope_mode = true,
1085};
1086
1087static struct stv6110x_config stv6110a = {
1088 .addr = 0x60,
1089 .refclk = 27000000,
1090 .clk_div = 1,
1091};
1092
1093static struct stv6110x_config stv6110b = {
1094 .addr = 0x63,
1095 .refclk = 27000000,
1096 .clk_div = 1,
1097};
1098
1099static int demod_attach_stv0900(struct ddb_input *input, int type)
1100{
1101 struct i2c_adapter *i2c = &input->port->i2c->adap;
1102 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
1103 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1104 struct device *dev = input->port->dev->dev;
1105
1106 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c,
1107 (input->nr & 1) ? STV090x_DEMODULATOR_1
1108 : STV090x_DEMODULATOR_0);
1109 if (!dvb->fe) {
1110 dev_err(dev, "No STV0900 found!\n");
1111 return -ENODEV;
1112 }
1113 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0,
1114 0, (input->nr & 1) ?
1115 (0x09 - type) : (0x0b - type))) {
1116 dev_err(dev, "No LNBH24 found!\n");
1117 return -ENODEV;
1118 }
1119 return 0;
1120}
1121
1122static int tuner_attach_stv6110(struct ddb_input *input, int type)
1123{
1124 struct i2c_adapter *i2c = &input->port->i2c->adap;
1125 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1126 struct device *dev = input->port->dev->dev;
1127 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
1128 struct stv6110x_config *tunerconf = (input->nr & 1) ?
1129 &stv6110b : &stv6110a;
1130 const struct stv6110x_devctl *ctl;
1131
1132 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c);
1133 if (!ctl) {
1134 dev_err(dev, "No STV6110X found!\n");
1135 return -ENODEV;
1136 }
1137 dev_info(dev, "attach tuner input %d adr %02x\n",
1138 input->nr, tunerconf->addr);
1139
1140 feconf->tuner_init = ctl->tuner_init;
1141 feconf->tuner_sleep = ctl->tuner_sleep;
1142 feconf->tuner_set_mode = ctl->tuner_set_mode;
1143 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
1144 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
1145 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
1146 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
1147 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
1148 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
1149 feconf->tuner_set_refclk = ctl->tuner_set_refclk;
1150 feconf->tuner_get_status = ctl->tuner_get_status;
1151
1152 return 0;
1153}
1154
1155static const struct stv0910_cfg stv0910_p = {
1156 .adr = 0x68,
1157 .parallel = 1,
1158 .rptlvl = 4,
1159 .clk = 30000000,
1160};
1161
1162static const struct lnbh25_config lnbh25_cfg = {
1163 .i2c_address = 0x0c << 1,
1164 .data2_config = LNBH25_TEN
1165};
1166
1167static int demod_attach_stv0910(struct ddb_input *input, int type)
1168{
1169 struct i2c_adapter *i2c = &input->port->i2c->adap;
1170 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1171 struct device *dev = input->port->dev->dev;
1172 struct stv0910_cfg cfg = stv0910_p;
1173 struct lnbh25_config lnbcfg = lnbh25_cfg;
1174
1175 if (stv0910_single)
1176 cfg.single = 1;
1177
1178 if (type)
1179 cfg.parallel = 2;
1180 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1));
1181 if (!dvb->fe) {
1182 cfg.adr = 0x6c;
1183 dvb->fe = dvb_attach(stv0910_attach, i2c,
1184 &cfg, (input->nr & 1));
1185 }
1186 if (!dvb->fe) {
1187 dev_err(dev, "No STV0910 found!\n");
1188 return -ENODEV;
1189 }
1190
1191
1192
1193
1194 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1);
1195 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) {
1196 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1);
1197 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) {
1198 dev_err(dev, "No LNBH25 found!\n");
1199 return -ENODEV;
1200 }
1201 }
1202
1203 return 0;
1204}
1205
1206static int tuner_attach_stv6111(struct ddb_input *input, int type)
1207{
1208 struct i2c_adapter *i2c = &input->port->i2c->adap;
1209 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1210 struct device *dev = input->port->dev->dev;
1211 struct dvb_frontend *fe;
1212 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60);
1213
1214 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr);
1215 if (!fe) {
1216 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4);
1217 if (!fe) {
1218 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr);
1219 return -ENODEV;
1220 }
1221 }
1222 return 0;
1223}
1224
1225static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
1226{
1227 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
1228 struct ddb_input *input = dvbdmx->priv;
1229 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1230
1231 if (!dvb->users)
1232 ddb_input_start_all(input);
1233
1234 return ++dvb->users;
1235}
1236
1237static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
1238{
1239 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
1240 struct ddb_input *input = dvbdmx->priv;
1241 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1242
1243 if (--dvb->users)
1244 return dvb->users;
1245
1246 ddb_input_stop_all(input);
1247 return 0;
1248}
1249
1250static void dvb_input_detach(struct ddb_input *input)
1251{
1252 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1253 struct dvb_demux *dvbdemux = &dvb->demux;
1254 struct i2c_client *client;
1255
1256 switch (dvb->attached) {
1257 case 0x31:
1258 if (dvb->fe2)
1259 dvb_unregister_frontend(dvb->fe2);
1260 if (dvb->fe)
1261 dvb_unregister_frontend(dvb->fe);
1262
1263 case 0x30:
1264 if (dvb->fe2)
1265 dvb_frontend_detach(dvb->fe2);
1266 if (dvb->fe)
1267 dvb_frontend_detach(dvb->fe);
1268 dvb->fe = dvb->fe2 = NULL;
1269
1270 case 0x20:
1271 client = dvb->i2c_client[0];
1272 if (client) {
1273 module_put(client->dev.driver->owner);
1274 i2c_unregister_device(client);
1275 }
1276
1277 dvb_net_release(&dvb->dvbnet);
1278
1279 case 0x12:
1280 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1281 &dvb->hw_frontend);
1282 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1283 &dvb->mem_frontend);
1284
1285 case 0x11:
1286 dvb_dmxdev_release(&dvb->dmxdev);
1287
1288 case 0x10:
1289 dvb_dmx_release(&dvb->demux);
1290
1291 case 0x01:
1292 break;
1293 }
1294 dvb->attached = 0x00;
1295}
1296
1297static int dvb_register_adapters(struct ddb *dev)
1298{
1299 int i, ret = 0;
1300 struct ddb_port *port;
1301 struct dvb_adapter *adap;
1302
1303 if (adapter_alloc == 3) {
1304 port = &dev->port[0];
1305 adap = port->dvb[0].adap;
1306 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE,
1307 port->dev->dev,
1308 adapter_nr);
1309 if (ret < 0)
1310 return ret;
1311 port->dvb[0].adap_registered = 1;
1312 for (i = 0; i < dev->port_num; i++) {
1313 port = &dev->port[i];
1314 port->dvb[0].adap = adap;
1315 port->dvb[1].adap = adap;
1316 }
1317 return 0;
1318 }
1319
1320 for (i = 0; i < dev->port_num; i++) {
1321 port = &dev->port[i];
1322 switch (port->class) {
1323 case DDB_PORT_TUNER:
1324 adap = port->dvb[0].adap;
1325 ret = dvb_register_adapter(adap, "DDBridge",
1326 THIS_MODULE,
1327 port->dev->dev,
1328 adapter_nr);
1329 if (ret < 0)
1330 return ret;
1331 port->dvb[0].adap_registered = 1;
1332
1333 if (adapter_alloc > 0) {
1334 port->dvb[1].adap = port->dvb[0].adap;
1335 break;
1336 }
1337 adap = port->dvb[1].adap;
1338 ret = dvb_register_adapter(adap, "DDBridge",
1339 THIS_MODULE,
1340 port->dev->dev,
1341 adapter_nr);
1342 if (ret < 0)
1343 return ret;
1344 port->dvb[1].adap_registered = 1;
1345 break;
1346
1347 case DDB_PORT_CI:
1348 case DDB_PORT_LOOP:
1349 adap = port->dvb[0].adap;
1350 ret = dvb_register_adapter(adap, "DDBridge",
1351 THIS_MODULE,
1352 port->dev->dev,
1353 adapter_nr);
1354 if (ret < 0)
1355 return ret;
1356 port->dvb[0].adap_registered = 1;
1357 break;
1358 default:
1359 if (adapter_alloc < 2)
1360 break;
1361 adap = port->dvb[0].adap;
1362 ret = dvb_register_adapter(adap, "DDBridge",
1363 THIS_MODULE,
1364 port->dev->dev,
1365 adapter_nr);
1366 if (ret < 0)
1367 return ret;
1368 port->dvb[0].adap_registered = 1;
1369 break;
1370 }
1371 }
1372 return ret;
1373}
1374
1375static void dvb_unregister_adapters(struct ddb *dev)
1376{
1377 int i;
1378 struct ddb_port *port;
1379 struct ddb_dvb *dvb;
1380
1381 for (i = 0; i < dev->link[0].info->port_num; i++) {
1382 port = &dev->port[i];
1383
1384 dvb = &port->dvb[0];
1385 if (dvb->adap_registered)
1386 dvb_unregister_adapter(dvb->adap);
1387 dvb->adap_registered = 0;
1388
1389 dvb = &port->dvb[1];
1390 if (dvb->adap_registered)
1391 dvb_unregister_adapter(dvb->adap);
1392 dvb->adap_registered = 0;
1393 }
1394}
1395
1396static int dvb_input_attach(struct ddb_input *input)
1397{
1398 int ret = 0;
1399 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1400 struct ddb_port *port = input->port;
1401 struct dvb_adapter *adap = dvb->adap;
1402 struct dvb_demux *dvbdemux = &dvb->demux;
1403 int par = 0, osc24 = 0;
1404
1405 dvb->attached = 0x01;
1406
1407 dvbdemux->priv = input;
1408 dvbdemux->dmx.capabilities = DMX_TS_FILTERING |
1409 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
1410 dvbdemux->start_feed = start_feed;
1411 dvbdemux->stop_feed = stop_feed;
1412 dvbdemux->filternum = dvbdemux->feednum = 256;
1413 ret = dvb_dmx_init(dvbdemux);
1414 if (ret < 0)
1415 return ret;
1416 dvb->attached = 0x10;
1417
1418 dvb->dmxdev.filternum = 256;
1419 dvb->dmxdev.demux = &dvbdemux->dmx;
1420 ret = dvb_dmxdev_init(&dvb->dmxdev, adap);
1421 if (ret < 0)
1422 return ret;
1423 dvb->attached = 0x11;
1424
1425 dvb->mem_frontend.source = DMX_MEMORY_FE;
1426 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend);
1427 dvb->hw_frontend.source = DMX_FRONTEND_0;
1428 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend);
1429 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend);
1430 if (ret < 0)
1431 return ret;
1432 dvb->attached = 0x12;
1433
1434 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux);
1435 if (ret < 0)
1436 return ret;
1437 dvb->attached = 0x20;
1438
1439 dvb->fe = dvb->fe2 = NULL;
1440 switch (port->type) {
1441 case DDB_TUNER_MXL5XX:
1442 if (fe_attach_mxl5xx(input) < 0)
1443 return -ENODEV;
1444 break;
1445 case DDB_TUNER_DVBS_ST:
1446 if (demod_attach_stv0900(input, 0) < 0)
1447 return -ENODEV;
1448 if (tuner_attach_stv6110(input, 0) < 0)
1449 return -ENODEV;
1450 break;
1451 case DDB_TUNER_DVBS_ST_AA:
1452 if (demod_attach_stv0900(input, 1) < 0)
1453 return -ENODEV;
1454 if (tuner_attach_stv6110(input, 1) < 0)
1455 return -ENODEV;
1456 break;
1457 case DDB_TUNER_DVBS_STV0910:
1458 if (demod_attach_stv0910(input, 0) < 0)
1459 return -ENODEV;
1460 if (tuner_attach_stv6111(input, 0) < 0)
1461 return -ENODEV;
1462 break;
1463 case DDB_TUNER_DVBS_STV0910_PR:
1464 if (demod_attach_stv0910(input, 1) < 0)
1465 return -ENODEV;
1466 if (tuner_attach_stv6111(input, 1) < 0)
1467 return -ENODEV;
1468 break;
1469 case DDB_TUNER_DVBS_STV0910_P:
1470 if (demod_attach_stv0910(input, 0) < 0)
1471 return -ENODEV;
1472 if (tuner_attach_stv6111(input, 1) < 0)
1473 return -ENODEV;
1474 break;
1475 case DDB_TUNER_DVBCT_TR:
1476 if (demod_attach_drxk(input) < 0)
1477 return -ENODEV;
1478 if (tuner_attach_tda18271(input) < 0)
1479 return -ENODEV;
1480 break;
1481 case DDB_TUNER_DVBCT_ST:
1482 if (demod_attach_stv0367(input) < 0)
1483 return -ENODEV;
1484 if (tuner_attach_tda18212(input, port->type) < 0) {
1485 if (dvb->fe2)
1486 dvb_frontend_detach(dvb->fe2);
1487 if (dvb->fe)
1488 dvb_frontend_detach(dvb->fe);
1489 return -ENODEV;
1490 }
1491 break;
1492 case DDB_TUNER_DVBC2T2I_SONY_P:
1493 if (input->port->dev->link[input->port->lnr].info->ts_quirks &
1494 TS_QUIRK_ALT_OSC)
1495 osc24 = 0;
1496 else
1497 osc24 = 1;
1498
1499 case DDB_TUNER_DVBCT2_SONY_P:
1500 case DDB_TUNER_DVBC2T2_SONY_P:
1501 case DDB_TUNER_ISDBT_SONY_P:
1502 if (input->port->dev->link[input->port->lnr].info->ts_quirks
1503 & TS_QUIRK_SERIAL)
1504 par = 0;
1505 else
1506 par = 1;
1507 if (demod_attach_cxd28xx(input, par, osc24) < 0)
1508 return -ENODEV;
1509 if (tuner_attach_tda18212(input, port->type) < 0) {
1510 if (dvb->fe2)
1511 dvb_frontend_detach(dvb->fe2);
1512 if (dvb->fe)
1513 dvb_frontend_detach(dvb->fe);
1514 return -ENODEV;
1515 }
1516 break;
1517 case DDB_TUNER_DVBC2T2I_SONY:
1518 osc24 = 1;
1519
1520 case DDB_TUNER_DVBCT2_SONY:
1521 case DDB_TUNER_DVBC2T2_SONY:
1522 case DDB_TUNER_ISDBT_SONY:
1523 if (demod_attach_cxd28xx(input, 0, osc24) < 0)
1524 return -ENODEV;
1525 if (tuner_attach_tda18212(input, port->type) < 0) {
1526 if (dvb->fe2)
1527 dvb_frontend_detach(dvb->fe2);
1528 if (dvb->fe)
1529 dvb_frontend_detach(dvb->fe);
1530 return -ENODEV;
1531 }
1532 break;
1533 default:
1534 return 0;
1535 }
1536 dvb->attached = 0x30;
1537
1538 if (dvb->fe) {
1539 if (dvb_register_frontend(adap, dvb->fe) < 0)
1540 return -ENODEV;
1541
1542 if (dvb->fe2) {
1543 if (dvb_register_frontend(adap, dvb->fe2) < 0)
1544 return -ENODEV;
1545 dvb->fe2->tuner_priv = dvb->fe->tuner_priv;
1546 memcpy(&dvb->fe2->ops.tuner_ops,
1547 &dvb->fe->ops.tuner_ops,
1548 sizeof(struct dvb_tuner_ops));
1549 }
1550 }
1551
1552 dvb->attached = 0x31;
1553 return 0;
1554}
1555
1556static int port_has_encti(struct ddb_port *port)
1557{
1558 struct device *dev = port->dev->dev;
1559 u8 val;
1560 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val);
1561
1562 if (!ret)
1563 dev_info(dev, "[0x20]=0x%02x\n", val);
1564 return ret ? 0 : 1;
1565}
1566
1567static int port_has_cxd(struct ddb_port *port, u8 *type)
1568{
1569 u8 val;
1570 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4];
1571 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0,
1572 .buf = probe, .len = 4 },
1573 { .addr = 0x40, .flags = I2C_M_RD,
1574 .buf = data, .len = 4 } };
1575 val = i2c_transfer(&port->i2c->adap, msgs, 2);
1576 if (val != 2)
1577 return 0;
1578
1579 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43)
1580 *type = 2;
1581 else
1582 *type = 1;
1583 return 1;
1584}
1585
1586static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id)
1587{
1588 u8 probe[1] = { 0x00 }, data[4];
1589
1590 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4))
1591 return 0;
1592 if (data[0] == 'D' && data[1] == 'F') {
1593 *id = data[2];
1594 *type = 1;
1595 return 1;
1596 }
1597 if (data[0] == 'C' && data[1] == 'I') {
1598 *id = data[2];
1599 *type = 2;
1600 return 1;
1601 }
1602 return 0;
1603}
1604
1605static int port_has_stv0900(struct ddb_port *port)
1606{
1607 u8 val;
1608
1609 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
1610 return 0;
1611 return 1;
1612}
1613
1614static int port_has_stv0900_aa(struct ddb_port *port, u8 *id)
1615{
1616 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0)
1617 return 0;
1618 return 1;
1619}
1620
1621static int port_has_drxks(struct ddb_port *port)
1622{
1623 u8 val;
1624
1625 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
1626 return 0;
1627 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
1628 return 0;
1629 return 1;
1630}
1631
1632static int port_has_stv0367(struct ddb_port *port)
1633{
1634 u8 val;
1635
1636 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0)
1637 return 0;
1638 if (val != 0x60)
1639 return 0;
1640 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0)
1641 return 0;
1642 if (val != 0x60)
1643 return 0;
1644 return 1;
1645}
1646
1647static int init_xo2(struct ddb_port *port)
1648{
1649 struct i2c_adapter *i2c = &port->i2c->adap;
1650 struct ddb *dev = port->dev;
1651 u8 val, data[2];
1652 int res;
1653
1654 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
1655 if (res < 0)
1656 return res;
1657
1658 if (data[0] != 0x01) {
1659 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr);
1660 return -1;
1661 }
1662
1663 i2c_read_reg(i2c, 0x10, 0x08, &val);
1664 if (val != 0) {
1665 i2c_write_reg(i2c, 0x10, 0x08, 0x00);
1666 msleep(100);
1667 }
1668
1669 i2c_write_reg(i2c, 0x10, 0x08, 0x04);
1670 usleep_range(2000, 3000);
1671
1672 i2c_write_reg(i2c, 0x10, 0x08, 0x07);
1673
1674
1675 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed);
1676
1677 if (dev->link[port->lnr].info->con_clock) {
1678 dev_info(dev->dev, "Setting continuous clock for XO2\n");
1679 i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
1680 i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
1681 } else {
1682 i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
1683 i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
1684 }
1685
1686 usleep_range(2000, 3000);
1687
1688 i2c_write_reg(i2c, 0x10, 0x08, 0x87);
1689
1690 return 0;
1691}
1692
1693static int init_xo2_ci(struct ddb_port *port)
1694{
1695 struct i2c_adapter *i2c = &port->i2c->adap;
1696 struct ddb *dev = port->dev;
1697 u8 val, data[2];
1698 int res;
1699
1700 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
1701 if (res < 0)
1702 return res;
1703
1704 if (data[0] > 1) {
1705 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n",
1706 port->nr, data[0]);
1707 return -1;
1708 }
1709 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n",
1710 port->nr, data[0], data[1]);
1711
1712 i2c_read_reg(i2c, 0x10, 0x08, &val);
1713 if (val != 0) {
1714 i2c_write_reg(i2c, 0x10, 0x08, 0x00);
1715 msleep(100);
1716 }
1717
1718 i2c_write_reg(i2c, 0x10, 0x08, 3);
1719 usleep_range(2000, 3000);
1720
1721
1722
1723 i2c_write_reg(i2c, 0x10, 0x09, 1);
1724
1725 i2c_write_reg(i2c, 0x10, 0x08, 0x83);
1726 usleep_range(2000, 3000);
1727
1728 if (dev->link[port->lnr].info->con_clock) {
1729 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n");
1730 i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
1731 i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
1732 } else {
1733 i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
1734 i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
1735 }
1736 return 0;
1737}
1738
1739static int port_has_cxd28xx(struct ddb_port *port, u8 *id)
1740{
1741 struct i2c_adapter *i2c = &port->i2c->adap;
1742 int status;
1743
1744 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0);
1745 if (status)
1746 return 0;
1747 status = i2c_read_reg(i2c, 0x6e, 0xfd, id);
1748 if (status)
1749 return 0;
1750 return 1;
1751}
1752
1753static char *xo2names[] = {
1754 "DUAL DVB-S2", "DUAL DVB-C/T/T2",
1755 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2",
1756 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T",
1757 "", ""
1758};
1759
1760static char *xo2types[] = {
1761 "DVBS_ST", "DVBCT2_SONY",
1762 "ISDBT_SONY", "DVBC2T2_SONY",
1763 "ATSC_ST", "DVBC2T2I_SONY"
1764};
1765
1766static void ddb_port_probe(struct ddb_port *port)
1767{
1768 struct ddb *dev = port->dev;
1769 u32 l = port->lnr;
1770 u8 id, type;
1771
1772 port->name = "NO MODULE";
1773 port->type_name = "NONE";
1774 port->class = DDB_PORT_NONE;
1775
1776
1777
1778 if (port->nr == ts_loop) {
1779 port->name = "TS LOOP";
1780 port->class = DDB_PORT_LOOP;
1781 return;
1782 }
1783
1784 if (port->nr == 1 && dev->link[l].info->type == DDB_OCTOPUS_CI &&
1785 dev->link[l].info->i2c_mask == 1) {
1786 port->name = "NO TAB";
1787 port->class = DDB_PORT_NONE;
1788 return;
1789 }
1790
1791 if (dev->link[l].info->type == DDB_OCTOPUS_MAX) {
1792 port->name = "DUAL DVB-S2 MAX";
1793 port->type_name = "MXL5XX";
1794 port->class = DDB_PORT_TUNER;
1795 port->type = DDB_TUNER_MXL5XX;
1796 if (port->i2c)
1797 ddbwritel(dev, I2C_SPEED_400,
1798 port->i2c->regs + I2C_TIMING);
1799 return;
1800 }
1801
1802 if (port->nr > 1 && dev->link[l].info->type == DDB_OCTOPUS_CI) {
1803 port->name = "CI internal";
1804 port->type_name = "INTERNAL";
1805 port->class = DDB_PORT_CI;
1806 port->type = DDB_CI_INTERNAL;
1807 }
1808
1809 if (!port->i2c)
1810 return;
1811
1812
1813
1814 if (port_has_cxd(port, &id)) {
1815 if (id == 1) {
1816 port->name = "CI";
1817 port->type_name = "CXD2099";
1818 port->class = DDB_PORT_CI;
1819 port->type = DDB_CI_EXTERNAL_SONY;
1820 ddbwritel(dev, I2C_SPEED_400,
1821 port->i2c->regs + I2C_TIMING);
1822 } else {
1823 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n",
1824 port->nr);
1825 return;
1826 }
1827 } else if (port_has_xo2(port, &type, &id)) {
1828 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1829
1830 if (type == 2) {
1831 port->name = "DuoFlex CI";
1832 port->class = DDB_PORT_CI;
1833 port->type = DDB_CI_EXTERNAL_XO2;
1834 port->type_name = "CI_XO2";
1835 init_xo2_ci(port);
1836 return;
1837 }
1838 id >>= 2;
1839 if (id > 5) {
1840 port->name = "unknown XO2 DuoFlex";
1841 port->type_name = "UNKNOWN";
1842 } else {
1843 port->name = xo2names[id];
1844 port->class = DDB_PORT_TUNER;
1845 port->type = DDB_TUNER_XO2 + id;
1846 port->type_name = xo2types[id];
1847 init_xo2(port);
1848 }
1849 } else if (port_has_cxd28xx(port, &id)) {
1850 switch (id) {
1851 case 0xa4:
1852 port->name = "DUAL DVB-C2T2 CXD2843";
1853 port->type = DDB_TUNER_DVBC2T2_SONY_P;
1854 port->type_name = "DVBC2T2_SONY";
1855 break;
1856 case 0xb1:
1857 port->name = "DUAL DVB-CT2 CXD2837";
1858 port->type = DDB_TUNER_DVBCT2_SONY_P;
1859 port->type_name = "DVBCT2_SONY";
1860 break;
1861 case 0xb0:
1862 port->name = "DUAL ISDB-T CXD2838";
1863 port->type = DDB_TUNER_ISDBT_SONY_P;
1864 port->type_name = "ISDBT_SONY";
1865 break;
1866 case 0xc1:
1867 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854";
1868 port->type = DDB_TUNER_DVBC2T2I_SONY_P;
1869 port->type_name = "DVBC2T2I_ISDBT_SONY";
1870 break;
1871 default:
1872 return;
1873 }
1874 port->class = DDB_PORT_TUNER;
1875 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1876 } else if (port_has_stv0900(port)) {
1877 port->name = "DUAL DVB-S2";
1878 port->class = DDB_PORT_TUNER;
1879 port->type = DDB_TUNER_DVBS_ST;
1880 port->type_name = "DVBS_ST";
1881 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1882 } else if (port_has_stv0900_aa(port, &id)) {
1883 port->name = "DUAL DVB-S2";
1884 port->class = DDB_PORT_TUNER;
1885 if (id == 0x51) {
1886 if (port->nr == 0 &&
1887 dev->link[l].info->ts_quirks & TS_QUIRK_REVERSED)
1888 port->type = DDB_TUNER_DVBS_STV0910_PR;
1889 else
1890 port->type = DDB_TUNER_DVBS_STV0910_P;
1891 port->type_name = "DVBS_ST_0910";
1892 } else {
1893 port->type = DDB_TUNER_DVBS_ST_AA;
1894 port->type_name = "DVBS_ST_AA";
1895 }
1896 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1897 } else if (port_has_drxks(port)) {
1898 port->name = "DUAL DVB-C/T";
1899 port->class = DDB_PORT_TUNER;
1900 port->type = DDB_TUNER_DVBCT_TR;
1901 port->type_name = "DVBCT_TR";
1902 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1903 } else if (port_has_stv0367(port)) {
1904 port->name = "DUAL DVB-C/T";
1905 port->class = DDB_PORT_TUNER;
1906 port->type = DDB_TUNER_DVBCT_ST;
1907 port->type_name = "DVBCT_ST";
1908 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1909 } else if (port_has_encti(port)) {
1910 port->name = "ENCTI";
1911 port->class = DDB_PORT_LOOP;
1912 }
1913}
1914
1915
1916
1917
1918
1919
1920static int wait_ci_ready(struct ddb_ci *ci)
1921{
1922 u32 count = 10;
1923
1924 ndelay(500);
1925 do {
1926 if (ddbreadl(ci->port->dev,
1927 CI_CONTROL(ci->nr)) & CI_READY)
1928 break;
1929 usleep_range(1, 2);
1930 if ((--count) == 0)
1931 return -1;
1932 } while (1);
1933 return 0;
1934}
1935
1936static int read_attribute_mem(struct dvb_ca_en50221 *ca,
1937 int slot, int address)
1938{
1939 struct ddb_ci *ci = ca->data;
1940 u32 val, off = (address >> 1) & (CI_BUFFER_SIZE - 1);
1941
1942 if (address > CI_BUFFER_SIZE)
1943 return -1;
1944 ddbwritel(ci->port->dev, CI_READ_CMD | (1 << 16) | address,
1945 CI_DO_READ_ATTRIBUTES(ci->nr));
1946 wait_ci_ready(ci);
1947 val = 0xff & ddbreadl(ci->port->dev, CI_BUFFER(ci->nr) + off);
1948 return val;
1949}
1950
1951static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
1952 int address, u8 value)
1953{
1954 struct ddb_ci *ci = ca->data;
1955
1956 ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address,
1957 CI_DO_ATTRIBUTE_RW(ci->nr));
1958 wait_ci_ready(ci);
1959 return 0;
1960}
1961
1962static int read_cam_control(struct dvb_ca_en50221 *ca,
1963 int slot, u8 address)
1964{
1965 u32 count = 100;
1966 struct ddb_ci *ci = ca->data;
1967 u32 res;
1968
1969 ddbwritel(ci->port->dev, CI_READ_CMD | address,
1970 CI_DO_IO_RW(ci->nr));
1971 ndelay(500);
1972 do {
1973 res = ddbreadl(ci->port->dev, CI_READDATA(ci->nr));
1974 if (res & CI_READY)
1975 break;
1976 usleep_range(1, 2);
1977 if ((--count) == 0)
1978 return -1;
1979 } while (1);
1980 return 0xff & res;
1981}
1982
1983static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
1984 u8 address, u8 value)
1985{
1986 struct ddb_ci *ci = ca->data;
1987
1988 ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address,
1989 CI_DO_IO_RW(ci->nr));
1990 wait_ci_ready(ci);
1991 return 0;
1992}
1993
1994static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
1995{
1996 struct ddb_ci *ci = ca->data;
1997
1998 ddbwritel(ci->port->dev, CI_POWER_ON,
1999 CI_CONTROL(ci->nr));
2000 msleep(100);
2001 ddbwritel(ci->port->dev, CI_POWER_ON | CI_RESET_CAM,
2002 CI_CONTROL(ci->nr));
2003 ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON | CI_RESET_CAM,
2004 CI_CONTROL(ci->nr));
2005 udelay(20);
2006 ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON,
2007 CI_CONTROL(ci->nr));
2008 return 0;
2009}
2010
2011static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
2012{
2013 struct ddb_ci *ci = ca->data;
2014
2015 ddbwritel(ci->port->dev, 0, CI_CONTROL(ci->nr));
2016 msleep(300);
2017 return 0;
2018}
2019
2020static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
2021{
2022 struct ddb_ci *ci = ca->data;
2023 u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr));
2024
2025 ddbwritel(ci->port->dev, val | CI_BYPASS_DISABLE,
2026 CI_CONTROL(ci->nr));
2027 return 0;
2028}
2029
2030static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
2031{
2032 struct ddb_ci *ci = ca->data;
2033 u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr));
2034 int stat = 0;
2035
2036 if (val & CI_CAM_DETECT)
2037 stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
2038 if (val & CI_CAM_READY)
2039 stat |= DVB_CA_EN50221_POLL_CAM_READY;
2040 return stat;
2041}
2042
2043static struct dvb_ca_en50221 en_templ = {
2044 .read_attribute_mem = read_attribute_mem,
2045 .write_attribute_mem = write_attribute_mem,
2046 .read_cam_control = read_cam_control,
2047 .write_cam_control = write_cam_control,
2048 .slot_reset = slot_reset,
2049 .slot_shutdown = slot_shutdown,
2050 .slot_ts_enable = slot_ts_enable,
2051 .poll_slot_status = poll_slot_status,
2052};
2053
2054static void ci_attach(struct ddb_port *port)
2055{
2056 struct ddb_ci *ci = NULL;
2057
2058 ci = kzalloc(sizeof(*ci), GFP_KERNEL);
2059 if (!ci)
2060 return;
2061 memcpy(&ci->en, &en_templ, sizeof(en_templ));
2062 ci->en.data = ci;
2063 port->en = &ci->en;
2064 ci->port = port;
2065 ci->nr = port->nr - 2;
2066}
2067
2068
2069
2070
2071
2072static int write_creg(struct ddb_ci *ci, u8 data, u8 mask)
2073{
2074 struct i2c_adapter *i2c = &ci->port->i2c->adap;
2075 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
2076
2077 ci->port->creg = (ci->port->creg & ~mask) | data;
2078 return i2c_write_reg(i2c, adr, 0x02, ci->port->creg);
2079}
2080
2081static int read_attribute_mem_xo2(struct dvb_ca_en50221 *ca,
2082 int slot, int address)
2083{
2084 struct ddb_ci *ci = ca->data;
2085 struct i2c_adapter *i2c = &ci->port->i2c->adap;
2086 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
2087 int res;
2088 u8 val;
2089
2090 res = i2c_read_reg16(i2c, adr, 0x8000 | address, &val);
2091 return res ? res : val;
2092}
2093
2094static int write_attribute_mem_xo2(struct dvb_ca_en50221 *ca, int slot,
2095 int address, u8 value)
2096{
2097 struct ddb_ci *ci = ca->data;
2098 struct i2c_adapter *i2c = &ci->port->i2c->adap;
2099 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
2100
2101 return i2c_write_reg16(i2c, adr, 0x8000 | address, value);
2102}
2103
2104static int read_cam_control_xo2(struct dvb_ca_en50221 *ca,
2105 int slot, u8 address)
2106{
2107 struct ddb_ci *ci = ca->data;
2108 struct i2c_adapter *i2c = &ci->port->i2c->adap;
2109 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
2110 u8 val;
2111 int res;
2112
2113 res = i2c_read_reg(i2c, adr, 0x20 | (address & 3), &val);
2114 return res ? res : val;
2115}
2116
2117static int write_cam_control_xo2(struct dvb_ca_en50221 *ca, int slot,
2118 u8 address, u8 value)
2119{
2120 struct ddb_ci *ci = ca->data;
2121 struct i2c_adapter *i2c = &ci->port->i2c->adap;
2122 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
2123
2124 return i2c_write_reg(i2c, adr, 0x20 | (address & 3), value);
2125}
2126
2127static int slot_reset_xo2(struct dvb_ca_en50221 *ca, int slot)
2128{
2129 struct ddb_ci *ci = ca->data;
2130
2131 dev_dbg(ci->port->dev->dev, "%s\n", __func__);
2132 write_creg(ci, 0x01, 0x01);
2133 write_creg(ci, 0x04, 0x04);
2134 msleep(20);
2135 write_creg(ci, 0x02, 0x02);
2136 write_creg(ci, 0x00, 0x04);
2137 write_creg(ci, 0x18, 0x18);
2138 return 0;
2139}
2140
2141static int slot_shutdown_xo2(struct dvb_ca_en50221 *ca, int slot)
2142{
2143 struct ddb_ci *ci = ca->data;
2144
2145 dev_dbg(ci->port->dev->dev, "%s\n", __func__);
2146 write_creg(ci, 0x10, 0xff);
2147 write_creg(ci, 0x08, 0x08);
2148 return 0;
2149}
2150
2151static int slot_ts_enable_xo2(struct dvb_ca_en50221 *ca, int slot)
2152{
2153 struct ddb_ci *ci = ca->data;
2154
2155 dev_info(ci->port->dev->dev, "%s\n", __func__);
2156 write_creg(ci, 0x00, 0x10);
2157 return 0;
2158}
2159
2160static int poll_slot_status_xo2(struct dvb_ca_en50221 *ca, int slot, int open)
2161{
2162 struct ddb_ci *ci = ca->data;
2163 struct i2c_adapter *i2c = &ci->port->i2c->adap;
2164 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
2165 u8 val = 0;
2166 int stat = 0;
2167
2168 i2c_read_reg(i2c, adr, 0x01, &val);
2169
2170 if (val & 2)
2171 stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
2172 if (val & 1)
2173 stat |= DVB_CA_EN50221_POLL_CAM_READY;
2174 return stat;
2175}
2176
2177static struct dvb_ca_en50221 en_xo2_templ = {
2178 .read_attribute_mem = read_attribute_mem_xo2,
2179 .write_attribute_mem = write_attribute_mem_xo2,
2180 .read_cam_control = read_cam_control_xo2,
2181 .write_cam_control = write_cam_control_xo2,
2182 .slot_reset = slot_reset_xo2,
2183 .slot_shutdown = slot_shutdown_xo2,
2184 .slot_ts_enable = slot_ts_enable_xo2,
2185 .poll_slot_status = poll_slot_status_xo2,
2186};
2187
2188static void ci_xo2_attach(struct ddb_port *port)
2189{
2190 struct ddb_ci *ci;
2191
2192 ci = kzalloc(sizeof(*ci), GFP_KERNEL);
2193 if (!ci)
2194 return;
2195 memcpy(&ci->en, &en_xo2_templ, sizeof(en_xo2_templ));
2196 ci->en.data = ci;
2197 port->en = &ci->en;
2198 ci->port = port;
2199 ci->nr = port->nr - 2;
2200 ci->port->creg = 0;
2201 write_creg(ci, 0x10, 0xff);
2202 write_creg(ci, 0x08, 0x08);
2203}
2204
2205
2206
2207
2208
2209static struct cxd2099_cfg cxd_cfg = {
2210 .bitrate = 72000,
2211 .adr = 0x40,
2212 .polarity = 1,
2213 .clock_mode = 1,
2214 .max_i2c = 512,
2215};
2216
2217static int ddb_ci_attach(struct ddb_port *port)
2218{
2219 switch (port->type) {
2220 case DDB_CI_EXTERNAL_SONY:
2221 cxd_cfg.bitrate = ci_bitrate;
2222 port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap);
2223 if (!port->en)
2224 return -ENODEV;
2225 dvb_ca_en50221_init(port->dvb[0].adap,
2226 port->en, 0, 1);
2227 break;
2228
2229 case DDB_CI_EXTERNAL_XO2:
2230 case DDB_CI_EXTERNAL_XO2_B:
2231 ci_xo2_attach(port);
2232 if (!port->en)
2233 return -ENODEV;
2234 dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1);
2235 break;
2236
2237 case DDB_CI_INTERNAL:
2238 ci_attach(port);
2239 if (!port->en)
2240 return -ENODEV;
2241 dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1);
2242 break;
2243 }
2244 return 0;
2245}
2246
2247static int ddb_port_attach(struct ddb_port *port)
2248{
2249 int ret = 0;
2250
2251 switch (port->class) {
2252 case DDB_PORT_TUNER:
2253 ret = dvb_input_attach(port->input[0]);
2254 if (ret < 0)
2255 break;
2256 ret = dvb_input_attach(port->input[1]);
2257 if (ret < 0)
2258 break;
2259 port->input[0]->redi = port->input[0];
2260 port->input[1]->redi = port->input[1];
2261 break;
2262 case DDB_PORT_CI:
2263 ret = ddb_ci_attach(port);
2264 if (ret < 0)
2265 break;
2266
2267 case DDB_PORT_LOOP:
2268 ret = dvb_register_device(port->dvb[0].adap,
2269 &port->dvb[0].dev,
2270 &dvbdev_ci, (void *) port->output,
2271 DVB_DEVICE_SEC, 0);
2272 break;
2273 default:
2274 break;
2275 }
2276 if (ret < 0)
2277 dev_err(port->dev->dev, "port_attach on port %d failed\n",
2278 port->nr);
2279 return ret;
2280}
2281
2282int ddb_ports_attach(struct ddb *dev)
2283{
2284 int i, ret = 0;
2285 struct ddb_port *port;
2286
2287 if (dev->port_num) {
2288 ret = dvb_register_adapters(dev);
2289 if (ret < 0) {
2290 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n");
2291 return ret;
2292 }
2293 }
2294 for (i = 0; i < dev->port_num; i++) {
2295 port = &dev->port[i];
2296 ret = ddb_port_attach(port);
2297 }
2298 return ret;
2299}
2300
2301void ddb_ports_detach(struct ddb *dev)
2302{
2303 int i;
2304 struct ddb_port *port;
2305
2306 for (i = 0; i < dev->port_num; i++) {
2307 port = &dev->port[i];
2308
2309 switch (port->class) {
2310 case DDB_PORT_TUNER:
2311 dvb_input_detach(port->input[0]);
2312 dvb_input_detach(port->input[1]);
2313 break;
2314 case DDB_PORT_CI:
2315 case DDB_PORT_LOOP:
2316 if (port->dvb[0].dev)
2317 dvb_unregister_device(port->dvb[0].dev);
2318 if (port->en) {
2319 dvb_ca_en50221_release(port->en);
2320 kfree(port->en);
2321 port->en = NULL;
2322 }
2323 break;
2324 }
2325 }
2326 dvb_unregister_adapters(dev);
2327}
2328
2329
2330
2331
2332static void input_write_output(struct ddb_input *input,
2333 struct ddb_output *output)
2334{
2335 ddbwritel(output->port->dev,
2336 input->dma->stat, DMA_BUFFER_ACK(output->dma));
2337 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f;
2338 output->dma->coff = (input->dma->stat & 0x7ff) << 7;
2339}
2340
2341static void output_ack_input(struct ddb_output *output,
2342 struct ddb_input *input)
2343{
2344 ddbwritel(input->port->dev,
2345 output->dma->stat, DMA_BUFFER_ACK(input->dma));
2346}
2347
2348static void input_write_dvb(struct ddb_input *input,
2349 struct ddb_input *input2)
2350{
2351 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1];
2352 struct ddb_dma *dma, *dma2;
2353 struct ddb *dev = input->port->dev;
2354 int ack = 1;
2355
2356 dma = dma2 = input->dma;
2357
2358
2359
2360 if (input->redo) {
2361 dma2 = input->redo->dma;
2362 ack = 0;
2363 }
2364 while (dma->cbuf != ((dma->stat >> 11) & 0x1f)
2365 || (4 & dma->ctrl)) {
2366 if (4 & dma->ctrl) {
2367
2368 ack = 1;
2369 }
2370 if (alt_dma)
2371 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf],
2372 dma2->size, DMA_FROM_DEVICE);
2373 dvb_dmx_swfilter_packets(&dvb->demux,
2374 dma2->vbuf[dma->cbuf],
2375 dma2->size / 188);
2376 dma->cbuf = (dma->cbuf + 1) % dma2->num;
2377 if (ack)
2378 ddbwritel(dev, (dma->cbuf << 11),
2379 DMA_BUFFER_ACK(dma));
2380 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2381 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2382 }
2383}
2384
2385static void input_work(struct work_struct *work)
2386{
2387 struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
2388 struct ddb_input *input = (struct ddb_input *) dma->io;
2389 struct ddb *dev = input->port->dev;
2390 unsigned long flags;
2391
2392 spin_lock_irqsave(&dma->lock, flags);
2393 if (!dma->running) {
2394 spin_unlock_irqrestore(&dma->lock, flags);
2395 return;
2396 }
2397 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2398 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2399
2400 if (input->redi)
2401 input_write_dvb(input, input->redi);
2402 if (input->redo)
2403 input_write_output(input, input->redo);
2404 wake_up(&dma->wq);
2405 spin_unlock_irqrestore(&dma->lock, flags);
2406}
2407
2408static void input_handler(unsigned long data)
2409{
2410 struct ddb_input *input = (struct ddb_input *) data;
2411 struct ddb_dma *dma = input->dma;
2412
2413
2414
2415
2416
2417
2418 if (input->redi)
2419 queue_work(ddb_wq, &dma->work);
2420 else
2421 input_work(&dma->work);
2422}
2423
2424static void output_handler(unsigned long data)
2425{
2426 struct ddb_output *output = (struct ddb_output *) data;
2427 struct ddb_dma *dma = output->dma;
2428 struct ddb *dev = output->port->dev;
2429
2430 spin_lock(&dma->lock);
2431 if (!dma->running) {
2432 spin_unlock(&dma->lock);
2433 return;
2434 }
2435 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2436 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2437 if (output->redi)
2438 output_ack_input(output, output->redi);
2439 wake_up(&dma->wq);
2440 spin_unlock(&dma->lock);
2441}
2442
2443
2444
2445
2446static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link)
2447{
2448 const struct ddb_info *info;
2449
2450 if (link)
2451 info = io->port->dev->link[io->port->lnr].info;
2452 else
2453 info = io->port->dev->link[0].info;
2454
2455 if (!info)
2456 return NULL;
2457
2458 return info->regmap;
2459}
2460
2461static void ddb_dma_init(struct ddb_io *io, int nr, int out)
2462{
2463 struct ddb_dma *dma;
2464 const struct ddb_regmap *rm = io_regmap(io, 0);
2465
2466 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr];
2467 io->dma = dma;
2468 dma->io = io;
2469
2470 spin_lock_init(&dma->lock);
2471 init_waitqueue_head(&dma->wq);
2472 if (out) {
2473 dma->regs = rm->odma->base + rm->odma->size * nr;
2474 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr;
2475 dma->num = OUTPUT_DMA_BUFS;
2476 dma->size = OUTPUT_DMA_SIZE;
2477 dma->div = OUTPUT_DMA_IRQ_DIV;
2478 } else {
2479 INIT_WORK(&dma->work, input_work);
2480 dma->regs = rm->idma->base + rm->idma->size * nr;
2481 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr;
2482 dma->num = INPUT_DMA_BUFS;
2483 dma->size = INPUT_DMA_SIZE;
2484 dma->div = INPUT_DMA_IRQ_DIV;
2485 }
2486 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma));
2487 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n",
2488 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs);
2489}
2490
2491static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr)
2492{
2493 struct ddb *dev = port->dev;
2494 struct ddb_input *input = &dev->input[anr];
2495 const struct ddb_regmap *rm;
2496
2497 port->input[pnr] = input;
2498 input->nr = nr;
2499 input->port = port;
2500 rm = io_regmap(input, 1);
2501 input->regs = DDB_LINK_TAG(port->lnr) |
2502 (rm->input->base + rm->input->size * nr);
2503 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n",
2504 port->lnr, nr, input->regs);
2505
2506 if (dev->has_dma) {
2507 const struct ddb_regmap *rm0 = io_regmap(input, 0);
2508 u32 base = rm0->irq_base_idma;
2509 u32 dma_nr = nr;
2510
2511 if (port->lnr)
2512 dma_nr += 32 + (port->lnr - 1) * 8;
2513
2514 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n",
2515 port->lnr, nr, dma_nr + base);
2516
2517 dev->handler[0][dma_nr + base] = input_handler;
2518 dev->handler_data[0][dma_nr + base] = (unsigned long) input;
2519 ddb_dma_init(input, dma_nr, 0);
2520 }
2521}
2522
2523static void ddb_output_init(struct ddb_port *port, int nr)
2524{
2525 struct ddb *dev = port->dev;
2526 struct ddb_output *output = &dev->output[nr];
2527 const struct ddb_regmap *rm;
2528
2529 port->output = output;
2530 output->nr = nr;
2531 output->port = port;
2532 rm = io_regmap(output, 1);
2533 output->regs = DDB_LINK_TAG(port->lnr) |
2534 (rm->output->base + rm->output->size * nr);
2535
2536 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n",
2537 port->lnr, nr, output->regs);
2538
2539 if (dev->has_dma) {
2540 const struct ddb_regmap *rm0 = io_regmap(output, 0);
2541 u32 base = rm0->irq_base_odma;
2542
2543 dev->handler[0][nr + base] = output_handler;
2544 dev->handler_data[0][nr + base] = (unsigned long) output;
2545 ddb_dma_init(output, nr, 1);
2546 }
2547}
2548
2549static int ddb_port_match_i2c(struct ddb_port *port)
2550{
2551 struct ddb *dev = port->dev;
2552 u32 i;
2553
2554 for (i = 0; i < dev->i2c_num; i++) {
2555 if (dev->i2c[i].link == port->lnr &&
2556 dev->i2c[i].nr == port->nr) {
2557 port->i2c = &dev->i2c[i];
2558 return 1;
2559 }
2560 }
2561 return 0;
2562}
2563
2564static int ddb_port_match_link_i2c(struct ddb_port *port)
2565{
2566 struct ddb *dev = port->dev;
2567 u32 i;
2568
2569 for (i = 0; i < dev->i2c_num; i++) {
2570 if (dev->i2c[i].link == port->lnr) {
2571 port->i2c = &dev->i2c[i];
2572 return 1;
2573 }
2574 }
2575 return 0;
2576}
2577
2578void ddb_ports_init(struct ddb *dev)
2579{
2580 u32 i, l, p;
2581 struct ddb_port *port;
2582 const struct ddb_info *info;
2583 const struct ddb_regmap *rm;
2584
2585 for (p = l = 0; l < DDB_MAX_LINK; l++) {
2586 info = dev->link[l].info;
2587 if (!info)
2588 continue;
2589 rm = info->regmap;
2590 if (!rm)
2591 continue;
2592 for (i = 0; i < info->port_num; i++, p++) {
2593 port = &dev->port[p];
2594 port->dev = dev;
2595 port->nr = i;
2596 port->lnr = l;
2597 port->pnr = p;
2598 port->gap = 0xffffffff;
2599 port->obr = ci_bitrate;
2600 mutex_init(&port->i2c_gate_lock);
2601
2602 if (!ddb_port_match_i2c(port)) {
2603 if (info->type == DDB_OCTOPUS_MAX)
2604 ddb_port_match_link_i2c(port);
2605 }
2606
2607 ddb_port_probe(port);
2608
2609 port->dvb[0].adap = &dev->adap[2 * p];
2610 port->dvb[1].adap = &dev->adap[2 * p + 1];
2611
2612 if ((port->class == DDB_PORT_NONE) && i && p &&
2613 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) {
2614 port->class = DDB_PORT_CI;
2615 port->type = DDB_CI_EXTERNAL_XO2_B;
2616 port->name = "DuoFlex CI_B";
2617 port->i2c = dev->port[p - 1].i2c;
2618 }
2619
2620 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n",
2621 port->pnr, port->lnr, port->nr, port->nr + 1,
2622 port->name);
2623
2624 if (port->class == DDB_PORT_CI &&
2625 port->type == DDB_CI_EXTERNAL_XO2) {
2626 ddb_input_init(port, 2 * i, 0, 2 * i);
2627 ddb_output_init(port, i);
2628 continue;
2629 }
2630
2631 if (port->class == DDB_PORT_CI &&
2632 port->type == DDB_CI_EXTERNAL_XO2_B) {
2633 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1);
2634 ddb_output_init(port, i);
2635 continue;
2636 }
2637
2638 if (port->class == DDB_PORT_NONE)
2639 continue;
2640
2641 switch (dev->link[l].info->type) {
2642 case DDB_OCTOPUS_CI:
2643 if (i >= 2) {
2644 ddb_input_init(port, 2 + i, 0, 2 + i);
2645 ddb_input_init(port, 4 + i, 1, 4 + i);
2646 ddb_output_init(port, i);
2647 break;
2648 }
2649 case DDB_OCTOPUS:
2650 ddb_input_init(port, 2 * i, 0, 2 * i);
2651 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1);
2652 ddb_output_init(port, i);
2653 break;
2654 case DDB_OCTOPUS_MAX:
2655 case DDB_OCTOPUS_MAX_CT:
2656 ddb_input_init(port, 2 * i, 0, 2 * p);
2657 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1);
2658 break;
2659 default:
2660 break;
2661 }
2662 }
2663 }
2664 dev->port_num = p;
2665}
2666
2667void ddb_ports_release(struct ddb *dev)
2668{
2669 int i;
2670 struct ddb_port *port;
2671
2672 for (i = 0; i < dev->port_num; i++) {
2673 port = &dev->port[i];
2674 if (port->input[0] && port->input[0]->dma)
2675 cancel_work_sync(&port->input[0]->dma->work);
2676 if (port->input[1] && port->input[1]->dma)
2677 cancel_work_sync(&port->input[1]->dma->work);
2678 if (port->output && port->output->dma)
2679 cancel_work_sync(&port->output->dma->work);
2680 }
2681}
2682
2683
2684
2685
2686
2687#define IRQ_HANDLE(_nr) \
2688 do { if ((s & (1UL << ((_nr) & 0x1f))) && dev->handler[0][_nr]) \
2689 dev->handler[0][_nr](dev->handler_data[0][_nr]); } \
2690 while (0)
2691
2692static void irq_handle_msg(struct ddb *dev, u32 s)
2693{
2694 dev->i2c_irq++;
2695 IRQ_HANDLE(0);
2696 IRQ_HANDLE(1);
2697 IRQ_HANDLE(2);
2698 IRQ_HANDLE(3);
2699}
2700
2701static void irq_handle_io(struct ddb *dev, u32 s)
2702{
2703 dev->ts_irq++;
2704 if ((s & 0x000000f0)) {
2705 IRQ_HANDLE(4);
2706 IRQ_HANDLE(5);
2707 IRQ_HANDLE(6);
2708 IRQ_HANDLE(7);
2709 }
2710 if ((s & 0x0000ff00)) {
2711 IRQ_HANDLE(8);
2712 IRQ_HANDLE(9);
2713 IRQ_HANDLE(10);
2714 IRQ_HANDLE(11);
2715 IRQ_HANDLE(12);
2716 IRQ_HANDLE(13);
2717 IRQ_HANDLE(14);
2718 IRQ_HANDLE(15);
2719 }
2720 if ((s & 0x00ff0000)) {
2721 IRQ_HANDLE(16);
2722 IRQ_HANDLE(17);
2723 IRQ_HANDLE(18);
2724 IRQ_HANDLE(19);
2725 IRQ_HANDLE(20);
2726 IRQ_HANDLE(21);
2727 IRQ_HANDLE(22);
2728 IRQ_HANDLE(23);
2729 }
2730 if ((s & 0xff000000)) {
2731 IRQ_HANDLE(24);
2732 IRQ_HANDLE(25);
2733 IRQ_HANDLE(26);
2734 IRQ_HANDLE(27);
2735 IRQ_HANDLE(28);
2736 IRQ_HANDLE(29);
2737 IRQ_HANDLE(30);
2738 IRQ_HANDLE(31);
2739 }
2740}
2741
2742irqreturn_t ddb_irq_handler0(int irq, void *dev_id)
2743{
2744 struct ddb *dev = (struct ddb *) dev_id;
2745 u32 s = ddbreadl(dev, INTERRUPT_STATUS);
2746
2747 do {
2748 if (s & 0x80000000)
2749 return IRQ_NONE;
2750 if (!(s & 0xfffff00))
2751 return IRQ_NONE;
2752 ddbwritel(dev, s & 0xfffff00, INTERRUPT_ACK);
2753 irq_handle_io(dev, s);
2754 } while ((s = ddbreadl(dev, INTERRUPT_STATUS)));
2755
2756 return IRQ_HANDLED;
2757}
2758
2759irqreturn_t ddb_irq_handler1(int irq, void *dev_id)
2760{
2761 struct ddb *dev = (struct ddb *) dev_id;
2762 u32 s = ddbreadl(dev, INTERRUPT_STATUS);
2763
2764 do {
2765 if (s & 0x80000000)
2766 return IRQ_NONE;
2767 if (!(s & 0x0000f))
2768 return IRQ_NONE;
2769 ddbwritel(dev, s & 0x0000f, INTERRUPT_ACK);
2770 irq_handle_msg(dev, s);
2771 } while ((s = ddbreadl(dev, INTERRUPT_STATUS)));
2772
2773 return IRQ_HANDLED;
2774}
2775
2776irqreturn_t ddb_irq_handler(int irq, void *dev_id)
2777{
2778 struct ddb *dev = (struct ddb *) dev_id;
2779 u32 s = ddbreadl(dev, INTERRUPT_STATUS);
2780 int ret = IRQ_HANDLED;
2781
2782 if (!s)
2783 return IRQ_NONE;
2784 do {
2785 if (s & 0x80000000)
2786 return IRQ_NONE;
2787 ddbwritel(dev, s, INTERRUPT_ACK);
2788
2789 if (s & 0x0000000f)
2790 irq_handle_msg(dev, s);
2791 if (s & 0x0fffff00)
2792 irq_handle_io(dev, s);
2793 } while ((s = ddbreadl(dev, INTERRUPT_STATUS)));
2794
2795 return ret;
2796}
2797
2798
2799
2800
2801
2802static int reg_wait(struct ddb *dev, u32 reg, u32 bit)
2803{
2804 u32 count = 0;
2805
2806 while (safe_ddbreadl(dev, reg) & bit) {
2807 ndelay(10);
2808 if (++count == 100)
2809 return -1;
2810 }
2811 return 0;
2812}
2813
2814static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf,
2815 u32 rlen)
2816{
2817 u32 data, shift;
2818 u32 tag = DDB_LINK_TAG(lnr);
2819 struct ddb_link *link = &dev->link[lnr];
2820
2821 mutex_lock(&link->flash_mutex);
2822 if (wlen > 4)
2823 ddbwritel(dev, 1, tag | SPI_CONTROL);
2824 while (wlen > 4) {
2825
2826 data = swab32(*(u32 *) wbuf);
2827 wbuf += 4;
2828 wlen -= 4;
2829 ddbwritel(dev, data, tag | SPI_DATA);
2830 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2831 goto fail;
2832 }
2833 if (rlen)
2834 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00),
2835 tag | SPI_CONTROL);
2836 else
2837 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00),
2838 tag | SPI_CONTROL);
2839
2840 data = 0;
2841 shift = ((4 - wlen) * 8);
2842 while (wlen) {
2843 data <<= 8;
2844 data |= *wbuf;
2845 wlen--;
2846 wbuf++;
2847 }
2848 if (shift)
2849 data <<= shift;
2850 ddbwritel(dev, data, tag | SPI_DATA);
2851 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2852 goto fail;
2853
2854 if (!rlen) {
2855 ddbwritel(dev, 0, tag | SPI_CONTROL);
2856 goto exit;
2857 }
2858 if (rlen > 4)
2859 ddbwritel(dev, 1, tag | SPI_CONTROL);
2860
2861 while (rlen > 4) {
2862 ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
2863 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2864 goto fail;
2865 data = ddbreadl(dev, tag | SPI_DATA);
2866 *(u32 *) rbuf = swab32(data);
2867 rbuf += 4;
2868 rlen -= 4;
2869 }
2870 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00),
2871 tag | SPI_CONTROL);
2872 ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
2873 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2874 goto fail;
2875
2876 data = ddbreadl(dev, tag | SPI_DATA);
2877 ddbwritel(dev, 0, tag | SPI_CONTROL);
2878
2879 if (rlen < 4)
2880 data <<= ((4 - rlen) * 8);
2881
2882 while (rlen > 0) {
2883 *rbuf = ((data >> 24) & 0xff);
2884 data <<= 8;
2885 rbuf++;
2886 rlen--;
2887 }
2888exit:
2889 mutex_unlock(&link->flash_mutex);
2890 return 0;
2891fail:
2892 mutex_unlock(&link->flash_mutex);
2893 return -1;
2894}
2895
2896int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len)
2897{
2898 u8 cmd[4] = {0x03, (addr >> 16) & 0xff,
2899 (addr >> 8) & 0xff, addr & 0xff};
2900
2901 return flashio(dev, link, cmd, 4, buf, len);
2902}
2903
2904
2905
2906
2907
2908#define DDB_NAME "ddbridge"
2909
2910static u32 ddb_num;
2911static int ddb_major;
2912static DEFINE_MUTEX(ddb_mutex);
2913
2914static int ddb_release(struct inode *inode, struct file *file)
2915{
2916 struct ddb *dev = file->private_data;
2917
2918 dev->ddb_dev_users--;
2919 return 0;
2920}
2921
2922static int ddb_open(struct inode *inode, struct file *file)
2923{
2924 struct ddb *dev = ddbs[iminor(inode)];
2925
2926 if (dev->ddb_dev_users)
2927 return -EBUSY;
2928 dev->ddb_dev_users++;
2929 file->private_data = dev;
2930 return 0;
2931}
2932
2933static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
2934{
2935 struct ddb *dev = file->private_data;
2936
2937 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n",
2938 cmd, arg);
2939
2940 return -ENOTTY;
2941}
2942
2943static const struct file_operations ddb_fops = {
2944 .unlocked_ioctl = ddb_ioctl,
2945 .open = ddb_open,
2946 .release = ddb_release,
2947};
2948
2949static char *ddb_devnode(struct device *device, umode_t *mode)
2950{
2951 struct ddb *dev = dev_get_drvdata(device);
2952
2953 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
2954}
2955
2956#define __ATTR_MRO(_name, _show) { \
2957 .attr = { .name = __stringify(_name), .mode = 0444 }, \
2958 .show = _show, \
2959}
2960
2961#define __ATTR_MWO(_name, _store) { \
2962 .attr = { .name = __stringify(_name), .mode = 0222 }, \
2963 .store = _store, \
2964}
2965
2966static ssize_t ports_show(struct device *device,
2967 struct device_attribute *attr, char *buf)
2968{
2969 struct ddb *dev = dev_get_drvdata(device);
2970
2971 return sprintf(buf, "%d\n", dev->port_num);
2972}
2973
2974static ssize_t ts_irq_show(struct device *device,
2975 struct device_attribute *attr, char *buf)
2976{
2977 struct ddb *dev = dev_get_drvdata(device);
2978
2979 return sprintf(buf, "%d\n", dev->ts_irq);
2980}
2981
2982static ssize_t i2c_irq_show(struct device *device,
2983 struct device_attribute *attr, char *buf)
2984{
2985 struct ddb *dev = dev_get_drvdata(device);
2986
2987 return sprintf(buf, "%d\n", dev->i2c_irq);
2988}
2989
2990static ssize_t fan_show(struct device *device,
2991 struct device_attribute *attr, char *buf)
2992{
2993 struct ddb *dev = dev_get_drvdata(device);
2994 u32 val;
2995
2996 val = ddbreadl(dev, GPIO_OUTPUT) & 1;
2997 return sprintf(buf, "%d\n", val);
2998}
2999
3000static ssize_t fan_store(struct device *device, struct device_attribute *d,
3001 const char *buf, size_t count)
3002{
3003 struct ddb *dev = dev_get_drvdata(device);
3004 u32 val;
3005
3006 if (sscanf(buf, "%u\n", &val) != 1)
3007 return -EINVAL;
3008 ddbwritel(dev, 1, GPIO_DIRECTION);
3009 ddbwritel(dev, val & 1, GPIO_OUTPUT);
3010 return count;
3011}
3012
3013static ssize_t fanspeed_show(struct device *device,
3014 struct device_attribute *attr, char *buf)
3015{
3016 struct ddb *dev = dev_get_drvdata(device);
3017 int num = attr->attr.name[8] - 0x30;
3018 struct ddb_link *link = &dev->link[num];
3019 u32 spd;
3020
3021 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff;
3022 return sprintf(buf, "%u\n", spd * 100);
3023}
3024
3025static ssize_t temp_show(struct device *device,
3026 struct device_attribute *attr, char *buf)
3027{
3028 struct ddb *dev = dev_get_drvdata(device);
3029 struct ddb_link *link = &dev->link[0];
3030 struct i2c_adapter *adap;
3031 int temp, temp2;
3032 u8 tmp[2];
3033
3034 if (!link->info->temp_num)
3035 return sprintf(buf, "no sensor\n");
3036 adap = &dev->i2c[link->info->temp_bus].adap;
3037 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0)
3038 return sprintf(buf, "read_error\n");
3039 temp = (tmp[0] << 3) | (tmp[1] >> 5);
3040 temp *= 125;
3041 if (link->info->temp_num == 2) {
3042 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
3043 return sprintf(buf, "read_error\n");
3044 temp2 = (tmp[0] << 3) | (tmp[1] >> 5);
3045 temp2 *= 125;
3046 return sprintf(buf, "%d %d\n", temp, temp2);
3047 }
3048 return sprintf(buf, "%d\n", temp);
3049}
3050
3051static ssize_t ctemp_show(struct device *device,
3052 struct device_attribute *attr, char *buf)
3053{
3054 struct ddb *dev = dev_get_drvdata(device);
3055 struct i2c_adapter *adap;
3056 int temp;
3057 u8 tmp[2];
3058 int num = attr->attr.name[4] - 0x30;
3059
3060 adap = &dev->i2c[num].adap;
3061 if (!adap)
3062 return 0;
3063 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
3064 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0)
3065 return sprintf(buf, "no sensor\n");
3066 temp = tmp[0] * 1000;
3067 return sprintf(buf, "%d\n", temp);
3068}
3069
3070static ssize_t led_show(struct device *device,
3071 struct device_attribute *attr, char *buf)
3072{
3073 struct ddb *dev = dev_get_drvdata(device);
3074 int num = attr->attr.name[3] - 0x30;
3075
3076 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0);
3077}
3078
3079
3080static void ddb_set_led(struct ddb *dev, int num, int val)
3081{
3082 if (!dev->link[0].info->led_num)
3083 return;
3084 switch (dev->port[num].class) {
3085 case DDB_PORT_TUNER:
3086 switch (dev->port[num].type) {
3087 case DDB_TUNER_DVBS_ST:
3088 i2c_write_reg16(&dev->i2c[num].adap,
3089 0x69, 0xf14c, val ? 2 : 0);
3090 break;
3091 case DDB_TUNER_DVBCT_ST:
3092 i2c_write_reg16(&dev->i2c[num].adap,
3093 0x1f, 0xf00e, 0);
3094 i2c_write_reg16(&dev->i2c[num].adap,
3095 0x1f, 0xf00f, val ? 1 : 0);
3096 break;
3097 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY:
3098 {
3099 u8 v;
3100
3101 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v);
3102 v = (v & ~0x10) | (val ? 0x10 : 0);
3103 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v);
3104 break;
3105 }
3106 default:
3107 break;
3108 }
3109 break;
3110 }
3111}
3112
3113static ssize_t led_store(struct device *device,
3114 struct device_attribute *attr,
3115 const char *buf, size_t count)
3116{
3117 struct ddb *dev = dev_get_drvdata(device);
3118 int num = attr->attr.name[3] - 0x30;
3119 u32 val;
3120
3121 if (sscanf(buf, "%u\n", &val) != 1)
3122 return -EINVAL;
3123 if (val)
3124 dev->leds |= (1 << num);
3125 else
3126 dev->leds &= ~(1 << num);
3127 ddb_set_led(dev, num, val);
3128 return count;
3129}
3130
3131static ssize_t snr_show(struct device *device,
3132 struct device_attribute *attr, char *buf)
3133{
3134 struct ddb *dev = dev_get_drvdata(device);
3135 char snr[32];
3136 int num = attr->attr.name[3] - 0x30;
3137
3138 if (dev->port[num].type >= DDB_TUNER_XO2) {
3139 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0)
3140 return sprintf(buf, "NO SNR\n");
3141 snr[16] = 0;
3142 } else {
3143
3144 if (i2c_read_regs16(&dev->i2c[num].adap,
3145 0x57, 0x100, snr, 32) < 0)
3146 if (i2c_read_regs16(&dev->i2c[num].adap,
3147 0x50, 0x100, snr, 32) < 0)
3148 return sprintf(buf, "NO SNR\n");
3149 snr[31] = 0;
3150 }
3151 return sprintf(buf, "%s\n", snr);
3152}
3153
3154static ssize_t bsnr_show(struct device *device,
3155 struct device_attribute *attr, char *buf)
3156{
3157 struct ddb *dev = dev_get_drvdata(device);
3158 char snr[16];
3159
3160 ddbridge_flashread(dev, 0, snr, 0x10, 15);
3161 snr[15] = 0;
3162 return sprintf(buf, "%s\n", snr);
3163}
3164
3165static ssize_t bpsnr_show(struct device *device,
3166 struct device_attribute *attr, char *buf)
3167{
3168 struct ddb *dev = dev_get_drvdata(device);
3169 unsigned char snr[32];
3170
3171 if (!dev->i2c_num)
3172 return 0;
3173
3174 if (i2c_read_regs16(&dev->i2c[0].adap,
3175 0x50, 0x0000, snr, 32) < 0 ||
3176 snr[0] == 0xff)
3177 return sprintf(buf, "NO SNR\n");
3178 snr[31] = 0;
3179 return sprintf(buf, "%s\n", snr);
3180}
3181
3182static ssize_t redirect_show(struct device *device,
3183 struct device_attribute *attr, char *buf)
3184{
3185 return 0;
3186}
3187
3188static ssize_t redirect_store(struct device *device,
3189 struct device_attribute *attr,
3190 const char *buf, size_t count)
3191{
3192 unsigned int i, p;
3193 int res;
3194
3195 if (sscanf(buf, "%x %x\n", &i, &p) != 2)
3196 return -EINVAL;
3197 res = ddb_redirect(i, p);
3198 if (res < 0)
3199 return res;
3200 dev_info(device, "redirect: %02x, %02x\n", i, p);
3201 return count;
3202}
3203
3204static ssize_t gap_show(struct device *device,
3205 struct device_attribute *attr, char *buf)
3206{
3207 struct ddb *dev = dev_get_drvdata(device);
3208 int num = attr->attr.name[3] - 0x30;
3209
3210 return sprintf(buf, "%d\n", dev->port[num].gap);
3211
3212}
3213
3214static ssize_t gap_store(struct device *device, struct device_attribute *attr,
3215 const char *buf, size_t count)
3216{
3217 struct ddb *dev = dev_get_drvdata(device);
3218 int num = attr->attr.name[3] - 0x30;
3219 unsigned int val;
3220
3221 if (sscanf(buf, "%u\n", &val) != 1)
3222 return -EINVAL;
3223 if (val > 128)
3224 return -EINVAL;
3225 if (val == 128)
3226 val = 0xffffffff;
3227 dev->port[num].gap = val;
3228 return count;
3229}
3230
3231static ssize_t version_show(struct device *device,
3232 struct device_attribute *attr, char *buf)
3233{
3234 struct ddb *dev = dev_get_drvdata(device);
3235
3236 return sprintf(buf, "%08x %08x\n",
3237 dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
3238}
3239
3240static ssize_t hwid_show(struct device *device,
3241 struct device_attribute *attr, char *buf)
3242{
3243 struct ddb *dev = dev_get_drvdata(device);
3244
3245 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid);
3246}
3247
3248static ssize_t regmap_show(struct device *device,
3249 struct device_attribute *attr, char *buf)
3250{
3251 struct ddb *dev = dev_get_drvdata(device);
3252
3253 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid);
3254}
3255
3256static ssize_t fmode_show(struct device *device,
3257 struct device_attribute *attr, char *buf)
3258{
3259 int num = attr->attr.name[5] - 0x30;
3260 struct ddb *dev = dev_get_drvdata(device);
3261
3262 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode);
3263}
3264
3265static ssize_t devid_show(struct device *device,
3266 struct device_attribute *attr, char *buf)
3267{
3268 int num = attr->attr.name[5] - 0x30;
3269 struct ddb *dev = dev_get_drvdata(device);
3270
3271 return sprintf(buf, "%08x\n", dev->link[num].ids.devid);
3272}
3273
3274static ssize_t fmode_store(struct device *device, struct device_attribute *attr,
3275 const char *buf, size_t count)
3276{
3277 struct ddb *dev = dev_get_drvdata(device);
3278 int num = attr->attr.name[5] - 0x30;
3279 unsigned int val;
3280
3281 if (sscanf(buf, "%u\n", &val) != 1)
3282 return -EINVAL;
3283 if (val > 3)
3284 return -EINVAL;
3285 lnb_init_fmode(dev, &dev->link[num], val);
3286 return count;
3287}
3288
3289static struct device_attribute ddb_attrs[] = {
3290 __ATTR_RO(version),
3291 __ATTR_RO(ports),
3292 __ATTR_RO(ts_irq),
3293 __ATTR_RO(i2c_irq),
3294 __ATTR(gap0, 0664, gap_show, gap_store),
3295 __ATTR(gap1, 0664, gap_show, gap_store),
3296 __ATTR(gap2, 0664, gap_show, gap_store),
3297 __ATTR(gap3, 0664, gap_show, gap_store),
3298 __ATTR(fmode0, 0664, fmode_show, fmode_store),
3299 __ATTR(fmode1, 0664, fmode_show, fmode_store),
3300 __ATTR(fmode2, 0664, fmode_show, fmode_store),
3301 __ATTR(fmode3, 0664, fmode_show, fmode_store),
3302 __ATTR_MRO(devid0, devid_show),
3303 __ATTR_MRO(devid1, devid_show),
3304 __ATTR_MRO(devid2, devid_show),
3305 __ATTR_MRO(devid3, devid_show),
3306 __ATTR_RO(hwid),
3307 __ATTR_RO(regmap),
3308 __ATTR(redirect, 0664, redirect_show, redirect_store),
3309 __ATTR_MRO(snr, bsnr_show),
3310 __ATTR_RO(bpsnr),
3311 __ATTR_NULL,
3312};
3313
3314static struct device_attribute ddb_attrs_temp[] = {
3315 __ATTR_RO(temp),
3316};
3317
3318static struct device_attribute ddb_attrs_fan[] = {
3319 __ATTR(fan, 0664, fan_show, fan_store),
3320};
3321
3322static struct device_attribute ddb_attrs_snr[] = {
3323 __ATTR_MRO(snr0, snr_show),
3324 __ATTR_MRO(snr1, snr_show),
3325 __ATTR_MRO(snr2, snr_show),
3326 __ATTR_MRO(snr3, snr_show),
3327};
3328
3329static struct device_attribute ddb_attrs_ctemp[] = {
3330 __ATTR_MRO(temp0, ctemp_show),
3331 __ATTR_MRO(temp1, ctemp_show),
3332 __ATTR_MRO(temp2, ctemp_show),
3333 __ATTR_MRO(temp3, ctemp_show),
3334};
3335
3336static struct device_attribute ddb_attrs_led[] = {
3337 __ATTR(led0, 0664, led_show, led_store),
3338 __ATTR(led1, 0664, led_show, led_store),
3339 __ATTR(led2, 0664, led_show, led_store),
3340 __ATTR(led3, 0664, led_show, led_store),
3341};
3342
3343static struct device_attribute ddb_attrs_fanspeed[] = {
3344 __ATTR_MRO(fanspeed0, fanspeed_show),
3345 __ATTR_MRO(fanspeed1, fanspeed_show),
3346 __ATTR_MRO(fanspeed2, fanspeed_show),
3347 __ATTR_MRO(fanspeed3, fanspeed_show),
3348};
3349
3350static struct class ddb_class = {
3351 .name = "ddbridge",
3352 .owner = THIS_MODULE,
3353 .devnode = ddb_devnode,
3354};
3355
3356int ddb_class_create(void)
3357{
3358 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops);
3359 if (ddb_major < 0)
3360 return ddb_major;
3361 if (class_register(&ddb_class) < 0)
3362 return -1;
3363 return 0;
3364}
3365
3366void ddb_class_destroy(void)
3367{
3368 class_unregister(&ddb_class);
3369 unregister_chrdev(ddb_major, DDB_NAME);
3370}
3371
3372static void ddb_device_attrs_del(struct ddb *dev)
3373{
3374 int i;
3375
3376 for (i = 0; i < 4; i++)
3377 if (dev->link[i].info && dev->link[i].info->tempmon_irq)
3378 device_remove_file(dev->ddb_dev,
3379 &ddb_attrs_fanspeed[i]);
3380 for (i = 0; i < dev->link[0].info->temp_num; i++)
3381 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]);
3382 for (i = 0; i < dev->link[0].info->fan_num; i++)
3383 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]);
3384 for (i = 0; i < dev->i2c_num && i < 4; i++) {
3385 if (dev->link[0].info->led_num)
3386 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]);
3387 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]);
3388 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]);
3389 }
3390 for (i = 0; ddb_attrs[i].attr.name != NULL; i++)
3391 device_remove_file(dev->ddb_dev, &ddb_attrs[i]);
3392}
3393
3394static int ddb_device_attrs_add(struct ddb *dev)
3395{
3396 int i;
3397
3398 for (i = 0; ddb_attrs[i].attr.name != NULL; i++)
3399 if (device_create_file(dev->ddb_dev, &ddb_attrs[i]))
3400 goto fail;
3401 for (i = 0; i < dev->link[0].info->temp_num; i++)
3402 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i]))
3403 goto fail;
3404 for (i = 0; i < dev->link[0].info->fan_num; i++)
3405 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i]))
3406 goto fail;
3407 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) {
3408 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i]))
3409 goto fail;
3410 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i]))
3411 goto fail;
3412 if (dev->link[0].info->led_num)
3413 if (device_create_file(dev->ddb_dev,
3414 &ddb_attrs_led[i]))
3415 goto fail;
3416 }
3417 for (i = 0; i < 4; i++)
3418 if (dev->link[i].info && dev->link[i].info->tempmon_irq)
3419 if (device_create_file(dev->ddb_dev,
3420 &ddb_attrs_fanspeed[i]))
3421 goto fail;
3422 return 0;
3423fail:
3424 return -1;
3425}
3426
3427int ddb_device_create(struct ddb *dev)
3428{
3429 int res = 0;
3430
3431 if (ddb_num == DDB_MAX_ADAPTER)
3432 return -ENOMEM;
3433 mutex_lock(&ddb_mutex);
3434 dev->nr = ddb_num;
3435 ddbs[dev->nr] = dev;
3436 dev->ddb_dev = device_create(&ddb_class, dev->dev,
3437 MKDEV(ddb_major, dev->nr),
3438 dev, "ddbridge%d", dev->nr);
3439 if (IS_ERR(dev->ddb_dev)) {
3440 res = PTR_ERR(dev->ddb_dev);
3441 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr);
3442 goto fail;
3443 }
3444 res = ddb_device_attrs_add(dev);
3445 if (res) {
3446 ddb_device_attrs_del(dev);
3447 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
3448 ddbs[dev->nr] = NULL;
3449 dev->ddb_dev = ERR_PTR(-ENODEV);
3450 } else
3451 ddb_num++;
3452fail:
3453 mutex_unlock(&ddb_mutex);
3454 return res;
3455}
3456
3457void ddb_device_destroy(struct ddb *dev)
3458{
3459 if (IS_ERR(dev->ddb_dev))
3460 return;
3461 ddb_device_attrs_del(dev);
3462 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
3463}
3464
3465
3466
3467
3468
3469static void tempmon_setfan(struct ddb_link *link)
3470{
3471 u32 temp, temp2, pwm;
3472
3473 if ((ddblreadl(link, TEMPMON_CONTROL) &
3474 TEMPMON_CONTROL_OVERTEMP) != 0) {
3475 dev_info(link->dev->dev, "Over temperature condition\n");
3476 link->overtemperature_error = 1;
3477 }
3478 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
3479 if (temp & 0x80)
3480 temp = 0;
3481 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF;
3482 if (temp2 & 0x80)
3483 temp2 = 0;
3484 if (temp2 > temp)
3485 temp = temp2;
3486
3487 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F;
3488 if (pwm > 10)
3489 pwm = 10;
3490
3491 if (temp >= link->temp_tab[pwm]) {
3492 while (pwm < 10 && temp >= link->temp_tab[pwm + 1])
3493 pwm += 1;
3494 } else {
3495 while (pwm > 1 && temp < link->temp_tab[pwm - 2])
3496 pwm -= 1;
3497 }
3498 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
3499}
3500
3501static void temp_handler(unsigned long data)
3502{
3503 struct ddb_link *link = (struct ddb_link *) data;
3504
3505 spin_lock(&link->temp_lock);
3506 tempmon_setfan(link);
3507 spin_unlock(&link->temp_lock);
3508}
3509
3510static int tempmon_init(struct ddb_link *link, int first_time)
3511{
3512 struct ddb *dev = link->dev;
3513 int status = 0;
3514 u32 l = link->nr;
3515
3516 spin_lock_irq(&link->temp_lock);
3517 if (first_time) {
3518 static u8 temperature_table[11] = {
3519 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 };
3520
3521 memcpy(link->temp_tab, temperature_table,
3522 sizeof(temperature_table));
3523 }
3524 dev->handler[l][link->info->tempmon_irq] = temp_handler;
3525 dev->handler_data[l][link->info->tempmon_irq] = (unsigned long) link;
3526 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN |
3527 TEMPMON_CONTROL_INTENABLE),
3528 TEMPMON_CONTROL);
3529 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
3530
3531 link->overtemperature_error =
3532 ((ddblreadl(link, TEMPMON_CONTROL) &
3533 TEMPMON_CONTROL_OVERTEMP) != 0);
3534 if (link->overtemperature_error) {
3535 dev_info(link->dev->dev, "Over temperature condition\n");
3536 status = -1;
3537 }
3538 tempmon_setfan(link);
3539 spin_unlock_irq(&link->temp_lock);
3540 return status;
3541}
3542
3543static int ddb_init_tempmon(struct ddb_link *link)
3544{
3545 const struct ddb_info *info = link->info;
3546
3547 if (!info->tempmon_irq)
3548 return 0;
3549 if (info->type == DDB_OCTOPUS_MAX_CT)
3550 if (link->ids.regmapid < 0x00010002)
3551 return 0;
3552 spin_lock_init(&link->temp_lock);
3553 dev_dbg(link->dev->dev, "init_tempmon\n");
3554 return tempmon_init(link, 1);
3555}
3556
3557
3558
3559
3560
3561static int ddb_init_boards(struct ddb *dev)
3562{
3563 const struct ddb_info *info;
3564 struct ddb_link *link;
3565 u32 l;
3566
3567 for (l = 0; l < DDB_MAX_LINK; l++) {
3568 link = &dev->link[l];
3569 info = link->info;
3570
3571 if (!info)
3572 continue;
3573 if (info->board_control) {
3574 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL);
3575 msleep(100);
3576 ddbwritel(dev, info->board_control_2,
3577 DDB_LINK_TAG(l) | BOARD_CONTROL);
3578 usleep_range(2000, 3000);
3579 ddbwritel(dev,
3580 info->board_control_2 | info->board_control,
3581 DDB_LINK_TAG(l) | BOARD_CONTROL);
3582 usleep_range(2000, 3000);
3583 }
3584 ddb_init_tempmon(link);
3585 }
3586 return 0;
3587}
3588
3589int ddb_init(struct ddb *dev)
3590{
3591 mutex_init(&dev->link[0].lnb.lock);
3592 mutex_init(&dev->link[0].flash_mutex);
3593 if (no_init) {
3594 ddb_device_create(dev);
3595 return 0;
3596 }
3597
3598 ddb_init_boards(dev);
3599
3600 if (ddb_i2c_init(dev) < 0)
3601 goto fail;
3602 ddb_ports_init(dev);
3603 if (ddb_buffers_alloc(dev) < 0) {
3604 dev_info(dev->dev, "Could not allocate buffer memory\n");
3605 goto fail2;
3606 }
3607 if (ddb_ports_attach(dev) < 0)
3608 goto fail3;
3609
3610 ddb_device_create(dev);
3611
3612 if (dev->link[0].info->fan_num) {
3613 ddbwritel(dev, 1, GPIO_DIRECTION);
3614 ddbwritel(dev, 1, GPIO_OUTPUT);
3615 }
3616 return 0;
3617
3618fail3:
3619 ddb_ports_detach(dev);
3620 dev_err(dev->dev, "fail3\n");
3621 ddb_ports_release(dev);
3622fail2:
3623 dev_err(dev->dev, "fail2\n");
3624 ddb_buffers_free(dev);
3625 ddb_i2c_release(dev);
3626fail:
3627 dev_err(dev->dev, "fail1\n");
3628 return -1;
3629}
3630
3631void ddb_unmap(struct ddb *dev)
3632{
3633 if (dev->regs)
3634 iounmap(dev->regs);
3635 vfree(dev);
3636}
3637
