linux/drivers/net/wireless/ath/ath10k/core.c
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   1/*
   2 * Copyright (c) 2005-2011 Atheros Communications Inc.
   3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
   4 *
   5 * Permission to use, copy, modify, and/or distribute this software for any
   6 * purpose with or without fee is hereby granted, provided that the above
   7 * copyright notice and this permission notice appear in all copies.
   8 *
   9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16 */
  17
  18#include <linux/module.h>
  19#include <linux/firmware.h>
  20#include <linux/of.h>
  21#include <linux/dmi.h>
  22#include <linux/ctype.h>
  23#include <asm/byteorder.h>
  24
  25#include "core.h"
  26#include "mac.h"
  27#include "htc.h"
  28#include "hif.h"
  29#include "wmi.h"
  30#include "bmi.h"
  31#include "debug.h"
  32#include "htt.h"
  33#include "testmode.h"
  34#include "wmi-ops.h"
  35
  36unsigned int ath10k_debug_mask;
  37static unsigned int ath10k_cryptmode_param;
  38static bool uart_print;
  39static bool skip_otp;
  40static bool rawmode;
  41
  42module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  43module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  44module_param(uart_print, bool, 0644);
  45module_param(skip_otp, bool, 0644);
  46module_param(rawmode, bool, 0644);
  47
  48MODULE_PARM_DESC(debug_mask, "Debugging mask");
  49MODULE_PARM_DESC(uart_print, "Uart target debugging");
  50MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  51MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  52MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  53
  54static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  55        {
  56                .id = QCA988X_HW_2_0_VERSION,
  57                .dev_id = QCA988X_2_0_DEVICE_ID,
  58                .name = "qca988x hw2.0",
  59                .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  60                .uart_pin = 7,
  61                .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  62                .otp_exe_param = 0,
  63                .channel_counters_freq_hz = 88000,
  64                .max_probe_resp_desc_thres = 0,
  65                .cal_data_len = 2116,
  66                .fw = {
  67                        .dir = QCA988X_HW_2_0_FW_DIR,
  68                        .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  69                        .board_size = QCA988X_BOARD_DATA_SZ,
  70                        .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  71                },
  72                .hw_ops = &qca988x_ops,
  73                .decap_align_bytes = 4,
  74                .spectral_bin_discard = 0,
  75                .vht160_mcs_rx_highest = 0,
  76                .vht160_mcs_tx_highest = 0,
  77        },
  78        {
  79                .id = QCA9887_HW_1_0_VERSION,
  80                .dev_id = QCA9887_1_0_DEVICE_ID,
  81                .name = "qca9887 hw1.0",
  82                .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
  83                .uart_pin = 7,
  84                .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  85                .otp_exe_param = 0,
  86                .channel_counters_freq_hz = 88000,
  87                .max_probe_resp_desc_thres = 0,
  88                .cal_data_len = 2116,
  89                .fw = {
  90                        .dir = QCA9887_HW_1_0_FW_DIR,
  91                        .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
  92                        .board_size = QCA9887_BOARD_DATA_SZ,
  93                        .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
  94                },
  95                .hw_ops = &qca988x_ops,
  96                .decap_align_bytes = 4,
  97                .spectral_bin_discard = 0,
  98                .vht160_mcs_rx_highest = 0,
  99                .vht160_mcs_tx_highest = 0,
 100        },
 101        {
 102                .id = QCA6174_HW_2_1_VERSION,
 103                .dev_id = QCA6164_2_1_DEVICE_ID,
 104                .name = "qca6164 hw2.1",
 105                .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 106                .uart_pin = 6,
 107                .otp_exe_param = 0,
 108                .channel_counters_freq_hz = 88000,
 109                .max_probe_resp_desc_thres = 0,
 110                .cal_data_len = 8124,
 111                .fw = {
 112                        .dir = QCA6174_HW_2_1_FW_DIR,
 113                        .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 114                        .board_size = QCA6174_BOARD_DATA_SZ,
 115                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 116                },
 117                .hw_ops = &qca988x_ops,
 118                .decap_align_bytes = 4,
 119                .spectral_bin_discard = 0,
 120                .vht160_mcs_rx_highest = 0,
 121                .vht160_mcs_tx_highest = 0,
 122        },
 123        {
 124                .id = QCA6174_HW_2_1_VERSION,
 125                .dev_id = QCA6174_2_1_DEVICE_ID,
 126                .name = "qca6174 hw2.1",
 127                .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 128                .uart_pin = 6,
 129                .otp_exe_param = 0,
 130                .channel_counters_freq_hz = 88000,
 131                .max_probe_resp_desc_thres = 0,
 132                .cal_data_len = 8124,
 133                .fw = {
 134                        .dir = QCA6174_HW_2_1_FW_DIR,
 135                        .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 136                        .board_size = QCA6174_BOARD_DATA_SZ,
 137                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 138                },
 139                .hw_ops = &qca988x_ops,
 140                .decap_align_bytes = 4,
 141                .spectral_bin_discard = 0,
 142                .vht160_mcs_rx_highest = 0,
 143                .vht160_mcs_tx_highest = 0,
 144        },
 145        {
 146                .id = QCA6174_HW_3_0_VERSION,
 147                .dev_id = QCA6174_2_1_DEVICE_ID,
 148                .name = "qca6174 hw3.0",
 149                .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 150                .uart_pin = 6,
 151                .otp_exe_param = 0,
 152                .channel_counters_freq_hz = 88000,
 153                .max_probe_resp_desc_thres = 0,
 154                .cal_data_len = 8124,
 155                .fw = {
 156                        .dir = QCA6174_HW_3_0_FW_DIR,
 157                        .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 158                        .board_size = QCA6174_BOARD_DATA_SZ,
 159                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 160                },
 161                .hw_ops = &qca988x_ops,
 162                .decap_align_bytes = 4,
 163                .spectral_bin_discard = 0,
 164                .vht160_mcs_rx_highest = 0,
 165                .vht160_mcs_tx_highest = 0,
 166        },
 167        {
 168                .id = QCA6174_HW_3_2_VERSION,
 169                .dev_id = QCA6174_2_1_DEVICE_ID,
 170                .name = "qca6174 hw3.2",
 171                .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 172                .uart_pin = 6,
 173                .otp_exe_param = 0,
 174                .channel_counters_freq_hz = 88000,
 175                .max_probe_resp_desc_thres = 0,
 176                .cal_data_len = 8124,
 177                .fw = {
 178                        /* uses same binaries as hw3.0 */
 179                        .dir = QCA6174_HW_3_0_FW_DIR,
 180                        .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 181                        .board_size = QCA6174_BOARD_DATA_SZ,
 182                        .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 183                },
 184                .hw_ops = &qca6174_ops,
 185                .hw_clk = qca6174_clk,
 186                .target_cpu_freq = 176000000,
 187                .decap_align_bytes = 4,
 188                .spectral_bin_discard = 0,
 189                .vht160_mcs_rx_highest = 0,
 190                .vht160_mcs_tx_highest = 0,
 191        },
 192        {
 193                .id = QCA99X0_HW_2_0_DEV_VERSION,
 194                .dev_id = QCA99X0_2_0_DEVICE_ID,
 195                .name = "qca99x0 hw2.0",
 196                .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 197                .uart_pin = 7,
 198                .otp_exe_param = 0x00000700,
 199                .continuous_frag_desc = true,
 200                .cck_rate_map_rev2 = true,
 201                .channel_counters_freq_hz = 150000,
 202                .max_probe_resp_desc_thres = 24,
 203                .tx_chain_mask = 0xf,
 204                .rx_chain_mask = 0xf,
 205                .max_spatial_stream = 4,
 206                .cal_data_len = 12064,
 207                .fw = {
 208                        .dir = QCA99X0_HW_2_0_FW_DIR,
 209                        .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 210                        .board_size = QCA99X0_BOARD_DATA_SZ,
 211                        .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 212                },
 213                .sw_decrypt_mcast_mgmt = true,
 214                .hw_ops = &qca99x0_ops,
 215                .decap_align_bytes = 1,
 216                .spectral_bin_discard = 4,
 217                .vht160_mcs_rx_highest = 0,
 218                .vht160_mcs_tx_highest = 0,
 219        },
 220        {
 221                .id = QCA9984_HW_1_0_DEV_VERSION,
 222                .dev_id = QCA9984_1_0_DEVICE_ID,
 223                .name = "qca9984/qca9994 hw1.0",
 224                .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 225                .uart_pin = 7,
 226                .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 227                .otp_exe_param = 0x00000700,
 228                .continuous_frag_desc = true,
 229                .cck_rate_map_rev2 = true,
 230                .channel_counters_freq_hz = 150000,
 231                .max_probe_resp_desc_thres = 24,
 232                .tx_chain_mask = 0xf,
 233                .rx_chain_mask = 0xf,
 234                .max_spatial_stream = 4,
 235                .cal_data_len = 12064,
 236                .fw = {
 237                        .dir = QCA9984_HW_1_0_FW_DIR,
 238                        .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 239                        .board_size = QCA99X0_BOARD_DATA_SZ,
 240                        .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 241                },
 242                .sw_decrypt_mcast_mgmt = true,
 243                .hw_ops = &qca99x0_ops,
 244                .decap_align_bytes = 1,
 245                .spectral_bin_discard = 12,
 246
 247                /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 248                 * or 2x2 160Mhz, long-guard-interval.
 249                 */
 250                .vht160_mcs_rx_highest = 1560,
 251                .vht160_mcs_tx_highest = 1560,
 252        },
 253        {
 254                .id = QCA9888_HW_2_0_DEV_VERSION,
 255                .dev_id = QCA9888_2_0_DEVICE_ID,
 256                .name = "qca9888 hw2.0",
 257                .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 258                .uart_pin = 7,
 259                .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 260                .otp_exe_param = 0x00000700,
 261                .continuous_frag_desc = true,
 262                .channel_counters_freq_hz = 150000,
 263                .max_probe_resp_desc_thres = 24,
 264                .tx_chain_mask = 3,
 265                .rx_chain_mask = 3,
 266                .max_spatial_stream = 2,
 267                .cal_data_len = 12064,
 268                .fw = {
 269                        .dir = QCA9888_HW_2_0_FW_DIR,
 270                        .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 271                        .board_size = QCA99X0_BOARD_DATA_SZ,
 272                        .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 273                },
 274                .sw_decrypt_mcast_mgmt = true,
 275                .hw_ops = &qca99x0_ops,
 276                .decap_align_bytes = 1,
 277                .spectral_bin_discard = 12,
 278
 279                /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 280                 * 1x1 160Mhz, long-guard-interval.
 281                 */
 282                .vht160_mcs_rx_highest = 780,
 283                .vht160_mcs_tx_highest = 780,
 284        },
 285        {
 286                .id = QCA9377_HW_1_0_DEV_VERSION,
 287                .dev_id = QCA9377_1_0_DEVICE_ID,
 288                .name = "qca9377 hw1.0",
 289                .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 290                .uart_pin = 6,
 291                .otp_exe_param = 0,
 292                .channel_counters_freq_hz = 88000,
 293                .max_probe_resp_desc_thres = 0,
 294                .cal_data_len = 8124,
 295                .fw = {
 296                        .dir = QCA9377_HW_1_0_FW_DIR,
 297                        .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 298                        .board_size = QCA9377_BOARD_DATA_SZ,
 299                        .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 300                },
 301                .hw_ops = &qca988x_ops,
 302                .decap_align_bytes = 4,
 303                .spectral_bin_discard = 0,
 304                .vht160_mcs_rx_highest = 0,
 305                .vht160_mcs_tx_highest = 0,
 306        },
 307        {
 308                .id = QCA9377_HW_1_1_DEV_VERSION,
 309                .dev_id = QCA9377_1_0_DEVICE_ID,
 310                .name = "qca9377 hw1.1",
 311                .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 312                .uart_pin = 6,
 313                .otp_exe_param = 0,
 314                .channel_counters_freq_hz = 88000,
 315                .max_probe_resp_desc_thres = 0,
 316                .cal_data_len = 8124,
 317                .fw = {
 318                        .dir = QCA9377_HW_1_0_FW_DIR,
 319                        .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 320                        .board_size = QCA9377_BOARD_DATA_SZ,
 321                        .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 322                },
 323                .hw_ops = &qca6174_ops,
 324                .hw_clk = qca6174_clk,
 325                .target_cpu_freq = 176000000,
 326                .decap_align_bytes = 4,
 327                .spectral_bin_discard = 0,
 328                .vht160_mcs_rx_highest = 0,
 329                .vht160_mcs_tx_highest = 0,
 330        },
 331        {
 332                .id = QCA4019_HW_1_0_DEV_VERSION,
 333                .dev_id = 0,
 334                .name = "qca4019 hw1.0",
 335                .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 336                .uart_pin = 7,
 337                .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 338                .otp_exe_param = 0x0010000,
 339                .continuous_frag_desc = true,
 340                .cck_rate_map_rev2 = true,
 341                .channel_counters_freq_hz = 125000,
 342                .max_probe_resp_desc_thres = 24,
 343                .tx_chain_mask = 0x3,
 344                .rx_chain_mask = 0x3,
 345                .max_spatial_stream = 2,
 346                .cal_data_len = 12064,
 347                .fw = {
 348                        .dir = QCA4019_HW_1_0_FW_DIR,
 349                        .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 350                        .board_size = QCA4019_BOARD_DATA_SZ,
 351                        .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 352                },
 353                .sw_decrypt_mcast_mgmt = true,
 354                .hw_ops = &qca99x0_ops,
 355                .decap_align_bytes = 1,
 356                .spectral_bin_discard = 4,
 357                .vht160_mcs_rx_highest = 0,
 358                .vht160_mcs_tx_highest = 0,
 359        },
 360};
 361
 362static const char *const ath10k_core_fw_feature_str[] = {
 363        [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 364        [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 365        [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 366        [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 367        [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 368        [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 369        [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 370        [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 371        [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 372        [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 373        [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 374        [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 375        [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 376        [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 377        [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 378        [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 379        [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 380};
 381
 382static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 383                                                   size_t buf_len,
 384                                                   enum ath10k_fw_features feat)
 385{
 386        /* make sure that ath10k_core_fw_feature_str[] gets updated */
 387        BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 388                     ATH10K_FW_FEATURE_COUNT);
 389
 390        if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 391            WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 392                return scnprintf(buf, buf_len, "bit%d", feat);
 393        }
 394
 395        return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 396}
 397
 398void ath10k_core_get_fw_features_str(struct ath10k *ar,
 399                                     char *buf,
 400                                     size_t buf_len)
 401{
 402        size_t len = 0;
 403        int i;
 404
 405        for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 406                if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 407                        if (len > 0)
 408                                len += scnprintf(buf + len, buf_len - len, ",");
 409
 410                        len += ath10k_core_get_fw_feature_str(buf + len,
 411                                                              buf_len - len,
 412                                                              i);
 413                }
 414        }
 415}
 416
 417static void ath10k_send_suspend_complete(struct ath10k *ar)
 418{
 419        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 420
 421        complete(&ar->target_suspend);
 422}
 423
 424static void ath10k_init_sdio(struct ath10k *ar)
 425{
 426        u32 param = 0;
 427
 428        ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 429        ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 430        ath10k_bmi_read32(ar, hi_acs_flags, &param);
 431
 432        param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET |
 433                  HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET |
 434                  HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE);
 435
 436        ath10k_bmi_write32(ar, hi_acs_flags, param);
 437}
 438
 439static int ath10k_init_configure_target(struct ath10k *ar)
 440{
 441        u32 param_host;
 442        int ret;
 443
 444        /* tell target which HTC version it is used*/
 445        ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 446                                 HTC_PROTOCOL_VERSION);
 447        if (ret) {
 448                ath10k_err(ar, "settings HTC version failed\n");
 449                return ret;
 450        }
 451
 452        /* set the firmware mode to STA/IBSS/AP */
 453        ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 454        if (ret) {
 455                ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 456                return ret;
 457        }
 458
 459        /* TODO following parameters need to be re-visited. */
 460        /* num_device */
 461        param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 462        /* Firmware mode */
 463        /* FIXME: Why FW_MODE_AP ??.*/
 464        param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 465        /* mac_addr_method */
 466        param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 467        /* firmware_bridge */
 468        param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 469        /* fwsubmode */
 470        param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 471
 472        ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 473        if (ret) {
 474                ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 475                return ret;
 476        }
 477
 478        /* We do all byte-swapping on the host */
 479        ret = ath10k_bmi_write32(ar, hi_be, 0);
 480        if (ret) {
 481                ath10k_err(ar, "setting host CPU BE mode failed\n");
 482                return ret;
 483        }
 484
 485        /* FW descriptor/Data swap flags */
 486        ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 487
 488        if (ret) {
 489                ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 490                return ret;
 491        }
 492
 493        /* Some devices have a special sanity check that verifies the PCI
 494         * Device ID is written to this host interest var. It is known to be
 495         * required to boot QCA6164.
 496         */
 497        ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 498                                 ar->dev_id);
 499        if (ret) {
 500                ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 501                return ret;
 502        }
 503
 504        return 0;
 505}
 506
 507static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 508                                                   const char *dir,
 509                                                   const char *file)
 510{
 511        char filename[100];
 512        const struct firmware *fw;
 513        int ret;
 514
 515        if (file == NULL)
 516                return ERR_PTR(-ENOENT);
 517
 518        if (dir == NULL)
 519                dir = ".";
 520
 521        snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 522        ret = request_firmware(&fw, filename, ar->dev);
 523        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 524                   filename, ret);
 525
 526        if (ret)
 527                return ERR_PTR(ret);
 528
 529        return fw;
 530}
 531
 532static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 533                                      size_t data_len)
 534{
 535        u32 board_data_size = ar->hw_params.fw.board_size;
 536        u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 537        u32 board_ext_data_addr;
 538        int ret;
 539
 540        ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 541        if (ret) {
 542                ath10k_err(ar, "could not read board ext data addr (%d)\n",
 543                           ret);
 544                return ret;
 545        }
 546
 547        ath10k_dbg(ar, ATH10K_DBG_BOOT,
 548                   "boot push board extended data addr 0x%x\n",
 549                   board_ext_data_addr);
 550
 551        if (board_ext_data_addr == 0)
 552                return 0;
 553
 554        if (data_len != (board_data_size + board_ext_data_size)) {
 555                ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 556                           data_len, board_data_size, board_ext_data_size);
 557                return -EINVAL;
 558        }
 559
 560        ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 561                                      data + board_data_size,
 562                                      board_ext_data_size);
 563        if (ret) {
 564                ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 565                return ret;
 566        }
 567
 568        ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 569                                 (board_ext_data_size << 16) | 1);
 570        if (ret) {
 571                ath10k_err(ar, "could not write board ext data bit (%d)\n",
 572                           ret);
 573                return ret;
 574        }
 575
 576        return 0;
 577}
 578
 579static int ath10k_download_board_data(struct ath10k *ar, const void *data,
 580                                      size_t data_len)
 581{
 582        u32 board_data_size = ar->hw_params.fw.board_size;
 583        u32 address;
 584        int ret;
 585
 586        ret = ath10k_push_board_ext_data(ar, data, data_len);
 587        if (ret) {
 588                ath10k_err(ar, "could not push board ext data (%d)\n", ret);
 589                goto exit;
 590        }
 591
 592        ret = ath10k_bmi_read32(ar, hi_board_data, &address);
 593        if (ret) {
 594                ath10k_err(ar, "could not read board data addr (%d)\n", ret);
 595                goto exit;
 596        }
 597
 598        ret = ath10k_bmi_write_memory(ar, address, data,
 599                                      min_t(u32, board_data_size,
 600                                            data_len));
 601        if (ret) {
 602                ath10k_err(ar, "could not write board data (%d)\n", ret);
 603                goto exit;
 604        }
 605
 606        ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
 607        if (ret) {
 608                ath10k_err(ar, "could not write board data bit (%d)\n", ret);
 609                goto exit;
 610        }
 611
 612exit:
 613        return ret;
 614}
 615
 616static int ath10k_download_cal_file(struct ath10k *ar,
 617                                    const struct firmware *file)
 618{
 619        int ret;
 620
 621        if (!file)
 622                return -ENOENT;
 623
 624        if (IS_ERR(file))
 625                return PTR_ERR(file);
 626
 627        ret = ath10k_download_board_data(ar, file->data, file->size);
 628        if (ret) {
 629                ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
 630                return ret;
 631        }
 632
 633        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
 634
 635        return 0;
 636}
 637
 638static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
 639{
 640        struct device_node *node;
 641        int data_len;
 642        void *data;
 643        int ret;
 644
 645        node = ar->dev->of_node;
 646        if (!node)
 647                /* Device Tree is optional, don't print any warnings if
 648                 * there's no node for ath10k.
 649                 */
 650                return -ENOENT;
 651
 652        if (!of_get_property(node, dt_name, &data_len)) {
 653                /* The calibration data node is optional */
 654                return -ENOENT;
 655        }
 656
 657        if (data_len != ar->hw_params.cal_data_len) {
 658                ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
 659                            data_len);
 660                ret = -EMSGSIZE;
 661                goto out;
 662        }
 663
 664        data = kmalloc(data_len, GFP_KERNEL);
 665        if (!data) {
 666                ret = -ENOMEM;
 667                goto out;
 668        }
 669
 670        ret = of_property_read_u8_array(node, dt_name, data, data_len);
 671        if (ret) {
 672                ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
 673                            ret);
 674                goto out_free;
 675        }
 676
 677        ret = ath10k_download_board_data(ar, data, data_len);
 678        if (ret) {
 679                ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
 680                            ret);
 681                goto out_free;
 682        }
 683
 684        ret = 0;
 685
 686out_free:
 687        kfree(data);
 688
 689out:
 690        return ret;
 691}
 692
 693static int ath10k_download_cal_eeprom(struct ath10k *ar)
 694{
 695        size_t data_len;
 696        void *data = NULL;
 697        int ret;
 698
 699        ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
 700        if (ret) {
 701                if (ret != -EOPNOTSUPP)
 702                        ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
 703                                    ret);
 704                goto out_free;
 705        }
 706
 707        ret = ath10k_download_board_data(ar, data, data_len);
 708        if (ret) {
 709                ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
 710                            ret);
 711                goto out_free;
 712        }
 713
 714        ret = 0;
 715
 716out_free:
 717        kfree(data);
 718
 719        return ret;
 720}
 721
 722static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 723{
 724        u32 result, address;
 725        u8 board_id, chip_id;
 726        int ret, bmi_board_id_param;
 727
 728        address = ar->hw_params.patch_load_addr;
 729
 730        if (!ar->normal_mode_fw.fw_file.otp_data ||
 731            !ar->normal_mode_fw.fw_file.otp_len) {
 732                ath10k_warn(ar,
 733                            "failed to retrieve board id because of invalid otp\n");
 734                return -ENODATA;
 735        }
 736
 737        ath10k_dbg(ar, ATH10K_DBG_BOOT,
 738                   "boot upload otp to 0x%x len %zd for board id\n",
 739                   address, ar->normal_mode_fw.fw_file.otp_len);
 740
 741        ret = ath10k_bmi_fast_download(ar, address,
 742                                       ar->normal_mode_fw.fw_file.otp_data,
 743                                       ar->normal_mode_fw.fw_file.otp_len);
 744        if (ret) {
 745                ath10k_err(ar, "could not write otp for board id check: %d\n",
 746                           ret);
 747                return ret;
 748        }
 749
 750        if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 751            ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
 752                bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
 753        else
 754                bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
 755
 756        ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
 757        if (ret) {
 758                ath10k_err(ar, "could not execute otp for board id check: %d\n",
 759                           ret);
 760                return ret;
 761        }
 762
 763        board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 764        chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 765
 766        ath10k_dbg(ar, ATH10K_DBG_BOOT,
 767                   "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
 768                   result, board_id, chip_id);
 769
 770        if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
 771            (board_id == 0)) {
 772                ath10k_dbg(ar, ATH10K_DBG_BOOT,
 773                           "board id does not exist in otp, ignore it\n");
 774                return -EOPNOTSUPP;
 775        }
 776
 777        ar->id.bmi_ids_valid = true;
 778        ar->id.bmi_board_id = board_id;
 779        ar->id.bmi_chip_id = chip_id;
 780
 781        return 0;
 782}
 783
 784static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
 785{
 786        struct ath10k *ar = data;
 787        const char *bdf_ext;
 788        const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
 789        u8 bdf_enabled;
 790        int i;
 791
 792        if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
 793                return;
 794
 795        if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
 796                ath10k_dbg(ar, ATH10K_DBG_BOOT,
 797                           "wrong smbios bdf ext type length (%d).\n",
 798                           hdr->length);
 799                return;
 800        }
 801
 802        bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
 803        if (!bdf_enabled) {
 804                ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
 805                return;
 806        }
 807
 808        /* Only one string exists (per spec) */
 809        bdf_ext = (char *)hdr + hdr->length;
 810
 811        if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
 812                ath10k_dbg(ar, ATH10K_DBG_BOOT,
 813                           "bdf variant magic does not match.\n");
 814                return;
 815        }
 816
 817        for (i = 0; i < strlen(bdf_ext); i++) {
 818                if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
 819                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
 820                                   "bdf variant name contains non ascii chars.\n");
 821                        return;
 822                }
 823        }
 824
 825        /* Copy extension name without magic suffix */
 826        if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
 827                    sizeof(ar->id.bdf_ext)) < 0) {
 828                ath10k_dbg(ar, ATH10K_DBG_BOOT,
 829                           "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
 830                            bdf_ext);
 831                return;
 832        }
 833
 834        ath10k_dbg(ar, ATH10K_DBG_BOOT,
 835                   "found and validated bdf variant smbios_type 0x%x bdf %s\n",
 836                   ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
 837}
 838
 839static int ath10k_core_check_smbios(struct ath10k *ar)
 840{
 841        ar->id.bdf_ext[0] = '\0';
 842        dmi_walk(ath10k_core_check_bdfext, ar);
 843
 844        if (ar->id.bdf_ext[0] == '\0')
 845                return -ENODATA;
 846
 847        return 0;
 848}
 849
 850static int ath10k_download_and_run_otp(struct ath10k *ar)
 851{
 852        u32 result, address = ar->hw_params.patch_load_addr;
 853        u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
 854        int ret;
 855
 856        ret = ath10k_download_board_data(ar,
 857                                         ar->running_fw->board_data,
 858                                         ar->running_fw->board_len);
 859        if (ret) {
 860                ath10k_err(ar, "failed to download board data: %d\n", ret);
 861                return ret;
 862        }
 863
 864        /* OTP is optional */
 865
 866        if (!ar->running_fw->fw_file.otp_data ||
 867            !ar->running_fw->fw_file.otp_len) {
 868                ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
 869                            ar->running_fw->fw_file.otp_data,
 870                            ar->running_fw->fw_file.otp_len);
 871                return 0;
 872        }
 873
 874        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
 875                   address, ar->running_fw->fw_file.otp_len);
 876
 877        ret = ath10k_bmi_fast_download(ar, address,
 878                                       ar->running_fw->fw_file.otp_data,
 879                                       ar->running_fw->fw_file.otp_len);
 880        if (ret) {
 881                ath10k_err(ar, "could not write otp (%d)\n", ret);
 882                return ret;
 883        }
 884
 885        /* As of now pre-cal is valid for 10_4 variants */
 886        if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 887            ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
 888                bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
 889
 890        ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
 891        if (ret) {
 892                ath10k_err(ar, "could not execute otp (%d)\n", ret);
 893                return ret;
 894        }
 895
 896        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
 897
 898        if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
 899                                   ar->running_fw->fw_file.fw_features)) &&
 900            result != 0) {
 901                ath10k_err(ar, "otp calibration failed: %d", result);
 902                return -EINVAL;
 903        }
 904
 905        return 0;
 906}
 907
 908static int ath10k_download_fw(struct ath10k *ar)
 909{
 910        u32 address, data_len;
 911        const void *data;
 912        int ret;
 913
 914        address = ar->hw_params.patch_load_addr;
 915
 916        data = ar->running_fw->fw_file.firmware_data;
 917        data_len = ar->running_fw->fw_file.firmware_len;
 918
 919        ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
 920        if (ret) {
 921                ath10k_err(ar, "failed to configure fw code swap: %d\n",
 922                           ret);
 923                return ret;
 924        }
 925
 926        ath10k_dbg(ar, ATH10K_DBG_BOOT,
 927                   "boot uploading firmware image %pK len %d\n",
 928                   data, data_len);
 929
 930        ret = ath10k_bmi_fast_download(ar, address, data, data_len);
 931        if (ret) {
 932                ath10k_err(ar, "failed to download firmware: %d\n",
 933                           ret);
 934                return ret;
 935        }
 936
 937        return ret;
 938}
 939
 940static void ath10k_core_free_board_files(struct ath10k *ar)
 941{
 942        if (!IS_ERR(ar->normal_mode_fw.board))
 943                release_firmware(ar->normal_mode_fw.board);
 944
 945        ar->normal_mode_fw.board = NULL;
 946        ar->normal_mode_fw.board_data = NULL;
 947        ar->normal_mode_fw.board_len = 0;
 948}
 949
 950static void ath10k_core_free_firmware_files(struct ath10k *ar)
 951{
 952        if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
 953                release_firmware(ar->normal_mode_fw.fw_file.firmware);
 954
 955        if (!IS_ERR(ar->cal_file))
 956                release_firmware(ar->cal_file);
 957
 958        if (!IS_ERR(ar->pre_cal_file))
 959                release_firmware(ar->pre_cal_file);
 960
 961        ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
 962
 963        ar->normal_mode_fw.fw_file.otp_data = NULL;
 964        ar->normal_mode_fw.fw_file.otp_len = 0;
 965
 966        ar->normal_mode_fw.fw_file.firmware = NULL;
 967        ar->normal_mode_fw.fw_file.firmware_data = NULL;
 968        ar->normal_mode_fw.fw_file.firmware_len = 0;
 969
 970        ar->cal_file = NULL;
 971        ar->pre_cal_file = NULL;
 972}
 973
 974static int ath10k_fetch_cal_file(struct ath10k *ar)
 975{
 976        char filename[100];
 977
 978        /* pre-cal-<bus>-<id>.bin */
 979        scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
 980                  ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 981
 982        ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 983        if (!IS_ERR(ar->pre_cal_file))
 984                goto success;
 985
 986        /* cal-<bus>-<id>.bin */
 987        scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
 988                  ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 989
 990        ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 991        if (IS_ERR(ar->cal_file))
 992                /* calibration file is optional, don't print any warnings */
 993                return PTR_ERR(ar->cal_file);
 994success:
 995        ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
 996                   ATH10K_FW_DIR, filename);
 997
 998        return 0;
 999}
1000
1001static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
1002{
1003        if (!ar->hw_params.fw.board) {
1004                ath10k_err(ar, "failed to find board file fw entry\n");
1005                return -EINVAL;
1006        }
1007
1008        ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1009                                                        ar->hw_params.fw.dir,
1010                                                        ar->hw_params.fw.board);
1011        if (IS_ERR(ar->normal_mode_fw.board))
1012                return PTR_ERR(ar->normal_mode_fw.board);
1013
1014        ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1015        ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1016
1017        return 0;
1018}
1019
1020static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1021                                         const void *buf, size_t buf_len,
1022                                         const char *boardname)
1023{
1024        const struct ath10k_fw_ie *hdr;
1025        bool name_match_found;
1026        int ret, board_ie_id;
1027        size_t board_ie_len;
1028        const void *board_ie_data;
1029
1030        name_match_found = false;
1031
1032        /* go through ATH10K_BD_IE_BOARD_ elements */
1033        while (buf_len > sizeof(struct ath10k_fw_ie)) {
1034                hdr = buf;
1035                board_ie_id = le32_to_cpu(hdr->id);
1036                board_ie_len = le32_to_cpu(hdr->len);
1037                board_ie_data = hdr->data;
1038
1039                buf_len -= sizeof(*hdr);
1040                buf += sizeof(*hdr);
1041
1042                if (buf_len < ALIGN(board_ie_len, 4)) {
1043                        ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1044                                   buf_len, ALIGN(board_ie_len, 4));
1045                        ret = -EINVAL;
1046                        goto out;
1047                }
1048
1049                switch (board_ie_id) {
1050                case ATH10K_BD_IE_BOARD_NAME:
1051                        ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1052                                        board_ie_data, board_ie_len);
1053
1054                        if (board_ie_len != strlen(boardname))
1055                                break;
1056
1057                        ret = memcmp(board_ie_data, boardname, strlen(boardname));
1058                        if (ret)
1059                                break;
1060
1061                        name_match_found = true;
1062                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1063                                   "boot found match for name '%s'",
1064                                   boardname);
1065                        break;
1066                case ATH10K_BD_IE_BOARD_DATA:
1067                        if (!name_match_found)
1068                                /* no match found */
1069                                break;
1070
1071                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1072                                   "boot found board data for '%s'",
1073                                   boardname);
1074
1075                        ar->normal_mode_fw.board_data = board_ie_data;
1076                        ar->normal_mode_fw.board_len = board_ie_len;
1077
1078                        ret = 0;
1079                        goto out;
1080                default:
1081                        ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1082                                    board_ie_id);
1083                        break;
1084                }
1085
1086                /* jump over the padding */
1087                board_ie_len = ALIGN(board_ie_len, 4);
1088
1089                buf_len -= board_ie_len;
1090                buf += board_ie_len;
1091        }
1092
1093        /* no match found */
1094        ret = -ENOENT;
1095
1096out:
1097        return ret;
1098}
1099
1100static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1101                                              const char *boardname,
1102                                              const char *filename)
1103{
1104        size_t len, magic_len, ie_len;
1105        struct ath10k_fw_ie *hdr;
1106        const u8 *data;
1107        int ret, ie_id;
1108
1109        ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1110                                                        ar->hw_params.fw.dir,
1111                                                        filename);
1112        if (IS_ERR(ar->normal_mode_fw.board))
1113                return PTR_ERR(ar->normal_mode_fw.board);
1114
1115        data = ar->normal_mode_fw.board->data;
1116        len = ar->normal_mode_fw.board->size;
1117
1118        /* magic has extra null byte padded */
1119        magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1120        if (len < magic_len) {
1121                ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1122                           ar->hw_params.fw.dir, filename, len);
1123                ret = -EINVAL;
1124                goto err;
1125        }
1126
1127        if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1128                ath10k_err(ar, "found invalid board magic\n");
1129                ret = -EINVAL;
1130                goto err;
1131        }
1132
1133        /* magic is padded to 4 bytes */
1134        magic_len = ALIGN(magic_len, 4);
1135        if (len < magic_len) {
1136                ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1137                           ar->hw_params.fw.dir, filename, len);
1138                ret = -EINVAL;
1139                goto err;
1140        }
1141
1142        data += magic_len;
1143        len -= magic_len;
1144
1145        while (len > sizeof(struct ath10k_fw_ie)) {
1146                hdr = (struct ath10k_fw_ie *)data;
1147                ie_id = le32_to_cpu(hdr->id);
1148                ie_len = le32_to_cpu(hdr->len);
1149
1150                len -= sizeof(*hdr);
1151                data = hdr->data;
1152
1153                if (len < ALIGN(ie_len, 4)) {
1154                        ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1155                                   ie_id, ie_len, len);
1156                        ret = -EINVAL;
1157                        goto err;
1158                }
1159
1160                switch (ie_id) {
1161                case ATH10K_BD_IE_BOARD:
1162                        ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1163                                                            boardname);
1164                        if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') {
1165                                /* try default bdf if variant was not found */
1166                                char *s, *v = ",variant=";
1167                                char boardname2[100];
1168
1169                                strlcpy(boardname2, boardname,
1170                                        sizeof(boardname2));
1171
1172                                s = strstr(boardname2, v);
1173                                if (s)
1174                                        *s = '\0';  /* strip ",variant=%s" */
1175
1176                                ret = ath10k_core_parse_bd_ie_board(ar, data,
1177                                                                    ie_len,
1178                                                                    boardname2);
1179                        }
1180
1181                        if (ret == -ENOENT)
1182                                /* no match found, continue */
1183                                break;
1184                        else if (ret)
1185                                /* there was an error, bail out */
1186                                goto err;
1187
1188                        /* board data found */
1189                        goto out;
1190                }
1191
1192                /* jump over the padding */
1193                ie_len = ALIGN(ie_len, 4);
1194
1195                len -= ie_len;
1196                data += ie_len;
1197        }
1198
1199out:
1200        if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
1201                ath10k_err(ar,
1202                           "failed to fetch board data for %s from %s/%s\n",
1203                           boardname, ar->hw_params.fw.dir, filename);
1204                ret = -ENODATA;
1205                goto err;
1206        }
1207
1208        return 0;
1209
1210err:
1211        ath10k_core_free_board_files(ar);
1212        return ret;
1213}
1214
1215static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1216                                         size_t name_len)
1217{
1218        /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1219        char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1220
1221        if (ar->id.bmi_ids_valid) {
1222                scnprintf(name, name_len,
1223                          "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
1224                          ath10k_bus_str(ar->hif.bus),
1225                          ar->id.bmi_chip_id,
1226                          ar->id.bmi_board_id);
1227                goto out;
1228        }
1229
1230        if (ar->id.bdf_ext[0] != '\0')
1231                scnprintf(variant, sizeof(variant), ",variant=%s",
1232                          ar->id.bdf_ext);
1233
1234        scnprintf(name, name_len,
1235                  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1236                  ath10k_bus_str(ar->hif.bus),
1237                  ar->id.vendor, ar->id.device,
1238                  ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1239out:
1240        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1241
1242        return 0;
1243}
1244
1245static int ath10k_core_fetch_board_file(struct ath10k *ar)
1246{
1247        char boardname[100];
1248        int ret;
1249
1250        ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
1251        if (ret) {
1252                ath10k_err(ar, "failed to create board name: %d", ret);
1253                return ret;
1254        }
1255
1256        ar->bd_api = 2;
1257        ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1258                                                 ATH10K_BOARD_API2_FILE);
1259        if (!ret)
1260                goto success;
1261
1262        ar->bd_api = 1;
1263        ret = ath10k_core_fetch_board_data_api_1(ar);
1264        if (ret) {
1265                ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1266                           ar->hw_params.fw.dir);
1267                return ret;
1268        }
1269
1270success:
1271        ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1272        return 0;
1273}
1274
1275int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1276                                     struct ath10k_fw_file *fw_file)
1277{
1278        size_t magic_len, len, ie_len;
1279        int ie_id, i, index, bit, ret;
1280        struct ath10k_fw_ie *hdr;
1281        const u8 *data;
1282        __le32 *timestamp, *version;
1283
1284        /* first fetch the firmware file (firmware-*.bin) */
1285        fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1286                                                 name);
1287        if (IS_ERR(fw_file->firmware))
1288                return PTR_ERR(fw_file->firmware);
1289
1290        data = fw_file->firmware->data;
1291        len = fw_file->firmware->size;
1292
1293        /* magic also includes the null byte, check that as well */
1294        magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1295
1296        if (len < magic_len) {
1297                ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1298                           ar->hw_params.fw.dir, name, len);
1299                ret = -EINVAL;
1300                goto err;
1301        }
1302
1303        if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1304                ath10k_err(ar, "invalid firmware magic\n");
1305                ret = -EINVAL;
1306                goto err;
1307        }
1308
1309        /* jump over the padding */
1310        magic_len = ALIGN(magic_len, 4);
1311
1312        len -= magic_len;
1313        data += magic_len;
1314
1315        /* loop elements */
1316        while (len > sizeof(struct ath10k_fw_ie)) {
1317                hdr = (struct ath10k_fw_ie *)data;
1318
1319                ie_id = le32_to_cpu(hdr->id);
1320                ie_len = le32_to_cpu(hdr->len);
1321
1322                len -= sizeof(*hdr);
1323                data += sizeof(*hdr);
1324
1325                if (len < ie_len) {
1326                        ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1327                                   ie_id, len, ie_len);
1328                        ret = -EINVAL;
1329                        goto err;
1330                }
1331
1332                switch (ie_id) {
1333                case ATH10K_FW_IE_FW_VERSION:
1334                        if (ie_len > sizeof(fw_file->fw_version) - 1)
1335                                break;
1336
1337                        memcpy(fw_file->fw_version, data, ie_len);
1338                        fw_file->fw_version[ie_len] = '\0';
1339
1340                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1341                                   "found fw version %s\n",
1342                                    fw_file->fw_version);
1343                        break;
1344                case ATH10K_FW_IE_TIMESTAMP:
1345                        if (ie_len != sizeof(u32))
1346                                break;
1347
1348                        timestamp = (__le32 *)data;
1349
1350                        ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1351                                   le32_to_cpup(timestamp));
1352                        break;
1353                case ATH10K_FW_IE_FEATURES:
1354                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1355                                   "found firmware features ie (%zd B)\n",
1356                                   ie_len);
1357
1358                        for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1359                                index = i / 8;
1360                                bit = i % 8;
1361
1362                                if (index == ie_len)
1363                                        break;
1364
1365                                if (data[index] & (1 << bit)) {
1366                                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1367                                                   "Enabling feature bit: %i\n",
1368                                                   i);
1369                                        __set_bit(i, fw_file->fw_features);
1370                                }
1371                        }
1372
1373                        ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1374                                        fw_file->fw_features,
1375                                        sizeof(fw_file->fw_features));
1376                        break;
1377                case ATH10K_FW_IE_FW_IMAGE:
1378                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1379                                   "found fw image ie (%zd B)\n",
1380                                   ie_len);
1381
1382                        fw_file->firmware_data = data;
1383                        fw_file->firmware_len = ie_len;
1384
1385                        break;
1386                case ATH10K_FW_IE_OTP_IMAGE:
1387                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1388                                   "found otp image ie (%zd B)\n",
1389                                   ie_len);
1390
1391                        fw_file->otp_data = data;
1392                        fw_file->otp_len = ie_len;
1393
1394                        break;
1395                case ATH10K_FW_IE_WMI_OP_VERSION:
1396                        if (ie_len != sizeof(u32))
1397                                break;
1398
1399                        version = (__le32 *)data;
1400
1401                        fw_file->wmi_op_version = le32_to_cpup(version);
1402
1403                        ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1404                                   fw_file->wmi_op_version);
1405                        break;
1406                case ATH10K_FW_IE_HTT_OP_VERSION:
1407                        if (ie_len != sizeof(u32))
1408                                break;
1409
1410                        version = (__le32 *)data;
1411
1412                        fw_file->htt_op_version = le32_to_cpup(version);
1413
1414                        ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1415                                   fw_file->htt_op_version);
1416                        break;
1417                case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1418                        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1419                                   "found fw code swap image ie (%zd B)\n",
1420                                   ie_len);
1421                        fw_file->codeswap_data = data;
1422                        fw_file->codeswap_len = ie_len;
1423                        break;
1424                default:
1425                        ath10k_warn(ar, "Unknown FW IE: %u\n",
1426                                    le32_to_cpu(hdr->id));
1427                        break;
1428                }
1429
1430                /* jump over the padding */
1431                ie_len = ALIGN(ie_len, 4);
1432
1433                len -= ie_len;
1434                data += ie_len;
1435        }
1436
1437        if (!fw_file->firmware_data ||
1438            !fw_file->firmware_len) {
1439                ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1440                            ar->hw_params.fw.dir, name);
1441                ret = -ENOMEDIUM;
1442                goto err;
1443        }
1444
1445        return 0;
1446
1447err:
1448        ath10k_core_free_firmware_files(ar);
1449        return ret;
1450}
1451
1452static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1453                                    size_t fw_name_len, int fw_api)
1454{
1455        switch (ar->hif.bus) {
1456        case ATH10K_BUS_SDIO:
1457        case ATH10K_BUS_USB:
1458                scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1459                          ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1460                          fw_api);
1461                break;
1462        case ATH10K_BUS_PCI:
1463        case ATH10K_BUS_AHB:
1464                scnprintf(fw_name, fw_name_len, "%s-%d.bin",
1465                          ATH10K_FW_FILE_BASE, fw_api);
1466                break;
1467        }
1468}
1469
1470static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1471{
1472        int ret, i;
1473        char fw_name[100];
1474
1475        /* calibration file is optional, don't check for any errors */
1476        ath10k_fetch_cal_file(ar);
1477
1478        for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
1479                ar->fw_api = i;
1480                ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
1481                           ar->fw_api);
1482
1483                ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
1484                ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
1485                                                       &ar->normal_mode_fw.fw_file);
1486                if (!ret)
1487                        goto success;
1488        }
1489
1490        /* we end up here if we couldn't fetch any firmware */
1491
1492        ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
1493                   ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
1494                   ret);
1495
1496        return ret;
1497
1498success:
1499        ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1500
1501        return 0;
1502}
1503
1504static int ath10k_core_pre_cal_download(struct ath10k *ar)
1505{
1506        int ret;
1507
1508        ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1509        if (ret == 0) {
1510                ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1511                goto success;
1512        }
1513
1514        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1515                   "boot did not find a pre calibration file, try DT next: %d\n",
1516                   ret);
1517
1518        ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1519        if (ret) {
1520                ath10k_dbg(ar, ATH10K_DBG_BOOT,
1521                           "unable to load pre cal data from DT: %d\n", ret);
1522                return ret;
1523        }
1524        ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1525
1526success:
1527        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1528                   ath10k_cal_mode_str(ar->cal_mode));
1529
1530        return 0;
1531}
1532
1533static int ath10k_core_pre_cal_config(struct ath10k *ar)
1534{
1535        int ret;
1536
1537        ret = ath10k_core_pre_cal_download(ar);
1538        if (ret) {
1539                ath10k_dbg(ar, ATH10K_DBG_BOOT,
1540                           "failed to load pre cal data: %d\n", ret);
1541                return ret;
1542        }
1543
1544        ret = ath10k_core_get_board_id_from_otp(ar);
1545        if (ret) {
1546                ath10k_err(ar, "failed to get board id: %d\n", ret);
1547                return ret;
1548        }
1549
1550        ret = ath10k_download_and_run_otp(ar);
1551        if (ret) {
1552                ath10k_err(ar, "failed to run otp: %d\n", ret);
1553                return ret;
1554        }
1555
1556        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1557                   "pre cal configuration done successfully\n");
1558
1559        return 0;
1560}
1561
1562static int ath10k_download_cal_data(struct ath10k *ar)
1563{
1564        int ret;
1565
1566        ret = ath10k_core_pre_cal_config(ar);
1567        if (ret == 0)
1568                return 0;
1569
1570        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1571                   "pre cal download procedure failed, try cal file: %d\n",
1572                   ret);
1573
1574        ret = ath10k_download_cal_file(ar, ar->cal_file);
1575        if (ret == 0) {
1576                ar->cal_mode = ATH10K_CAL_MODE_FILE;
1577                goto done;
1578        }
1579
1580        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1581                   "boot did not find a calibration file, try DT next: %d\n",
1582                   ret);
1583
1584        ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1585        if (ret == 0) {
1586                ar->cal_mode = ATH10K_CAL_MODE_DT;
1587                goto done;
1588        }
1589
1590        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1591                   "boot did not find DT entry, try target EEPROM next: %d\n",
1592                   ret);
1593
1594        ret = ath10k_download_cal_eeprom(ar);
1595        if (ret == 0) {
1596                ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1597                goto done;
1598        }
1599
1600        ath10k_dbg(ar, ATH10K_DBG_BOOT,
1601                   "boot did not find target EEPROM entry, try OTP next: %d\n",
1602                   ret);
1603
1604        ret = ath10k_download_and_run_otp(ar);
1605        if (ret) {
1606                ath10k_err(ar, "failed to run otp: %d\n", ret);
1607                return ret;
1608        }
1609
1610        ar->cal_mode = ATH10K_CAL_MODE_OTP;
1611
1612done:
1613        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1614                   ath10k_cal_mode_str(ar->cal_mode));
1615        return 0;
1616}
1617
1618static int ath10k_init_uart(struct ath10k *ar)
1619{
1620        int ret;
1621
1622        /*
1623         * Explicitly setting UART prints to zero as target turns it on
1624         * based on scratch registers.
1625         */
1626        ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1627        if (ret) {
1628                ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1629                return ret;
1630        }
1631
1632        if (!uart_print)
1633                return 0;
1634
1635        ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1636        if (ret) {
1637                ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1638                return ret;
1639        }
1640
1641        ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1642        if (ret) {
1643                ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1644                return ret;
1645        }
1646
1647        /* Set the UART baud rate to 19200. */
1648        ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1649        if (ret) {
1650                ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1651                return ret;
1652        }
1653
1654        ath10k_info(ar, "UART prints enabled\n");
1655        return 0;
1656}
1657
1658static int ath10k_init_hw_params(struct ath10k *ar)
1659{
1660        const struct ath10k_hw_params *uninitialized_var(hw_params);
1661        int i;
1662
1663        for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1664                hw_params = &ath10k_hw_params_list[i];
1665
1666                if (hw_params->id == ar->target_version &&
1667                    hw_params->dev_id == ar->dev_id)
1668                        break;
1669        }
1670
1671        if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1672                ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1673                           ar->target_version);
1674                return -EINVAL;
1675        }
1676
1677        ar->hw_params = *hw_params;
1678
1679        ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1680                   ar->hw_params.name, ar->target_version);
1681
1682        return 0;
1683}
1684
1685static void ath10k_core_restart(struct work_struct *work)
1686{
1687        struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1688        int ret;
1689
1690        set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1691
1692        /* Place a barrier to make sure the compiler doesn't reorder
1693         * CRASH_FLUSH and calling other functions.
1694         */
1695        barrier();
1696
1697        ieee80211_stop_queues(ar->hw);
1698        ath10k_drain_tx(ar);
1699        complete(&ar->scan.started);
1700        complete(&ar->scan.completed);
1701        complete(&ar->scan.on_channel);
1702        complete(&ar->offchan_tx_completed);
1703        complete(&ar->install_key_done);
1704        complete(&ar->vdev_setup_done);
1705        complete(&ar->thermal.wmi_sync);
1706        complete(&ar->bss_survey_done);
1707        wake_up(&ar->htt.empty_tx_wq);
1708        wake_up(&ar->wmi.tx_credits_wq);
1709        wake_up(&ar->peer_mapping_wq);
1710
1711        /* TODO: We can have one instance of cancelling coverage_class_work by
1712         * moving it to ath10k_halt(), so that both stop() and restart() would
1713         * call that but it takes conf_mutex() and if we call cancel_work_sync()
1714         * with conf_mutex it will deadlock.
1715         */
1716        cancel_work_sync(&ar->set_coverage_class_work);
1717
1718        mutex_lock(&ar->conf_mutex);
1719
1720        switch (ar->state) {
1721        case ATH10K_STATE_ON:
1722                ar->state = ATH10K_STATE_RESTARTING;
1723                ath10k_halt(ar);
1724                ath10k_scan_finish(ar);
1725                ieee80211_restart_hw(ar->hw);
1726                break;
1727        case ATH10K_STATE_OFF:
1728                /* this can happen if driver is being unloaded
1729                 * or if the crash happens during FW probing
1730                 */
1731                ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1732                break;
1733        case ATH10K_STATE_RESTARTING:
1734                /* hw restart might be requested from multiple places */
1735                break;
1736        case ATH10K_STATE_RESTARTED:
1737                ar->state = ATH10K_STATE_WEDGED;
1738                /* fall through */
1739        case ATH10K_STATE_WEDGED:
1740                ath10k_warn(ar, "device is wedged, will not restart\n");
1741                break;
1742        case ATH10K_STATE_UTF:
1743                ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1744                break;
1745        }
1746
1747        mutex_unlock(&ar->conf_mutex);
1748
1749        ret = ath10k_debug_fw_devcoredump(ar);
1750        if (ret)
1751                ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
1752                            ret);
1753}
1754
1755static void ath10k_core_set_coverage_class_work(struct work_struct *work)
1756{
1757        struct ath10k *ar = container_of(work, struct ath10k,
1758                                         set_coverage_class_work);
1759
1760        if (ar->hw_params.hw_ops->set_coverage_class)
1761                ar->hw_params.hw_ops->set_coverage_class(ar, -1);
1762}
1763
1764static int ath10k_core_init_firmware_features(struct ath10k *ar)
1765{
1766        struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1767
1768        if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1769            !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1770                ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1771                return -EINVAL;
1772        }
1773
1774        if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1775                ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1776                           ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1777                return -EINVAL;
1778        }
1779
1780        ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1781        switch (ath10k_cryptmode_param) {
1782        case ATH10K_CRYPT_MODE_HW:
1783                clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1784                clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1785                break;
1786        case ATH10K_CRYPT_MODE_SW:
1787                if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1788                              fw_file->fw_features)) {
1789                        ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1790                        return -EINVAL;
1791                }
1792
1793                set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1794                set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1795                break;
1796        default:
1797                ath10k_info(ar, "invalid cryptmode: %d\n",
1798                            ath10k_cryptmode_param);
1799                return -EINVAL;
1800        }
1801
1802        ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1803        ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1804
1805        if (rawmode) {
1806                if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1807                              fw_file->fw_features)) {
1808                        ath10k_err(ar, "rawmode = 1 requires support from firmware");
1809                        return -EINVAL;
1810                }
1811                set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1812        }
1813
1814        if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1815                ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1816
1817                /* Workaround:
1818                 *
1819                 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1820                 * and causes enormous performance issues (malformed frames,
1821                 * etc).
1822                 *
1823                 * Disabling A-MSDU makes RAW mode stable with heavy traffic
1824                 * albeit a bit slower compared to regular operation.
1825                 */
1826                ar->htt.max_num_amsdu = 1;
1827        }
1828
1829        /* Backwards compatibility for firmwares without
1830         * ATH10K_FW_IE_WMI_OP_VERSION.
1831         */
1832        if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1833                if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1834                        if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1835                                     fw_file->fw_features))
1836                                fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1837                        else
1838                                fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1839                } else {
1840                        fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1841                }
1842        }
1843
1844        switch (fw_file->wmi_op_version) {
1845        case ATH10K_FW_WMI_OP_VERSION_MAIN:
1846                ar->max_num_peers = TARGET_NUM_PEERS;
1847                ar->max_num_stations = TARGET_NUM_STATIONS;
1848                ar->max_num_vdevs = TARGET_NUM_VDEVS;
1849                ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1850                ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1851                        WMI_STAT_PEER;
1852                ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1853                break;
1854        case ATH10K_FW_WMI_OP_VERSION_10_1:
1855        case ATH10K_FW_WMI_OP_VERSION_10_2:
1856        case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1857                if (ath10k_peer_stats_enabled(ar)) {
1858                        ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1859                        ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1860                } else {
1861                        ar->max_num_peers = TARGET_10X_NUM_PEERS;
1862                        ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1863                }
1864                ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1865                ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1866                ar->fw_stats_req_mask = WMI_STAT_PEER;
1867                ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1868                break;
1869        case ATH10K_FW_WMI_OP_VERSION_TLV:
1870                ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1871                ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1872                ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1873                ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1874                ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1875                ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1876                ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1877                        WMI_STAT_PEER;
1878                ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1879                break;
1880        case ATH10K_FW_WMI_OP_VERSION_10_4:
1881                ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1882                ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1883                ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1884                ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1885                ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1886                ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1887                                        WMI_10_4_STAT_PEER_EXTD;
1888                ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
1889                ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
1890
1891                if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1892                             fw_file->fw_features))
1893                        ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1894                else
1895                        ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1896                break;
1897        case ATH10K_FW_WMI_OP_VERSION_UNSET:
1898        case ATH10K_FW_WMI_OP_VERSION_MAX:
1899                WARN_ON(1);
1900                return -EINVAL;
1901        }
1902
1903        /* Backwards compatibility for firmwares without
1904         * ATH10K_FW_IE_HTT_OP_VERSION.
1905         */
1906        if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1907                switch (fw_file->wmi_op_version) {
1908                case ATH10K_FW_WMI_OP_VERSION_MAIN:
1909                        fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1910                        break;
1911                case ATH10K_FW_WMI_OP_VERSION_10_1:
1912                case ATH10K_FW_WMI_OP_VERSION_10_2:
1913                case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1914                        fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1915                        break;
1916                case ATH10K_FW_WMI_OP_VERSION_TLV:
1917                        fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1918                        break;
1919                case ATH10K_FW_WMI_OP_VERSION_10_4:
1920                case ATH10K_FW_WMI_OP_VERSION_UNSET:
1921                case ATH10K_FW_WMI_OP_VERSION_MAX:
1922                        ath10k_err(ar, "htt op version not found from fw meta data");
1923                        return -EINVAL;
1924                }
1925        }
1926
1927        return 0;
1928}
1929
1930static int ath10k_core_reset_rx_filter(struct ath10k *ar)
1931{
1932        int ret;
1933        int vdev_id;
1934        int vdev_type;
1935        int vdev_subtype;
1936        const u8 *vdev_addr;
1937
1938        vdev_id = 0;
1939        vdev_type = WMI_VDEV_TYPE_STA;
1940        vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
1941        vdev_addr = ar->mac_addr;
1942
1943        ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
1944                                     vdev_addr);
1945        if (ret) {
1946                ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
1947                return ret;
1948        }
1949
1950        ret = ath10k_wmi_vdev_delete(ar, vdev_id);
1951        if (ret) {
1952                ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
1953                return ret;
1954        }
1955
1956        /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
1957         * serialized properly implicitly.
1958         *
1959         * Moreover (most) WMI commands have no explicit acknowledges. It is
1960         * possible to infer it implicitly by poking firmware with echo
1961         * command - getting a reply means all preceding comments have been
1962         * (mostly) processed.
1963         *
1964         * In case of vdev create/delete this is sufficient.
1965         *
1966         * Without this it's possible to end up with a race when HTT Rx ring is
1967         * started before vdev create/delete hack is complete allowing a short
1968         * window of opportunity to receive (and Tx ACK) a bunch of frames.
1969         */
1970        ret = ath10k_wmi_barrier(ar);
1971        if (ret) {
1972                ath10k_err(ar, "failed to ping firmware: %d\n", ret);
1973                return ret;
1974        }
1975
1976        return 0;
1977}
1978
1979int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1980                      const struct ath10k_fw_components *fw)
1981{
1982        int status;
1983        u32 val;
1984
1985        lockdep_assert_held(&ar->conf_mutex);
1986
1987        clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1988
1989        ar->running_fw = fw;
1990
1991        ath10k_bmi_start(ar);
1992
1993        if (ath10k_init_configure_target(ar)) {
1994                status = -EINVAL;
1995                goto err;
1996        }
1997
1998        status = ath10k_download_cal_data(ar);
1999        if (status)
2000                goto err;
2001
2002        /* Some of of qca988x solutions are having global reset issue
2003         * during target initialization. Bypassing PLL setting before
2004         * downloading firmware and letting the SoC run on REF_CLK is
2005         * fixing the problem. Corresponding firmware change is also needed
2006         * to set the clock source once the target is initialized.
2007         */
2008        if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2009                     ar->running_fw->fw_file.fw_features)) {
2010                status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2011                if (status) {
2012                        ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2013                                   status);
2014                        goto err;
2015                }
2016        }
2017
2018        status = ath10k_download_fw(ar);
2019        if (status)
2020                goto err;
2021
2022        status = ath10k_init_uart(ar);
2023        if (status)
2024                goto err;
2025
2026        if (ar->hif.bus == ATH10K_BUS_SDIO)
2027                ath10k_init_sdio(ar);
2028
2029        ar->htc.htc_ops.target_send_suspend_complete =
2030                ath10k_send_suspend_complete;
2031
2032        status = ath10k_htc_init(ar);
2033        if (status) {
2034                ath10k_err(ar, "could not init HTC (%d)\n", status);
2035                goto err;
2036        }
2037
2038        status = ath10k_bmi_done(ar);
2039        if (status)
2040                goto err;
2041
2042        status = ath10k_wmi_attach(ar);
2043        if (status) {
2044                ath10k_err(ar, "WMI attach failed: %d\n", status);
2045                goto err;
2046        }
2047
2048        status = ath10k_htt_init(ar);
2049        if (status) {
2050                ath10k_err(ar, "failed to init htt: %d\n", status);
2051                goto err_wmi_detach;
2052        }
2053
2054        status = ath10k_htt_tx_start(&ar->htt);
2055        if (status) {
2056                ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2057                goto err_wmi_detach;
2058        }
2059
2060        /* If firmware indicates Full Rx Reorder support it must be used in a
2061         * slightly different manner. Let HTT code know.
2062         */
2063        ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2064                                                ar->wmi.svc_map));
2065
2066        status = ath10k_htt_rx_alloc(&ar->htt);
2067        if (status) {
2068                ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2069                goto err_htt_tx_detach;
2070        }
2071
2072        status = ath10k_hif_start(ar);
2073        if (status) {
2074                ath10k_err(ar, "could not start HIF: %d\n", status);
2075                goto err_htt_rx_detach;
2076        }
2077
2078        status = ath10k_htc_wait_target(&ar->htc);
2079        if (status) {
2080                ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2081                goto err_hif_stop;
2082        }
2083
2084        if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2085                status = ath10k_htt_connect(&ar->htt);
2086                if (status) {
2087                        ath10k_err(ar, "failed to connect htt (%d)\n", status);
2088                        goto err_hif_stop;
2089                }
2090        }
2091
2092        status = ath10k_wmi_connect(ar);
2093        if (status) {
2094                ath10k_err(ar, "could not connect wmi: %d\n", status);
2095                goto err_hif_stop;
2096        }
2097
2098        status = ath10k_htc_start(&ar->htc);
2099        if (status) {
2100                ath10k_err(ar, "failed to start htc: %d\n", status);
2101                goto err_hif_stop;
2102        }
2103
2104        if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2105                status = ath10k_wmi_wait_for_service_ready(ar);
2106                if (status) {
2107                        ath10k_warn(ar, "wmi service ready event not received");
2108                        goto err_hif_stop;
2109                }
2110        }
2111
2112        ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2113                   ar->hw->wiphy->fw_version);
2114
2115        if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2116            mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2117                val = 0;
2118                if (ath10k_peer_stats_enabled(ar))
2119                        val = WMI_10_4_PEER_STATS;
2120
2121                if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2122                        val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2123
2124                /* 10.4 firmware supports BT-Coex without reloading firmware
2125                 * via pdev param. To support Bluetooth coexistence pdev param,
2126                 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2127                 * enabled always.
2128                 */
2129                if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2130                    test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2131                             ar->running_fw->fw_file.fw_features))
2132                        val |= WMI_10_4_COEX_GPIO_SUPPORT;
2133
2134                if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2135                             ar->wmi.svc_map))
2136                        val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2137
2138                if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2139                             ar->wmi.svc_map))
2140                        val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2141
2142                status = ath10k_mac_ext_resource_config(ar, val);
2143                if (status) {
2144                        ath10k_err(ar,
2145                                   "failed to send ext resource cfg command : %d\n",
2146                                   status);
2147                        goto err_hif_stop;
2148                }
2149        }
2150
2151        status = ath10k_wmi_cmd_init(ar);
2152        if (status) {
2153                ath10k_err(ar, "could not send WMI init command (%d)\n",
2154                           status);
2155                goto err_hif_stop;
2156        }
2157
2158        status = ath10k_wmi_wait_for_unified_ready(ar);
2159        if (status) {
2160                ath10k_err(ar, "wmi unified ready event not received\n");
2161                goto err_hif_stop;
2162        }
2163
2164        /* Some firmware revisions do not properly set up hardware rx filter
2165         * registers.
2166         *
2167         * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2168         * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2169         * any frames that matches MAC_PCU_RX_FILTER which is also
2170         * misconfigured to accept anything.
2171         *
2172         * The ADDR1 is programmed using internal firmware structure field and
2173         * can't be (easily/sanely) reached from the driver explicitly. It is
2174         * possible to implicitly make it correct by creating a dummy vdev and
2175         * then deleting it.
2176         */
2177        if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2178                status = ath10k_core_reset_rx_filter(ar);
2179                if (status) {
2180                        ath10k_err(ar,
2181                                   "failed to reset rx filter: %d\n", status);
2182                        goto err_hif_stop;
2183                }
2184        }
2185
2186        status = ath10k_htt_rx_ring_refill(ar);
2187        if (status) {
2188                ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2189                goto err_hif_stop;
2190        }
2191
2192        if (ar->max_num_vdevs >= 64)
2193                ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2194        else
2195                ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2196
2197        INIT_LIST_HEAD(&ar->arvifs);
2198
2199        /* we don't care about HTT in UTF mode */
2200        if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2201                status = ath10k_htt_setup(&ar->htt);
2202                if (status) {
2203                        ath10k_err(ar, "failed to setup htt: %d\n", status);
2204                        goto err_hif_stop;
2205                }
2206        }
2207
2208        status = ath10k_debug_start(ar);
2209        if (status)
2210                goto err_hif_stop;
2211
2212        return 0;
2213
2214err_hif_stop:
2215        ath10k_hif_stop(ar);
2216err_htt_rx_detach:
2217        ath10k_htt_rx_free(&ar->htt);
2218err_htt_tx_detach:
2219        ath10k_htt_tx_free(&ar->htt);
2220err_wmi_detach:
2221        ath10k_wmi_detach(ar);
2222err:
2223        return status;
2224}
2225EXPORT_SYMBOL(ath10k_core_start);
2226
2227int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2228{
2229        int ret;
2230        unsigned long time_left;
2231
2232        reinit_completion(&ar->target_suspend);
2233
2234        ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2235        if (ret) {
2236                ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2237                return ret;
2238        }
2239
2240        time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2241
2242        if (!time_left) {
2243                ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2244                return -ETIMEDOUT;
2245        }
2246
2247        return 0;
2248}
2249
2250void ath10k_core_stop(struct ath10k *ar)
2251{
2252        lockdep_assert_held(&ar->conf_mutex);
2253        ath10k_debug_stop(ar);
2254
2255        /* try to suspend target */
2256        if (ar->state != ATH10K_STATE_RESTARTING &&
2257            ar->state != ATH10K_STATE_UTF)
2258                ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2259
2260        ath10k_hif_stop(ar);
2261        ath10k_htt_tx_stop(&ar->htt);
2262        ath10k_htt_rx_free(&ar->htt);
2263        ath10k_wmi_detach(ar);
2264}
2265EXPORT_SYMBOL(ath10k_core_stop);
2266
2267/* mac80211 manages fw/hw initialization through start/stop hooks. However in
2268 * order to know what hw capabilities should be advertised to mac80211 it is
2269 * necessary to load the firmware (and tear it down immediately since start
2270 * hook will try to init it again) before registering
2271 */
2272static int ath10k_core_probe_fw(struct ath10k *ar)
2273{
2274        struct bmi_target_info target_info;
2275        int ret = 0;
2276
2277        ret = ath10k_hif_power_up(ar);
2278        if (ret) {
2279                ath10k_err(ar, "could not start pci hif (%d)\n", ret);
2280                return ret;
2281        }
2282
2283        memset(&target_info, 0, sizeof(target_info));
2284        if (ar->hif.bus == ATH10K_BUS_SDIO)
2285                ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2286        else
2287                ret = ath10k_bmi_get_target_info(ar, &target_info);
2288        if (ret) {
2289                ath10k_err(ar, "could not get target info (%d)\n", ret);
2290                goto err_power_down;
2291        }
2292
2293        ar->target_version = target_info.version;
2294        ar->hw->wiphy->hw_version = target_info.version;
2295
2296        ret = ath10k_init_hw_params(ar);
2297        if (ret) {
2298                ath10k_err(ar, "could not get hw params (%d)\n", ret);
2299                goto err_power_down;
2300        }
2301
2302        ret = ath10k_core_fetch_firmware_files(ar);
2303        if (ret) {
2304                ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2305                goto err_power_down;
2306        }
2307
2308        BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2309                     sizeof(ar->normal_mode_fw.fw_file.fw_version));
2310        memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2311               sizeof(ar->hw->wiphy->fw_version));
2312
2313        ath10k_debug_print_hwfw_info(ar);
2314
2315        ret = ath10k_core_pre_cal_download(ar);
2316        if (ret) {
2317                /* pre calibration data download is not necessary
2318                 * for all the chipsets. Ignore failures and continue.
2319                 */
2320                ath10k_dbg(ar, ATH10K_DBG_BOOT,
2321                           "could not load pre cal data: %d\n", ret);
2322        }
2323
2324        ret = ath10k_core_get_board_id_from_otp(ar);
2325        if (ret && ret != -EOPNOTSUPP) {
2326                ath10k_err(ar, "failed to get board id from otp: %d\n",
2327                           ret);
2328                goto err_free_firmware_files;
2329        }
2330
2331        ret = ath10k_core_check_smbios(ar);
2332        if (ret)
2333                ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n");
2334
2335        ret = ath10k_core_fetch_board_file(ar);
2336        if (ret) {
2337                ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2338                goto err_free_firmware_files;
2339        }
2340
2341        ath10k_debug_print_board_info(ar);
2342
2343        ret = ath10k_core_init_firmware_features(ar);
2344        if (ret) {
2345                ath10k_err(ar, "fatal problem with firmware features: %d\n",
2346                           ret);
2347                goto err_free_firmware_files;
2348        }
2349
2350        ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file);
2351        if (ret) {
2352                ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2353                           ret);
2354                goto err_free_firmware_files;
2355        }
2356
2357        mutex_lock(&ar->conf_mutex);
2358
2359        ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2360                                &ar->normal_mode_fw);
2361        if (ret) {
2362                ath10k_err(ar, "could not init core (%d)\n", ret);
2363                goto err_unlock;
2364        }
2365
2366        ath10k_debug_print_boot_info(ar);
2367        ath10k_core_stop(ar);
2368
2369        mutex_unlock(&ar->conf_mutex);
2370
2371        ath10k_hif_power_down(ar);
2372        return 0;
2373
2374err_unlock:
2375        mutex_unlock(&ar->conf_mutex);
2376
2377err_free_firmware_files:
2378        ath10k_core_free_firmware_files(ar);
2379
2380err_power_down:
2381        ath10k_hif_power_down(ar);
2382
2383        return ret;
2384}
2385
2386static void ath10k_core_register_work(struct work_struct *work)
2387{
2388        struct ath10k *ar = container_of(work, struct ath10k, register_work);
2389        int status;
2390
2391        /* peer stats are enabled by default */
2392        set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2393
2394        status = ath10k_core_probe_fw(ar);
2395        if (status) {
2396                ath10k_err(ar, "could not probe fw (%d)\n", status);
2397                goto err;
2398        }
2399
2400        status = ath10k_mac_register(ar);
2401        if (status) {
2402                ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2403                goto err_release_fw;
2404        }
2405
2406        status = ath10k_debug_register(ar);
2407        if (status) {
2408                ath10k_err(ar, "unable to initialize debugfs\n");
2409                goto err_unregister_mac;
2410        }
2411
2412        status = ath10k_spectral_create(ar);
2413        if (status) {
2414                ath10k_err(ar, "failed to initialize spectral\n");
2415                goto err_debug_destroy;
2416        }
2417
2418        status = ath10k_thermal_register(ar);
2419        if (status) {
2420                ath10k_err(ar, "could not register thermal device: %d\n",
2421                           status);
2422                goto err_spectral_destroy;
2423        }
2424
2425        set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2426        return;
2427
2428err_spectral_destroy:
2429        ath10k_spectral_destroy(ar);
2430err_debug_destroy:
2431        ath10k_debug_destroy(ar);
2432err_unregister_mac:
2433        ath10k_mac_unregister(ar);
2434err_release_fw:
2435        ath10k_core_free_firmware_files(ar);
2436err:
2437        /* TODO: It's probably a good idea to release device from the driver
2438         * but calling device_release_driver() here will cause a deadlock.
2439         */
2440        return;
2441}
2442
2443int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2444{
2445        ar->chip_id = chip_id;
2446        queue_work(ar->workqueue, &ar->register_work);
2447
2448        return 0;
2449}
2450EXPORT_SYMBOL(ath10k_core_register);
2451
2452void ath10k_core_unregister(struct ath10k *ar)
2453{
2454        cancel_work_sync(&ar->register_work);
2455
2456        if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2457                return;
2458
2459        ath10k_thermal_unregister(ar);
2460        /* Stop spectral before unregistering from mac80211 to remove the
2461         * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2462         * would be already be free'd recursively, leading to a double free.
2463         */
2464        ath10k_spectral_destroy(ar);
2465
2466        /* We must unregister from mac80211 before we stop HTC and HIF.
2467         * Otherwise we will fail to submit commands to FW and mac80211 will be
2468         * unhappy about callback failures.
2469         */
2470        ath10k_mac_unregister(ar);
2471
2472        ath10k_testmode_destroy(ar);
2473
2474        ath10k_core_free_firmware_files(ar);
2475        ath10k_core_free_board_files(ar);
2476
2477        ath10k_debug_unregister(ar);
2478}
2479EXPORT_SYMBOL(ath10k_core_unregister);
2480
2481struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2482                                  enum ath10k_bus bus,
2483                                  enum ath10k_hw_rev hw_rev,
2484                                  const struct ath10k_hif_ops *hif_ops)
2485{
2486        struct ath10k *ar;
2487        int ret;
2488
2489        ar = ath10k_mac_create(priv_size);
2490        if (!ar)
2491                return NULL;
2492
2493        ar->ath_common.priv = ar;
2494        ar->ath_common.hw = ar->hw;
2495        ar->dev = dev;
2496        ar->hw_rev = hw_rev;
2497        ar->hif.ops = hif_ops;
2498        ar->hif.bus = bus;
2499
2500        switch (hw_rev) {
2501        case ATH10K_HW_QCA988X:
2502        case ATH10K_HW_QCA9887:
2503                ar->regs = &qca988x_regs;
2504                ar->hw_ce_regs = &qcax_ce_regs;
2505                ar->hw_values = &qca988x_values;
2506                break;
2507        case ATH10K_HW_QCA6174:
2508        case ATH10K_HW_QCA9377:
2509                ar->regs = &qca6174_regs;
2510                ar->hw_ce_regs = &qcax_ce_regs;
2511                ar->hw_values = &qca6174_values;
2512                break;
2513        case ATH10K_HW_QCA99X0:
2514        case ATH10K_HW_QCA9984:
2515                ar->regs = &qca99x0_regs;
2516                ar->hw_ce_regs = &qcax_ce_regs;
2517                ar->hw_values = &qca99x0_values;
2518                break;
2519        case ATH10K_HW_QCA9888:
2520                ar->regs = &qca99x0_regs;
2521                ar->hw_ce_regs = &qcax_ce_regs;
2522                ar->hw_values = &qca9888_values;
2523                break;
2524        case ATH10K_HW_QCA4019:
2525                ar->regs = &qca4019_regs;
2526                ar->hw_ce_regs = &qcax_ce_regs;
2527                ar->hw_values = &qca4019_values;
2528                break;
2529        case ATH10K_HW_WCN3990:
2530                ar->regs = &wcn3990_regs;
2531                ar->hw_ce_regs = &wcn3990_ce_regs;
2532                ar->hw_values = &wcn3990_values;
2533                break;
2534        default:
2535                ath10k_err(ar, "unsupported core hardware revision %d\n",
2536                           hw_rev);
2537                ret = -ENOTSUPP;
2538                goto err_free_mac;
2539        }
2540
2541        init_completion(&ar->scan.started);
2542        init_completion(&ar->scan.completed);
2543        init_completion(&ar->scan.on_channel);
2544        init_completion(&ar->target_suspend);
2545        init_completion(&ar->wow.wakeup_completed);
2546
2547        init_completion(&ar->install_key_done);
2548        init_completion(&ar->vdev_setup_done);
2549        init_completion(&ar->thermal.wmi_sync);
2550        init_completion(&ar->bss_survey_done);
2551
2552        INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2553
2554        ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2555        if (!ar->workqueue)
2556                goto err_free_mac;
2557
2558        ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2559        if (!ar->workqueue_aux)
2560                goto err_free_wq;
2561
2562        mutex_init(&ar->conf_mutex);
2563        spin_lock_init(&ar->data_lock);
2564        spin_lock_init(&ar->txqs_lock);
2565
2566        INIT_LIST_HEAD(&ar->txqs);
2567        INIT_LIST_HEAD(&ar->peers);
2568        init_waitqueue_head(&ar->peer_mapping_wq);
2569        init_waitqueue_head(&ar->htt.empty_tx_wq);
2570        init_waitqueue_head(&ar->wmi.tx_credits_wq);
2571
2572        init_completion(&ar->offchan_tx_completed);
2573        INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2574        skb_queue_head_init(&ar->offchan_tx_queue);
2575
2576        INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2577        skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2578
2579        INIT_WORK(&ar->register_work, ath10k_core_register_work);
2580        INIT_WORK(&ar->restart_work, ath10k_core_restart);
2581        INIT_WORK(&ar->set_coverage_class_work,
2582                  ath10k_core_set_coverage_class_work);
2583
2584        init_dummy_netdev(&ar->napi_dev);
2585
2586        ret = ath10k_debug_create(ar);
2587        if (ret)
2588                goto err_free_aux_wq;
2589
2590        return ar;
2591
2592err_free_aux_wq:
2593        destroy_workqueue(ar->workqueue_aux);
2594err_free_wq:
2595        destroy_workqueue(ar->workqueue);
2596
2597err_free_mac:
2598        ath10k_mac_destroy(ar);
2599
2600        return NULL;
2601}
2602EXPORT_SYMBOL(ath10k_core_create);
2603
2604void ath10k_core_destroy(struct ath10k *ar)
2605{
2606        flush_workqueue(ar->workqueue);
2607        destroy_workqueue(ar->workqueue);
2608
2609        flush_workqueue(ar->workqueue_aux);
2610        destroy_workqueue(ar->workqueue_aux);
2611
2612        ath10k_debug_destroy(ar);
2613        ath10k_htt_tx_destroy(&ar->htt);
2614        ath10k_wmi_free_host_mem(ar);
2615        ath10k_mac_destroy(ar);
2616}
2617EXPORT_SYMBOL(ath10k_core_destroy);
2618
2619MODULE_AUTHOR("Qualcomm Atheros");
2620MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2621MODULE_LICENSE("Dual BSD/GPL");
2622