1
2#ifndef DRIVERS_PCI_H
3#define DRIVERS_PCI_H
4
5#define PCI_FIND_CAP_TTL 48
6
7#define PCI_VSEC_ID_INTEL_TBT 0x1234
8
9extern const unsigned char pcie_link_speed[];
10
11bool pcie_cap_has_lnkctl(const struct pci_dev *dev);
12
13
14
15int pci_create_sysfs_dev_files(struct pci_dev *pdev);
16void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
17#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
18static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
19{ return; }
20static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
21{ return; }
22#else
23void pci_create_firmware_label_files(struct pci_dev *pdev);
24void pci_remove_firmware_label_files(struct pci_dev *pdev);
25#endif
26void pci_cleanup_rom(struct pci_dev *dev);
27
28enum pci_mmap_api {
29 PCI_MMAP_SYSFS,
30 PCI_MMAP_PROCFS
31};
32int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,
33 enum pci_mmap_api mmap_api);
34
35int pci_probe_reset_function(struct pci_dev *dev);
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60struct pci_platform_pm_ops {
61 bool (*is_manageable)(struct pci_dev *dev);
62 int (*set_state)(struct pci_dev *dev, pci_power_t state);
63 pci_power_t (*get_state)(struct pci_dev *dev);
64 pci_power_t (*choose_state)(struct pci_dev *dev);
65 int (*set_wakeup)(struct pci_dev *dev, bool enable);
66 bool (*need_resume)(struct pci_dev *dev);
67};
68
69int pci_set_platform_pm(const struct pci_platform_pm_ops *ops);
70void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
71void pci_power_up(struct pci_dev *dev);
72void pci_disable_enabled_device(struct pci_dev *dev);
73int pci_finish_runtime_suspend(struct pci_dev *dev);
74int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
75void pci_pme_restore(struct pci_dev *dev);
76bool pci_dev_keep_suspended(struct pci_dev *dev);
77void pci_dev_complete_resume(struct pci_dev *pci_dev);
78void pci_config_pm_runtime_get(struct pci_dev *dev);
79void pci_config_pm_runtime_put(struct pci_dev *dev);
80void pci_pm_init(struct pci_dev *dev);
81void pci_ea_init(struct pci_dev *dev);
82void pci_allocate_cap_save_buffers(struct pci_dev *dev);
83void pci_free_cap_save_buffers(struct pci_dev *dev);
84bool pci_bridge_d3_possible(struct pci_dev *dev);
85void pci_bridge_d3_update(struct pci_dev *dev);
86
87static inline void pci_wakeup_event(struct pci_dev *dev)
88{
89
90 pm_wakeup_event(&dev->dev, 100);
91}
92
93static inline bool pci_has_subordinate(struct pci_dev *pci_dev)
94{
95 return !!(pci_dev->subordinate);
96}
97
98static inline bool pci_power_manageable(struct pci_dev *pci_dev)
99{
100
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102
103
104 return !pci_has_subordinate(pci_dev) || pci_dev->bridge_d3;
105}
106
107struct pci_vpd_ops {
108 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
109 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
110 int (*set_size)(struct pci_dev *dev, size_t len);
111};
112
113struct pci_vpd {
114 const struct pci_vpd_ops *ops;
115 struct bin_attribute *attr;
116 struct mutex lock;
117 unsigned int len;
118 u16 flag;
119 u8 cap;
120 u8 busy:1;
121 u8 valid:1;
122};
123
124int pci_vpd_init(struct pci_dev *dev);
125void pci_vpd_release(struct pci_dev *dev);
126
127
128#ifdef CONFIG_PROC_FS
129int pci_proc_attach_device(struct pci_dev *dev);
130int pci_proc_detach_device(struct pci_dev *dev);
131int pci_proc_detach_bus(struct pci_bus *bus);
132#else
133static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
134static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
135static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
136#endif
137
138
139int pci_hp_add_bridge(struct pci_dev *dev);
140
141#ifdef HAVE_PCI_LEGACY
142void pci_create_legacy_files(struct pci_bus *bus);
143void pci_remove_legacy_files(struct pci_bus *bus);
144#else
145static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
146static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
147#endif
148
149
150extern struct rw_semaphore pci_bus_sem;
151
152extern raw_spinlock_t pci_lock;
153
154extern unsigned int pci_pm_d3_delay;
155
156#ifdef CONFIG_PCI_MSI
157void pci_no_msi(void);
158#else
159static inline void pci_no_msi(void) { }
160#endif
161
162static inline void pci_msi_set_enable(struct pci_dev *dev, int enable)
163{
164 u16 control;
165
166 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
167 control &= ~PCI_MSI_FLAGS_ENABLE;
168 if (enable)
169 control |= PCI_MSI_FLAGS_ENABLE;
170 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
171}
172
173static inline void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)
174{
175 u16 ctrl;
176
177 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
178 ctrl &= ~clear;
179 ctrl |= set;
180 pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);
181}
182
183void pci_realloc_get_opt(char *);
184
185static inline int pci_no_d1d2(struct pci_dev *dev)
186{
187 unsigned int parent_dstates = 0;
188
189 if (dev->bus->self)
190 parent_dstates = dev->bus->self->no_d1d2;
191 return (dev->no_d1d2 || parent_dstates);
192
193}
194extern const struct attribute_group *pci_dev_groups[];
195extern const struct attribute_group *pcibus_groups[];
196extern struct device_type pci_dev_type;
197extern const struct attribute_group *pci_bus_groups[];
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207
208static inline const struct pci_device_id *
209pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
210{
211 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
212 (id->device == PCI_ANY_ID || id->device == dev->device) &&
213 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
214 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
215 !((id->class ^ dev->class) & id->class_mask))
216 return id;
217 return NULL;
218}
219
220
221#define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
222
223extern struct kset *pci_slots_kset;
224
225struct pci_slot_attribute {
226 struct attribute attr;
227 ssize_t (*show)(struct pci_slot *, char *);
228 ssize_t (*store)(struct pci_slot *, const char *, size_t);
229};
230#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
231
232enum pci_bar_type {
233 pci_bar_unknown,
234 pci_bar_io,
235 pci_bar_mem32,
236 pci_bar_mem64,
237};
238
239int pci_configure_extended_tags(struct pci_dev *dev, void *ign);
240bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
241 int crs_timeout);
242int pci_setup_device(struct pci_dev *dev);
243int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
244 struct resource *res, unsigned int reg);
245void pci_configure_ari(struct pci_dev *dev);
246void __pci_bus_size_bridges(struct pci_bus *bus,
247 struct list_head *realloc_head);
248void __pci_bus_assign_resources(const struct pci_bus *bus,
249 struct list_head *realloc_head,
250 struct list_head *fail_head);
251bool pci_bus_clip_resource(struct pci_dev *dev, int idx);
252
253void pci_reassigndev_resource_alignment(struct pci_dev *dev);
254void pci_disable_bridge_window(struct pci_dev *dev);
255
256
257struct pci_sriov {
258 int pos;
259 int nres;
260 u32 cap;
261 u16 ctrl;
262 u16 total_VFs;
263 u16 initial_VFs;
264 u16 num_VFs;
265 u16 offset;
266 u16 stride;
267 u32 pgsz;
268 u8 link;
269 u8 max_VF_buses;
270 u16 driver_max_VFs;
271 struct pci_dev *dev;
272 struct pci_dev *self;
273 resource_size_t barsz[PCI_SRIOV_NUM_BARS];
274 bool drivers_autoprobe;
275};
276
277
278#define PCI_DEV_DISCONNECTED 0
279
280static inline int pci_dev_set_disconnected(struct pci_dev *dev, void *unused)
281{
282 set_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags);
283 return 0;
284}
285
286static inline bool pci_dev_is_disconnected(const struct pci_dev *dev)
287{
288 return test_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags);
289}
290
291#ifdef CONFIG_PCI_ATS
292void pci_restore_ats_state(struct pci_dev *dev);
293#else
294static inline void pci_restore_ats_state(struct pci_dev *dev)
295{
296}
297#endif
298
299#ifdef CONFIG_PCI_IOV
300int pci_iov_init(struct pci_dev *dev);
301void pci_iov_release(struct pci_dev *dev);
302void pci_iov_update_resource(struct pci_dev *dev, int resno);
303resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
304void pci_restore_iov_state(struct pci_dev *dev);
305int pci_iov_bus_range(struct pci_bus *bus);
306
307#else
308static inline int pci_iov_init(struct pci_dev *dev)
309{
310 return -ENODEV;
311}
312static inline void pci_iov_release(struct pci_dev *dev)
313
314{
315}
316static inline void pci_restore_iov_state(struct pci_dev *dev)
317{
318}
319static inline int pci_iov_bus_range(struct pci_bus *bus)
320{
321 return 0;
322}
323
324#endif
325
326unsigned long pci_cardbus_resource_alignment(struct resource *);
327
328static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
329 struct resource *res)
330{
331#ifdef CONFIG_PCI_IOV
332 int resno = res - dev->resource;
333
334 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
335 return pci_sriov_resource_alignment(dev, resno);
336#endif
337 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
338 return pci_cardbus_resource_alignment(res);
339 return resource_alignment(res);
340}
341
342void pci_enable_acs(struct pci_dev *dev);
343
344#ifdef CONFIG_PCIE_PTM
345void pci_ptm_init(struct pci_dev *dev);
346#else
347static inline void pci_ptm_init(struct pci_dev *dev) { }
348#endif
349
350struct pci_dev_reset_methods {
351 u16 vendor;
352 u16 device;
353 int (*reset)(struct pci_dev *dev, int probe);
354};
355
356#ifdef CONFIG_PCI_QUIRKS
357int pci_dev_specific_reset(struct pci_dev *dev, int probe);
358#else
359static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
360{
361 return -ENOTTY;
362}
363#endif
364
365#if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64)
366int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment,
367 struct resource *res);
368#endif
369
370#endif
371