linux/drivers/tty/serial/pxa.c
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   1/*
   2 *  Based on drivers/serial/8250.c by Russell King.
   3 *
   4 *  Author:     Nicolas Pitre
   5 *  Created:    Feb 20, 2003
   6 *  Copyright:  (C) 2003 Monta Vista Software, Inc.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * Note 1: This driver is made separate from the already too overloaded
  14 * 8250.c because it needs some kirks of its own and that'll make it
  15 * easier to add DMA support.
  16 *
  17 * Note 2: I'm too sick of device allocation policies for serial ports.
  18 * If someone else wants to request an "official" allocation of major/minor
  19 * for this driver please be my guest.  And don't forget that new hardware
  20 * to come from Intel might have more than 3 or 4 of those UARTs.  Let's
  21 * hope for a better port registration and dynamic device allocation scheme
  22 * with the serial core maintainer satisfaction to appear soon.
  23 */
  24
  25
  26#if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27#define SUPPORT_SYSRQ
  28#endif
  29
  30#include <linux/ioport.h>
  31#include <linux/init.h>
  32#include <linux/console.h>
  33#include <linux/sysrq.h>
  34#include <linux/serial_reg.h>
  35#include <linux/circ_buf.h>
  36#include <linux/delay.h>
  37#include <linux/interrupt.h>
  38#include <linux/of.h>
  39#include <linux/platform_device.h>
  40#include <linux/tty.h>
  41#include <linux/tty_flip.h>
  42#include <linux/serial_core.h>
  43#include <linux/clk.h>
  44#include <linux/io.h>
  45#include <linux/slab.h>
  46
  47#define PXA_NAME_LEN            8
  48
  49struct uart_pxa_port {
  50        struct uart_port        port;
  51        unsigned char           ier;
  52        unsigned char           lcr;
  53        unsigned char           mcr;
  54        unsigned int            lsr_break_flag;
  55        struct clk              *clk;
  56        char                    name[PXA_NAME_LEN];
  57};
  58
  59static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  60{
  61        offset <<= 2;
  62        return readl(up->port.membase + offset);
  63}
  64
  65static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  66{
  67        offset <<= 2;
  68        writel(value, up->port.membase + offset);
  69}
  70
  71static void serial_pxa_enable_ms(struct uart_port *port)
  72{
  73        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  74
  75        up->ier |= UART_IER_MSI;
  76        serial_out(up, UART_IER, up->ier);
  77}
  78
  79static void serial_pxa_stop_tx(struct uart_port *port)
  80{
  81        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  82
  83        if (up->ier & UART_IER_THRI) {
  84                up->ier &= ~UART_IER_THRI;
  85                serial_out(up, UART_IER, up->ier);
  86        }
  87}
  88
  89static void serial_pxa_stop_rx(struct uart_port *port)
  90{
  91        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  92
  93        up->ier &= ~UART_IER_RLSI;
  94        up->port.read_status_mask &= ~UART_LSR_DR;
  95        serial_out(up, UART_IER, up->ier);
  96}
  97
  98static inline void receive_chars(struct uart_pxa_port *up, int *status)
  99{
 100        unsigned int ch, flag;
 101        int max_count = 256;
 102
 103        do {
 104                /* work around Errata #20 according to
 105                 * Intel(R) PXA27x Processor Family
 106                 * Specification Update (May 2005)
 107                 *
 108                 * Step 2
 109                 * Disable the Reciever Time Out Interrupt via IER[RTOEI]
 110                 */
 111                up->ier &= ~UART_IER_RTOIE;
 112                serial_out(up, UART_IER, up->ier);
 113
 114                ch = serial_in(up, UART_RX);
 115                flag = TTY_NORMAL;
 116                up->port.icount.rx++;
 117
 118                if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 119                                       UART_LSR_FE | UART_LSR_OE))) {
 120                        /*
 121                         * For statistics only
 122                         */
 123                        if (*status & UART_LSR_BI) {
 124                                *status &= ~(UART_LSR_FE | UART_LSR_PE);
 125                                up->port.icount.brk++;
 126                                /*
 127                                 * We do the SysRQ and SAK checking
 128                                 * here because otherwise the break
 129                                 * may get masked by ignore_status_mask
 130                                 * or read_status_mask.
 131                                 */
 132                                if (uart_handle_break(&up->port))
 133                                        goto ignore_char;
 134                        } else if (*status & UART_LSR_PE)
 135                                up->port.icount.parity++;
 136                        else if (*status & UART_LSR_FE)
 137                                up->port.icount.frame++;
 138                        if (*status & UART_LSR_OE)
 139                                up->port.icount.overrun++;
 140
 141                        /*
 142                         * Mask off conditions which should be ignored.
 143                         */
 144                        *status &= up->port.read_status_mask;
 145
 146#ifdef CONFIG_SERIAL_PXA_CONSOLE
 147                        if (up->port.line == up->port.cons->index) {
 148                                /* Recover the break flag from console xmit */
 149                                *status |= up->lsr_break_flag;
 150                                up->lsr_break_flag = 0;
 151                        }
 152#endif
 153                        if (*status & UART_LSR_BI) {
 154                                flag = TTY_BREAK;
 155                        } else if (*status & UART_LSR_PE)
 156                                flag = TTY_PARITY;
 157                        else if (*status & UART_LSR_FE)
 158                                flag = TTY_FRAME;
 159                }
 160
 161                if (uart_handle_sysrq_char(&up->port, ch))
 162                        goto ignore_char;
 163
 164                uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
 165
 166        ignore_char:
 167                *status = serial_in(up, UART_LSR);
 168        } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 169        tty_flip_buffer_push(&up->port.state->port);
 170
 171        /* work around Errata #20 according to
 172         * Intel(R) PXA27x Processor Family
 173         * Specification Update (May 2005)
 174         *
 175         * Step 6:
 176         * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
 177         */
 178        up->ier |= UART_IER_RTOIE;
 179        serial_out(up, UART_IER, up->ier);
 180}
 181
 182static void transmit_chars(struct uart_pxa_port *up)
 183{
 184        struct circ_buf *xmit = &up->port.state->xmit;
 185        int count;
 186
 187        if (up->port.x_char) {
 188                serial_out(up, UART_TX, up->port.x_char);
 189                up->port.icount.tx++;
 190                up->port.x_char = 0;
 191                return;
 192        }
 193        if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 194                serial_pxa_stop_tx(&up->port);
 195                return;
 196        }
 197
 198        count = up->port.fifosize / 2;
 199        do {
 200                serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 201                xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 202                up->port.icount.tx++;
 203                if (uart_circ_empty(xmit))
 204                        break;
 205        } while (--count > 0);
 206
 207        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 208                uart_write_wakeup(&up->port);
 209
 210
 211        if (uart_circ_empty(xmit))
 212                serial_pxa_stop_tx(&up->port);
 213}
 214
 215static void serial_pxa_start_tx(struct uart_port *port)
 216{
 217        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 218
 219        if (!(up->ier & UART_IER_THRI)) {
 220                up->ier |= UART_IER_THRI;
 221                serial_out(up, UART_IER, up->ier);
 222        }
 223}
 224
 225/* should hold up->port.lock */
 226static inline void check_modem_status(struct uart_pxa_port *up)
 227{
 228        int status;
 229
 230        status = serial_in(up, UART_MSR);
 231
 232        if ((status & UART_MSR_ANY_DELTA) == 0)
 233                return;
 234
 235        if (status & UART_MSR_TERI)
 236                up->port.icount.rng++;
 237        if (status & UART_MSR_DDSR)
 238                up->port.icount.dsr++;
 239        if (status & UART_MSR_DDCD)
 240                uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 241        if (status & UART_MSR_DCTS)
 242                uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 243
 244        wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 245}
 246
 247/*
 248 * This handles the interrupt from one port.
 249 */
 250static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
 251{
 252        struct uart_pxa_port *up = dev_id;
 253        unsigned int iir, lsr;
 254
 255        iir = serial_in(up, UART_IIR);
 256        if (iir & UART_IIR_NO_INT)
 257                return IRQ_NONE;
 258        spin_lock(&up->port.lock);
 259        lsr = serial_in(up, UART_LSR);
 260        if (lsr & UART_LSR_DR)
 261                receive_chars(up, &lsr);
 262        check_modem_status(up);
 263        if (lsr & UART_LSR_THRE)
 264                transmit_chars(up);
 265        spin_unlock(&up->port.lock);
 266        return IRQ_HANDLED;
 267}
 268
 269static unsigned int serial_pxa_tx_empty(struct uart_port *port)
 270{
 271        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 272        unsigned long flags;
 273        unsigned int ret;
 274
 275        spin_lock_irqsave(&up->port.lock, flags);
 276        ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 277        spin_unlock_irqrestore(&up->port.lock, flags);
 278
 279        return ret;
 280}
 281
 282static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
 283{
 284        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 285        unsigned char status;
 286        unsigned int ret;
 287
 288        status = serial_in(up, UART_MSR);
 289
 290        ret = 0;
 291        if (status & UART_MSR_DCD)
 292                ret |= TIOCM_CAR;
 293        if (status & UART_MSR_RI)
 294                ret |= TIOCM_RNG;
 295        if (status & UART_MSR_DSR)
 296                ret |= TIOCM_DSR;
 297        if (status & UART_MSR_CTS)
 298                ret |= TIOCM_CTS;
 299        return ret;
 300}
 301
 302static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
 303{
 304        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 305        unsigned char mcr = 0;
 306
 307        if (mctrl & TIOCM_RTS)
 308                mcr |= UART_MCR_RTS;
 309        if (mctrl & TIOCM_DTR)
 310                mcr |= UART_MCR_DTR;
 311        if (mctrl & TIOCM_OUT1)
 312                mcr |= UART_MCR_OUT1;
 313        if (mctrl & TIOCM_OUT2)
 314                mcr |= UART_MCR_OUT2;
 315        if (mctrl & TIOCM_LOOP)
 316                mcr |= UART_MCR_LOOP;
 317
 318        mcr |= up->mcr;
 319
 320        serial_out(up, UART_MCR, mcr);
 321}
 322
 323static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
 324{
 325        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 326        unsigned long flags;
 327
 328        spin_lock_irqsave(&up->port.lock, flags);
 329        if (break_state == -1)
 330                up->lcr |= UART_LCR_SBC;
 331        else
 332                up->lcr &= ~UART_LCR_SBC;
 333        serial_out(up, UART_LCR, up->lcr);
 334        spin_unlock_irqrestore(&up->port.lock, flags);
 335}
 336
 337static int serial_pxa_startup(struct uart_port *port)
 338{
 339        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 340        unsigned long flags;
 341        int retval;
 342
 343        if (port->line == 3) /* HWUART */
 344                up->mcr |= UART_MCR_AFE;
 345        else
 346                up->mcr = 0;
 347
 348        up->port.uartclk = clk_get_rate(up->clk);
 349
 350        /*
 351         * Allocate the IRQ
 352         */
 353        retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
 354        if (retval)
 355                return retval;
 356
 357        /*
 358         * Clear the FIFO buffers and disable them.
 359         * (they will be reenabled in set_termios())
 360         */
 361        serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 362        serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 363                        UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 364        serial_out(up, UART_FCR, 0);
 365
 366        /*
 367         * Clear the interrupt registers.
 368         */
 369        (void) serial_in(up, UART_LSR);
 370        (void) serial_in(up, UART_RX);
 371        (void) serial_in(up, UART_IIR);
 372        (void) serial_in(up, UART_MSR);
 373
 374        /*
 375         * Now, initialize the UART
 376         */
 377        serial_out(up, UART_LCR, UART_LCR_WLEN8);
 378
 379        spin_lock_irqsave(&up->port.lock, flags);
 380        up->port.mctrl |= TIOCM_OUT2;
 381        serial_pxa_set_mctrl(&up->port, up->port.mctrl);
 382        spin_unlock_irqrestore(&up->port.lock, flags);
 383
 384        /*
 385         * Finally, enable interrupts.  Note: Modem status interrupts
 386         * are set via set_termios(), which will be occurring imminently
 387         * anyway, so we don't enable them here.
 388         */
 389        up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
 390        serial_out(up, UART_IER, up->ier);
 391
 392        /*
 393         * And clear the interrupt registers again for luck.
 394         */
 395        (void) serial_in(up, UART_LSR);
 396        (void) serial_in(up, UART_RX);
 397        (void) serial_in(up, UART_IIR);
 398        (void) serial_in(up, UART_MSR);
 399
 400        return 0;
 401}
 402
 403static void serial_pxa_shutdown(struct uart_port *port)
 404{
 405        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 406        unsigned long flags;
 407
 408        free_irq(up->port.irq, up);
 409
 410        /*
 411         * Disable interrupts from this port
 412         */
 413        up->ier = 0;
 414        serial_out(up, UART_IER, 0);
 415
 416        spin_lock_irqsave(&up->port.lock, flags);
 417        up->port.mctrl &= ~TIOCM_OUT2;
 418        serial_pxa_set_mctrl(&up->port, up->port.mctrl);
 419        spin_unlock_irqrestore(&up->port.lock, flags);
 420
 421        /*
 422         * Disable break condition and FIFOs
 423         */
 424        serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
 425        serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 426                                  UART_FCR_CLEAR_RCVR |
 427                                  UART_FCR_CLEAR_XMIT);
 428        serial_out(up, UART_FCR, 0);
 429}
 430
 431static void
 432serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
 433                       struct ktermios *old)
 434{
 435        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 436        unsigned char cval, fcr = 0;
 437        unsigned long flags;
 438        unsigned int baud, quot;
 439        unsigned int dll;
 440
 441        switch (termios->c_cflag & CSIZE) {
 442        case CS5:
 443                cval = UART_LCR_WLEN5;
 444                break;
 445        case CS6:
 446                cval = UART_LCR_WLEN6;
 447                break;
 448        case CS7:
 449                cval = UART_LCR_WLEN7;
 450                break;
 451        default:
 452        case CS8:
 453                cval = UART_LCR_WLEN8;
 454                break;
 455        }
 456
 457        if (termios->c_cflag & CSTOPB)
 458                cval |= UART_LCR_STOP;
 459        if (termios->c_cflag & PARENB)
 460                cval |= UART_LCR_PARITY;
 461        if (!(termios->c_cflag & PARODD))
 462                cval |= UART_LCR_EPAR;
 463
 464        /*
 465         * Ask the core to calculate the divisor for us.
 466         */
 467        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 468        quot = uart_get_divisor(port, baud);
 469
 470        if ((up->port.uartclk / quot) < (2400 * 16))
 471                fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
 472        else if ((up->port.uartclk / quot) < (230400 * 16))
 473                fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
 474        else
 475                fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
 476
 477        /*
 478         * Ok, we're now changing the port state.  Do it with
 479         * interrupts disabled.
 480         */
 481        spin_lock_irqsave(&up->port.lock, flags);
 482
 483        /*
 484         * Ensure the port will be enabled.
 485         * This is required especially for serial console.
 486         */
 487        up->ier |= UART_IER_UUE;
 488
 489        /*
 490         * Update the per-port timeout.
 491         */
 492        uart_update_timeout(port, termios->c_cflag, baud);
 493
 494        up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 495        if (termios->c_iflag & INPCK)
 496                up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 497        if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
 498                up->port.read_status_mask |= UART_LSR_BI;
 499
 500        /*
 501         * Characters to ignore
 502         */
 503        up->port.ignore_status_mask = 0;
 504        if (termios->c_iflag & IGNPAR)
 505                up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 506        if (termios->c_iflag & IGNBRK) {
 507                up->port.ignore_status_mask |= UART_LSR_BI;
 508                /*
 509                 * If we're ignoring parity and break indicators,
 510                 * ignore overruns too (for real raw support).
 511                 */
 512                if (termios->c_iflag & IGNPAR)
 513                        up->port.ignore_status_mask |= UART_LSR_OE;
 514        }
 515
 516        /*
 517         * ignore all characters if CREAD is not set
 518         */
 519        if ((termios->c_cflag & CREAD) == 0)
 520                up->port.ignore_status_mask |= UART_LSR_DR;
 521
 522        /*
 523         * CTS flow control flag and modem status interrupts
 524         */
 525        up->ier &= ~UART_IER_MSI;
 526        if (UART_ENABLE_MS(&up->port, termios->c_cflag))
 527                up->ier |= UART_IER_MSI;
 528
 529        serial_out(up, UART_IER, up->ier);
 530
 531        if (termios->c_cflag & CRTSCTS)
 532                up->mcr |= UART_MCR_AFE;
 533        else
 534                up->mcr &= ~UART_MCR_AFE;
 535
 536        serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
 537        serial_out(up, UART_DLL, quot & 0xff);          /* LS of divisor */
 538
 539        /*
 540         * work around Errata #75 according to Intel(R) PXA27x Processor Family
 541         * Specification Update (Nov 2005)
 542         */
 543        dll = serial_in(up, UART_DLL);
 544        WARN_ON(dll != (quot & 0xff));
 545
 546        serial_out(up, UART_DLM, quot >> 8);            /* MS of divisor */
 547        serial_out(up, UART_LCR, cval);                 /* reset DLAB */
 548        up->lcr = cval;                                 /* Save LCR */
 549        serial_pxa_set_mctrl(&up->port, up->port.mctrl);
 550        serial_out(up, UART_FCR, fcr);
 551        spin_unlock_irqrestore(&up->port.lock, flags);
 552}
 553
 554static void
 555serial_pxa_pm(struct uart_port *port, unsigned int state,
 556              unsigned int oldstate)
 557{
 558        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 559
 560        if (!state)
 561                clk_prepare_enable(up->clk);
 562        else
 563                clk_disable_unprepare(up->clk);
 564}
 565
 566static void serial_pxa_release_port(struct uart_port *port)
 567{
 568}
 569
 570static int serial_pxa_request_port(struct uart_port *port)
 571{
 572        return 0;
 573}
 574
 575static void serial_pxa_config_port(struct uart_port *port, int flags)
 576{
 577        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 578        up->port.type = PORT_PXA;
 579}
 580
 581static int
 582serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
 583{
 584        /* we don't want the core code to modify any port params */
 585        return -EINVAL;
 586}
 587
 588static const char *
 589serial_pxa_type(struct uart_port *port)
 590{
 591        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 592        return up->name;
 593}
 594
 595static struct uart_pxa_port *serial_pxa_ports[4];
 596static struct uart_driver serial_pxa_reg;
 597
 598#ifdef CONFIG_SERIAL_PXA_CONSOLE
 599
 600#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 601
 602/*
 603 *      Wait for transmitter & holding register to empty
 604 */
 605static void wait_for_xmitr(struct uart_pxa_port *up)
 606{
 607        unsigned int status, tmout = 10000;
 608
 609        /* Wait up to 10ms for the character(s) to be sent. */
 610        do {
 611                status = serial_in(up, UART_LSR);
 612
 613                if (status & UART_LSR_BI)
 614                        up->lsr_break_flag = UART_LSR_BI;
 615
 616                if (--tmout == 0)
 617                        break;
 618                udelay(1);
 619        } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
 620
 621        /* Wait up to 1s for flow control if necessary */
 622        if (up->port.flags & UPF_CONS_FLOW) {
 623                tmout = 1000000;
 624                while (--tmout &&
 625                       ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
 626                        udelay(1);
 627        }
 628}
 629
 630static void serial_pxa_console_putchar(struct uart_port *port, int ch)
 631{
 632        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 633
 634        wait_for_xmitr(up);
 635        serial_out(up, UART_TX, ch);
 636}
 637
 638/*
 639 * Print a string to the serial port trying not to disturb
 640 * any possible real use of the port...
 641 *
 642 *      The console_lock must be held when we get here.
 643 */
 644static void
 645serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
 646{
 647        struct uart_pxa_port *up = serial_pxa_ports[co->index];
 648        unsigned int ier;
 649        unsigned long flags;
 650        int locked = 1;
 651
 652        clk_enable(up->clk);
 653        local_irq_save(flags);
 654        if (up->port.sysrq)
 655                locked = 0;
 656        else if (oops_in_progress)
 657                locked = spin_trylock(&up->port.lock);
 658        else
 659                spin_lock(&up->port.lock);
 660
 661        /*
 662         *      First save the IER then disable the interrupts
 663         */
 664        ier = serial_in(up, UART_IER);
 665        serial_out(up, UART_IER, UART_IER_UUE);
 666
 667        uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
 668
 669        /*
 670         *      Finally, wait for transmitter to become empty
 671         *      and restore the IER
 672         */
 673        wait_for_xmitr(up);
 674        serial_out(up, UART_IER, ier);
 675
 676        if (locked)
 677                spin_unlock(&up->port.lock);
 678        local_irq_restore(flags);
 679        clk_disable(up->clk);
 680
 681}
 682
 683#ifdef CONFIG_CONSOLE_POLL
 684/*
 685 * Console polling routines for writing and reading from the uart while
 686 * in an interrupt or debug context.
 687 */
 688
 689static int serial_pxa_get_poll_char(struct uart_port *port)
 690{
 691        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 692        unsigned char lsr = serial_in(up, UART_LSR);
 693
 694        while (!(lsr & UART_LSR_DR))
 695                lsr = serial_in(up, UART_LSR);
 696
 697        return serial_in(up, UART_RX);
 698}
 699
 700
 701static void serial_pxa_put_poll_char(struct uart_port *port,
 702                         unsigned char c)
 703{
 704        unsigned int ier;
 705        struct uart_pxa_port *up = (struct uart_pxa_port *)port;
 706
 707        /*
 708         *      First save the IER then disable the interrupts
 709         */
 710        ier = serial_in(up, UART_IER);
 711        serial_out(up, UART_IER, UART_IER_UUE);
 712
 713        wait_for_xmitr(up);
 714        /*
 715         *      Send the character out.
 716         */
 717        serial_out(up, UART_TX, c);
 718
 719        /*
 720         *      Finally, wait for transmitter to become empty
 721         *      and restore the IER
 722         */
 723        wait_for_xmitr(up);
 724        serial_out(up, UART_IER, ier);
 725}
 726
 727#endif /* CONFIG_CONSOLE_POLL */
 728
 729static int __init
 730serial_pxa_console_setup(struct console *co, char *options)
 731{
 732        struct uart_pxa_port *up;
 733        int baud = 9600;
 734        int bits = 8;
 735        int parity = 'n';
 736        int flow = 'n';
 737
 738        if (co->index == -1 || co->index >= serial_pxa_reg.nr)
 739                co->index = 0;
 740        up = serial_pxa_ports[co->index];
 741        if (!up)
 742                return -ENODEV;
 743
 744        if (options)
 745                uart_parse_options(options, &baud, &parity, &bits, &flow);
 746
 747        return uart_set_options(&up->port, co, baud, parity, bits, flow);
 748}
 749
 750static struct console serial_pxa_console = {
 751        .name           = "ttyS",
 752        .write          = serial_pxa_console_write,
 753        .device         = uart_console_device,
 754        .setup          = serial_pxa_console_setup,
 755        .flags          = CON_PRINTBUFFER,
 756        .index          = -1,
 757        .data           = &serial_pxa_reg,
 758};
 759
 760#define PXA_CONSOLE     &serial_pxa_console
 761#else
 762#define PXA_CONSOLE     NULL
 763#endif
 764
 765static const struct uart_ops serial_pxa_pops = {
 766        .tx_empty       = serial_pxa_tx_empty,
 767        .set_mctrl      = serial_pxa_set_mctrl,
 768        .get_mctrl      = serial_pxa_get_mctrl,
 769        .stop_tx        = serial_pxa_stop_tx,
 770        .start_tx       = serial_pxa_start_tx,
 771        .stop_rx        = serial_pxa_stop_rx,
 772        .enable_ms      = serial_pxa_enable_ms,
 773        .break_ctl      = serial_pxa_break_ctl,
 774        .startup        = serial_pxa_startup,
 775        .shutdown       = serial_pxa_shutdown,
 776        .set_termios    = serial_pxa_set_termios,
 777        .pm             = serial_pxa_pm,
 778        .type           = serial_pxa_type,
 779        .release_port   = serial_pxa_release_port,
 780        .request_port   = serial_pxa_request_port,
 781        .config_port    = serial_pxa_config_port,
 782        .verify_port    = serial_pxa_verify_port,
 783#if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE)
 784        .poll_get_char = serial_pxa_get_poll_char,
 785        .poll_put_char = serial_pxa_put_poll_char,
 786#endif
 787};
 788
 789static struct uart_driver serial_pxa_reg = {
 790        .owner          = THIS_MODULE,
 791        .driver_name    = "PXA serial",
 792        .dev_name       = "ttyS",
 793        .major          = TTY_MAJOR,
 794        .minor          = 64,
 795        .nr             = 4,
 796        .cons           = PXA_CONSOLE,
 797};
 798
 799#ifdef CONFIG_PM
 800static int serial_pxa_suspend(struct device *dev)
 801{
 802        struct uart_pxa_port *sport = dev_get_drvdata(dev);
 803
 804        if (sport)
 805                uart_suspend_port(&serial_pxa_reg, &sport->port);
 806
 807        return 0;
 808}
 809
 810static int serial_pxa_resume(struct device *dev)
 811{
 812        struct uart_pxa_port *sport = dev_get_drvdata(dev);
 813
 814        if (sport)
 815                uart_resume_port(&serial_pxa_reg, &sport->port);
 816
 817        return 0;
 818}
 819
 820static const struct dev_pm_ops serial_pxa_pm_ops = {
 821        .suspend        = serial_pxa_suspend,
 822        .resume         = serial_pxa_resume,
 823};
 824#endif
 825
 826static const struct of_device_id serial_pxa_dt_ids[] = {
 827        { .compatible = "mrvl,pxa-uart", },
 828        { .compatible = "mrvl,mmp-uart", },
 829        {}
 830};
 831
 832static int serial_pxa_probe_dt(struct platform_device *pdev,
 833                               struct uart_pxa_port *sport)
 834{
 835        struct device_node *np = pdev->dev.of_node;
 836        int ret;
 837
 838        if (!np)
 839                return 1;
 840
 841        ret = of_alias_get_id(np, "serial");
 842        if (ret < 0) {
 843                dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
 844                return ret;
 845        }
 846        sport->port.line = ret;
 847        return 0;
 848}
 849
 850static int serial_pxa_probe(struct platform_device *dev)
 851{
 852        struct uart_pxa_port *sport;
 853        struct resource *mmres, *irqres;
 854        int ret;
 855
 856        mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
 857        irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
 858        if (!mmres || !irqres)
 859                return -ENODEV;
 860
 861        sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
 862        if (!sport)
 863                return -ENOMEM;
 864
 865        sport->clk = clk_get(&dev->dev, NULL);
 866        if (IS_ERR(sport->clk)) {
 867                ret = PTR_ERR(sport->clk);
 868                goto err_free;
 869        }
 870
 871        ret = clk_prepare(sport->clk);
 872        if (ret) {
 873                clk_put(sport->clk);
 874                goto err_free;
 875        }
 876
 877        sport->port.type = PORT_PXA;
 878        sport->port.iotype = UPIO_MEM;
 879        sport->port.mapbase = mmres->start;
 880        sport->port.irq = irqres->start;
 881        sport->port.fifosize = 64;
 882        sport->port.ops = &serial_pxa_pops;
 883        sport->port.dev = &dev->dev;
 884        sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
 885        sport->port.uartclk = clk_get_rate(sport->clk);
 886
 887        ret = serial_pxa_probe_dt(dev, sport);
 888        if (ret > 0)
 889                sport->port.line = dev->id;
 890        else if (ret < 0)
 891                goto err_clk;
 892        snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
 893
 894        sport->port.membase = ioremap(mmres->start, resource_size(mmres));
 895        if (!sport->port.membase) {
 896                ret = -ENOMEM;
 897                goto err_clk;
 898        }
 899
 900        serial_pxa_ports[sport->port.line] = sport;
 901
 902        uart_add_one_port(&serial_pxa_reg, &sport->port);
 903        platform_set_drvdata(dev, sport);
 904
 905        return 0;
 906
 907 err_clk:
 908        clk_unprepare(sport->clk);
 909        clk_put(sport->clk);
 910 err_free:
 911        kfree(sport);
 912        return ret;
 913}
 914
 915static struct platform_driver serial_pxa_driver = {
 916        .probe          = serial_pxa_probe,
 917
 918        .driver         = {
 919                .name   = "pxa2xx-uart",
 920#ifdef CONFIG_PM
 921                .pm     = &serial_pxa_pm_ops,
 922#endif
 923                .suppress_bind_attrs = true,
 924                .of_match_table = serial_pxa_dt_ids,
 925        },
 926};
 927
 928
 929/* 8250 driver for PXA serial ports should be used */
 930static int __init serial_pxa_init(void)
 931{
 932        int ret;
 933
 934        ret = uart_register_driver(&serial_pxa_reg);
 935        if (ret != 0)
 936                return ret;
 937
 938        ret = platform_driver_register(&serial_pxa_driver);
 939        if (ret != 0)
 940                uart_unregister_driver(&serial_pxa_reg);
 941
 942        return ret;
 943}
 944device_initcall(serial_pxa_init);
 945