linux/include/linux/mmc/host.h
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   1/*
   2 *  linux/include/linux/mmc/host.h
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 as
   6 * published by the Free Software Foundation.
   7 *
   8 *  Host driver specific definitions.
   9 */
  10#ifndef LINUX_MMC_HOST_H
  11#define LINUX_MMC_HOST_H
  12
  13#include <linux/sched.h>
  14#include <linux/device.h>
  15#include <linux/fault-inject.h>
  16
  17#include <linux/mmc/core.h>
  18#include <linux/mmc/card.h>
  19#include <linux/mmc/pm.h>
  20#include <linux/dma-direction.h>
  21
  22struct mmc_ios {
  23        unsigned int    clock;                  /* clock rate */
  24        unsigned short  vdd;
  25
  26/* vdd stores the bit number of the selected voltage range from below. */
  27
  28        unsigned char   bus_mode;               /* command output mode */
  29
  30#define MMC_BUSMODE_OPENDRAIN   1
  31#define MMC_BUSMODE_PUSHPULL    2
  32
  33        unsigned char   chip_select;            /* SPI chip select */
  34
  35#define MMC_CS_DONTCARE         0
  36#define MMC_CS_HIGH             1
  37#define MMC_CS_LOW              2
  38
  39        unsigned char   power_mode;             /* power supply mode */
  40
  41#define MMC_POWER_OFF           0
  42#define MMC_POWER_UP            1
  43#define MMC_POWER_ON            2
  44#define MMC_POWER_UNDEFINED     3
  45
  46        unsigned char   bus_width;              /* data bus width */
  47
  48#define MMC_BUS_WIDTH_1         0
  49#define MMC_BUS_WIDTH_4         2
  50#define MMC_BUS_WIDTH_8         3
  51
  52        unsigned char   timing;                 /* timing specification used */
  53
  54#define MMC_TIMING_LEGACY       0
  55#define MMC_TIMING_MMC_HS       1
  56#define MMC_TIMING_SD_HS        2
  57#define MMC_TIMING_UHS_SDR12    3
  58#define MMC_TIMING_UHS_SDR25    4
  59#define MMC_TIMING_UHS_SDR50    5
  60#define MMC_TIMING_UHS_SDR104   6
  61#define MMC_TIMING_UHS_DDR50    7
  62#define MMC_TIMING_MMC_DDR52    8
  63#define MMC_TIMING_MMC_HS200    9
  64#define MMC_TIMING_MMC_HS400    10
  65
  66        unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
  67
  68#define MMC_SIGNAL_VOLTAGE_330  0
  69#define MMC_SIGNAL_VOLTAGE_180  1
  70#define MMC_SIGNAL_VOLTAGE_120  2
  71
  72        unsigned char   drv_type;               /* driver type (A, B, C, D) */
  73
  74#define MMC_SET_DRIVER_TYPE_B   0
  75#define MMC_SET_DRIVER_TYPE_A   1
  76#define MMC_SET_DRIVER_TYPE_C   2
  77#define MMC_SET_DRIVER_TYPE_D   3
  78
  79        bool enhanced_strobe;                   /* hs400es selection */
  80};
  81
  82struct mmc_host;
  83
  84struct mmc_host_ops {
  85        /*
  86         * It is optional for the host to implement pre_req and post_req in
  87         * order to support double buffering of requests (prepare one
  88         * request while another request is active).
  89         * pre_req() must always be followed by a post_req().
  90         * To undo a call made to pre_req(), call post_req() with
  91         * a nonzero err condition.
  92         */
  93        void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
  94                            int err);
  95        void    (*pre_req)(struct mmc_host *host, struct mmc_request *req);
  96        void    (*request)(struct mmc_host *host, struct mmc_request *req);
  97
  98        /*
  99         * Avoid calling the next three functions too often or in a "fast
 100         * path", since underlaying controller might implement them in an
 101         * expensive and/or slow way. Also note that these functions might
 102         * sleep, so don't call them in the atomic contexts!
 103         */
 104
 105        /*
 106         * Notes to the set_ios callback:
 107         * ios->clock might be 0. For some controllers, setting 0Hz
 108         * as any other frequency works. However, some controllers
 109         * explicitly need to disable the clock. Otherwise e.g. voltage
 110         * switching might fail because the SDCLK is not really quiet.
 111         */
 112        void    (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
 113
 114        /*
 115         * Return values for the get_ro callback should be:
 116         *   0 for a read/write card
 117         *   1 for a read-only card
 118         *   -ENOSYS when not supported (equal to NULL callback)
 119         *   or a negative errno value when something bad happened
 120         */
 121        int     (*get_ro)(struct mmc_host *host);
 122
 123        /*
 124         * Return values for the get_cd callback should be:
 125         *   0 for a absent card
 126         *   1 for a present card
 127         *   -ENOSYS when not supported (equal to NULL callback)
 128         *   or a negative errno value when something bad happened
 129         */
 130        int     (*get_cd)(struct mmc_host *host);
 131
 132        void    (*enable_sdio_irq)(struct mmc_host *host, int enable);
 133        void    (*ack_sdio_irq)(struct mmc_host *host);
 134
 135        /* optional callback for HC quirks */
 136        void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
 137
 138        int     (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
 139
 140        /* Check if the card is pulling dat[0:3] low */
 141        int     (*card_busy)(struct mmc_host *host);
 142
 143        /* The tuning command opcode value is different for SD and eMMC cards */
 144        int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
 145
 146        /* Prepare HS400 target operating frequency depending host driver */
 147        int     (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
 148        /* Prepare enhanced strobe depending host driver */
 149        void    (*hs400_enhanced_strobe)(struct mmc_host *host,
 150                                         struct mmc_ios *ios);
 151        int     (*select_drive_strength)(struct mmc_card *card,
 152                                         unsigned int max_dtr, int host_drv,
 153                                         int card_drv, int *drv_type);
 154        void    (*hw_reset)(struct mmc_host *host);
 155        void    (*card_event)(struct mmc_host *host);
 156
 157        /*
 158         * Optional callback to support controllers with HW issues for multiple
 159         * I/O. Returns the number of supported blocks for the request.
 160         */
 161        int     (*multi_io_quirk)(struct mmc_card *card,
 162                                  unsigned int direction, int blk_size);
 163};
 164
 165struct mmc_cqe_ops {
 166        /* Allocate resources, and make the CQE operational */
 167        int     (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
 168        /* Free resources, and make the CQE non-operational */
 169        void    (*cqe_disable)(struct mmc_host *host);
 170        /*
 171         * Issue a read, write or DCMD request to the CQE. Also deal with the
 172         * effect of ->cqe_off().
 173         */
 174        int     (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
 175        /* Free resources (e.g. DMA mapping) associated with the request */
 176        void    (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
 177        /*
 178         * Prepare the CQE and host controller to accept non-CQ commands. There
 179         * is no corresponding ->cqe_on(), instead ->cqe_request() is required
 180         * to deal with that.
 181         */
 182        void    (*cqe_off)(struct mmc_host *host);
 183        /*
 184         * Wait for all CQE tasks to complete. Return an error if recovery
 185         * becomes necessary.
 186         */
 187        int     (*cqe_wait_for_idle)(struct mmc_host *host);
 188        /*
 189         * Notify CQE that a request has timed out. Return false if the request
 190         * completed or true if a timeout happened in which case indicate if
 191         * recovery is needed.
 192         */
 193        bool    (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
 194                               bool *recovery_needed);
 195        /*
 196         * Stop all CQE activity and prepare the CQE and host controller to
 197         * accept recovery commands.
 198         */
 199        void    (*cqe_recovery_start)(struct mmc_host *host);
 200        /*
 201         * Clear the queue and call mmc_cqe_request_done() on all requests.
 202         * Requests that errored will have the error set on the mmc_request
 203         * (data->error or cmd->error for DCMD).  Requests that did not error
 204         * will have zero data bytes transferred.
 205         */
 206        void    (*cqe_recovery_finish)(struct mmc_host *host);
 207};
 208
 209struct mmc_async_req {
 210        /* active mmc request */
 211        struct mmc_request      *mrq;
 212        /*
 213         * Check error status of completed mmc request.
 214         * Returns 0 if success otherwise non zero.
 215         */
 216        enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
 217};
 218
 219/**
 220 * struct mmc_slot - MMC slot functions
 221 *
 222 * @cd_irq:             MMC/SD-card slot hotplug detection IRQ or -EINVAL
 223 * @handler_priv:       MMC/SD-card slot context
 224 *
 225 * Some MMC/SD host controllers implement slot-functions like card and
 226 * write-protect detection natively. However, a large number of controllers
 227 * leave these functions to the CPU. This struct provides a hook to attach
 228 * such slot-function drivers.
 229 */
 230struct mmc_slot {
 231        int cd_irq;
 232        bool cd_wake_enabled;
 233        void *handler_priv;
 234};
 235
 236/**
 237 * mmc_context_info - synchronization details for mmc context
 238 * @is_done_rcv         wake up reason was done request
 239 * @is_new_req          wake up reason was new request
 240 * @is_waiting_last_req mmc context waiting for single running request
 241 * @wait                wait queue
 242 */
 243struct mmc_context_info {
 244        bool                    is_done_rcv;
 245        bool                    is_new_req;
 246        bool                    is_waiting_last_req;
 247        wait_queue_head_t       wait;
 248};
 249
 250struct regulator;
 251struct mmc_pwrseq;
 252
 253struct mmc_supply {
 254        struct regulator *vmmc;         /* Card power supply */
 255        struct regulator *vqmmc;        /* Optional Vccq supply */
 256};
 257
 258struct mmc_host {
 259        struct device           *parent;
 260        struct device           class_dev;
 261        int                     index;
 262        const struct mmc_host_ops *ops;
 263        struct mmc_pwrseq       *pwrseq;
 264        unsigned int            f_min;
 265        unsigned int            f_max;
 266        unsigned int            f_init;
 267        u32                     ocr_avail;
 268        u32                     ocr_avail_sdio; /* SDIO-specific OCR */
 269        u32                     ocr_avail_sd;   /* SD-specific OCR */
 270        u32                     ocr_avail_mmc;  /* MMC-specific OCR */
 271#ifdef CONFIG_PM_SLEEP
 272        struct notifier_block   pm_notify;
 273#endif
 274        u32                     max_current_330;
 275        u32                     max_current_300;
 276        u32                     max_current_180;
 277
 278#define MMC_VDD_165_195         0x00000080      /* VDD voltage 1.65 - 1.95 */
 279#define MMC_VDD_20_21           0x00000100      /* VDD voltage 2.0 ~ 2.1 */
 280#define MMC_VDD_21_22           0x00000200      /* VDD voltage 2.1 ~ 2.2 */
 281#define MMC_VDD_22_23           0x00000400      /* VDD voltage 2.2 ~ 2.3 */
 282#define MMC_VDD_23_24           0x00000800      /* VDD voltage 2.3 ~ 2.4 */
 283#define MMC_VDD_24_25           0x00001000      /* VDD voltage 2.4 ~ 2.5 */
 284#define MMC_VDD_25_26           0x00002000      /* VDD voltage 2.5 ~ 2.6 */
 285#define MMC_VDD_26_27           0x00004000      /* VDD voltage 2.6 ~ 2.7 */
 286#define MMC_VDD_27_28           0x00008000      /* VDD voltage 2.7 ~ 2.8 */
 287#define MMC_VDD_28_29           0x00010000      /* VDD voltage 2.8 ~ 2.9 */
 288#define MMC_VDD_29_30           0x00020000      /* VDD voltage 2.9 ~ 3.0 */
 289#define MMC_VDD_30_31           0x00040000      /* VDD voltage 3.0 ~ 3.1 */
 290#define MMC_VDD_31_32           0x00080000      /* VDD voltage 3.1 ~ 3.2 */
 291#define MMC_VDD_32_33           0x00100000      /* VDD voltage 3.2 ~ 3.3 */
 292#define MMC_VDD_33_34           0x00200000      /* VDD voltage 3.3 ~ 3.4 */
 293#define MMC_VDD_34_35           0x00400000      /* VDD voltage 3.4 ~ 3.5 */
 294#define MMC_VDD_35_36           0x00800000      /* VDD voltage 3.5 ~ 3.6 */
 295
 296        u32                     caps;           /* Host capabilities */
 297
 298#define MMC_CAP_4_BIT_DATA      (1 << 0)        /* Can the host do 4 bit transfers */
 299#define MMC_CAP_MMC_HIGHSPEED   (1 << 1)        /* Can do MMC high-speed timing */
 300#define MMC_CAP_SD_HIGHSPEED    (1 << 2)        /* Can do SD high-speed timing */
 301#define MMC_CAP_SDIO_IRQ        (1 << 3)        /* Can signal pending SDIO IRQs */
 302#define MMC_CAP_SPI             (1 << 4)        /* Talks only SPI protocols */
 303#define MMC_CAP_NEEDS_POLL      (1 << 5)        /* Needs polling for card-detection */
 304#define MMC_CAP_8_BIT_DATA      (1 << 6)        /* Can the host do 8 bit transfers */
 305#define MMC_CAP_AGGRESSIVE_PM   (1 << 7)        /* Suspend (e)MMC/SD at idle  */
 306#define MMC_CAP_NONREMOVABLE    (1 << 8)        /* Nonremovable e.g. eMMC */
 307#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)        /* Waits while card is busy */
 308#define MMC_CAP_ERASE           (1 << 10)       /* Allow erase/trim commands */
 309#define MMC_CAP_3_3V_DDR        (1 << 11)       /* Host supports eMMC DDR 3.3V */
 310#define MMC_CAP_1_8V_DDR        (1 << 12)       /* Host supports eMMC DDR 1.8V */
 311#define MMC_CAP_1_2V_DDR        (1 << 13)       /* Host supports eMMC DDR 1.2V */
 312#define MMC_CAP_POWER_OFF_CARD  (1 << 14)       /* Can power off after boot */
 313#define MMC_CAP_BUS_WIDTH_TEST  (1 << 15)       /* CMD14/CMD19 bus width ok */
 314#define MMC_CAP_UHS_SDR12       (1 << 16)       /* Host supports UHS SDR12 mode */
 315#define MMC_CAP_UHS_SDR25       (1 << 17)       /* Host supports UHS SDR25 mode */
 316#define MMC_CAP_UHS_SDR50       (1 << 18)       /* Host supports UHS SDR50 mode */
 317#define MMC_CAP_UHS_SDR104      (1 << 19)       /* Host supports UHS SDR104 mode */
 318#define MMC_CAP_UHS_DDR50       (1 << 20)       /* Host supports UHS DDR50 mode */
 319/* (1 << 21) is free for reuse */
 320#define MMC_CAP_DRIVER_TYPE_A   (1 << 23)       /* Host supports Driver Type A */
 321#define MMC_CAP_DRIVER_TYPE_C   (1 << 24)       /* Host supports Driver Type C */
 322#define MMC_CAP_DRIVER_TYPE_D   (1 << 25)       /* Host supports Driver Type D */
 323#define MMC_CAP_CD_WAKE         (1 << 28)       /* Enable card detect wake */
 324#define MMC_CAP_CMD_DURING_TFR  (1 << 29)       /* Commands during data transfer */
 325#define MMC_CAP_CMD23           (1 << 30)       /* CMD23 supported. */
 326#define MMC_CAP_HW_RESET        (1 << 31)       /* Hardware reset */
 327
 328        u32                     caps2;          /* More host capabilities */
 329
 330#define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
 331#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)        /* Can do full power cycle */
 332#define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
 333#define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
 334#define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
 335                                 MMC_CAP2_HS200_1_2V_SDR)
 336#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)       /* Card-detect signal active high */
 337#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)       /* Write-protect signal active high */
 338#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
 339#define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
 340#define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
 341#define MMC_CAP2_HS400          (MMC_CAP2_HS400_1_8V | \
 342                                 MMC_CAP2_HS400_1_2V)
 343#define MMC_CAP2_HSX00_1_2V     (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
 344#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
 345#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)     /* No physical write protect pin, assume that card is always read-write */
 346#define MMC_CAP2_NO_SDIO        (1 << 19)       /* Do not send SDIO commands during initialization */
 347#define MMC_CAP2_HS400_ES       (1 << 20)       /* Host supports enhanced strobe */
 348#define MMC_CAP2_NO_SD          (1 << 21)       /* Do not send SD commands during initialization */
 349#define MMC_CAP2_NO_MMC         (1 << 22)       /* Do not send (e)MMC commands during initialization */
 350#define MMC_CAP2_CQE            (1 << 23)       /* Has eMMC command queue engine */
 351#define MMC_CAP2_CQE_DCMD       (1 << 24)       /* CQE can issue a direct command */
 352
 353        mmc_pm_flag_t           pm_caps;        /* supported pm features */
 354
 355        /* host specific block data */
 356        unsigned int            max_seg_size;   /* see blk_queue_max_segment_size */
 357        unsigned short          max_segs;       /* see blk_queue_max_segments */
 358        unsigned short          unused;
 359        unsigned int            max_req_size;   /* maximum number of bytes in one req */
 360        unsigned int            max_blk_size;   /* maximum size of one mmc block */
 361        unsigned int            max_blk_count;  /* maximum number of blocks in one req */
 362        unsigned int            max_busy_timeout; /* max busy timeout in ms */
 363
 364        /* private data */
 365        spinlock_t              lock;           /* lock for claim and bus ops */
 366
 367        struct mmc_ios          ios;            /* current io bus settings */
 368
 369        /* group bitfields together to minimize padding */
 370        unsigned int            use_spi_crc:1;
 371        unsigned int            claimed:1;      /* host exclusively claimed */
 372        unsigned int            bus_dead:1;     /* bus has been released */
 373        unsigned int            can_retune:1;   /* re-tuning can be used */
 374        unsigned int            doing_retune:1; /* re-tuning in progress */
 375        unsigned int            retune_now:1;   /* do re-tuning at next req */
 376        unsigned int            retune_paused:1; /* re-tuning is temporarily disabled */
 377
 378        int                     rescan_disable; /* disable card detection */
 379        int                     rescan_entered; /* used with nonremovable devices */
 380
 381        int                     need_retune;    /* re-tuning is needed */
 382        int                     hold_retune;    /* hold off re-tuning */
 383        unsigned int            retune_period;  /* re-tuning period in secs */
 384        struct timer_list       retune_timer;   /* for periodic re-tuning */
 385
 386        bool                    trigger_card_event; /* card_event necessary */
 387
 388        struct mmc_card         *card;          /* device attached to this host */
 389
 390        wait_queue_head_t       wq;
 391        struct task_struct      *claimer;       /* task that has host claimed */
 392        int                     claim_cnt;      /* "claim" nesting count */
 393
 394        struct delayed_work     detect;
 395        int                     detect_change;  /* card detect flag */
 396        struct mmc_slot         slot;
 397
 398        const struct mmc_bus_ops *bus_ops;      /* current bus driver */
 399        unsigned int            bus_refs;       /* reference counter */
 400
 401        unsigned int            sdio_irqs;
 402        struct task_struct      *sdio_irq_thread;
 403        struct delayed_work     sdio_irq_work;
 404        bool                    sdio_irq_pending;
 405        atomic_t                sdio_irq_thread_abort;
 406
 407        mmc_pm_flag_t           pm_flags;       /* requested pm features */
 408
 409        struct led_trigger      *led;           /* activity led */
 410
 411#ifdef CONFIG_REGULATOR
 412        bool                    regulator_enabled; /* regulator state */
 413#endif
 414        struct mmc_supply       supply;
 415
 416        struct dentry           *debugfs_root;
 417
 418        struct mmc_async_req    *areq;          /* active async req */
 419        struct mmc_context_info context_info;   /* async synchronization info */
 420
 421        /* Ongoing data transfer that allows commands during transfer */
 422        struct mmc_request      *ongoing_mrq;
 423
 424#ifdef CONFIG_FAIL_MMC_REQUEST
 425        struct fault_attr       fail_mmc_request;
 426#endif
 427
 428        unsigned int            actual_clock;   /* Actual HC clock rate */
 429
 430        unsigned int            slotno; /* used for sdio acpi binding */
 431
 432        int                     dsr_req;        /* DSR value is valid */
 433        u32                     dsr;    /* optional driver stage (DSR) value */
 434
 435        /* Command Queue Engine (CQE) support */
 436        const struct mmc_cqe_ops *cqe_ops;
 437        void                    *cqe_private;
 438        int                     cqe_qdepth;
 439        bool                    cqe_enabled;
 440        bool                    cqe_on;
 441
 442        unsigned long           private[0] ____cacheline_aligned;
 443};
 444
 445struct device_node;
 446
 447struct mmc_host *mmc_alloc_host(int extra, struct device *);
 448int mmc_add_host(struct mmc_host *);
 449void mmc_remove_host(struct mmc_host *);
 450void mmc_free_host(struct mmc_host *);
 451int mmc_of_parse(struct mmc_host *host);
 452int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
 453
 454static inline void *mmc_priv(struct mmc_host *host)
 455{
 456        return (void *)host->private;
 457}
 458
 459#define mmc_host_is_spi(host)   ((host)->caps & MMC_CAP_SPI)
 460
 461#define mmc_dev(x)      ((x)->parent)
 462#define mmc_classdev(x) (&(x)->class_dev)
 463#define mmc_hostname(x) (dev_name(&(x)->class_dev))
 464
 465int mmc_power_save_host(struct mmc_host *host);
 466int mmc_power_restore_host(struct mmc_host *host);
 467
 468void mmc_detect_change(struct mmc_host *, unsigned long delay);
 469void mmc_request_done(struct mmc_host *, struct mmc_request *);
 470void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
 471
 472static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 473{
 474        host->ops->enable_sdio_irq(host, 0);
 475        host->sdio_irq_pending = true;
 476        if (host->sdio_irq_thread)
 477                wake_up_process(host->sdio_irq_thread);
 478}
 479
 480void sdio_run_irqs(struct mmc_host *host);
 481void sdio_signal_irq(struct mmc_host *host);
 482
 483#ifdef CONFIG_REGULATOR
 484int mmc_regulator_get_ocrmask(struct regulator *supply);
 485int mmc_regulator_set_ocr(struct mmc_host *mmc,
 486                        struct regulator *supply,
 487                        unsigned short vdd_bit);
 488int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
 489#else
 490static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
 491{
 492        return 0;
 493}
 494
 495static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
 496                                 struct regulator *supply,
 497                                 unsigned short vdd_bit)
 498{
 499        return 0;
 500}
 501
 502static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
 503                                          struct mmc_ios *ios)
 504{
 505        return -EINVAL;
 506}
 507#endif
 508
 509u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
 510int mmc_regulator_get_supply(struct mmc_host *mmc);
 511
 512static inline int mmc_card_is_removable(struct mmc_host *host)
 513{
 514        return !(host->caps & MMC_CAP_NONREMOVABLE);
 515}
 516
 517static inline int mmc_card_keep_power(struct mmc_host *host)
 518{
 519        return host->pm_flags & MMC_PM_KEEP_POWER;
 520}
 521
 522static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
 523{
 524        return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
 525}
 526
 527/* TODO: Move to private header */
 528static inline int mmc_card_hs(struct mmc_card *card)
 529{
 530        return card->host->ios.timing == MMC_TIMING_SD_HS ||
 531                card->host->ios.timing == MMC_TIMING_MMC_HS;
 532}
 533
 534/* TODO: Move to private header */
 535static inline int mmc_card_uhs(struct mmc_card *card)
 536{
 537        return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
 538                card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
 539}
 540
 541void mmc_retune_timer_stop(struct mmc_host *host);
 542
 543static inline void mmc_retune_needed(struct mmc_host *host)
 544{
 545        if (host->can_retune)
 546                host->need_retune = 1;
 547}
 548
 549static inline bool mmc_can_retune(struct mmc_host *host)
 550{
 551        return host->can_retune == 1;
 552}
 553
 554static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
 555{
 556        return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 557}
 558
 559int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
 560int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
 561
 562#endif /* LINUX_MMC_HOST_H */
 563
Hosted by Missing Link Electronics. The original LXR software by the LXR community, this experimental version by lxr@linux.no.