1
2#ifndef __LINUX_SERIAL_SCI_H
3#define __LINUX_SERIAL_SCI_H
4
5#include <linux/bitops.h>
6#include <linux/serial_core.h>
7#include <linux/sh_dma.h>
8
9
10
11
12
13
14#define SCSCR_TIE BIT(7)
15#define SCSCR_RIE BIT(6)
16#define SCSCR_TE BIT(5)
17#define SCSCR_RE BIT(4)
18#define SCSCR_REIE BIT(3)
19#define SCSCR_TOIE BIT(2)
20#define SCSCR_CKE1 BIT(1)
21#define SCSCR_CKE0 BIT(0)
22
23
24enum {
25 SCIx_PROBE_REGTYPE,
26
27 SCIx_SCI_REGTYPE,
28 SCIx_IRDA_REGTYPE,
29 SCIx_SCIFA_REGTYPE,
30 SCIx_SCIFB_REGTYPE,
31 SCIx_SH2_SCIF_FIFODATA_REGTYPE,
32 SCIx_SH3_SCIF_REGTYPE,
33 SCIx_SH4_SCIF_REGTYPE,
34 SCIx_SH4_SCIF_BRG_REGTYPE,
35 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
36 SCIx_SH4_SCIF_FIFODATA_REGTYPE,
37 SCIx_SH7705_SCIF_REGTYPE,
38 SCIx_HSCIF_REGTYPE,
39
40 SCIx_NR_REGTYPES,
41};
42
43struct plat_sci_port_ops {
44 void (*init_pins)(struct uart_port *, unsigned int cflag);
45};
46
47
48
49
50struct plat_sci_port {
51 unsigned int type;
52 upf_t flags;
53
54 unsigned int sampling_rate;
55 unsigned int scscr;
56
57
58
59
60 unsigned char regtype;
61
62 struct plat_sci_port_ops *ops;
63};
64
65#endif
66