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15#include <linux/linkage.h>
16#include <asm/asm-offsets.h>
17#include <asm/entry.h>
18#include <asm/arcregs.h>
19#include <asm/cache.h>
20
21.macro CPU_EARLY_SETUP
22
23 ; Setting up Vectror Table (in case exception happens in early boot
24 sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE]
25
26 ; Disable I-cache/D-cache if kernel so configured
27 lr r5, [ARC_REG_IC_BCR]
28 breq r5, 0, 1f ; I$ doesn't exist
29 lr r5, [ARC_REG_IC_CTRL]
30#ifdef CONFIG_ARC_HAS_ICACHE
31 bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
32#else
33 bset r5, r5, 0 ; I$ exists, but is not used
34#endif
35 sr r5, [ARC_REG_IC_CTRL]
36
371:
38 lr r5, [ARC_REG_DC_BCR]
39 breq r5, 0, 1f ; D$ doesn't exist
40 lr r5, [ARC_REG_DC_CTRL]
41 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
42#ifdef CONFIG_ARC_HAS_DCACHE
43 bclr r5, r5, 0 ; Enable (+Inv)
44#else
45 bset r5, r5, 0 ; Disable (+Inv)
46#endif
47 sr r5, [ARC_REG_DC_CTRL]
48
491:
50.endm
51
52 .section .init.text, "ax",@progbits
53
54;----------------------------------------------------------------
55; Default Reset Handler (jumped into from Reset vector)
56; - Don't clobber r0,r1,r2 as they might have u-boot provided args
57; - Platforms can override this weak version if needed
58;----------------------------------------------------------------
59WEAK(res_service)
60 j stext
61END(res_service)
62
63;----------------------------------------------------------------
64; Kernel Entry point
65;----------------------------------------------------------------
66ENTRY(stext)
67
68 CPU_EARLY_SETUP
69
70#ifdef CONFIG_SMP
71 GET_CPU_ID r5
72 cmp r5, 0
73 mov.nz r0, r5
74 bz .Lmaster_proceed
75
76 ; Non-Masters wait for Master to boot enough and bring them up
77 ; when they resume, tail-call to entry point
78 mov blink, @first_lines_of_secondary
79 j arc_platform_smp_wait_to_boot
80
81.Lmaster_proceed:
82#endif
83
84 ; Clear BSS before updating any globals
85 ; XXX: use ZOL here
86 mov r5, __bss_start
87 sub r6, __bss_stop, r5
88 lsr.f lp_count, r6, 2
89 lpnz 1f
90 st.ab 0, [r5, 4]
911:
92
93#ifdef CONFIG_ARC_UBOOT_SUPPORT
94 ; Uboot - kernel ABI
95 ; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2
96 ; r1 = magic number (board identity, unused as of now
97 ; r2 = pointer to uboot provided cmdline or external DTB in mem
98 ; These are handled later in setup_arch()
99 st r0, [@uboot_tag]
100 st r2, [@uboot_arg]
101#endif
102
103 ; setup "current" tsk and optionally cache it in dedicated r25
104 mov r9, @init_task
105 SET_CURR_TASK_ON_CPU r9, r0 ; r9 = tsk, r0 = scratch
106
107 ; setup stack (fp, sp)
108 mov fp, 0
109
110 ; tsk->thread_info is really a PAGE, whose bottom hoists stack
111 GET_TSK_STACK_BASE r9, sp ; r9 = tsk, sp = stack base(output)
112
113 j start_kernel ; "C" entry point
114END(stext)
115
116#ifdef CONFIG_SMP
117;----------------------------------------------------------------
118; First lines of code run by secondary before jumping to 'C'
119;----------------------------------------------------------------
120 .section .text, "ax",@progbits
121ENTRY(first_lines_of_secondary)
122
123 ; setup per-cpu idle task as "current" on this CPU
124 ld r0, [@secondary_idle_tsk]
125 SET_CURR_TASK_ON_CPU r0, r1
126
127 ; setup stack (fp, sp)
128 mov fp, 0
129
130 ; set it's stack base to tsk->thread_info bottom
131 GET_TSK_STACK_BASE r0, sp
132
133 j start_kernel_secondary
134END(first_lines_of_secondary)
135#endif
136
