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8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
11#include <linux/mm_types.h>
12#include <linux/mmzone.h>
13#ifdef CONFIG_32BIT
14#include <asm/pgtable-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/pgtable-64.h>
18#endif
19
20#include <asm/io.h>
21#include <asm/pgtable-bits.h>
22
23struct mm_struct;
24struct vm_area_struct;
25
26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \
27 _page_cachable_default)
28#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
29 _page_cachable_default)
30#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_NO_EXEC | \
31 _page_cachable_default)
32#define PAGE_READONLY __pgprot(_PAGE_PRESENT | \
33 _page_cachable_default)
34#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
35 _PAGE_GLOBAL | _page_cachable_default)
36#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
37 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
38#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
39 _page_cachable_default)
40#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
41 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
42
43
44
45
46
47
48
49
50
51
52
53
54#define __P000 __pgprot(0)
55#define __P001 __pgprot(0)
56#define __P010 __pgprot(0)
57#define __P011 __pgprot(0)
58#define __P100 __pgprot(0)
59#define __P101 __pgprot(0)
60#define __P110 __pgprot(0)
61#define __P111 __pgprot(0)
62
63#define __S000 __pgprot(0)
64#define __S001 __pgprot(0)
65#define __S010 __pgprot(0)
66#define __S011 __pgprot(0)
67#define __S100 __pgprot(0)
68#define __S101 __pgprot(0)
69#define __S110 __pgprot(0)
70#define __S111 __pgprot(0)
71
72extern unsigned long _page_cachable_default;
73
74
75
76
77
78
79extern unsigned long empty_zero_page;
80extern unsigned long zero_page_mask;
81
82#define ZERO_PAGE(vaddr) \
83 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
84#define __HAVE_COLOR_ZERO_PAGE
85
86extern void paging_init(void);
87
88
89
90
91
92#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
93
94#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
95#ifndef CONFIG_TRANSPARENT_HUGEPAGE
96#define pmd_page(pmd) __pmd_page(pmd)
97#endif
98
99#define pmd_page_vaddr(pmd) pmd_val(pmd)
100
101#define htw_stop() \
102do { \
103 unsigned long flags; \
104 \
105 if (cpu_has_htw) { \
106 local_irq_save(flags); \
107 if(!raw_current_cpu_data.htw_seq++) { \
108 write_c0_pwctl(read_c0_pwctl() & \
109 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
110 back_to_back_c0_hazard(); \
111 } \
112 local_irq_restore(flags); \
113 } \
114} while(0)
115
116#define htw_start() \
117do { \
118 unsigned long flags; \
119 \
120 if (cpu_has_htw) { \
121 local_irq_save(flags); \
122 if (!--raw_current_cpu_data.htw_seq) { \
123 write_c0_pwctl(read_c0_pwctl() | \
124 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
125 back_to_back_c0_hazard(); \
126 } \
127 local_irq_restore(flags); \
128 } \
129} while(0)
130
131static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
132 pte_t *ptep, pte_t pteval);
133
134#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
135
136#ifdef CONFIG_XPA
137# define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
138#else
139# define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
140#endif
141
142#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
143#define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC)
144
145static inline void set_pte(pte_t *ptep, pte_t pte)
146{
147 ptep->pte_high = pte.pte_high;
148 smp_wmb();
149 ptep->pte_low = pte.pte_low;
150
151#ifdef CONFIG_XPA
152 if (pte.pte_high & _PAGE_GLOBAL) {
153#else
154 if (pte.pte_low & _PAGE_GLOBAL) {
155#endif
156 pte_t *buddy = ptep_buddy(ptep);
157
158
159
160
161 if (pte_none(*buddy)) {
162 if (!IS_ENABLED(CONFIG_XPA))
163 buddy->pte_low |= _PAGE_GLOBAL;
164 buddy->pte_high |= _PAGE_GLOBAL;
165 }
166 }
167}
168
169static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
170{
171 pte_t null = __pte(0);
172
173 htw_stop();
174
175 if (IS_ENABLED(CONFIG_XPA)) {
176 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
177 null.pte_high = _PAGE_GLOBAL;
178 } else {
179 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
180 null.pte_low = null.pte_high = _PAGE_GLOBAL;
181 }
182
183 set_pte_at(mm, addr, ptep, null);
184 htw_start();
185}
186#else
187
188#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
189#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
190#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC)
191
192
193
194
195
196
197static inline void set_pte(pte_t *ptep, pte_t pteval)
198{
199 *ptep = pteval;
200#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
201 if (pte_val(pteval) & _PAGE_GLOBAL) {
202 pte_t *buddy = ptep_buddy(ptep);
203
204
205
206
207#ifdef CONFIG_SMP
208
209
210
211
212 unsigned long page_global = _PAGE_GLOBAL;
213 unsigned long tmp;
214
215 if (kernel_uses_llsc && R10000_LLSC_WAR) {
216 __asm__ __volatile__ (
217 " .set arch=r4000 \n"
218 " .set push \n"
219 " .set noreorder \n"
220 "1:" __LL "%[tmp], %[buddy] \n"
221 " bnez %[tmp], 2f \n"
222 " or %[tmp], %[tmp], %[global] \n"
223 __SC "%[tmp], %[buddy] \n"
224 " beqzl %[tmp], 1b \n"
225 " nop \n"
226 "2: \n"
227 " .set pop \n"
228 " .set mips0 \n"
229 : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
230 : [global] "r" (page_global));
231 } else if (kernel_uses_llsc) {
232 __asm__ __volatile__ (
233 " .set "MIPS_ISA_ARCH_LEVEL" \n"
234 " .set push \n"
235 " .set noreorder \n"
236 "1:" __LL "%[tmp], %[buddy] \n"
237 " bnez %[tmp], 2f \n"
238 " or %[tmp], %[tmp], %[global] \n"
239 __SC "%[tmp], %[buddy] \n"
240 " beqz %[tmp], 1b \n"
241 " nop \n"
242 "2: \n"
243 " .set pop \n"
244 " .set mips0 \n"
245 : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
246 : [global] "r" (page_global));
247 }
248#else
249 if (pte_none(*buddy))
250 pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
251#endif
252 }
253#endif
254}
255
256static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
257{
258 htw_stop();
259#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
260
261 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
262 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
263 else
264#endif
265 set_pte_at(mm, addr, ptep, __pte(0));
266 htw_start();
267}
268#endif
269
270static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
271 pte_t *ptep, pte_t pteval)
272{
273 extern void __update_cache(unsigned long address, pte_t pte);
274
275 if (!pte_present(pteval))
276 goto cache_sync_done;
277
278 if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
279 goto cache_sync_done;
280
281 __update_cache(addr, pteval);
282cache_sync_done:
283 set_pte(ptep, pteval);
284}
285
286
287
288
289
290#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
291
292#ifndef __PAGETABLE_PMD_FOLDED
293
294
295
296
297#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
298#endif
299
300#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
301#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
302#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
303
304
305
306
307
308extern pgd_t swapper_pg_dir[];
309
310
311
312
313
314#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
315static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
316static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
317static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
318
319static inline pte_t pte_wrprotect(pte_t pte)
320{
321 pte.pte_low &= ~_PAGE_WRITE;
322 if (!IS_ENABLED(CONFIG_XPA))
323 pte.pte_low &= ~_PAGE_SILENT_WRITE;
324 pte.pte_high &= ~_PAGE_SILENT_WRITE;
325 return pte;
326}
327
328static inline pte_t pte_mkclean(pte_t pte)
329{
330 pte.pte_low &= ~_PAGE_MODIFIED;
331 if (!IS_ENABLED(CONFIG_XPA))
332 pte.pte_low &= ~_PAGE_SILENT_WRITE;
333 pte.pte_high &= ~_PAGE_SILENT_WRITE;
334 return pte;
335}
336
337static inline pte_t pte_mkold(pte_t pte)
338{
339 pte.pte_low &= ~_PAGE_ACCESSED;
340 if (!IS_ENABLED(CONFIG_XPA))
341 pte.pte_low &= ~_PAGE_SILENT_READ;
342 pte.pte_high &= ~_PAGE_SILENT_READ;
343 return pte;
344}
345
346static inline pte_t pte_mkwrite(pte_t pte)
347{
348 pte.pte_low |= _PAGE_WRITE;
349 if (pte.pte_low & _PAGE_MODIFIED) {
350 if (!IS_ENABLED(CONFIG_XPA))
351 pte.pte_low |= _PAGE_SILENT_WRITE;
352 pte.pte_high |= _PAGE_SILENT_WRITE;
353 }
354 return pte;
355}
356
357static inline pte_t pte_mkdirty(pte_t pte)
358{
359 pte.pte_low |= _PAGE_MODIFIED;
360 if (pte.pte_low & _PAGE_WRITE) {
361 if (!IS_ENABLED(CONFIG_XPA))
362 pte.pte_low |= _PAGE_SILENT_WRITE;
363 pte.pte_high |= _PAGE_SILENT_WRITE;
364 }
365 return pte;
366}
367
368static inline pte_t pte_mkyoung(pte_t pte)
369{
370 pte.pte_low |= _PAGE_ACCESSED;
371 if (!(pte.pte_low & _PAGE_NO_READ)) {
372 if (!IS_ENABLED(CONFIG_XPA))
373 pte.pte_low |= _PAGE_SILENT_READ;
374 pte.pte_high |= _PAGE_SILENT_READ;
375 }
376 return pte;
377}
378#else
379static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
380static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
381static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
382
383static inline pte_t pte_wrprotect(pte_t pte)
384{
385 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
386 return pte;
387}
388
389static inline pte_t pte_mkclean(pte_t pte)
390{
391 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
392 return pte;
393}
394
395static inline pte_t pte_mkold(pte_t pte)
396{
397 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
398 return pte;
399}
400
401static inline pte_t pte_mkwrite(pte_t pte)
402{
403 pte_val(pte) |= _PAGE_WRITE;
404 if (pte_val(pte) & _PAGE_MODIFIED)
405 pte_val(pte) |= _PAGE_SILENT_WRITE;
406 return pte;
407}
408
409static inline pte_t pte_mkdirty(pte_t pte)
410{
411 pte_val(pte) |= _PAGE_MODIFIED;
412 if (pte_val(pte) & _PAGE_WRITE)
413 pte_val(pte) |= _PAGE_SILENT_WRITE;
414 return pte;
415}
416
417static inline pte_t pte_mkyoung(pte_t pte)
418{
419 pte_val(pte) |= _PAGE_ACCESSED;
420 if (!(pte_val(pte) & _PAGE_NO_READ))
421 pte_val(pte) |= _PAGE_SILENT_READ;
422 return pte;
423}
424
425#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
426static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
427
428static inline pte_t pte_mkhuge(pte_t pte)
429{
430 pte_val(pte) |= _PAGE_HUGE;
431 return pte;
432}
433#endif
434#endif
435static inline int pte_special(pte_t pte) { return 0; }
436static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
437
438
439
440
441
442
443
444#define pgprot_noncached pgprot_noncached
445
446static inline pgprot_t pgprot_noncached(pgprot_t _prot)
447{
448 unsigned long prot = pgprot_val(_prot);
449
450 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
451
452 return __pgprot(prot);
453}
454
455#define pgprot_writecombine pgprot_writecombine
456
457static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
458{
459 unsigned long prot = pgprot_val(_prot);
460
461
462 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
463
464 return __pgprot(prot);
465}
466
467
468
469
470
471#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
472
473#if defined(CONFIG_XPA)
474static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
475{
476 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
477 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
478 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
479 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
480 return pte;
481}
482#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
483static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
484{
485 pte.pte_low &= _PAGE_CHG_MASK;
486 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
487 pte.pte_low |= pgprot_val(newprot);
488 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
489 return pte;
490}
491#else
492static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
493{
494 return __pte((pte_val(pte) & _PAGE_CHG_MASK) |
495 (pgprot_val(newprot) & ~_PAGE_CHG_MASK));
496}
497#endif
498
499
500extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
501 pte_t pte);
502
503static inline void update_mmu_cache(struct vm_area_struct *vma,
504 unsigned long address, pte_t *ptep)
505{
506 pte_t pte = *ptep;
507 __update_tlb(vma, address, pte);
508}
509
510static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
511 unsigned long address, pmd_t *pmdp)
512{
513 pte_t pte = *(pte_t *)pmdp;
514
515 __update_tlb(vma, address, pte);
516}
517
518#define kern_addr_valid(addr) (1)
519
520#ifdef CONFIG_PHYS_ADDR_T_64BIT
521extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
522
523static inline int io_remap_pfn_range(struct vm_area_struct *vma,
524 unsigned long vaddr,
525 unsigned long pfn,
526 unsigned long size,
527 pgprot_t prot)
528{
529 phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
530 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
531}
532#define io_remap_pfn_range io_remap_pfn_range
533#endif
534
535#ifdef CONFIG_TRANSPARENT_HUGEPAGE
536
537#define has_transparent_hugepage has_transparent_hugepage
538extern int has_transparent_hugepage(void);
539
540static inline int pmd_trans_huge(pmd_t pmd)
541{
542 return !!(pmd_val(pmd) & _PAGE_HUGE);
543}
544
545static inline pmd_t pmd_mkhuge(pmd_t pmd)
546{
547 pmd_val(pmd) |= _PAGE_HUGE;
548
549 return pmd;
550}
551
552extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
553 pmd_t *pmdp, pmd_t pmd);
554
555#define pmd_write pmd_write
556static inline int pmd_write(pmd_t pmd)
557{
558 return !!(pmd_val(pmd) & _PAGE_WRITE);
559}
560
561static inline pmd_t pmd_wrprotect(pmd_t pmd)
562{
563 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
564 return pmd;
565}
566
567static inline pmd_t pmd_mkwrite(pmd_t pmd)
568{
569 pmd_val(pmd) |= _PAGE_WRITE;
570 if (pmd_val(pmd) & _PAGE_MODIFIED)
571 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
572
573 return pmd;
574}
575
576static inline int pmd_dirty(pmd_t pmd)
577{
578 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
579}
580
581static inline pmd_t pmd_mkclean(pmd_t pmd)
582{
583 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
584 return pmd;
585}
586
587static inline pmd_t pmd_mkdirty(pmd_t pmd)
588{
589 pmd_val(pmd) |= _PAGE_MODIFIED;
590 if (pmd_val(pmd) & _PAGE_WRITE)
591 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
592
593 return pmd;
594}
595
596static inline int pmd_young(pmd_t pmd)
597{
598 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
599}
600
601static inline pmd_t pmd_mkold(pmd_t pmd)
602{
603 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
604
605 return pmd;
606}
607
608static inline pmd_t pmd_mkyoung(pmd_t pmd)
609{
610 pmd_val(pmd) |= _PAGE_ACCESSED;
611
612 if (!(pmd_val(pmd) & _PAGE_NO_READ))
613 pmd_val(pmd) |= _PAGE_SILENT_READ;
614
615 return pmd;
616}
617
618
619extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
620
621static inline unsigned long pmd_pfn(pmd_t pmd)
622{
623 return pmd_val(pmd) >> _PFN_SHIFT;
624}
625
626static inline struct page *pmd_page(pmd_t pmd)
627{
628 if (pmd_trans_huge(pmd))
629 return pfn_to_page(pmd_pfn(pmd));
630
631 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
632}
633
634static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
635{
636 pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) |
637 (pgprot_val(newprot) & ~_PAGE_CHG_MASK);
638 return pmd;
639}
640
641static inline pmd_t pmd_mknotpresent(pmd_t pmd)
642{
643 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
644
645 return pmd;
646}
647
648
649
650
651
652#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
653static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
654 unsigned long address, pmd_t *pmdp)
655{
656 pmd_t old = *pmdp;
657
658 pmd_clear(pmdp);
659
660 return old;
661}
662
663#endif
664
665#include <asm-generic/pgtable.h>
666
667
668
669
670#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
671#define __HAVE_PHYS_MEM_ACCESS_PROT
672
673struct file;
674pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
675 unsigned long size, pgprot_t vma_prot);
676#endif
677
678
679
680
681
682#define HAVE_ARCH_UNMAPPED_AREA
683#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
684
685
686
687
688#define pgtable_cache_init() do { } while (0)
689
690#endif
691
