1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18#include <linux/clk.h>
19#include <linux/clk-provider.h>
20#include <linux/clkdev.h>
21#include <linux/clk/ti.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
24#include <linux/list.h>
25#include <linux/regmap.h>
26#include <linux/bootmem.h>
27#include <linux/device.h>
28
29#include "clock.h"
30
31#undef pr_fmt
32#define pr_fmt(fmt) "%s: " fmt, __func__
33
34struct ti_clk_ll_ops *ti_clk_ll_ops;
35static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
36
37static struct ti_clk_features ti_clk_features;
38
39struct clk_iomap {
40 struct regmap *regmap;
41 void __iomem *mem;
42};
43
44static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
45
46static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
47{
48 struct clk_iomap *io = clk_memmaps[reg->index];
49
50 if (reg->ptr)
51 writel_relaxed(val, reg->ptr);
52 else if (io->regmap)
53 regmap_write(io->regmap, reg->offset, val);
54 else
55 writel_relaxed(val, io->mem + reg->offset);
56}
57
58static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
59{
60 u32 val;
61 struct clk_iomap *io = clk_memmaps[reg->index];
62
63 if (reg->ptr)
64 val = readl_relaxed(reg->ptr);
65 else if (io->regmap)
66 regmap_read(io->regmap, reg->offset, &val);
67 else
68 val = readl_relaxed(io->mem + reg->offset);
69
70 return val;
71}
72
73
74
75
76
77
78
79
80
81
82int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
83{
84 if (ti_clk_ll_ops) {
85 pr_err("Attempt to register ll_ops multiple times.\n");
86 return -EBUSY;
87 }
88
89 ti_clk_ll_ops = ops;
90 ops->clk_readl = clk_memmap_readl;
91 ops->clk_writel = clk_memmap_writel;
92
93 return 0;
94}
95
96
97
98
99
100
101
102
103
104
105void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
106{
107 struct ti_dt_clk *c;
108 struct device_node *node;
109 struct clk *clk;
110 struct of_phandle_args clkspec;
111
112 for (c = oclks; c->node_name != NULL; c++) {
113 node = of_find_node_by_name(NULL, c->node_name);
114 clkspec.np = node;
115 clk = of_clk_get_from_provider(&clkspec);
116
117 if (!IS_ERR(clk)) {
118 c->lk.clk = clk;
119 clkdev_add(&c->lk);
120 } else {
121 pr_warn("failed to lookup clock node %s\n",
122 c->node_name);
123 }
124 }
125}
126
127struct clk_init_item {
128 struct device_node *node;
129 struct clk_hw *hw;
130 ti_of_clk_init_cb_t func;
131 struct list_head link;
132};
133
134static LIST_HEAD(retry_list);
135
136
137
138
139
140
141
142
143
144
145int __init ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
146 ti_of_clk_init_cb_t func)
147{
148 struct clk_init_item *retry;
149
150 pr_debug("%s: adding to retry list...\n", node->name);
151 retry = kzalloc(sizeof(*retry), GFP_KERNEL);
152 if (!retry)
153 return -ENOMEM;
154
155 retry->node = node;
156 retry->func = func;
157 retry->hw = hw;
158 list_add(&retry->link, &retry_list);
159
160 return 0;
161}
162
163
164
165
166
167
168
169
170
171
172
173int ti_clk_get_reg_addr(struct device_node *node, int index,
174 struct clk_omap_reg *reg)
175{
176 u32 val;
177 int i;
178
179 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
180 if (clocks_node_ptr[i] == node->parent)
181 break;
182 }
183
184 if (i == CLK_MAX_MEMMAPS) {
185 pr_err("clk-provider not found for %s!\n", node->name);
186 return -ENOENT;
187 }
188
189 reg->index = i;
190
191 if (of_property_read_u32_index(node, "reg", index, &val)) {
192 pr_err("%s must have reg[%d]!\n", node->name, index);
193 return -EINVAL;
194 }
195
196 reg->offset = val;
197 reg->ptr = NULL;
198
199 return 0;
200}
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216int __init omap2_clk_provider_init(struct device_node *parent, int index,
217 struct regmap *syscon, void __iomem *mem)
218{
219 struct device_node *clocks;
220 struct clk_iomap *io;
221
222
223 clocks = of_get_child_by_name(parent, "clocks");
224 if (!clocks) {
225 pr_err("%s missing 'clocks' child node.\n", parent->name);
226 return -EINVAL;
227 }
228
229
230 clocks_node_ptr[index] = clocks;
231
232 io = kzalloc(sizeof(*io), GFP_KERNEL);
233 if (!io)
234 return -ENOMEM;
235
236 io->regmap = syscon;
237 io->mem = mem;
238
239 clk_memmaps[index] = io;
240
241 return 0;
242}
243
244
245
246
247
248
249
250
251void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
252{
253 struct clk_iomap *io;
254
255 io = memblock_virt_alloc(sizeof(*io), 0);
256
257 io->mem = mem;
258
259 clk_memmaps[index] = io;
260}
261
262
263
264
265
266
267
268
269
270void ti_dt_clk_init_retry_clks(void)
271{
272 struct clk_init_item *retry;
273 struct clk_init_item *tmp;
274 int retries = 5;
275
276 while (!list_empty(&retry_list) && retries) {
277 list_for_each_entry_safe(retry, tmp, &retry_list, link) {
278 pr_debug("retry-init: %s\n", retry->node->name);
279 retry->func(retry->hw, retry->node);
280 list_del(&retry->link);
281 kfree(retry);
282 }
283 retries--;
284 }
285}
286
287#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
288void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
289{
290 while (*patch) {
291 memcpy((*patch)->patch, *patch, sizeof(**patch));
292 patch++;
293 }
294}
295
296struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
297{
298 struct clk *clk;
299 struct ti_clk_fixed *fixed;
300 struct ti_clk_fixed_factor *fixed_factor;
301 struct clk_hw *clk_hw;
302 int ret;
303
304 if (setup->clk)
305 return setup->clk;
306
307 switch (setup->type) {
308 case TI_CLK_FIXED:
309 fixed = setup->data;
310
311 clk = clk_register_fixed_rate(NULL, setup->name, NULL, 0,
312 fixed->frequency);
313 if (!IS_ERR(clk)) {
314 ret = ti_clk_add_alias(NULL, clk, setup->name);
315 if (ret) {
316 clk_unregister(clk);
317 clk = ERR_PTR(ret);
318 }
319 }
320 break;
321 case TI_CLK_MUX:
322 clk = ti_clk_register_mux(setup);
323 break;
324 case TI_CLK_DIVIDER:
325 clk = ti_clk_register_divider(setup);
326 break;
327 case TI_CLK_COMPOSITE:
328 clk = ti_clk_register_composite(setup);
329 break;
330 case TI_CLK_FIXED_FACTOR:
331 fixed_factor = setup->data;
332
333 clk = clk_register_fixed_factor(NULL, setup->name,
334 fixed_factor->parent,
335 0, fixed_factor->mult,
336 fixed_factor->div);
337 if (!IS_ERR(clk)) {
338 ret = ti_clk_add_alias(NULL, clk, setup->name);
339 if (ret) {
340 clk_unregister(clk);
341 clk = ERR_PTR(ret);
342 }
343 }
344 break;
345 case TI_CLK_GATE:
346 clk = ti_clk_register_gate(setup);
347 break;
348 case TI_CLK_DPLL:
349 clk = ti_clk_register_dpll(setup);
350 break;
351 default:
352 pr_err("bad type for %s!\n", setup->name);
353 clk = ERR_PTR(-EINVAL);
354 }
355
356 if (!IS_ERR(clk)) {
357 setup->clk = clk;
358 if (setup->clkdm_name) {
359 clk_hw = __clk_get_hw(clk);
360 if (clk_hw_get_flags(clk_hw) & CLK_IS_BASIC) {
361 pr_warn("can't setup clkdm for basic clk %s\n",
362 setup->name);
363 } else {
364 to_clk_hw_omap(clk_hw)->clkdm_name =
365 setup->clkdm_name;
366 omap2_init_clk_clkdm(clk_hw);
367 }
368 }
369 }
370
371 return clk;
372}
373
374int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
375{
376 struct clk *clk;
377 bool retry;
378 struct ti_clk_alias *retry_clk;
379 struct ti_clk_alias *tmp;
380
381 while (clks->clk) {
382 clk = ti_clk_register_clk(clks->clk);
383 if (IS_ERR(clk)) {
384 if (PTR_ERR(clk) == -EAGAIN) {
385 list_add(&clks->link, &retry_list);
386 } else {
387 pr_err("register for %s failed: %ld\n",
388 clks->clk->name, PTR_ERR(clk));
389 return PTR_ERR(clk);
390 }
391 }
392 clks++;
393 }
394
395 retry = true;
396
397 while (!list_empty(&retry_list) && retry) {
398 retry = false;
399 list_for_each_entry_safe(retry_clk, tmp, &retry_list, link) {
400 pr_debug("retry-init: %s\n", retry_clk->clk->name);
401 clk = ti_clk_register_clk(retry_clk->clk);
402 if (IS_ERR(clk)) {
403 if (PTR_ERR(clk) == -EAGAIN) {
404 continue;
405 } else {
406 pr_err("register for %s failed: %ld\n",
407 retry_clk->clk->name,
408 PTR_ERR(clk));
409 return PTR_ERR(clk);
410 }
411 } else {
412 retry = true;
413 list_del(&retry_clk->link);
414 }
415 }
416 }
417
418 return 0;
419}
420#endif
421
422static const struct of_device_id simple_clk_match_table[] __initconst = {
423 { .compatible = "fixed-clock" },
424 { .compatible = "fixed-factor-clock" },
425 { }
426};
427
428
429
430
431
432
433void __init ti_clk_add_aliases(void)
434{
435 struct device_node *np;
436 struct clk *clk;
437
438 for_each_matching_node(np, simple_clk_match_table) {
439 struct of_phandle_args clkspec;
440
441 clkspec.np = np;
442 clk = of_clk_get_from_provider(&clkspec);
443
444 ti_clk_add_alias(NULL, clk, np->name);
445 }
446}
447
448
449
450
451
452
453
454
455void __init ti_clk_setup_features(struct ti_clk_features *features)
456{
457 memcpy(&ti_clk_features, features, sizeof(*features));
458}
459
460
461
462
463
464
465
466const struct ti_clk_features *ti_clk_get_features(void)
467{
468 return &ti_clk_features;
469}
470
471
472
473
474
475
476
477
478
479
480
481void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
482{
483 struct clk *init_clk;
484 int i;
485
486 for (i = 0; i < num_clocks; i++) {
487 init_clk = clk_get(NULL, clk_names[i]);
488 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
489 clk_names[i]))
490 continue;
491 clk_prepare_enable(init_clk);
492 }
493}
494
495
496
497
498
499
500
501
502
503
504
505int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
506{
507 struct clk_lookup *cl;
508
509 if (!clk)
510 return 0;
511
512 if (IS_ERR(clk))
513 return PTR_ERR(clk);
514
515 cl = kzalloc(sizeof(*cl), GFP_KERNEL);
516 if (!cl)
517 return -ENOMEM;
518
519 if (dev)
520 cl->dev_id = dev_name(dev);
521 cl->con_id = con;
522 cl->clk = clk;
523
524 clkdev_add(cl);
525
526 return 0;
527}
528
529
530
531
532
533
534
535
536
537
538
539struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
540 const char *con)
541{
542 struct clk *clk;
543 int ret;
544
545 clk = clk_register(dev, hw);
546 if (IS_ERR(clk))
547 return clk;
548
549 ret = ti_clk_add_alias(dev, clk, con);
550 if (ret) {
551 clk_unregister(clk);
552 return ERR_PTR(ret);
553 }
554
555 return clk;
556}
557