LXR linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory

   1/*
   2 * Copyright 2013-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#include "dm_services.h"
  27#include "include/gpio_types.h"
  28#include "../hw_factory.h"
  29
  30#include "hw_factory_dce110.h"
  31
  32#include "dce/dce_11_0_d.h"
  33#include "dce/dce_11_0_sh_mask.h"
  34
  35/* set field name */
  36#define SF_HPD(reg_name, field_name, post_fix)\
  37        .field_name = reg_name ## __ ## field_name ## post_fix
  38
  39#define REG(reg_name)\
  40                mm ## reg_name
  41
  42#define REGI(reg_name, block, id)\
  43        mm ## block ## id ## _ ## reg_name
  44
  45#include "../hw_gpio.h"
  46#include "../hw_ddc.h"
  47#include "../hw_hpd.h"
  48
  49#include "reg_helper.h"
  50#include "../hpd_regs.h"
  51
  52#define hpd_regs(id) \
  53{\
  54        HPD_REG_LIST(id)\
  55}
  56
  57static const struct hpd_registers hpd_regs[] = {
  58        hpd_regs(0),
  59        hpd_regs(1),
  60        hpd_regs(2),
  61        hpd_regs(3),
  62        hpd_regs(4),
  63        hpd_regs(5)
  64};
  65
  66static const struct hpd_sh_mask hpd_shift = {
  67                HPD_MASK_SH_LIST(__SHIFT)
  68};
  69
  70static const struct hpd_sh_mask hpd_mask = {
  71                HPD_MASK_SH_LIST(_MASK)
  72};
  73
  74#include "../ddc_regs.h"
  75
  76 /* set field name */
  77#define SF_DDC(reg_name, field_name, post_fix)\
  78        .field_name = reg_name ## __ ## field_name ## post_fix
  79
  80static const struct ddc_registers ddc_data_regs[] = {
  81        ddc_data_regs(1),
  82        ddc_data_regs(2),
  83        ddc_data_regs(3),
  84        ddc_data_regs(4),
  85        ddc_data_regs(5),
  86        ddc_data_regs(6),
  87        ddc_vga_data_regs,
  88        ddc_i2c_data_regs
  89};
  90
  91static const struct ddc_registers ddc_clk_regs[] = {
  92        ddc_clk_regs(1),
  93        ddc_clk_regs(2),
  94        ddc_clk_regs(3),
  95        ddc_clk_regs(4),
  96        ddc_clk_regs(5),
  97        ddc_clk_regs(6),
  98        ddc_vga_clk_regs,
  99        ddc_i2c_clk_regs
 100};
 101
 102static const struct ddc_sh_mask ddc_shift = {
 103                DDC_MASK_SH_LIST(__SHIFT)
 104};
 105
 106static const struct ddc_sh_mask ddc_mask = {
 107                DDC_MASK_SH_LIST(_MASK)
 108};
 109
 110static void define_ddc_registers(
 111                struct hw_gpio_pin *pin,
 112                uint32_t en)
 113{
 114        struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
 115
 116        switch (pin->id) {
 117        case GPIO_ID_DDC_DATA:
 118                ddc->regs = &ddc_data_regs[en];
 119                ddc->base.regs = &ddc_data_regs[en].gpio;
 120                break;
 121        case GPIO_ID_DDC_CLOCK:
 122                ddc->regs = &ddc_clk_regs[en];
 123                ddc->base.regs = &ddc_clk_regs[en].gpio;
 124                break;
 125        default:
 126                ASSERT_CRITICAL(false);
 127                return;
 128        }
 129
 130        ddc->shifts = &ddc_shift;
 131        ddc->masks = &ddc_mask;
 132
 133}
 134
 135static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en)
 136{
 137        struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin);
 138
 139        hpd->regs = &hpd_regs[en];
 140        hpd->shifts = &hpd_shift;
 141        hpd->masks = &hpd_mask;
 142        hpd->base.regs = &hpd_regs[en].gpio;
 143}
 144
 145static const struct hw_factory_funcs funcs = {
 146        .create_ddc_data = dal_hw_ddc_create,
 147        .create_ddc_clock = dal_hw_ddc_create,
 148        .create_generic = NULL,
 149        .create_hpd = dal_hw_hpd_create,
 150        .create_sync = NULL,
 151        .create_gsl = NULL,
 152        .define_hpd_registers = define_hpd_registers,
 153        .define_ddc_registers = define_ddc_registers
 154};
 155
 156/*
 157 * dal_hw_factory_dce110_init
 158 *
 159 * @brief
 160 * Initialize HW factory function pointers and pin info
 161 *
 162 * @param
 163 * struct hw_factory *factory - [out] struct of function pointers
 164 */
 165void dal_hw_factory_dce110_init(struct hw_factory *factory)
 166{
 167        /*TODO check ASIC CAPs*/
 168        factory->number_of_pins[GPIO_ID_DDC_DATA] = 8;
 169        factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8;
 170        factory->number_of_pins[GPIO_ID_GENERIC] = 7;
 171        factory->number_of_pins[GPIO_ID_HPD] = 6;
 172        factory->number_of_pins[GPIO_ID_GPIO_PAD] = 31;
 173        factory->number_of_pins[GPIO_ID_VIP_PAD] = 0;
 174        factory->number_of_pins[GPIO_ID_SYNC] = 2;
 175        factory->number_of_pins[GPIO_ID_GSL] = 4;
 176
 177        factory->funcs = &funcs;
 178}
 179