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20#include <linux/err.h>
21#include <linux/i2c.h>
22#include <linux/module.h>
23#include <linux/delay.h>
24#include <linux/sysfs.h>
25#include <linux/of.h>
26
27#include <linux/iio/iio.h>
28#include <linux/iio/sysfs.h>
29
30
31#define MCP3422_CHANNEL_MASK 0x60
32#define MCP3422_PGA_MASK 0x03
33#define MCP3422_SRATE_MASK 0x0C
34#define MCP3422_SRATE_240 0x0
35#define MCP3422_SRATE_60 0x1
36#define MCP3422_SRATE_15 0x2
37#define MCP3422_SRATE_3 0x3
38#define MCP3422_PGA_1 0
39#define MCP3422_PGA_2 1
40#define MCP3422_PGA_4 2
41#define MCP3422_PGA_8 3
42#define MCP3422_CONT_SAMPLING 0x10
43
44#define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
45#define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
46#define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
47
48#define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
49#define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
50#define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
51
52#define MCP3422_CHAN(_index) \
53 { \
54 .type = IIO_VOLTAGE, \
55 .indexed = 1, \
56 .channel = _index, \
57 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
58 | BIT(IIO_CHAN_INFO_SCALE), \
59 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
60 }
61
62static const int mcp3422_scales[4][4] = {
63 { 1000000, 500000, 250000, 125000 },
64 { 250000, 125000, 62500, 31250 },
65 { 62500, 31250, 15625, 7812 },
66 { 15625, 7812, 3906, 1953 } };
67
68
69static const int mcp3422_read_times[4] = {
70 [MCP3422_SRATE_240] = 1000 / 240,
71 [MCP3422_SRATE_60] = 1000 / 60,
72 [MCP3422_SRATE_15] = 1000 / 15,
73 [MCP3422_SRATE_3] = 1000 / 3 };
74
75
76static const int mcp3422_sample_rates[4] = {
77 [MCP3422_SRATE_240] = 240,
78 [MCP3422_SRATE_60] = 60,
79 [MCP3422_SRATE_15] = 15,
80 [MCP3422_SRATE_3] = 3 };
81
82
83static const int mcp3422_sign_extend[4] = {
84 [MCP3422_SRATE_240] = 11,
85 [MCP3422_SRATE_60] = 13,
86 [MCP3422_SRATE_15] = 15,
87 [MCP3422_SRATE_3] = 17 };
88
89
90struct mcp3422 {
91 struct i2c_client *i2c;
92 u8 id;
93 u8 config;
94 u8 pga[4];
95 struct mutex lock;
96};
97
98static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
99{
100 int ret;
101
102 mutex_lock(&adc->lock);
103
104 ret = i2c_master_send(adc->i2c, &newconfig, 1);
105 if (ret > 0) {
106 adc->config = newconfig;
107 ret = 0;
108 }
109
110 mutex_unlock(&adc->lock);
111
112 return ret;
113}
114
115static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
116{
117 int ret = 0;
118 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
119 u8 buf[4] = {0, 0, 0, 0};
120 u32 temp;
121
122 if (sample_rate == MCP3422_SRATE_3) {
123 ret = i2c_master_recv(adc->i2c, buf, 4);
124 temp = buf[0] << 16 | buf[1] << 8 | buf[2];
125 *config = buf[3];
126 } else {
127 ret = i2c_master_recv(adc->i2c, buf, 3);
128 temp = buf[0] << 8 | buf[1];
129 *config = buf[2];
130 }
131
132 *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
133
134 return ret;
135}
136
137static int mcp3422_read_channel(struct mcp3422 *adc,
138 struct iio_chan_spec const *channel, int *value)
139{
140 int ret;
141 u8 config;
142 u8 req_channel = channel->channel;
143
144 if (req_channel != MCP3422_CHANNEL(adc->config)) {
145 config = adc->config;
146 config &= ~MCP3422_CHANNEL_MASK;
147 config |= MCP3422_CHANNEL_VALUE(req_channel);
148 config &= ~MCP3422_PGA_MASK;
149 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
150 ret = mcp3422_update_config(adc, config);
151 if (ret < 0)
152 return ret;
153 msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
154 }
155
156 return mcp3422_read(adc, value, &config);
157}
158
159static int mcp3422_read_raw(struct iio_dev *iio,
160 struct iio_chan_spec const *channel, int *val1,
161 int *val2, long mask)
162{
163 struct mcp3422 *adc = iio_priv(iio);
164 int err;
165
166 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
167 u8 pga = MCP3422_PGA(adc->config);
168
169 switch (mask) {
170 case IIO_CHAN_INFO_RAW:
171 err = mcp3422_read_channel(adc, channel, val1);
172 if (err < 0)
173 return -EINVAL;
174 return IIO_VAL_INT;
175
176 case IIO_CHAN_INFO_SCALE:
177
178 *val1 = 0;
179 *val2 = mcp3422_scales[sample_rate][pga];
180 return IIO_VAL_INT_PLUS_NANO;
181
182 case IIO_CHAN_INFO_SAMP_FREQ:
183 *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
184 return IIO_VAL_INT;
185
186 default:
187 break;
188 }
189
190 return -EINVAL;
191}
192
193static int mcp3422_write_raw(struct iio_dev *iio,
194 struct iio_chan_spec const *channel, int val1,
195 int val2, long mask)
196{
197 struct mcp3422 *adc = iio_priv(iio);
198 u8 temp;
199 u8 config = adc->config;
200 u8 req_channel = channel->channel;
201 u8 sample_rate = MCP3422_SAMPLE_RATE(config);
202 u8 i;
203
204 switch (mask) {
205 case IIO_CHAN_INFO_SCALE:
206 if (val1 != 0)
207 return -EINVAL;
208
209 for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
210 if (val2 == mcp3422_scales[sample_rate][i]) {
211 adc->pga[req_channel] = i;
212
213 config &= ~MCP3422_CHANNEL_MASK;
214 config |= MCP3422_CHANNEL_VALUE(req_channel);
215 config &= ~MCP3422_PGA_MASK;
216 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
217
218 return mcp3422_update_config(adc, config);
219 }
220 }
221 return -EINVAL;
222
223 case IIO_CHAN_INFO_SAMP_FREQ:
224 switch (val1) {
225 case 240:
226 temp = MCP3422_SRATE_240;
227 break;
228 case 60:
229 temp = MCP3422_SRATE_60;
230 break;
231 case 15:
232 temp = MCP3422_SRATE_15;
233 break;
234 case 3:
235 if (adc->id > 4)
236 return -EINVAL;
237 temp = MCP3422_SRATE_3;
238 break;
239 default:
240 return -EINVAL;
241 }
242
243 config &= ~MCP3422_CHANNEL_MASK;
244 config |= MCP3422_CHANNEL_VALUE(req_channel);
245 config &= ~MCP3422_SRATE_MASK;
246 config |= MCP3422_SAMPLE_RATE_VALUE(temp);
247
248 return mcp3422_update_config(adc, config);
249
250 default:
251 break;
252 }
253
254 return -EINVAL;
255}
256
257static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
258 struct iio_chan_spec const *chan, long mask)
259{
260 switch (mask) {
261 case IIO_CHAN_INFO_SCALE:
262 return IIO_VAL_INT_PLUS_NANO;
263 case IIO_CHAN_INFO_SAMP_FREQ:
264 return IIO_VAL_INT_PLUS_MICRO;
265 default:
266 return -EINVAL;
267 }
268}
269
270static ssize_t mcp3422_show_samp_freqs(struct device *dev,
271 struct device_attribute *attr, char *buf)
272{
273 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
274
275 if (adc->id > 4)
276 return sprintf(buf, "240 60 15\n");
277
278 return sprintf(buf, "240 60 15 3\n");
279}
280
281static ssize_t mcp3422_show_scales(struct device *dev,
282 struct device_attribute *attr, char *buf)
283{
284 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
285 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
286
287 return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
288 mcp3422_scales[sample_rate][0],
289 mcp3422_scales[sample_rate][1],
290 mcp3422_scales[sample_rate][2],
291 mcp3422_scales[sample_rate][3]);
292}
293
294static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
295 mcp3422_show_samp_freqs, NULL, 0);
296static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
297 mcp3422_show_scales, NULL, 0);
298
299static struct attribute *mcp3422_attributes[] = {
300 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
301 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
302 NULL,
303};
304
305static const struct attribute_group mcp3422_attribute_group = {
306 .attrs = mcp3422_attributes,
307};
308
309static const struct iio_chan_spec mcp3421_channels[] = {
310 MCP3422_CHAN(0),
311};
312
313static const struct iio_chan_spec mcp3422_channels[] = {
314 MCP3422_CHAN(0),
315 MCP3422_CHAN(1),
316};
317
318static const struct iio_chan_spec mcp3424_channels[] = {
319 MCP3422_CHAN(0),
320 MCP3422_CHAN(1),
321 MCP3422_CHAN(2),
322 MCP3422_CHAN(3),
323};
324
325static const struct iio_info mcp3422_info = {
326 .read_raw = mcp3422_read_raw,
327 .write_raw = mcp3422_write_raw,
328 .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
329 .attrs = &mcp3422_attribute_group,
330};
331
332static int mcp3422_probe(struct i2c_client *client,
333 const struct i2c_device_id *id)
334{
335 struct iio_dev *indio_dev;
336 struct mcp3422 *adc;
337 int err;
338 u8 config;
339
340 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
341 return -EOPNOTSUPP;
342
343 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
344 if (!indio_dev)
345 return -ENOMEM;
346
347 adc = iio_priv(indio_dev);
348 adc->i2c = client;
349 adc->id = (u8)(id->driver_data);
350
351 mutex_init(&adc->lock);
352
353 indio_dev->dev.parent = &client->dev;
354 indio_dev->dev.of_node = client->dev.of_node;
355 indio_dev->name = dev_name(&client->dev);
356 indio_dev->modes = INDIO_DIRECT_MODE;
357 indio_dev->info = &mcp3422_info;
358
359 switch (adc->id) {
360 case 1:
361 case 5:
362 indio_dev->channels = mcp3421_channels;
363 indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
364 break;
365 case 2:
366 case 3:
367 case 6:
368 case 7:
369 indio_dev->channels = mcp3422_channels;
370 indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
371 break;
372 case 4:
373 case 8:
374 indio_dev->channels = mcp3424_channels;
375 indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
376 break;
377 }
378
379
380 config = (MCP3422_CONT_SAMPLING
381 | MCP3422_CHANNEL_VALUE(0)
382 | MCP3422_PGA_VALUE(MCP3422_PGA_1)
383 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
384 err = mcp3422_update_config(adc, config);
385 if (err < 0)
386 return err;
387
388 err = devm_iio_device_register(&client->dev, indio_dev);
389 if (err < 0)
390 return err;
391
392 i2c_set_clientdata(client, indio_dev);
393
394 return 0;
395}
396
397static const struct i2c_device_id mcp3422_id[] = {
398 { "mcp3421", 1 },
399 { "mcp3422", 2 },
400 { "mcp3423", 3 },
401 { "mcp3424", 4 },
402 { "mcp3425", 5 },
403 { "mcp3426", 6 },
404 { "mcp3427", 7 },
405 { "mcp3428", 8 },
406 { }
407};
408MODULE_DEVICE_TABLE(i2c, mcp3422_id);
409
410#ifdef CONFIG_OF
411static const struct of_device_id mcp3422_of_match[] = {
412 { .compatible = "mcp3422" },
413 { }
414};
415MODULE_DEVICE_TABLE(of, mcp3422_of_match);
416#endif
417
418static struct i2c_driver mcp3422_driver = {
419 .driver = {
420 .name = "mcp3422",
421 .of_match_table = of_match_ptr(mcp3422_of_match),
422 },
423 .probe = mcp3422_probe,
424 .id_table = mcp3422_id,
425};
426module_i2c_driver(mcp3422_driver);
427
428MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
429MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
430MODULE_LICENSE("GPL v2");
431
