linux/drivers/infiniband/hw/bnxt_re/ib_verbs.c
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   1/*
   2 * Broadcom NetXtreme-E RoCE driver.
   3 *
   4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved.  The term
   5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
   6 *
   7 * This software is available to you under a choice of one of two
   8 * licenses.  You may choose to be licensed under the terms of the GNU
   9 * General Public License (GPL) Version 2, available from the file
  10 * COPYING in the main directory of this source tree, or the
  11 * BSD license below:
  12 *
  13 * Redistribution and use in source and binary forms, with or without
  14 * modification, are permitted provided that the following conditions
  15 * are met:
  16 *
  17 * 1. Redistributions of source code must retain the above copyright
  18 *    notice, this list of conditions and the following disclaimer.
  19 * 2. Redistributions in binary form must reproduce the above copyright
  20 *    notice, this list of conditions and the following disclaimer in
  21 *    the documentation and/or other materials provided with the
  22 *    distribution.
  23 *
  24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35 *
  36 * Description: IB Verbs interpreter
  37 */
  38
  39#include <linux/interrupt.h>
  40#include <linux/types.h>
  41#include <linux/pci.h>
  42#include <linux/netdevice.h>
  43#include <linux/if_ether.h>
  44
  45#include <rdma/ib_verbs.h>
  46#include <rdma/ib_user_verbs.h>
  47#include <rdma/ib_umem.h>
  48#include <rdma/ib_addr.h>
  49#include <rdma/ib_mad.h>
  50#include <rdma/ib_cache.h>
  51
  52#include "bnxt_ulp.h"
  53
  54#include "roce_hsi.h"
  55#include "qplib_res.h"
  56#include "qplib_sp.h"
  57#include "qplib_fp.h"
  58#include "qplib_rcfw.h"
  59
  60#include "bnxt_re.h"
  61#include "ib_verbs.h"
  62#include <rdma/bnxt_re-abi.h>
  63
  64static int __from_ib_access_flags(int iflags)
  65{
  66        int qflags = 0;
  67
  68        if (iflags & IB_ACCESS_LOCAL_WRITE)
  69                qflags |= BNXT_QPLIB_ACCESS_LOCAL_WRITE;
  70        if (iflags & IB_ACCESS_REMOTE_READ)
  71                qflags |= BNXT_QPLIB_ACCESS_REMOTE_READ;
  72        if (iflags & IB_ACCESS_REMOTE_WRITE)
  73                qflags |= BNXT_QPLIB_ACCESS_REMOTE_WRITE;
  74        if (iflags & IB_ACCESS_REMOTE_ATOMIC)
  75                qflags |= BNXT_QPLIB_ACCESS_REMOTE_ATOMIC;
  76        if (iflags & IB_ACCESS_MW_BIND)
  77                qflags |= BNXT_QPLIB_ACCESS_MW_BIND;
  78        if (iflags & IB_ZERO_BASED)
  79                qflags |= BNXT_QPLIB_ACCESS_ZERO_BASED;
  80        if (iflags & IB_ACCESS_ON_DEMAND)
  81                qflags |= BNXT_QPLIB_ACCESS_ON_DEMAND;
  82        return qflags;
  83};
  84
  85static enum ib_access_flags __to_ib_access_flags(int qflags)
  86{
  87        enum ib_access_flags iflags = 0;
  88
  89        if (qflags & BNXT_QPLIB_ACCESS_LOCAL_WRITE)
  90                iflags |= IB_ACCESS_LOCAL_WRITE;
  91        if (qflags & BNXT_QPLIB_ACCESS_REMOTE_WRITE)
  92                iflags |= IB_ACCESS_REMOTE_WRITE;
  93        if (qflags & BNXT_QPLIB_ACCESS_REMOTE_READ)
  94                iflags |= IB_ACCESS_REMOTE_READ;
  95        if (qflags & BNXT_QPLIB_ACCESS_REMOTE_ATOMIC)
  96                iflags |= IB_ACCESS_REMOTE_ATOMIC;
  97        if (qflags & BNXT_QPLIB_ACCESS_MW_BIND)
  98                iflags |= IB_ACCESS_MW_BIND;
  99        if (qflags & BNXT_QPLIB_ACCESS_ZERO_BASED)
 100                iflags |= IB_ZERO_BASED;
 101        if (qflags & BNXT_QPLIB_ACCESS_ON_DEMAND)
 102                iflags |= IB_ACCESS_ON_DEMAND;
 103        return iflags;
 104};
 105
 106static int bnxt_re_build_sgl(struct ib_sge *ib_sg_list,
 107                             struct bnxt_qplib_sge *sg_list, int num)
 108{
 109        int i, total = 0;
 110
 111        for (i = 0; i < num; i++) {
 112                sg_list[i].addr = ib_sg_list[i].addr;
 113                sg_list[i].lkey = ib_sg_list[i].lkey;
 114                sg_list[i].size = ib_sg_list[i].length;
 115                total += sg_list[i].size;
 116        }
 117        return total;
 118}
 119
 120/* Device */
 121struct net_device *bnxt_re_get_netdev(struct ib_device *ibdev, u8 port_num)
 122{
 123        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 124        struct net_device *netdev = NULL;
 125
 126        rcu_read_lock();
 127        if (rdev)
 128                netdev = rdev->netdev;
 129        if (netdev)
 130                dev_hold(netdev);
 131
 132        rcu_read_unlock();
 133        return netdev;
 134}
 135
 136int bnxt_re_query_device(struct ib_device *ibdev,
 137                         struct ib_device_attr *ib_attr,
 138                         struct ib_udata *udata)
 139{
 140        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 141        struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
 142
 143        memset(ib_attr, 0, sizeof(*ib_attr));
 144
 145        ib_attr->fw_ver = (u64)(unsigned long)(dev_attr->fw_ver);
 146        bnxt_qplib_get_guid(rdev->netdev->dev_addr,
 147                            (u8 *)&ib_attr->sys_image_guid);
 148        ib_attr->max_mr_size = BNXT_RE_MAX_MR_SIZE;
 149        ib_attr->page_size_cap = BNXT_RE_PAGE_SIZE_4K;
 150
 151        ib_attr->vendor_id = rdev->en_dev->pdev->vendor;
 152        ib_attr->vendor_part_id = rdev->en_dev->pdev->device;
 153        ib_attr->hw_ver = rdev->en_dev->pdev->subsystem_device;
 154        ib_attr->max_qp = dev_attr->max_qp;
 155        ib_attr->max_qp_wr = dev_attr->max_qp_wqes;
 156        ib_attr->device_cap_flags =
 157                                    IB_DEVICE_CURR_QP_STATE_MOD
 158                                    | IB_DEVICE_RC_RNR_NAK_GEN
 159                                    | IB_DEVICE_SHUTDOWN_PORT
 160                                    | IB_DEVICE_SYS_IMAGE_GUID
 161                                    | IB_DEVICE_LOCAL_DMA_LKEY
 162                                    | IB_DEVICE_RESIZE_MAX_WR
 163                                    | IB_DEVICE_PORT_ACTIVE_EVENT
 164                                    | IB_DEVICE_N_NOTIFY_CQ
 165                                    | IB_DEVICE_MEM_WINDOW
 166                                    | IB_DEVICE_MEM_WINDOW_TYPE_2B
 167                                    | IB_DEVICE_MEM_MGT_EXTENSIONS;
 168        ib_attr->max_sge = dev_attr->max_qp_sges;
 169        ib_attr->max_sge_rd = dev_attr->max_qp_sges;
 170        ib_attr->max_cq = dev_attr->max_cq;
 171        ib_attr->max_cqe = dev_attr->max_cq_wqes;
 172        ib_attr->max_mr = dev_attr->max_mr;
 173        ib_attr->max_pd = dev_attr->max_pd;
 174        ib_attr->max_qp_rd_atom = dev_attr->max_qp_rd_atom;
 175        ib_attr->max_qp_init_rd_atom = dev_attr->max_qp_init_rd_atom;
 176        if (dev_attr->is_atomic) {
 177                ib_attr->atomic_cap = IB_ATOMIC_HCA;
 178                ib_attr->masked_atomic_cap = IB_ATOMIC_HCA;
 179        }
 180
 181        ib_attr->max_ee_rd_atom = 0;
 182        ib_attr->max_res_rd_atom = 0;
 183        ib_attr->max_ee_init_rd_atom = 0;
 184        ib_attr->max_ee = 0;
 185        ib_attr->max_rdd = 0;
 186        ib_attr->max_mw = dev_attr->max_mw;
 187        ib_attr->max_raw_ipv6_qp = 0;
 188        ib_attr->max_raw_ethy_qp = dev_attr->max_raw_ethy_qp;
 189        ib_attr->max_mcast_grp = 0;
 190        ib_attr->max_mcast_qp_attach = 0;
 191        ib_attr->max_total_mcast_qp_attach = 0;
 192        ib_attr->max_ah = dev_attr->max_ah;
 193
 194        ib_attr->max_fmr = 0;
 195        ib_attr->max_map_per_fmr = 0;
 196
 197        ib_attr->max_srq = dev_attr->max_srq;
 198        ib_attr->max_srq_wr = dev_attr->max_srq_wqes;
 199        ib_attr->max_srq_sge = dev_attr->max_srq_sges;
 200
 201        ib_attr->max_fast_reg_page_list_len = MAX_PBL_LVL_1_PGS;
 202
 203        ib_attr->max_pkeys = 1;
 204        ib_attr->local_ca_ack_delay = BNXT_RE_DEFAULT_ACK_DELAY;
 205        return 0;
 206}
 207
 208int bnxt_re_modify_device(struct ib_device *ibdev,
 209                          int device_modify_mask,
 210                          struct ib_device_modify *device_modify)
 211{
 212        switch (device_modify_mask) {
 213        case IB_DEVICE_MODIFY_SYS_IMAGE_GUID:
 214                /* Modify the GUID requires the modification of the GID table */
 215                /* GUID should be made as READ-ONLY */
 216                break;
 217        case IB_DEVICE_MODIFY_NODE_DESC:
 218                /* Node Desc should be made as READ-ONLY */
 219                break;
 220        default:
 221                break;
 222        }
 223        return 0;
 224}
 225
 226/* Port */
 227int bnxt_re_query_port(struct ib_device *ibdev, u8 port_num,
 228                       struct ib_port_attr *port_attr)
 229{
 230        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 231        struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
 232
 233        memset(port_attr, 0, sizeof(*port_attr));
 234
 235        if (netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev)) {
 236                port_attr->state = IB_PORT_ACTIVE;
 237                port_attr->phys_state = 5;
 238        } else {
 239                port_attr->state = IB_PORT_DOWN;
 240                port_attr->phys_state = 3;
 241        }
 242        port_attr->max_mtu = IB_MTU_4096;
 243        port_attr->active_mtu = iboe_get_mtu(rdev->netdev->mtu);
 244        port_attr->gid_tbl_len = dev_attr->max_sgid;
 245        port_attr->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 246                                    IB_PORT_DEVICE_MGMT_SUP |
 247                                    IB_PORT_VENDOR_CLASS_SUP |
 248                                    IB_PORT_IP_BASED_GIDS;
 249
 250        /* Max MSG size set to 2G for now */
 251        port_attr->max_msg_sz = 0x80000000;
 252        port_attr->bad_pkey_cntr = 0;
 253        port_attr->qkey_viol_cntr = 0;
 254        port_attr->pkey_tbl_len = dev_attr->max_pkey;
 255        port_attr->lid = 0;
 256        port_attr->sm_lid = 0;
 257        port_attr->lmc = 0;
 258        port_attr->max_vl_num = 4;
 259        port_attr->sm_sl = 0;
 260        port_attr->subnet_timeout = 0;
 261        port_attr->init_type_reply = 0;
 262        port_attr->active_speed = rdev->active_speed;
 263        port_attr->active_width = rdev->active_width;
 264
 265        return 0;
 266}
 267
 268int bnxt_re_get_port_immutable(struct ib_device *ibdev, u8 port_num,
 269                               struct ib_port_immutable *immutable)
 270{
 271        struct ib_port_attr port_attr;
 272
 273        if (bnxt_re_query_port(ibdev, port_num, &port_attr))
 274                return -EINVAL;
 275
 276        immutable->pkey_tbl_len = port_attr.pkey_tbl_len;
 277        immutable->gid_tbl_len = port_attr.gid_tbl_len;
 278        immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
 279        immutable->core_cap_flags |= RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP;
 280        immutable->max_mad_size = IB_MGMT_MAD_SIZE;
 281        return 0;
 282}
 283
 284int bnxt_re_query_pkey(struct ib_device *ibdev, u8 port_num,
 285                       u16 index, u16 *pkey)
 286{
 287        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 288
 289        /* Ignore port_num */
 290
 291        memset(pkey, 0, sizeof(*pkey));
 292        return bnxt_qplib_get_pkey(&rdev->qplib_res,
 293                                   &rdev->qplib_res.pkey_tbl, index, pkey);
 294}
 295
 296int bnxt_re_query_gid(struct ib_device *ibdev, u8 port_num,
 297                      int index, union ib_gid *gid)
 298{
 299        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 300        int rc = 0;
 301
 302        /* Ignore port_num */
 303        memset(gid, 0, sizeof(*gid));
 304        rc = bnxt_qplib_get_sgid(&rdev->qplib_res,
 305                                 &rdev->qplib_res.sgid_tbl, index,
 306                                 (struct bnxt_qplib_gid *)gid);
 307        return rc;
 308}
 309
 310int bnxt_re_del_gid(struct ib_device *ibdev, u8 port_num,
 311                    unsigned int index, void **context)
 312{
 313        int rc = 0;
 314        struct bnxt_re_gid_ctx *ctx, **ctx_tbl;
 315        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 316        struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
 317        struct bnxt_qplib_gid *gid_to_del;
 318
 319        /* Delete the entry from the hardware */
 320        ctx = *context;
 321        if (!ctx)
 322                return -EINVAL;
 323
 324        if (sgid_tbl && sgid_tbl->active) {
 325                if (ctx->idx >= sgid_tbl->max)
 326                        return -EINVAL;
 327                gid_to_del = &sgid_tbl->tbl[ctx->idx];
 328                /* DEL_GID is called in WQ context(netdevice_event_work_handler)
 329                 * or via the ib_unregister_device path. In the former case QP1
 330                 * may not be destroyed yet, in which case just return as FW
 331                 * needs that entry to be present and will fail it's deletion.
 332                 * We could get invoked again after QP1 is destroyed OR get an
 333                 * ADD_GID call with a different GID value for the same index
 334                 * where we issue MODIFY_GID cmd to update the GID entry -- TBD
 335                 */
 336                if (ctx->idx == 0 &&
 337                    rdma_link_local_addr((struct in6_addr *)gid_to_del) &&
 338                    ctx->refcnt == 1 && rdev->qp1_sqp) {
 339                        dev_dbg(rdev_to_dev(rdev),
 340                                "Trying to delete GID0 while QP1 is alive\n");
 341                        return -EFAULT;
 342                }
 343                ctx->refcnt--;
 344                if (!ctx->refcnt) {
 345                        rc = bnxt_qplib_del_sgid(sgid_tbl, gid_to_del, true);
 346                        if (rc) {
 347                                dev_err(rdev_to_dev(rdev),
 348                                        "Failed to remove GID: %#x", rc);
 349                        } else {
 350                                ctx_tbl = sgid_tbl->ctx;
 351                                ctx_tbl[ctx->idx] = NULL;
 352                                kfree(ctx);
 353                        }
 354                }
 355        } else {
 356                return -EINVAL;
 357        }
 358        return rc;
 359}
 360
 361int bnxt_re_add_gid(struct ib_device *ibdev, u8 port_num,
 362                    unsigned int index, const union ib_gid *gid,
 363                    const struct ib_gid_attr *attr, void **context)
 364{
 365        int rc;
 366        u32 tbl_idx = 0;
 367        u16 vlan_id = 0xFFFF;
 368        struct bnxt_re_gid_ctx *ctx, **ctx_tbl;
 369        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 370        struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
 371
 372        if ((attr->ndev) && is_vlan_dev(attr->ndev))
 373                vlan_id = vlan_dev_vlan_id(attr->ndev);
 374
 375        rc = bnxt_qplib_add_sgid(sgid_tbl, (struct bnxt_qplib_gid *)gid,
 376                                 rdev->qplib_res.netdev->dev_addr,
 377                                 vlan_id, true, &tbl_idx);
 378        if (rc == -EALREADY) {
 379                ctx_tbl = sgid_tbl->ctx;
 380                ctx_tbl[tbl_idx]->refcnt++;
 381                *context = ctx_tbl[tbl_idx];
 382                return 0;
 383        }
 384
 385        if (rc < 0) {
 386                dev_err(rdev_to_dev(rdev), "Failed to add GID: %#x", rc);
 387                return rc;
 388        }
 389
 390        ctx = kmalloc(sizeof(*ctx), GFP_KERNEL);
 391        if (!ctx)
 392                return -ENOMEM;
 393        ctx_tbl = sgid_tbl->ctx;
 394        ctx->idx = tbl_idx;
 395        ctx->refcnt = 1;
 396        ctx_tbl[tbl_idx] = ctx;
 397        *context = ctx;
 398
 399        return rc;
 400}
 401
 402enum rdma_link_layer bnxt_re_get_link_layer(struct ib_device *ibdev,
 403                                            u8 port_num)
 404{
 405        return IB_LINK_LAYER_ETHERNET;
 406}
 407
 408#define BNXT_RE_FENCE_PBL_SIZE  DIV_ROUND_UP(BNXT_RE_FENCE_BYTES, PAGE_SIZE)
 409
 410static void bnxt_re_create_fence_wqe(struct bnxt_re_pd *pd)
 411{
 412        struct bnxt_re_fence_data *fence = &pd->fence;
 413        struct ib_mr *ib_mr = &fence->mr->ib_mr;
 414        struct bnxt_qplib_swqe *wqe = &fence->bind_wqe;
 415
 416        memset(wqe, 0, sizeof(*wqe));
 417        wqe->type = BNXT_QPLIB_SWQE_TYPE_BIND_MW;
 418        wqe->wr_id = BNXT_QPLIB_FENCE_WRID;
 419        wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP;
 420        wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_UC_FENCE;
 421        wqe->bind.zero_based = false;
 422        wqe->bind.parent_l_key = ib_mr->lkey;
 423        wqe->bind.va = (u64)(unsigned long)fence->va;
 424        wqe->bind.length = fence->size;
 425        wqe->bind.access_cntl = __from_ib_access_flags(IB_ACCESS_REMOTE_READ);
 426        wqe->bind.mw_type = SQ_BIND_MW_TYPE_TYPE1;
 427
 428        /* Save the initial rkey in fence structure for now;
 429         * wqe->bind.r_key will be set at (re)bind time.
 430         */
 431        fence->bind_rkey = ib_inc_rkey(fence->mw->rkey);
 432}
 433
 434static int bnxt_re_bind_fence_mw(struct bnxt_qplib_qp *qplib_qp)
 435{
 436        struct bnxt_re_qp *qp = container_of(qplib_qp, struct bnxt_re_qp,
 437                                             qplib_qp);
 438        struct ib_pd *ib_pd = qp->ib_qp.pd;
 439        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
 440        struct bnxt_re_fence_data *fence = &pd->fence;
 441        struct bnxt_qplib_swqe *fence_wqe = &fence->bind_wqe;
 442        struct bnxt_qplib_swqe wqe;
 443        int rc;
 444
 445        memcpy(&wqe, fence_wqe, sizeof(wqe));
 446        wqe.bind.r_key = fence->bind_rkey;
 447        fence->bind_rkey = ib_inc_rkey(fence->bind_rkey);
 448
 449        dev_dbg(rdev_to_dev(qp->rdev),
 450                "Posting bind fence-WQE: rkey: %#x QP: %d PD: %p\n",
 451                wqe.bind.r_key, qp->qplib_qp.id, pd);
 452        rc = bnxt_qplib_post_send(&qp->qplib_qp, &wqe);
 453        if (rc) {
 454                dev_err(rdev_to_dev(qp->rdev), "Failed to bind fence-WQE\n");
 455                return rc;
 456        }
 457        bnxt_qplib_post_send_db(&qp->qplib_qp);
 458
 459        return rc;
 460}
 461
 462static void bnxt_re_destroy_fence_mr(struct bnxt_re_pd *pd)
 463{
 464        struct bnxt_re_fence_data *fence = &pd->fence;
 465        struct bnxt_re_dev *rdev = pd->rdev;
 466        struct device *dev = &rdev->en_dev->pdev->dev;
 467        struct bnxt_re_mr *mr = fence->mr;
 468
 469        if (fence->mw) {
 470                bnxt_re_dealloc_mw(fence->mw);
 471                fence->mw = NULL;
 472        }
 473        if (mr) {
 474                if (mr->ib_mr.rkey)
 475                        bnxt_qplib_dereg_mrw(&rdev->qplib_res, &mr->qplib_mr,
 476                                             true);
 477                if (mr->ib_mr.lkey)
 478                        bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr);
 479                kfree(mr);
 480                fence->mr = NULL;
 481        }
 482        if (fence->dma_addr) {
 483                dma_unmap_single(dev, fence->dma_addr, BNXT_RE_FENCE_BYTES,
 484                                 DMA_BIDIRECTIONAL);
 485                fence->dma_addr = 0;
 486        }
 487}
 488
 489static int bnxt_re_create_fence_mr(struct bnxt_re_pd *pd)
 490{
 491        int mr_access_flags = IB_ACCESS_LOCAL_WRITE | IB_ACCESS_MW_BIND;
 492        struct bnxt_re_fence_data *fence = &pd->fence;
 493        struct bnxt_re_dev *rdev = pd->rdev;
 494        struct device *dev = &rdev->en_dev->pdev->dev;
 495        struct bnxt_re_mr *mr = NULL;
 496        dma_addr_t dma_addr = 0;
 497        struct ib_mw *mw;
 498        u64 pbl_tbl;
 499        int rc;
 500
 501        dma_addr = dma_map_single(dev, fence->va, BNXT_RE_FENCE_BYTES,
 502                                  DMA_BIDIRECTIONAL);
 503        rc = dma_mapping_error(dev, dma_addr);
 504        if (rc) {
 505                dev_err(rdev_to_dev(rdev), "Failed to dma-map fence-MR-mem\n");
 506                rc = -EIO;
 507                fence->dma_addr = 0;
 508                goto fail;
 509        }
 510        fence->dma_addr = dma_addr;
 511
 512        /* Allocate a MR */
 513        mr = kzalloc(sizeof(*mr), GFP_KERNEL);
 514        if (!mr) {
 515                rc = -ENOMEM;
 516                goto fail;
 517        }
 518        fence->mr = mr;
 519        mr->rdev = rdev;
 520        mr->qplib_mr.pd = &pd->qplib_pd;
 521        mr->qplib_mr.type = CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR;
 522        mr->qplib_mr.flags = __from_ib_access_flags(mr_access_flags);
 523        rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr);
 524        if (rc) {
 525                dev_err(rdev_to_dev(rdev), "Failed to alloc fence-HW-MR\n");
 526                goto fail;
 527        }
 528
 529        /* Register MR */
 530        mr->ib_mr.lkey = mr->qplib_mr.lkey;
 531        mr->qplib_mr.va = (u64)(unsigned long)fence->va;
 532        mr->qplib_mr.total_size = BNXT_RE_FENCE_BYTES;
 533        pbl_tbl = dma_addr;
 534        rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &mr->qplib_mr, &pbl_tbl,
 535                               BNXT_RE_FENCE_PBL_SIZE, false);
 536        if (rc) {
 537                dev_err(rdev_to_dev(rdev), "Failed to register fence-MR\n");
 538                goto fail;
 539        }
 540        mr->ib_mr.rkey = mr->qplib_mr.rkey;
 541
 542        /* Create a fence MW only for kernel consumers */
 543        mw = bnxt_re_alloc_mw(&pd->ib_pd, IB_MW_TYPE_1, NULL);
 544        if (IS_ERR(mw)) {
 545                dev_err(rdev_to_dev(rdev),
 546                        "Failed to create fence-MW for PD: %p\n", pd);
 547                rc = PTR_ERR(mw);
 548                goto fail;
 549        }
 550        fence->mw = mw;
 551
 552        bnxt_re_create_fence_wqe(pd);
 553        return 0;
 554
 555fail:
 556        bnxt_re_destroy_fence_mr(pd);
 557        return rc;
 558}
 559
 560/* Protection Domains */
 561int bnxt_re_dealloc_pd(struct ib_pd *ib_pd)
 562{
 563        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
 564        struct bnxt_re_dev *rdev = pd->rdev;
 565        int rc;
 566
 567        bnxt_re_destroy_fence_mr(pd);
 568
 569        if (pd->qplib_pd.id) {
 570                rc = bnxt_qplib_dealloc_pd(&rdev->qplib_res,
 571                                           &rdev->qplib_res.pd_tbl,
 572                                           &pd->qplib_pd);
 573                if (rc)
 574                        dev_err(rdev_to_dev(rdev), "Failed to deallocate HW PD");
 575        }
 576
 577        kfree(pd);
 578        return 0;
 579}
 580
 581struct ib_pd *bnxt_re_alloc_pd(struct ib_device *ibdev,
 582                               struct ib_ucontext *ucontext,
 583                               struct ib_udata *udata)
 584{
 585        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
 586        struct bnxt_re_ucontext *ucntx = container_of(ucontext,
 587                                                      struct bnxt_re_ucontext,
 588                                                      ib_uctx);
 589        struct bnxt_re_pd *pd;
 590        int rc;
 591
 592        pd = kzalloc(sizeof(*pd), GFP_KERNEL);
 593        if (!pd)
 594                return ERR_PTR(-ENOMEM);
 595
 596        pd->rdev = rdev;
 597        if (bnxt_qplib_alloc_pd(&rdev->qplib_res.pd_tbl, &pd->qplib_pd)) {
 598                dev_err(rdev_to_dev(rdev), "Failed to allocate HW PD");
 599                rc = -ENOMEM;
 600                goto fail;
 601        }
 602
 603        if (udata) {
 604                struct bnxt_re_pd_resp resp;
 605
 606                if (!ucntx->dpi.dbr) {
 607                        /* Allocate DPI in alloc_pd to avoid failing of
 608                         * ibv_devinfo and family of application when DPIs
 609                         * are depleted.
 610                         */
 611                        if (bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
 612                                                 &ucntx->dpi, ucntx)) {
 613                                rc = -ENOMEM;
 614                                goto dbfail;
 615                        }
 616                }
 617
 618                resp.pdid = pd->qplib_pd.id;
 619                /* Still allow mapping this DBR to the new user PD. */
 620                resp.dpi = ucntx->dpi.dpi;
 621                resp.dbr = (u64)ucntx->dpi.umdbr;
 622
 623                rc = ib_copy_to_udata(udata, &resp, sizeof(resp));
 624                if (rc) {
 625                        dev_err(rdev_to_dev(rdev),
 626                                "Failed to copy user response\n");
 627                        goto dbfail;
 628                }
 629        }
 630
 631        if (!udata)
 632                if (bnxt_re_create_fence_mr(pd))
 633                        dev_warn(rdev_to_dev(rdev),
 634                                 "Failed to create Fence-MR\n");
 635        return &pd->ib_pd;
 636dbfail:
 637        (void)bnxt_qplib_dealloc_pd(&rdev->qplib_res, &rdev->qplib_res.pd_tbl,
 638                                    &pd->qplib_pd);
 639fail:
 640        kfree(pd);
 641        return ERR_PTR(rc);
 642}
 643
 644/* Address Handles */
 645int bnxt_re_destroy_ah(struct ib_ah *ib_ah)
 646{
 647        struct bnxt_re_ah *ah = container_of(ib_ah, struct bnxt_re_ah, ib_ah);
 648        struct bnxt_re_dev *rdev = ah->rdev;
 649        int rc;
 650
 651        rc = bnxt_qplib_destroy_ah(&rdev->qplib_res, &ah->qplib_ah);
 652        if (rc) {
 653                dev_err(rdev_to_dev(rdev), "Failed to destroy HW AH");
 654                return rc;
 655        }
 656        kfree(ah);
 657        return 0;
 658}
 659
 660struct ib_ah *bnxt_re_create_ah(struct ib_pd *ib_pd,
 661                                struct rdma_ah_attr *ah_attr,
 662                                struct ib_udata *udata)
 663{
 664        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
 665        struct bnxt_re_dev *rdev = pd->rdev;
 666        struct bnxt_re_ah *ah;
 667        const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
 668        int rc;
 669        u8 nw_type;
 670
 671        struct ib_gid_attr sgid_attr;
 672
 673        if (!(rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH)) {
 674                dev_err(rdev_to_dev(rdev), "Failed to alloc AH: GRH not set");
 675                return ERR_PTR(-EINVAL);
 676        }
 677        ah = kzalloc(sizeof(*ah), GFP_ATOMIC);
 678        if (!ah)
 679                return ERR_PTR(-ENOMEM);
 680
 681        ah->rdev = rdev;
 682        ah->qplib_ah.pd = &pd->qplib_pd;
 683
 684        /* Supply the configuration for the HW */
 685        memcpy(ah->qplib_ah.dgid.data, grh->dgid.raw,
 686               sizeof(union ib_gid));
 687        /*
 688         * If RoCE V2 is enabled, stack will have two entries for
 689         * each GID entry. Avoiding this duplicte entry in HW. Dividing
 690         * the GID index by 2 for RoCE V2
 691         */
 692        ah->qplib_ah.sgid_index = grh->sgid_index / 2;
 693        ah->qplib_ah.host_sgid_index = grh->sgid_index;
 694        ah->qplib_ah.traffic_class = grh->traffic_class;
 695        ah->qplib_ah.flow_label = grh->flow_label;
 696        ah->qplib_ah.hop_limit = grh->hop_limit;
 697        ah->qplib_ah.sl = rdma_ah_get_sl(ah_attr);
 698        if (ib_pd->uobject &&
 699            !rdma_is_multicast_addr((struct in6_addr *)
 700                                    grh->dgid.raw) &&
 701            !rdma_link_local_addr((struct in6_addr *)
 702                                  grh->dgid.raw)) {
 703                union ib_gid sgid;
 704
 705                rc = ib_get_cached_gid(&rdev->ibdev, 1,
 706                                       grh->sgid_index, &sgid,
 707                                       &sgid_attr);
 708                if (rc) {
 709                        dev_err(rdev_to_dev(rdev),
 710                                "Failed to query gid at index %d",
 711                                grh->sgid_index);
 712                        goto fail;
 713                }
 714                if (sgid_attr.ndev)
 715                        dev_put(sgid_attr.ndev);
 716                /* Get network header type for this GID */
 717                nw_type = ib_gid_to_network_type(sgid_attr.gid_type, &sgid);
 718                switch (nw_type) {
 719                case RDMA_NETWORK_IPV4:
 720                        ah->qplib_ah.nw_type = CMDQ_CREATE_AH_TYPE_V2IPV4;
 721                        break;
 722                case RDMA_NETWORK_IPV6:
 723                        ah->qplib_ah.nw_type = CMDQ_CREATE_AH_TYPE_V2IPV6;
 724                        break;
 725                default:
 726                        ah->qplib_ah.nw_type = CMDQ_CREATE_AH_TYPE_V1;
 727                        break;
 728                }
 729        }
 730
 731        memcpy(ah->qplib_ah.dmac, ah_attr->roce.dmac, ETH_ALEN);
 732        rc = bnxt_qplib_create_ah(&rdev->qplib_res, &ah->qplib_ah);
 733        if (rc) {
 734                dev_err(rdev_to_dev(rdev), "Failed to allocate HW AH");
 735                goto fail;
 736        }
 737
 738        /* Write AVID to shared page. */
 739        if (ib_pd->uobject) {
 740                struct ib_ucontext *ib_uctx = ib_pd->uobject->context;
 741                struct bnxt_re_ucontext *uctx;
 742                unsigned long flag;
 743                u32 *wrptr;
 744
 745                uctx = container_of(ib_uctx, struct bnxt_re_ucontext, ib_uctx);
 746                spin_lock_irqsave(&uctx->sh_lock, flag);
 747                wrptr = (u32 *)(uctx->shpg + BNXT_RE_AVID_OFFT);
 748                *wrptr = ah->qplib_ah.id;
 749                wmb(); /* make sure cache is updated. */
 750                spin_unlock_irqrestore(&uctx->sh_lock, flag);
 751        }
 752
 753        return &ah->ib_ah;
 754
 755fail:
 756        kfree(ah);
 757        return ERR_PTR(rc);
 758}
 759
 760int bnxt_re_modify_ah(struct ib_ah *ib_ah, struct rdma_ah_attr *ah_attr)
 761{
 762        return 0;
 763}
 764
 765int bnxt_re_query_ah(struct ib_ah *ib_ah, struct rdma_ah_attr *ah_attr)
 766{
 767        struct bnxt_re_ah *ah = container_of(ib_ah, struct bnxt_re_ah, ib_ah);
 768
 769        ah_attr->type = ib_ah->type;
 770        rdma_ah_set_sl(ah_attr, ah->qplib_ah.sl);
 771        memcpy(ah_attr->roce.dmac, ah->qplib_ah.dmac, ETH_ALEN);
 772        rdma_ah_set_grh(ah_attr, NULL, 0,
 773                        ah->qplib_ah.host_sgid_index,
 774                        0, ah->qplib_ah.traffic_class);
 775        rdma_ah_set_dgid_raw(ah_attr, ah->qplib_ah.dgid.data);
 776        rdma_ah_set_port_num(ah_attr, 1);
 777        rdma_ah_set_static_rate(ah_attr, 0);
 778        return 0;
 779}
 780
 781/* Queue Pairs */
 782int bnxt_re_destroy_qp(struct ib_qp *ib_qp)
 783{
 784        struct bnxt_re_qp *qp = container_of(ib_qp, struct bnxt_re_qp, ib_qp);
 785        struct bnxt_re_dev *rdev = qp->rdev;
 786        int rc;
 787
 788        bnxt_qplib_flush_cqn_wq(&qp->qplib_qp);
 789        bnxt_qplib_del_flush_qp(&qp->qplib_qp);
 790        rc = bnxt_qplib_destroy_qp(&rdev->qplib_res, &qp->qplib_qp);
 791        if (rc) {
 792                dev_err(rdev_to_dev(rdev), "Failed to destroy HW QP");
 793                return rc;
 794        }
 795        if (ib_qp->qp_type == IB_QPT_GSI && rdev->qp1_sqp) {
 796                rc = bnxt_qplib_destroy_ah(&rdev->qplib_res,
 797                                           &rdev->sqp_ah->qplib_ah);
 798                if (rc) {
 799                        dev_err(rdev_to_dev(rdev),
 800                                "Failed to destroy HW AH for shadow QP");
 801                        return rc;
 802                }
 803
 804                bnxt_qplib_del_flush_qp(&qp->qplib_qp);
 805                rc = bnxt_qplib_destroy_qp(&rdev->qplib_res,
 806                                           &rdev->qp1_sqp->qplib_qp);
 807                if (rc) {
 808                        dev_err(rdev_to_dev(rdev),
 809                                "Failed to destroy Shadow QP");
 810                        return rc;
 811                }
 812                mutex_lock(&rdev->qp_lock);
 813                list_del(&rdev->qp1_sqp->list);
 814                atomic_dec(&rdev->qp_count);
 815                mutex_unlock(&rdev->qp_lock);
 816
 817                kfree(rdev->sqp_ah);
 818                kfree(rdev->qp1_sqp);
 819                rdev->qp1_sqp = NULL;
 820                rdev->sqp_ah = NULL;
 821        }
 822
 823        if (!IS_ERR_OR_NULL(qp->rumem))
 824                ib_umem_release(qp->rumem);
 825        if (!IS_ERR_OR_NULL(qp->sumem))
 826                ib_umem_release(qp->sumem);
 827
 828        mutex_lock(&rdev->qp_lock);
 829        list_del(&qp->list);
 830        atomic_dec(&rdev->qp_count);
 831        mutex_unlock(&rdev->qp_lock);
 832        kfree(qp);
 833        return 0;
 834}
 835
 836static u8 __from_ib_qp_type(enum ib_qp_type type)
 837{
 838        switch (type) {
 839        case IB_QPT_GSI:
 840                return CMDQ_CREATE_QP1_TYPE_GSI;
 841        case IB_QPT_RC:
 842                return CMDQ_CREATE_QP_TYPE_RC;
 843        case IB_QPT_UD:
 844                return CMDQ_CREATE_QP_TYPE_UD;
 845        default:
 846                return IB_QPT_MAX;
 847        }
 848}
 849
 850static int bnxt_re_init_user_qp(struct bnxt_re_dev *rdev, struct bnxt_re_pd *pd,
 851                                struct bnxt_re_qp *qp, struct ib_udata *udata)
 852{
 853        struct bnxt_re_qp_req ureq;
 854        struct bnxt_qplib_qp *qplib_qp = &qp->qplib_qp;
 855        struct ib_umem *umem;
 856        int bytes = 0;
 857        struct ib_ucontext *context = pd->ib_pd.uobject->context;
 858        struct bnxt_re_ucontext *cntx = container_of(context,
 859                                                     struct bnxt_re_ucontext,
 860                                                     ib_uctx);
 861        if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
 862                return -EFAULT;
 863
 864        bytes = (qplib_qp->sq.max_wqe * BNXT_QPLIB_MAX_SQE_ENTRY_SIZE);
 865        /* Consider mapping PSN search memory only for RC QPs. */
 866        if (qplib_qp->type == CMDQ_CREATE_QP_TYPE_RC)
 867                bytes += (qplib_qp->sq.max_wqe * sizeof(struct sq_psn_search));
 868        bytes = PAGE_ALIGN(bytes);
 869        umem = ib_umem_get(context, ureq.qpsva, bytes,
 870                           IB_ACCESS_LOCAL_WRITE, 1);
 871        if (IS_ERR(umem))
 872                return PTR_ERR(umem);
 873
 874        qp->sumem = umem;
 875        qplib_qp->sq.sglist = umem->sg_head.sgl;
 876        qplib_qp->sq.nmap = umem->nmap;
 877        qplib_qp->qp_handle = ureq.qp_handle;
 878
 879        if (!qp->qplib_qp.srq) {
 880                bytes = (qplib_qp->rq.max_wqe * BNXT_QPLIB_MAX_RQE_ENTRY_SIZE);
 881                bytes = PAGE_ALIGN(bytes);
 882                umem = ib_umem_get(context, ureq.qprva, bytes,
 883                                   IB_ACCESS_LOCAL_WRITE, 1);
 884                if (IS_ERR(umem))
 885                        goto rqfail;
 886                qp->rumem = umem;
 887                qplib_qp->rq.sglist = umem->sg_head.sgl;
 888                qplib_qp->rq.nmap = umem->nmap;
 889        }
 890
 891        qplib_qp->dpi = &cntx->dpi;
 892        return 0;
 893rqfail:
 894        ib_umem_release(qp->sumem);
 895        qp->sumem = NULL;
 896        qplib_qp->sq.sglist = NULL;
 897        qplib_qp->sq.nmap = 0;
 898
 899        return PTR_ERR(umem);
 900}
 901
 902static struct bnxt_re_ah *bnxt_re_create_shadow_qp_ah
 903                                (struct bnxt_re_pd *pd,
 904                                 struct bnxt_qplib_res *qp1_res,
 905                                 struct bnxt_qplib_qp *qp1_qp)
 906{
 907        struct bnxt_re_dev *rdev = pd->rdev;
 908        struct bnxt_re_ah *ah;
 909        union ib_gid sgid;
 910        int rc;
 911
 912        ah = kzalloc(sizeof(*ah), GFP_KERNEL);
 913        if (!ah)
 914                return NULL;
 915
 916        ah->rdev = rdev;
 917        ah->qplib_ah.pd = &pd->qplib_pd;
 918
 919        rc = bnxt_re_query_gid(&rdev->ibdev, 1, 0, &sgid);
 920        if (rc)
 921                goto fail;
 922
 923        /* supply the dgid data same as sgid */
 924        memcpy(ah->qplib_ah.dgid.data, &sgid.raw,
 925               sizeof(union ib_gid));
 926        ah->qplib_ah.sgid_index = 0;
 927
 928        ah->qplib_ah.traffic_class = 0;
 929        ah->qplib_ah.flow_label = 0;
 930        ah->qplib_ah.hop_limit = 1;
 931        ah->qplib_ah.sl = 0;
 932        /* Have DMAC same as SMAC */
 933        ether_addr_copy(ah->qplib_ah.dmac, rdev->netdev->dev_addr);
 934
 935        rc = bnxt_qplib_create_ah(&rdev->qplib_res, &ah->qplib_ah);
 936        if (rc) {
 937                dev_err(rdev_to_dev(rdev),
 938                        "Failed to allocate HW AH for Shadow QP");
 939                goto fail;
 940        }
 941
 942        return ah;
 943
 944fail:
 945        kfree(ah);
 946        return NULL;
 947}
 948
 949static struct bnxt_re_qp *bnxt_re_create_shadow_qp
 950                                (struct bnxt_re_pd *pd,
 951                                 struct bnxt_qplib_res *qp1_res,
 952                                 struct bnxt_qplib_qp *qp1_qp)
 953{
 954        struct bnxt_re_dev *rdev = pd->rdev;
 955        struct bnxt_re_qp *qp;
 956        int rc;
 957
 958        qp = kzalloc(sizeof(*qp), GFP_KERNEL);
 959        if (!qp)
 960                return NULL;
 961
 962        qp->rdev = rdev;
 963
 964        /* Initialize the shadow QP structure from the QP1 values */
 965        ether_addr_copy(qp->qplib_qp.smac, rdev->netdev->dev_addr);
 966
 967        qp->qplib_qp.pd = &pd->qplib_pd;
 968        qp->qplib_qp.qp_handle = (u64)(unsigned long)(&qp->qplib_qp);
 969        qp->qplib_qp.type = IB_QPT_UD;
 970
 971        qp->qplib_qp.max_inline_data = 0;
 972        qp->qplib_qp.sig_type = true;
 973
 974        /* Shadow QP SQ depth should be same as QP1 RQ depth */
 975        qp->qplib_qp.sq.max_wqe = qp1_qp->rq.max_wqe;
 976        qp->qplib_qp.sq.max_sge = 2;
 977        /* Q full delta can be 1 since it is internal QP */
 978        qp->qplib_qp.sq.q_full_delta = 1;
 979
 980        qp->qplib_qp.scq = qp1_qp->scq;
 981        qp->qplib_qp.rcq = qp1_qp->rcq;
 982
 983        qp->qplib_qp.rq.max_wqe = qp1_qp->rq.max_wqe;
 984        qp->qplib_qp.rq.max_sge = qp1_qp->rq.max_sge;
 985        /* Q full delta can be 1 since it is internal QP */
 986        qp->qplib_qp.rq.q_full_delta = 1;
 987
 988        qp->qplib_qp.mtu = qp1_qp->mtu;
 989
 990        qp->qplib_qp.sq_hdr_buf_size = 0;
 991        qp->qplib_qp.rq_hdr_buf_size = BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV6;
 992        qp->qplib_qp.dpi = &rdev->dpi_privileged;
 993
 994        rc = bnxt_qplib_create_qp(qp1_res, &qp->qplib_qp);
 995        if (rc)
 996                goto fail;
 997
 998        rdev->sqp_id = qp->qplib_qp.id;
 999
1000        spin_lock_init(&qp->sq_lock);
1001        INIT_LIST_HEAD(&qp->list);
1002        mutex_lock(&rdev->qp_lock);
1003        list_add_tail(&qp->list, &rdev->qp_list);
1004        atomic_inc(&rdev->qp_count);
1005        mutex_unlock(&rdev->qp_lock);
1006        return qp;
1007fail:
1008        kfree(qp);
1009        return NULL;
1010}
1011
1012struct ib_qp *bnxt_re_create_qp(struct ib_pd *ib_pd,
1013                                struct ib_qp_init_attr *qp_init_attr,
1014                                struct ib_udata *udata)
1015{
1016        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
1017        struct bnxt_re_dev *rdev = pd->rdev;
1018        struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
1019        struct bnxt_re_qp *qp;
1020        struct bnxt_re_cq *cq;
1021        int rc, entries;
1022
1023        if ((qp_init_attr->cap.max_send_wr > dev_attr->max_qp_wqes) ||
1024            (qp_init_attr->cap.max_recv_wr > dev_attr->max_qp_wqes) ||
1025            (qp_init_attr->cap.max_send_sge > dev_attr->max_qp_sges) ||
1026            (qp_init_attr->cap.max_recv_sge > dev_attr->max_qp_sges) ||
1027            (qp_init_attr->cap.max_inline_data > dev_attr->max_inline_data))
1028                return ERR_PTR(-EINVAL);
1029
1030        qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1031        if (!qp)
1032                return ERR_PTR(-ENOMEM);
1033
1034        qp->rdev = rdev;
1035        ether_addr_copy(qp->qplib_qp.smac, rdev->netdev->dev_addr);
1036        qp->qplib_qp.pd = &pd->qplib_pd;
1037        qp->qplib_qp.qp_handle = (u64)(unsigned long)(&qp->qplib_qp);
1038        qp->qplib_qp.type = __from_ib_qp_type(qp_init_attr->qp_type);
1039        if (qp->qplib_qp.type == IB_QPT_MAX) {
1040                dev_err(rdev_to_dev(rdev), "QP type 0x%x not supported",
1041                        qp->qplib_qp.type);
1042                rc = -EINVAL;
1043                goto fail;
1044        }
1045        qp->qplib_qp.max_inline_data = qp_init_attr->cap.max_inline_data;
1046        qp->qplib_qp.sig_type = ((qp_init_attr->sq_sig_type ==
1047                                  IB_SIGNAL_ALL_WR) ? true : false);
1048
1049        qp->qplib_qp.sq.max_sge = qp_init_attr->cap.max_send_sge;
1050        if (qp->qplib_qp.sq.max_sge > dev_attr->max_qp_sges)
1051                qp->qplib_qp.sq.max_sge = dev_attr->max_qp_sges;
1052
1053        if (qp_init_attr->send_cq) {
1054                cq = container_of(qp_init_attr->send_cq, struct bnxt_re_cq,
1055                                  ib_cq);
1056                if (!cq) {
1057                        dev_err(rdev_to_dev(rdev), "Send CQ not found");
1058                        rc = -EINVAL;
1059                        goto fail;
1060                }
1061                qp->qplib_qp.scq = &cq->qplib_cq;
1062        }
1063
1064        if (qp_init_attr->recv_cq) {
1065                cq = container_of(qp_init_attr->recv_cq, struct bnxt_re_cq,
1066                                  ib_cq);
1067                if (!cq) {
1068                        dev_err(rdev_to_dev(rdev), "Receive CQ not found");
1069                        rc = -EINVAL;
1070                        goto fail;
1071                }
1072                qp->qplib_qp.rcq = &cq->qplib_cq;
1073        }
1074
1075        if (qp_init_attr->srq) {
1076                dev_err(rdev_to_dev(rdev), "SRQ not supported");
1077                rc = -ENOTSUPP;
1078                goto fail;
1079        } else {
1080                /* Allocate 1 more than what's provided so posting max doesn't
1081                 * mean empty
1082                 */
1083                entries = roundup_pow_of_two(qp_init_attr->cap.max_recv_wr + 1);
1084                qp->qplib_qp.rq.max_wqe = min_t(u32, entries,
1085                                                dev_attr->max_qp_wqes + 1);
1086
1087                qp->qplib_qp.rq.q_full_delta = qp->qplib_qp.rq.max_wqe -
1088                                                qp_init_attr->cap.max_recv_wr;
1089
1090                qp->qplib_qp.rq.max_sge = qp_init_attr->cap.max_recv_sge;
1091                if (qp->qplib_qp.rq.max_sge > dev_attr->max_qp_sges)
1092                        qp->qplib_qp.rq.max_sge = dev_attr->max_qp_sges;
1093        }
1094
1095        qp->qplib_qp.mtu = ib_mtu_enum_to_int(iboe_get_mtu(rdev->netdev->mtu));
1096
1097        if (qp_init_attr->qp_type == IB_QPT_GSI) {
1098                /* Allocate 1 more than what's provided */
1099                entries = roundup_pow_of_two(qp_init_attr->cap.max_send_wr + 1);
1100                qp->qplib_qp.sq.max_wqe = min_t(u32, entries,
1101                                                dev_attr->max_qp_wqes + 1);
1102                qp->qplib_qp.sq.q_full_delta = qp->qplib_qp.sq.max_wqe -
1103                                                qp_init_attr->cap.max_send_wr;
1104                qp->qplib_qp.rq.max_sge = dev_attr->max_qp_sges;
1105                if (qp->qplib_qp.rq.max_sge > dev_attr->max_qp_sges)
1106                        qp->qplib_qp.rq.max_sge = dev_attr->max_qp_sges;
1107                qp->qplib_qp.sq.max_sge++;
1108                if (qp->qplib_qp.sq.max_sge > dev_attr->max_qp_sges)
1109                        qp->qplib_qp.sq.max_sge = dev_attr->max_qp_sges;
1110
1111                qp->qplib_qp.rq_hdr_buf_size =
1112                                        BNXT_QPLIB_MAX_QP1_RQ_HDR_SIZE_V2;
1113
1114                qp->qplib_qp.sq_hdr_buf_size =
1115                                        BNXT_QPLIB_MAX_QP1_SQ_HDR_SIZE_V2;
1116                qp->qplib_qp.dpi = &rdev->dpi_privileged;
1117                rc = bnxt_qplib_create_qp1(&rdev->qplib_res, &qp->qplib_qp);
1118                if (rc) {
1119                        dev_err(rdev_to_dev(rdev), "Failed to create HW QP1");
1120                        goto fail;
1121                }
1122                /* Create a shadow QP to handle the QP1 traffic */
1123                rdev->qp1_sqp = bnxt_re_create_shadow_qp(pd, &rdev->qplib_res,
1124                                                         &qp->qplib_qp);
1125                if (!rdev->qp1_sqp) {
1126                        rc = -EINVAL;
1127                        dev_err(rdev_to_dev(rdev),
1128                                "Failed to create Shadow QP for QP1");
1129                        goto qp_destroy;
1130                }
1131                rdev->sqp_ah = bnxt_re_create_shadow_qp_ah(pd, &rdev->qplib_res,
1132                                                           &qp->qplib_qp);
1133                if (!rdev->sqp_ah) {
1134                        bnxt_qplib_destroy_qp(&rdev->qplib_res,
1135                                              &rdev->qp1_sqp->qplib_qp);
1136                        rc = -EINVAL;
1137                        dev_err(rdev_to_dev(rdev),
1138                                "Failed to create AH entry for ShadowQP");
1139                        goto qp_destroy;
1140                }
1141
1142        } else {
1143                /* Allocate 128 + 1 more than what's provided */
1144                entries = roundup_pow_of_two(qp_init_attr->cap.max_send_wr +
1145                                             BNXT_QPLIB_RESERVED_QP_WRS + 1);
1146                qp->qplib_qp.sq.max_wqe = min_t(u32, entries,
1147                                                dev_attr->max_qp_wqes +
1148                                                BNXT_QPLIB_RESERVED_QP_WRS + 1);
1149                qp->qplib_qp.sq.q_full_delta = BNXT_QPLIB_RESERVED_QP_WRS + 1;
1150
1151                /*
1152                 * Reserving one slot for Phantom WQE. Application can
1153                 * post one extra entry in this case. But allowing this to avoid
1154                 * unexpected Queue full condition
1155                 */
1156
1157                qp->qplib_qp.sq.q_full_delta -= 1;
1158
1159                qp->qplib_qp.max_rd_atomic = dev_attr->max_qp_rd_atom;
1160                qp->qplib_qp.max_dest_rd_atomic = dev_attr->max_qp_init_rd_atom;
1161                if (udata) {
1162                        rc = bnxt_re_init_user_qp(rdev, pd, qp, udata);
1163                        if (rc)
1164                                goto fail;
1165                } else {
1166                        qp->qplib_qp.dpi = &rdev->dpi_privileged;
1167                }
1168
1169                rc = bnxt_qplib_create_qp(&rdev->qplib_res, &qp->qplib_qp);
1170                if (rc) {
1171                        dev_err(rdev_to_dev(rdev), "Failed to create HW QP");
1172                        goto fail;
1173                }
1174        }
1175
1176        qp->ib_qp.qp_num = qp->qplib_qp.id;
1177        spin_lock_init(&qp->sq_lock);
1178        spin_lock_init(&qp->rq_lock);
1179
1180        if (udata) {
1181                struct bnxt_re_qp_resp resp;
1182
1183                resp.qpid = qp->ib_qp.qp_num;
1184                resp.rsvd = 0;
1185                rc = ib_copy_to_udata(udata, &resp, sizeof(resp));
1186                if (rc) {
1187                        dev_err(rdev_to_dev(rdev), "Failed to copy QP udata");
1188                        goto qp_destroy;
1189                }
1190        }
1191        INIT_LIST_HEAD(&qp->list);
1192        mutex_lock(&rdev->qp_lock);
1193        list_add_tail(&qp->list, &rdev->qp_list);
1194        atomic_inc(&rdev->qp_count);
1195        mutex_unlock(&rdev->qp_lock);
1196
1197        return &qp->ib_qp;
1198qp_destroy:
1199        bnxt_qplib_destroy_qp(&rdev->qplib_res, &qp->qplib_qp);
1200fail:
1201        kfree(qp);
1202        return ERR_PTR(rc);
1203}
1204
1205static u8 __from_ib_qp_state(enum ib_qp_state state)
1206{
1207        switch (state) {
1208        case IB_QPS_RESET:
1209                return CMDQ_MODIFY_QP_NEW_STATE_RESET;
1210        case IB_QPS_INIT:
1211                return CMDQ_MODIFY_QP_NEW_STATE_INIT;
1212        case IB_QPS_RTR:
1213                return CMDQ_MODIFY_QP_NEW_STATE_RTR;
1214        case IB_QPS_RTS:
1215                return CMDQ_MODIFY_QP_NEW_STATE_RTS;
1216        case IB_QPS_SQD:
1217                return CMDQ_MODIFY_QP_NEW_STATE_SQD;
1218        case IB_QPS_SQE:
1219                return CMDQ_MODIFY_QP_NEW_STATE_SQE;
1220        case IB_QPS_ERR:
1221        default:
1222                return CMDQ_MODIFY_QP_NEW_STATE_ERR;
1223        }
1224}
1225
1226static enum ib_qp_state __to_ib_qp_state(u8 state)
1227{
1228        switch (state) {
1229        case CMDQ_MODIFY_QP_NEW_STATE_RESET:
1230                return IB_QPS_RESET;
1231        case CMDQ_MODIFY_QP_NEW_STATE_INIT:
1232                return IB_QPS_INIT;
1233        case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1234                return IB_QPS_RTR;
1235        case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1236                return IB_QPS_RTS;
1237        case CMDQ_MODIFY_QP_NEW_STATE_SQD:
1238                return IB_QPS_SQD;
1239        case CMDQ_MODIFY_QP_NEW_STATE_SQE:
1240                return IB_QPS_SQE;
1241        case CMDQ_MODIFY_QP_NEW_STATE_ERR:
1242        default:
1243                return IB_QPS_ERR;
1244        }
1245}
1246
1247static u32 __from_ib_mtu(enum ib_mtu mtu)
1248{
1249        switch (mtu) {
1250        case IB_MTU_256:
1251                return CMDQ_MODIFY_QP_PATH_MTU_MTU_256;
1252        case IB_MTU_512:
1253                return CMDQ_MODIFY_QP_PATH_MTU_MTU_512;
1254        case IB_MTU_1024:
1255                return CMDQ_MODIFY_QP_PATH_MTU_MTU_1024;
1256        case IB_MTU_2048:
1257                return CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
1258        case IB_MTU_4096:
1259                return CMDQ_MODIFY_QP_PATH_MTU_MTU_4096;
1260        default:
1261                return CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
1262        }
1263}
1264
1265static enum ib_mtu __to_ib_mtu(u32 mtu)
1266{
1267        switch (mtu & CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) {
1268        case CMDQ_MODIFY_QP_PATH_MTU_MTU_256:
1269                return IB_MTU_256;
1270        case CMDQ_MODIFY_QP_PATH_MTU_MTU_512:
1271                return IB_MTU_512;
1272        case CMDQ_MODIFY_QP_PATH_MTU_MTU_1024:
1273                return IB_MTU_1024;
1274        case CMDQ_MODIFY_QP_PATH_MTU_MTU_2048:
1275                return IB_MTU_2048;
1276        case CMDQ_MODIFY_QP_PATH_MTU_MTU_4096:
1277                return IB_MTU_4096;
1278        default:
1279                return IB_MTU_2048;
1280        }
1281}
1282
1283static int bnxt_re_modify_shadow_qp(struct bnxt_re_dev *rdev,
1284                                    struct bnxt_re_qp *qp1_qp,
1285                                    int qp_attr_mask)
1286{
1287        struct bnxt_re_qp *qp = rdev->qp1_sqp;
1288        int rc = 0;
1289
1290        if (qp_attr_mask & IB_QP_STATE) {
1291                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_STATE;
1292                qp->qplib_qp.state = qp1_qp->qplib_qp.state;
1293        }
1294        if (qp_attr_mask & IB_QP_PKEY_INDEX) {
1295                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_PKEY;
1296                qp->qplib_qp.pkey_index = qp1_qp->qplib_qp.pkey_index;
1297        }
1298
1299        if (qp_attr_mask & IB_QP_QKEY) {
1300                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_QKEY;
1301                /* Using a Random  QKEY */
1302                qp->qplib_qp.qkey = 0x81818181;
1303        }
1304        if (qp_attr_mask & IB_QP_SQ_PSN) {
1305                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN;
1306                qp->qplib_qp.sq.psn = qp1_qp->qplib_qp.sq.psn;
1307        }
1308
1309        rc = bnxt_qplib_modify_qp(&rdev->qplib_res, &qp->qplib_qp);
1310        if (rc)
1311                dev_err(rdev_to_dev(rdev),
1312                        "Failed to modify Shadow QP for QP1");
1313        return rc;
1314}
1315
1316int bnxt_re_modify_qp(struct ib_qp *ib_qp, struct ib_qp_attr *qp_attr,
1317                      int qp_attr_mask, struct ib_udata *udata)
1318{
1319        struct bnxt_re_qp *qp = container_of(ib_qp, struct bnxt_re_qp, ib_qp);
1320        struct bnxt_re_dev *rdev = qp->rdev;
1321        struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
1322        enum ib_qp_state curr_qp_state, new_qp_state;
1323        int rc, entries;
1324        int status;
1325        union ib_gid sgid;
1326        struct ib_gid_attr sgid_attr;
1327        u8 nw_type;
1328
1329        qp->qplib_qp.modify_flags = 0;
1330        if (qp_attr_mask & IB_QP_STATE) {
1331                curr_qp_state = __to_ib_qp_state(qp->qplib_qp.cur_qp_state);
1332                new_qp_state = qp_attr->qp_state;
1333                if (!ib_modify_qp_is_ok(curr_qp_state, new_qp_state,
1334                                        ib_qp->qp_type, qp_attr_mask,
1335                                        IB_LINK_LAYER_ETHERNET)) {
1336                        dev_err(rdev_to_dev(rdev),
1337                                "Invalid attribute mask: %#x specified ",
1338                                qp_attr_mask);
1339                        dev_err(rdev_to_dev(rdev),
1340                                "for qpn: %#x type: %#x",
1341                                ib_qp->qp_num, ib_qp->qp_type);
1342                        dev_err(rdev_to_dev(rdev),
1343                                "curr_qp_state=0x%x, new_qp_state=0x%x\n",
1344                                curr_qp_state, new_qp_state);
1345                        return -EINVAL;
1346                }
1347                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_STATE;
1348                qp->qplib_qp.state = __from_ib_qp_state(qp_attr->qp_state);
1349
1350                if (!qp->sumem &&
1351                    qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1352                        dev_dbg(rdev_to_dev(rdev),
1353                                "Move QP = %p to flush list\n",
1354                                qp);
1355                        bnxt_qplib_add_flush_qp(&qp->qplib_qp);
1356                }
1357                if (!qp->sumem &&
1358                    qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_RESET) {
1359                        dev_dbg(rdev_to_dev(rdev),
1360                                "Move QP = %p out of flush list\n",
1361                                qp);
1362                        bnxt_qplib_del_flush_qp(&qp->qplib_qp);
1363                }
1364        }
1365        if (qp_attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY) {
1366                qp->qplib_qp.modify_flags |=
1367                                CMDQ_MODIFY_QP_MODIFY_MASK_EN_SQD_ASYNC_NOTIFY;
1368                qp->qplib_qp.en_sqd_async_notify = true;
1369        }
1370        if (qp_attr_mask & IB_QP_ACCESS_FLAGS) {
1371                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS;
1372                qp->qplib_qp.access =
1373                        __from_ib_access_flags(qp_attr->qp_access_flags);
1374                /* LOCAL_WRITE access must be set to allow RC receive */
1375                qp->qplib_qp.access |= BNXT_QPLIB_ACCESS_LOCAL_WRITE;
1376        }
1377        if (qp_attr_mask & IB_QP_PKEY_INDEX) {
1378                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_PKEY;
1379                qp->qplib_qp.pkey_index = qp_attr->pkey_index;
1380        }
1381        if (qp_attr_mask & IB_QP_QKEY) {
1382                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_QKEY;
1383                qp->qplib_qp.qkey = qp_attr->qkey;
1384        }
1385        if (qp_attr_mask & IB_QP_AV) {
1386                const struct ib_global_route *grh =
1387                        rdma_ah_read_grh(&qp_attr->ah_attr);
1388
1389                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
1390                                     CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
1391                                     CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
1392                                     CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
1393                                     CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
1394                                     CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
1395                                     CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID;
1396                memcpy(qp->qplib_qp.ah.dgid.data, grh->dgid.raw,
1397                       sizeof(qp->qplib_qp.ah.dgid.data));
1398                qp->qplib_qp.ah.flow_label = grh->flow_label;
1399                /* If RoCE V2 is enabled, stack will have two entries for
1400                 * each GID entry. Avoiding this duplicte entry in HW. Dividing
1401                 * the GID index by 2 for RoCE V2
1402                 */
1403                qp->qplib_qp.ah.sgid_index = grh->sgid_index / 2;
1404                qp->qplib_qp.ah.host_sgid_index = grh->sgid_index;
1405                qp->qplib_qp.ah.hop_limit = grh->hop_limit;
1406                qp->qplib_qp.ah.traffic_class = grh->traffic_class;
1407                qp->qplib_qp.ah.sl = rdma_ah_get_sl(&qp_attr->ah_attr);
1408                ether_addr_copy(qp->qplib_qp.ah.dmac,
1409                                qp_attr->ah_attr.roce.dmac);
1410
1411                status = ib_get_cached_gid(&rdev->ibdev, 1,
1412                                           grh->sgid_index,
1413                                           &sgid, &sgid_attr);
1414                if (!status && sgid_attr.ndev) {
1415                        memcpy(qp->qplib_qp.smac, sgid_attr.ndev->dev_addr,
1416                               ETH_ALEN);
1417                        dev_put(sgid_attr.ndev);
1418                        nw_type = ib_gid_to_network_type(sgid_attr.gid_type,
1419                                                         &sgid);
1420                        switch (nw_type) {
1421                        case RDMA_NETWORK_IPV4:
1422                                qp->qplib_qp.nw_type =
1423                                        CMDQ_MODIFY_QP_NETWORK_TYPE_ROCEV2_IPV4;
1424                                break;
1425                        case RDMA_NETWORK_IPV6:
1426                                qp->qplib_qp.nw_type =
1427                                        CMDQ_MODIFY_QP_NETWORK_TYPE_ROCEV2_IPV6;
1428                                break;
1429                        default:
1430                                qp->qplib_qp.nw_type =
1431                                        CMDQ_MODIFY_QP_NETWORK_TYPE_ROCEV1;
1432                                break;
1433                        }
1434                }
1435        }
1436
1437        if (qp_attr_mask & IB_QP_PATH_MTU) {
1438                qp->qplib_qp.modify_flags |=
1439                                CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
1440                qp->qplib_qp.path_mtu = __from_ib_mtu(qp_attr->path_mtu);
1441                qp->qplib_qp.mtu = ib_mtu_enum_to_int(qp_attr->path_mtu);
1442        } else if (qp_attr->qp_state == IB_QPS_RTR) {
1443                qp->qplib_qp.modify_flags |=
1444                        CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
1445                qp->qplib_qp.path_mtu =
1446                        __from_ib_mtu(iboe_get_mtu(rdev->netdev->mtu));
1447                qp->qplib_qp.mtu =
1448                        ib_mtu_enum_to_int(iboe_get_mtu(rdev->netdev->mtu));
1449        }
1450
1451        if (qp_attr_mask & IB_QP_TIMEOUT) {
1452                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT;
1453                qp->qplib_qp.timeout = qp_attr->timeout;
1454        }
1455        if (qp_attr_mask & IB_QP_RETRY_CNT) {
1456                qp->qplib_qp.modify_flags |=
1457                                CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT;
1458                qp->qplib_qp.retry_cnt = qp_attr->retry_cnt;
1459        }
1460        if (qp_attr_mask & IB_QP_RNR_RETRY) {
1461                qp->qplib_qp.modify_flags |=
1462                                CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY;
1463                qp->qplib_qp.rnr_retry = qp_attr->rnr_retry;
1464        }
1465        if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) {
1466                qp->qplib_qp.modify_flags |=
1467                                CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER;
1468                qp->qplib_qp.min_rnr_timer = qp_attr->min_rnr_timer;
1469        }
1470        if (qp_attr_mask & IB_QP_RQ_PSN) {
1471                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN;
1472                qp->qplib_qp.rq.psn = qp_attr->rq_psn;
1473        }
1474        if (qp_attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1475                qp->qplib_qp.modify_flags |=
1476                                CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC;
1477                /* Cap the max_rd_atomic to device max */
1478                qp->qplib_qp.max_rd_atomic = min_t(u32, qp_attr->max_rd_atomic,
1479                                                   dev_attr->max_qp_rd_atom);
1480        }
1481        if (qp_attr_mask & IB_QP_SQ_PSN) {
1482                qp->qplib_qp.modify_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN;
1483                qp->qplib_qp.sq.psn = qp_attr->sq_psn;
1484        }
1485        if (qp_attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1486                if (qp_attr->max_dest_rd_atomic >
1487                    dev_attr->max_qp_init_rd_atom) {
1488                        dev_err(rdev_to_dev(rdev),
1489                                "max_dest_rd_atomic requested%d is > dev_max%d",
1490                                qp_attr->max_dest_rd_atomic,
1491                                dev_attr->max_qp_init_rd_atom);
1492                        return -EINVAL;
1493                }
1494
1495                qp->qplib_qp.modify_flags |=
1496                                CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC;
1497                qp->qplib_qp.max_dest_rd_atomic = qp_attr->max_dest_rd_atomic;
1498        }
1499        if (qp_attr_mask & IB_QP_CAP) {
1500                qp->qplib_qp.modify_flags |=
1501                                CMDQ_MODIFY_QP_MODIFY_MASK_SQ_SIZE |
1502                                CMDQ_MODIFY_QP_MODIFY_MASK_RQ_SIZE |
1503                                CMDQ_MODIFY_QP_MODIFY_MASK_SQ_SGE |
1504                                CMDQ_MODIFY_QP_MODIFY_MASK_RQ_SGE |
1505                                CMDQ_MODIFY_QP_MODIFY_MASK_MAX_INLINE_DATA;
1506                if ((qp_attr->cap.max_send_wr >= dev_attr->max_qp_wqes) ||
1507                    (qp_attr->cap.max_recv_wr >= dev_attr->max_qp_wqes) ||
1508                    (qp_attr->cap.max_send_sge >= dev_attr->max_qp_sges) ||
1509                    (qp_attr->cap.max_recv_sge >= dev_attr->max_qp_sges) ||
1510                    (qp_attr->cap.max_inline_data >=
1511                                                dev_attr->max_inline_data)) {
1512                        dev_err(rdev_to_dev(rdev),
1513                                "Create QP failed - max exceeded");
1514                        return -EINVAL;
1515                }
1516                entries = roundup_pow_of_two(qp_attr->cap.max_send_wr);
1517                qp->qplib_qp.sq.max_wqe = min_t(u32, entries,
1518                                                dev_attr->max_qp_wqes + 1);
1519                qp->qplib_qp.sq.q_full_delta = qp->qplib_qp.sq.max_wqe -
1520                                                qp_attr->cap.max_send_wr;
1521                /*
1522                 * Reserving one slot for Phantom WQE. Some application can
1523                 * post one extra entry in this case. Allowing this to avoid
1524                 * unexpected Queue full condition
1525                 */
1526                qp->qplib_qp.sq.q_full_delta -= 1;
1527                qp->qplib_qp.sq.max_sge = qp_attr->cap.max_send_sge;
1528                if (qp->qplib_qp.rq.max_wqe) {
1529                        entries = roundup_pow_of_two(qp_attr->cap.max_recv_wr);
1530                        qp->qplib_qp.rq.max_wqe =
1531                                min_t(u32, entries, dev_attr->max_qp_wqes + 1);
1532                        qp->qplib_qp.rq.q_full_delta = qp->qplib_qp.rq.max_wqe -
1533                                                       qp_attr->cap.max_recv_wr;
1534                        qp->qplib_qp.rq.max_sge = qp_attr->cap.max_recv_sge;
1535                } else {
1536                        /* SRQ was used prior, just ignore the RQ caps */
1537                }
1538        }
1539        if (qp_attr_mask & IB_QP_DEST_QPN) {
1540                qp->qplib_qp.modify_flags |=
1541                                CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID;
1542                qp->qplib_qp.dest_qpn = qp_attr->dest_qp_num;
1543        }
1544        rc = bnxt_qplib_modify_qp(&rdev->qplib_res, &qp->qplib_qp);
1545        if (rc) {
1546                dev_err(rdev_to_dev(rdev), "Failed to modify HW QP");
1547                return rc;
1548        }
1549        if (ib_qp->qp_type == IB_QPT_GSI && rdev->qp1_sqp)
1550                rc = bnxt_re_modify_shadow_qp(rdev, qp, qp_attr_mask);
1551        return rc;
1552}
1553
1554int bnxt_re_query_qp(struct ib_qp *ib_qp, struct ib_qp_attr *qp_attr,
1555                     int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1556{
1557        struct bnxt_re_qp *qp = container_of(ib_qp, struct bnxt_re_qp, ib_qp);
1558        struct bnxt_re_dev *rdev = qp->rdev;
1559        struct bnxt_qplib_qp *qplib_qp;
1560        int rc;
1561
1562        qplib_qp = kzalloc(sizeof(*qplib_qp), GFP_KERNEL);
1563        if (!qplib_qp)
1564                return -ENOMEM;
1565
1566        qplib_qp->id = qp->qplib_qp.id;
1567        qplib_qp->ah.host_sgid_index = qp->qplib_qp.ah.host_sgid_index;
1568
1569        rc = bnxt_qplib_query_qp(&rdev->qplib_res, qplib_qp);
1570        if (rc) {
1571                dev_err(rdev_to_dev(rdev), "Failed to query HW QP");
1572                goto out;
1573        }
1574        qp_attr->qp_state = __to_ib_qp_state(qplib_qp->state);
1575        qp_attr->en_sqd_async_notify = qplib_qp->en_sqd_async_notify ? 1 : 0;
1576        qp_attr->qp_access_flags = __to_ib_access_flags(qplib_qp->access);
1577        qp_attr->pkey_index = qplib_qp->pkey_index;
1578        qp_attr->qkey = qplib_qp->qkey;
1579        qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE;
1580        rdma_ah_set_grh(&qp_attr->ah_attr, NULL, qplib_qp->ah.flow_label,
1581                        qplib_qp->ah.host_sgid_index,
1582                        qplib_qp->ah.hop_limit,
1583                        qplib_qp->ah.traffic_class);
1584        rdma_ah_set_dgid_raw(&qp_attr->ah_attr, qplib_qp->ah.dgid.data);
1585        rdma_ah_set_sl(&qp_attr->ah_attr, qplib_qp->ah.sl);
1586        ether_addr_copy(qp_attr->ah_attr.roce.dmac, qplib_qp->ah.dmac);
1587        qp_attr->path_mtu = __to_ib_mtu(qplib_qp->path_mtu);
1588        qp_attr->timeout = qplib_qp->timeout;
1589        qp_attr->retry_cnt = qplib_qp->retry_cnt;
1590        qp_attr->rnr_retry = qplib_qp->rnr_retry;
1591        qp_attr->min_rnr_timer = qplib_qp->min_rnr_timer;
1592        qp_attr->rq_psn = qplib_qp->rq.psn;
1593        qp_attr->max_rd_atomic = qplib_qp->max_rd_atomic;
1594        qp_attr->sq_psn = qplib_qp->sq.psn;
1595        qp_attr->max_dest_rd_atomic = qplib_qp->max_dest_rd_atomic;
1596        qp_init_attr->sq_sig_type = qplib_qp->sig_type ? IB_SIGNAL_ALL_WR :
1597                                                         IB_SIGNAL_REQ_WR;
1598        qp_attr->dest_qp_num = qplib_qp->dest_qpn;
1599
1600        qp_attr->cap.max_send_wr = qp->qplib_qp.sq.max_wqe;
1601        qp_attr->cap.max_send_sge = qp->qplib_qp.sq.max_sge;
1602        qp_attr->cap.max_recv_wr = qp->qplib_qp.rq.max_wqe;
1603        qp_attr->cap.max_recv_sge = qp->qplib_qp.rq.max_sge;
1604        qp_attr->cap.max_inline_data = qp->qplib_qp.max_inline_data;
1605        qp_init_attr->cap = qp_attr->cap;
1606
1607out:
1608        kfree(qplib_qp);
1609        return rc;
1610}
1611
1612/* Routine for sending QP1 packets for RoCE V1 an V2
1613 */
1614static int bnxt_re_build_qp1_send_v2(struct bnxt_re_qp *qp,
1615                                     struct ib_send_wr *wr,
1616                                     struct bnxt_qplib_swqe *wqe,
1617                                     int payload_size)
1618{
1619        struct ib_device *ibdev = &qp->rdev->ibdev;
1620        struct bnxt_re_ah *ah = container_of(ud_wr(wr)->ah, struct bnxt_re_ah,
1621                                             ib_ah);
1622        struct bnxt_qplib_ah *qplib_ah = &ah->qplib_ah;
1623        struct bnxt_qplib_sge sge;
1624        union ib_gid sgid;
1625        u8 nw_type;
1626        u16 ether_type;
1627        struct ib_gid_attr sgid_attr;
1628        union ib_gid dgid;
1629        bool is_eth = false;
1630        bool is_vlan = false;
1631        bool is_grh = false;
1632        bool is_udp = false;
1633        u8 ip_version = 0;
1634        u16 vlan_id = 0xFFFF;
1635        void *buf;
1636        int i, rc = 0;
1637
1638        memset(&qp->qp1_hdr, 0, sizeof(qp->qp1_hdr));
1639
1640        rc = ib_get_cached_gid(ibdev, 1,
1641                               qplib_ah->host_sgid_index, &sgid,
1642                               &sgid_attr);
1643        if (rc) {
1644                dev_err(rdev_to_dev(qp->rdev),
1645                        "Failed to query gid at index %d",
1646                        qplib_ah->host_sgid_index);
1647                return rc;
1648        }
1649        if (sgid_attr.ndev) {
1650                if (is_vlan_dev(sgid_attr.ndev))
1651                        vlan_id = vlan_dev_vlan_id(sgid_attr.ndev);
1652                dev_put(sgid_attr.ndev);
1653        }
1654        /* Get network header type for this GID */
1655        nw_type = ib_gid_to_network_type(sgid_attr.gid_type, &sgid);
1656        switch (nw_type) {
1657        case RDMA_NETWORK_IPV4:
1658                nw_type = BNXT_RE_ROCEV2_IPV4_PACKET;
1659                break;
1660        case RDMA_NETWORK_IPV6:
1661                nw_type = BNXT_RE_ROCEV2_IPV6_PACKET;
1662                break;
1663        default:
1664                nw_type = BNXT_RE_ROCE_V1_PACKET;
1665                break;
1666        }
1667        memcpy(&dgid.raw, &qplib_ah->dgid, 16);
1668        is_udp = sgid_attr.gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP;
1669        if (is_udp) {
1670                if (ipv6_addr_v4mapped((struct in6_addr *)&sgid)) {
1671                        ip_version = 4;
1672                        ether_type = ETH_P_IP;
1673                } else {
1674                        ip_version = 6;
1675                        ether_type = ETH_P_IPV6;
1676                }
1677                is_grh = false;
1678        } else {
1679                ether_type = ETH_P_IBOE;
1680                is_grh = true;
1681        }
1682
1683        is_eth = true;
1684        is_vlan = (vlan_id && (vlan_id < 0x1000)) ? true : false;
1685
1686        ib_ud_header_init(payload_size, !is_eth, is_eth, is_vlan, is_grh,
1687                          ip_version, is_udp, 0, &qp->qp1_hdr);
1688
1689        /* ETH */
1690        ether_addr_copy(qp->qp1_hdr.eth.dmac_h, ah->qplib_ah.dmac);
1691        ether_addr_copy(qp->qp1_hdr.eth.smac_h, qp->qplib_qp.smac);
1692
1693        /* For vlan, check the sgid for vlan existence */
1694
1695        if (!is_vlan) {
1696                qp->qp1_hdr.eth.type = cpu_to_be16(ether_type);
1697        } else {
1698                qp->qp1_hdr.vlan.type = cpu_to_be16(ether_type);
1699                qp->qp1_hdr.vlan.tag = cpu_to_be16(vlan_id);
1700        }
1701
1702        if (is_grh || (ip_version == 6)) {
1703                memcpy(qp->qp1_hdr.grh.source_gid.raw, sgid.raw, sizeof(sgid));
1704                memcpy(qp->qp1_hdr.grh.destination_gid.raw, qplib_ah->dgid.data,
1705                       sizeof(sgid));
1706                qp->qp1_hdr.grh.hop_limit     = qplib_ah->hop_limit;
1707        }
1708
1709        if (ip_version == 4) {
1710                qp->qp1_hdr.ip4.tos = 0;
1711                qp->qp1_hdr.ip4.id = 0;
1712                qp->qp1_hdr.ip4.frag_off = htons(IP_DF);
1713                qp->qp1_hdr.ip4.ttl = qplib_ah->hop_limit;
1714
1715                memcpy(&qp->qp1_hdr.ip4.saddr, sgid.raw + 12, 4);
1716                memcpy(&qp->qp1_hdr.ip4.daddr, qplib_ah->dgid.data + 12, 4);
1717                qp->qp1_hdr.ip4.check = ib_ud_ip4_csum(&qp->qp1_hdr);
1718        }
1719
1720        if (is_udp) {
1721                qp->qp1_hdr.udp.dport = htons(ROCE_V2_UDP_DPORT);
1722                qp->qp1_hdr.udp.sport = htons(0x8CD1);
1723                qp->qp1_hdr.udp.csum = 0;
1724        }
1725
1726        /* BTH */
1727        if (wr->opcode == IB_WR_SEND_WITH_IMM) {
1728                qp->qp1_hdr.bth.opcode = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE;
1729                qp->qp1_hdr.immediate_present = 1;
1730        } else {
1731                qp->qp1_hdr.bth.opcode = IB_OPCODE_UD_SEND_ONLY;
1732        }
1733        if (wr->send_flags & IB_SEND_SOLICITED)
1734                qp->qp1_hdr.bth.solicited_event = 1;
1735        /* pad_count */
1736        qp->qp1_hdr.bth.pad_count = (4 - payload_size) & 3;
1737
1738        /* P_key for QP1 is for all members */
1739        qp->qp1_hdr.bth.pkey = cpu_to_be16(0xFFFF);
1740        qp->qp1_hdr.bth.destination_qpn = IB_QP1;
1741        qp->qp1_hdr.bth.ack_req = 0;
1742        qp->send_psn++;
1743        qp->send_psn &= BTH_PSN_MASK;
1744        qp->qp1_hdr.bth.psn = cpu_to_be32(qp->send_psn);
1745        /* DETH */
1746        /* Use the priviledged Q_Key for QP1 */
1747        qp->qp1_hdr.deth.qkey = cpu_to_be32(IB_QP1_QKEY);
1748        qp->qp1_hdr.deth.source_qpn = IB_QP1;
1749
1750        /* Pack the QP1 to the transmit buffer */
1751        buf = bnxt_qplib_get_qp1_sq_buf(&qp->qplib_qp, &sge);
1752        if (buf) {
1753                ib_ud_header_pack(&qp->qp1_hdr, buf);
1754                for (i = wqe->num_sge; i; i--) {
1755                        wqe->sg_list[i].addr = wqe->sg_list[i - 1].addr;
1756                        wqe->sg_list[i].lkey = wqe->sg_list[i - 1].lkey;
1757                        wqe->sg_list[i].size = wqe->sg_list[i - 1].size;
1758                }
1759
1760                /*
1761                 * Max Header buf size for IPV6 RoCE V2 is 86,
1762                 * which is same as the QP1 SQ header buffer.
1763                 * Header buf size for IPV4 RoCE V2 can be 66.
1764                 * ETH(14) + VLAN(4)+ IP(20) + UDP (8) + BTH(20).
1765                 * Subtract 20 bytes from QP1 SQ header buf size
1766                 */
1767                if (is_udp && ip_version == 4)
1768                        sge.size -= 20;
1769                /*
1770                 * Max Header buf size for RoCE V1 is 78.
1771                 * ETH(14) + VLAN(4) + GRH(40) + BTH(20).
1772                 * Subtract 8 bytes from QP1 SQ header buf size
1773                 */
1774                if (!is_udp)
1775                        sge.size -= 8;
1776
1777                /* Subtract 4 bytes for non vlan packets */
1778                if (!is_vlan)
1779                        sge.size -= 4;
1780
1781                wqe->sg_list[0].addr = sge.addr;
1782                wqe->sg_list[0].lkey = sge.lkey;
1783                wqe->sg_list[0].size = sge.size;
1784                wqe->num_sge++;
1785
1786        } else {
1787                dev_err(rdev_to_dev(qp->rdev), "QP1 buffer is empty!");
1788                rc = -ENOMEM;
1789        }
1790        return rc;
1791}
1792
1793/* For the MAD layer, it only provides the recv SGE the size of
1794 * ib_grh + MAD datagram.  No Ethernet headers, Ethertype, BTH, DETH,
1795 * nor RoCE iCRC.  The Cu+ solution must provide buffer for the entire
1796 * receive packet (334 bytes) with no VLAN and then copy the GRH
1797 * and the MAD datagram out to the provided SGE.
1798 */
1799static int bnxt_re_build_qp1_shadow_qp_recv(struct bnxt_re_qp *qp,
1800                                            struct ib_recv_wr *wr,
1801                                            struct bnxt_qplib_swqe *wqe,
1802                                            int payload_size)
1803{
1804        struct bnxt_qplib_sge ref, sge;
1805        u32 rq_prod_index;
1806        struct bnxt_re_sqp_entries *sqp_entry;
1807
1808        rq_prod_index = bnxt_qplib_get_rq_prod_index(&qp->qplib_qp);
1809
1810        if (!bnxt_qplib_get_qp1_rq_buf(&qp->qplib_qp, &sge))
1811                return -ENOMEM;
1812
1813        /* Create 1 SGE to receive the entire
1814         * ethernet packet
1815         */
1816        /* Save the reference from ULP */
1817        ref.addr = wqe->sg_list[0].addr;
1818        ref.lkey = wqe->sg_list[0].lkey;
1819        ref.size = wqe->sg_list[0].size;
1820
1821        sqp_entry = &qp->rdev->sqp_tbl[rq_prod_index];
1822
1823        /* SGE 1 */
1824        wqe->sg_list[0].addr = sge.addr;
1825        wqe->sg_list[0].lkey = sge.lkey;
1826        wqe->sg_list[0].size = BNXT_QPLIB_MAX_QP1_RQ_HDR_SIZE_V2;
1827        sge.size -= wqe->sg_list[0].size;
1828
1829        sqp_entry->sge.addr = ref.addr;
1830        sqp_entry->sge.lkey = ref.lkey;
1831        sqp_entry->sge.size = ref.size;
1832        /* Store the wrid for reporting completion */
1833        sqp_entry->wrid = wqe->wr_id;
1834        /* change the wqe->wrid to table index */
1835        wqe->wr_id = rq_prod_index;
1836        return 0;
1837}
1838
1839static int is_ud_qp(struct bnxt_re_qp *qp)
1840{
1841        return qp->qplib_qp.type == CMDQ_CREATE_QP_TYPE_UD;
1842}
1843
1844static int bnxt_re_build_send_wqe(struct bnxt_re_qp *qp,
1845                                  struct ib_send_wr *wr,
1846                                  struct bnxt_qplib_swqe *wqe)
1847{
1848        struct bnxt_re_ah *ah = NULL;
1849
1850        if (is_ud_qp(qp)) {
1851                ah = container_of(ud_wr(wr)->ah, struct bnxt_re_ah, ib_ah);
1852                wqe->send.q_key = ud_wr(wr)->remote_qkey;
1853                wqe->send.dst_qp = ud_wr(wr)->remote_qpn;
1854                wqe->send.avid = ah->qplib_ah.id;
1855        }
1856        switch (wr->opcode) {
1857        case IB_WR_SEND:
1858                wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND;
1859                break;
1860        case IB_WR_SEND_WITH_IMM:
1861                wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM;
1862                wqe->send.imm_data = wr->ex.imm_data;
1863                break;
1864        case IB_WR_SEND_WITH_INV:
1865                wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV;
1866                wqe->send.inv_key = wr->ex.invalidate_rkey;
1867                break;
1868        default:
1869                return -EINVAL;
1870        }
1871        if (wr->send_flags & IB_SEND_SIGNALED)
1872                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP;
1873        if (wr->send_flags & IB_SEND_FENCE)
1874                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_UC_FENCE;
1875        if (wr->send_flags & IB_SEND_SOLICITED)
1876                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SOLICIT_EVENT;
1877        if (wr->send_flags & IB_SEND_INLINE)
1878                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_INLINE;
1879
1880        return 0;
1881}
1882
1883static int bnxt_re_build_rdma_wqe(struct ib_send_wr *wr,
1884                                  struct bnxt_qplib_swqe *wqe)
1885{
1886        switch (wr->opcode) {
1887        case IB_WR_RDMA_WRITE:
1888                wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE;
1889                break;
1890        case IB_WR_RDMA_WRITE_WITH_IMM:
1891                wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM;
1892                wqe->rdma.imm_data = wr->ex.imm_data;
1893                break;
1894        case IB_WR_RDMA_READ:
1895                wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_READ;
1896                wqe->rdma.inv_key = wr->ex.invalidate_rkey;
1897                break;
1898        default:
1899                return -EINVAL;
1900        }
1901        wqe->rdma.remote_va = rdma_wr(wr)->remote_addr;
1902        wqe->rdma.r_key = rdma_wr(wr)->rkey;
1903        if (wr->send_flags & IB_SEND_SIGNALED)
1904                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP;
1905        if (wr->send_flags & IB_SEND_FENCE)
1906                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_UC_FENCE;
1907        if (wr->send_flags & IB_SEND_SOLICITED)
1908                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SOLICIT_EVENT;
1909        if (wr->send_flags & IB_SEND_INLINE)
1910                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_INLINE;
1911
1912        return 0;
1913}
1914
1915static int bnxt_re_build_atomic_wqe(struct ib_send_wr *wr,
1916                                    struct bnxt_qplib_swqe *wqe)
1917{
1918        switch (wr->opcode) {
1919        case IB_WR_ATOMIC_CMP_AND_SWP:
1920                wqe->type = BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP;
1921                wqe->atomic.cmp_data = atomic_wr(wr)->compare_add;
1922                wqe->atomic.swap_data = atomic_wr(wr)->swap;
1923                break;
1924        case IB_WR_ATOMIC_FETCH_AND_ADD:
1925                wqe->type = BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD;
1926                wqe->atomic.cmp_data = atomic_wr(wr)->compare_add;
1927                break;
1928        default:
1929                return -EINVAL;
1930        }
1931        wqe->atomic.remote_va = atomic_wr(wr)->remote_addr;
1932        wqe->atomic.r_key = atomic_wr(wr)->rkey;
1933        if (wr->send_flags & IB_SEND_SIGNALED)
1934                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP;
1935        if (wr->send_flags & IB_SEND_FENCE)
1936                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_UC_FENCE;
1937        if (wr->send_flags & IB_SEND_SOLICITED)
1938                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SOLICIT_EVENT;
1939        return 0;
1940}
1941
1942static int bnxt_re_build_inv_wqe(struct ib_send_wr *wr,
1943                                 struct bnxt_qplib_swqe *wqe)
1944{
1945        wqe->type = BNXT_QPLIB_SWQE_TYPE_LOCAL_INV;
1946        wqe->local_inv.inv_l_key = wr->ex.invalidate_rkey;
1947
1948        if (wr->send_flags & IB_SEND_SIGNALED)
1949                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP;
1950        if (wr->send_flags & IB_SEND_FENCE)
1951                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_UC_FENCE;
1952        if (wr->send_flags & IB_SEND_SOLICITED)
1953                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SOLICIT_EVENT;
1954
1955        return 0;
1956}
1957
1958static int bnxt_re_build_reg_wqe(struct ib_reg_wr *wr,
1959                                 struct bnxt_qplib_swqe *wqe)
1960{
1961        struct bnxt_re_mr *mr = container_of(wr->mr, struct bnxt_re_mr, ib_mr);
1962        struct bnxt_qplib_frpl *qplib_frpl = &mr->qplib_frpl;
1963        int access = wr->access;
1964
1965        wqe->frmr.pbl_ptr = (__le64 *)qplib_frpl->hwq.pbl_ptr[0];
1966        wqe->frmr.pbl_dma_ptr = qplib_frpl->hwq.pbl_dma_ptr[0];
1967        wqe->frmr.page_list = mr->pages;
1968        wqe->frmr.page_list_len = mr->npages;
1969        wqe->frmr.levels = qplib_frpl->hwq.level + 1;
1970        wqe->type = BNXT_QPLIB_SWQE_TYPE_REG_MR;
1971
1972        if (wr->wr.send_flags & IB_SEND_FENCE)
1973                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_UC_FENCE;
1974        if (wr->wr.send_flags & IB_SEND_SIGNALED)
1975                wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP;
1976
1977        if (access & IB_ACCESS_LOCAL_WRITE)
1978                wqe->frmr.access_cntl |= SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
1979        if (access & IB_ACCESS_REMOTE_READ)
1980                wqe->frmr.access_cntl |= SQ_FR_PMR_ACCESS_CNTL_REMOTE_READ;
1981        if (access & IB_ACCESS_REMOTE_WRITE)
1982                wqe->frmr.access_cntl |= SQ_FR_PMR_ACCESS_CNTL_REMOTE_WRITE;
1983        if (access & IB_ACCESS_REMOTE_ATOMIC)
1984                wqe->frmr.access_cntl |= SQ_FR_PMR_ACCESS_CNTL_REMOTE_ATOMIC;
1985        if (access & IB_ACCESS_MW_BIND)
1986                wqe->frmr.access_cntl |= SQ_FR_PMR_ACCESS_CNTL_WINDOW_BIND;
1987
1988        wqe->frmr.l_key = wr->key;
1989        wqe->frmr.length = wr->mr->length;
1990        wqe->frmr.pbl_pg_sz_log = (wr->mr->page_size >> PAGE_SHIFT_4K) - 1;
1991        wqe->frmr.va = wr->mr->iova;
1992        return 0;
1993}
1994
1995static int bnxt_re_copy_inline_data(struct bnxt_re_dev *rdev,
1996                                    struct ib_send_wr *wr,
1997                                    struct bnxt_qplib_swqe *wqe)
1998{
1999        /*  Copy the inline data to the data  field */
2000        u8 *in_data;
2001        u32 i, sge_len;
2002        void *sge_addr;
2003
2004        in_data = wqe->inline_data;
2005        for (i = 0; i < wr->num_sge; i++) {
2006                sge_addr = (void *)(unsigned long)
2007                                wr->sg_list[i].addr;
2008                sge_len = wr->sg_list[i].length;
2009
2010                if ((sge_len + wqe->inline_len) >
2011                    BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH) {
2012                        dev_err(rdev_to_dev(rdev),
2013                                "Inline data size requested > supported value");
2014                        return -EINVAL;
2015                }
2016                sge_len = wr->sg_list[i].length;
2017
2018                memcpy(in_data, sge_addr, sge_len);
2019                in_data += wr->sg_list[i].length;
2020                wqe->inline_len += wr->sg_list[i].length;
2021        }
2022        return wqe->inline_len;
2023}
2024
2025static int bnxt_re_copy_wr_payload(struct bnxt_re_dev *rdev,
2026                                   struct ib_send_wr *wr,
2027                                   struct bnxt_qplib_swqe *wqe)
2028{
2029        int payload_sz = 0;
2030
2031        if (wr->send_flags & IB_SEND_INLINE)
2032                payload_sz = bnxt_re_copy_inline_data(rdev, wr, wqe);
2033        else
2034                payload_sz = bnxt_re_build_sgl(wr->sg_list, wqe->sg_list,
2035                                               wqe->num_sge);
2036
2037        return payload_sz;
2038}
2039
2040static void bnxt_ud_qp_hw_stall_workaround(struct bnxt_re_qp *qp)
2041{
2042        if ((qp->ib_qp.qp_type == IB_QPT_UD ||
2043             qp->ib_qp.qp_type == IB_QPT_GSI ||
2044             qp->ib_qp.qp_type == IB_QPT_RAW_ETHERTYPE) &&
2045             qp->qplib_qp.wqe_cnt == BNXT_RE_UD_QP_HW_STALL) {
2046                int qp_attr_mask;
2047                struct ib_qp_attr qp_attr;
2048
2049                qp_attr_mask = IB_QP_STATE;
2050                qp_attr.qp_state = IB_QPS_RTS;
2051                bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, qp_attr_mask, NULL);
2052                qp->qplib_qp.wqe_cnt = 0;
2053        }
2054}
2055
2056static int bnxt_re_post_send_shadow_qp(struct bnxt_re_dev *rdev,
2057                                       struct bnxt_re_qp *qp,
2058                                struct ib_send_wr *wr)
2059{
2060        struct bnxt_qplib_swqe wqe;
2061        int rc = 0, payload_sz = 0;
2062        unsigned long flags;
2063
2064        spin_lock_irqsave(&qp->sq_lock, flags);
2065        memset(&wqe, 0, sizeof(wqe));
2066        while (wr) {
2067                /* House keeping */
2068                memset(&wqe, 0, sizeof(wqe));
2069
2070                /* Common */
2071                wqe.num_sge = wr->num_sge;
2072                if (wr->num_sge > qp->qplib_qp.sq.max_sge) {
2073                        dev_err(rdev_to_dev(rdev),
2074                                "Limit exceeded for Send SGEs");
2075                        rc = -EINVAL;
2076                        goto bad;
2077                }
2078
2079                payload_sz = bnxt_re_copy_wr_payload(qp->rdev, wr, &wqe);
2080                if (payload_sz < 0) {
2081                        rc = -EINVAL;
2082                        goto bad;
2083                }
2084                wqe.wr_id = wr->wr_id;
2085
2086                wqe.type = BNXT_QPLIB_SWQE_TYPE_SEND;
2087
2088                rc = bnxt_re_build_send_wqe(qp, wr, &wqe);
2089                if (!rc)
2090                        rc = bnxt_qplib_post_send(&qp->qplib_qp, &wqe);
2091bad:
2092                if (rc) {
2093                        dev_err(rdev_to_dev(rdev),
2094                                "Post send failed opcode = %#x rc = %d",
2095                                wr->opcode, rc);
2096                        break;
2097                }
2098                wr = wr->next;
2099        }
2100        bnxt_qplib_post_send_db(&qp->qplib_qp);
2101        bnxt_ud_qp_hw_stall_workaround(qp);
2102        spin_unlock_irqrestore(&qp->sq_lock, flags);
2103        return rc;
2104}
2105
2106int bnxt_re_post_send(struct ib_qp *ib_qp, struct ib_send_wr *wr,
2107                      struct ib_send_wr **bad_wr)
2108{
2109        struct bnxt_re_qp *qp = container_of(ib_qp, struct bnxt_re_qp, ib_qp);
2110        struct bnxt_qplib_swqe wqe;
2111        int rc = 0, payload_sz = 0;
2112        unsigned long flags;
2113
2114        spin_lock_irqsave(&qp->sq_lock, flags);
2115        while (wr) {
2116                /* House keeping */
2117                memset(&wqe, 0, sizeof(wqe));
2118
2119                /* Common */
2120                wqe.num_sge = wr->num_sge;
2121                if (wr->num_sge > qp->qplib_qp.sq.max_sge) {
2122                        dev_err(rdev_to_dev(qp->rdev),
2123                                "Limit exceeded for Send SGEs");
2124                        rc = -EINVAL;
2125                        goto bad;
2126                }
2127
2128                payload_sz = bnxt_re_copy_wr_payload(qp->rdev, wr, &wqe);
2129                if (payload_sz < 0) {
2130                        rc = -EINVAL;
2131                        goto bad;
2132                }
2133                wqe.wr_id = wr->wr_id;
2134
2135                switch (wr->opcode) {
2136                case IB_WR_SEND:
2137                case IB_WR_SEND_WITH_IMM:
2138                        if (ib_qp->qp_type == IB_QPT_GSI) {
2139                                rc = bnxt_re_build_qp1_send_v2(qp, wr, &wqe,
2140                                                               payload_sz);
2141                                if (rc)
2142                                        goto bad;
2143                                wqe.rawqp1.lflags |=
2144                                        SQ_SEND_RAWETH_QP1_LFLAGS_ROCE_CRC;
2145                        }
2146                        switch (wr->send_flags) {
2147                        case IB_SEND_IP_CSUM:
2148                                wqe.rawqp1.lflags |=
2149                                        SQ_SEND_RAWETH_QP1_LFLAGS_IP_CHKSUM;
2150                                break;
2151                        default:
2152                                break;
2153                        }
2154                        /* Fall thru to build the wqe */
2155                case IB_WR_SEND_WITH_INV:
2156                        rc = bnxt_re_build_send_wqe(qp, wr, &wqe);
2157                        break;
2158                case IB_WR_RDMA_WRITE:
2159                case IB_WR_RDMA_WRITE_WITH_IMM:
2160                case IB_WR_RDMA_READ:
2161                        rc = bnxt_re_build_rdma_wqe(wr, &wqe);
2162                        break;
2163                case IB_WR_ATOMIC_CMP_AND_SWP:
2164                case IB_WR_ATOMIC_FETCH_AND_ADD:
2165                        rc = bnxt_re_build_atomic_wqe(wr, &wqe);
2166                        break;
2167                case IB_WR_RDMA_READ_WITH_INV:
2168                        dev_err(rdev_to_dev(qp->rdev),
2169                                "RDMA Read with Invalidate is not supported");
2170                        rc = -EINVAL;
2171                        goto bad;
2172                case IB_WR_LOCAL_INV:
2173                        rc = bnxt_re_build_inv_wqe(wr, &wqe);
2174                        break;
2175                case IB_WR_REG_MR:
2176                        rc = bnxt_re_build_reg_wqe(reg_wr(wr), &wqe);
2177                        break;
2178                default:
2179                        /* Unsupported WRs */
2180                        dev_err(rdev_to_dev(qp->rdev),
2181                                "WR (%#x) is not supported", wr->opcode);
2182                        rc = -EINVAL;
2183                        goto bad;
2184                }
2185                if (!rc)
2186                        rc = bnxt_qplib_post_send(&qp->qplib_qp, &wqe);
2187bad:
2188                if (rc) {
2189                        dev_err(rdev_to_dev(qp->rdev),
2190                                "post_send failed op:%#x qps = %#x rc = %d\n",
2191                                wr->opcode, qp->qplib_qp.state, rc);
2192                        *bad_wr = wr;
2193                        break;
2194                }
2195                wr = wr->next;
2196        }
2197        bnxt_qplib_post_send_db(&qp->qplib_qp);
2198        bnxt_ud_qp_hw_stall_workaround(qp);
2199        spin_unlock_irqrestore(&qp->sq_lock, flags);
2200
2201        return rc;
2202}
2203
2204static int bnxt_re_post_recv_shadow_qp(struct bnxt_re_dev *rdev,
2205                                       struct bnxt_re_qp *qp,
2206                                       struct ib_recv_wr *wr)
2207{
2208        struct bnxt_qplib_swqe wqe;
2209        int rc = 0;
2210
2211        memset(&wqe, 0, sizeof(wqe));
2212        while (wr) {
2213                /* House keeping */
2214                memset(&wqe, 0, sizeof(wqe));
2215
2216                /* Common */
2217                wqe.num_sge = wr->num_sge;
2218                if (wr->num_sge > qp->qplib_qp.rq.max_sge) {
2219                        dev_err(rdev_to_dev(rdev),
2220                                "Limit exceeded for Receive SGEs");
2221                        rc = -EINVAL;
2222                        break;
2223                }
2224                bnxt_re_build_sgl(wr->sg_list, wqe.sg_list, wr->num_sge);
2225                wqe.wr_id = wr->wr_id;
2226                wqe.type = BNXT_QPLIB_SWQE_TYPE_RECV;
2227
2228                rc = bnxt_qplib_post_recv(&qp->qplib_qp, &wqe);
2229                if (rc)
2230                        break;
2231
2232                wr = wr->next;
2233        }
2234        if (!rc)
2235                bnxt_qplib_post_recv_db(&qp->qplib_qp);
2236        return rc;
2237}
2238
2239int bnxt_re_post_recv(struct ib_qp *ib_qp, struct ib_recv_wr *wr,
2240                      struct ib_recv_wr **bad_wr)
2241{
2242        struct bnxt_re_qp *qp = container_of(ib_qp, struct bnxt_re_qp, ib_qp);
2243        struct bnxt_qplib_swqe wqe;
2244        int rc = 0, payload_sz = 0;
2245        unsigned long flags;
2246        u32 count = 0;
2247
2248        spin_lock_irqsave(&qp->rq_lock, flags);
2249        while (wr) {
2250                /* House keeping */
2251                memset(&wqe, 0, sizeof(wqe));
2252
2253                /* Common */
2254                wqe.num_sge = wr->num_sge;
2255                if (wr->num_sge > qp->qplib_qp.rq.max_sge) {
2256                        dev_err(rdev_to_dev(qp->rdev),
2257                                "Limit exceeded for Receive SGEs");
2258                        rc = -EINVAL;
2259                        *bad_wr = wr;
2260                        break;
2261                }
2262
2263                payload_sz = bnxt_re_build_sgl(wr->sg_list, wqe.sg_list,
2264                                               wr->num_sge);
2265                wqe.wr_id = wr->wr_id;
2266                wqe.type = BNXT_QPLIB_SWQE_TYPE_RECV;
2267
2268                if (ib_qp->qp_type == IB_QPT_GSI)
2269                        rc = bnxt_re_build_qp1_shadow_qp_recv(qp, wr, &wqe,
2270                                                              payload_sz);
2271                if (!rc)
2272                        rc = bnxt_qplib_post_recv(&qp->qplib_qp, &wqe);
2273                if (rc) {
2274                        *bad_wr = wr;
2275                        break;
2276                }
2277
2278                /* Ring DB if the RQEs posted reaches a threshold value */
2279                if (++count >= BNXT_RE_RQ_WQE_THRESHOLD) {
2280                        bnxt_qplib_post_recv_db(&qp->qplib_qp);
2281                        count = 0;
2282                }
2283
2284                wr = wr->next;
2285        }
2286
2287        if (count)
2288                bnxt_qplib_post_recv_db(&qp->qplib_qp);
2289
2290        spin_unlock_irqrestore(&qp->rq_lock, flags);
2291
2292        return rc;
2293}
2294
2295/* Completion Queues */
2296int bnxt_re_destroy_cq(struct ib_cq *ib_cq)
2297{
2298        struct bnxt_re_cq *cq = container_of(ib_cq, struct bnxt_re_cq, ib_cq);
2299        struct bnxt_re_dev *rdev = cq->rdev;
2300        int rc;
2301        struct bnxt_qplib_nq *nq = cq->qplib_cq.nq;
2302
2303        rc = bnxt_qplib_destroy_cq(&rdev->qplib_res, &cq->qplib_cq);
2304        if (rc) {
2305                dev_err(rdev_to_dev(rdev), "Failed to destroy HW CQ");
2306                return rc;
2307        }
2308        if (!IS_ERR_OR_NULL(cq->umem))
2309                ib_umem_release(cq->umem);
2310
2311        if (cq) {
2312                kfree(cq->cql);
2313                kfree(cq);
2314        }
2315        atomic_dec(&rdev->cq_count);
2316        nq->budget--;
2317        return 0;
2318}
2319
2320struct ib_cq *bnxt_re_create_cq(struct ib_device *ibdev,
2321                                const struct ib_cq_init_attr *attr,
2322                                struct ib_ucontext *context,
2323                                struct ib_udata *udata)
2324{
2325        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
2326        struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
2327        struct bnxt_re_cq *cq = NULL;
2328        int rc, entries;
2329        int cqe = attr->cqe;
2330        struct bnxt_qplib_nq *nq = NULL;
2331        unsigned int nq_alloc_cnt;
2332
2333        /* Validate CQ fields */
2334        if (cqe < 1 || cqe > dev_attr->max_cq_wqes) {
2335                dev_err(rdev_to_dev(rdev), "Failed to create CQ -max exceeded");
2336                return ERR_PTR(-EINVAL);
2337        }
2338        cq = kzalloc(sizeof(*cq), GFP_KERNEL);
2339        if (!cq)
2340                return ERR_PTR(-ENOMEM);
2341
2342        cq->rdev = rdev;
2343        cq->qplib_cq.cq_handle = (u64)(unsigned long)(&cq->qplib_cq);
2344
2345        entries = roundup_pow_of_two(cqe + 1);
2346        if (entries > dev_attr->max_cq_wqes + 1)
2347                entries = dev_attr->max_cq_wqes + 1;
2348
2349        if (context) {
2350                struct bnxt_re_cq_req req;
2351                struct bnxt_re_ucontext *uctx = container_of
2352                                                (context,
2353                                                 struct bnxt_re_ucontext,
2354                                                 ib_uctx);
2355                if (ib_copy_from_udata(&req, udata, sizeof(req))) {
2356                        rc = -EFAULT;
2357                        goto fail;
2358                }
2359
2360                cq->umem = ib_umem_get(context, req.cq_va,
2361                                       entries * sizeof(struct cq_base),
2362                                       IB_ACCESS_LOCAL_WRITE, 1);
2363                if (IS_ERR(cq->umem)) {
2364                        rc = PTR_ERR(cq->umem);
2365                        goto fail;
2366                }
2367                cq->qplib_cq.sghead = cq->umem->sg_head.sgl;
2368                cq->qplib_cq.nmap = cq->umem->nmap;
2369                cq->qplib_cq.dpi = &uctx->dpi;
2370        } else {
2371                cq->max_cql = min_t(u32, entries, MAX_CQL_PER_POLL);
2372                cq->cql = kcalloc(cq->max_cql, sizeof(struct bnxt_qplib_cqe),
2373                                  GFP_KERNEL);
2374                if (!cq->cql) {
2375                        rc = -ENOMEM;
2376                        goto fail;
2377                }
2378
2379                cq->qplib_cq.dpi = &rdev->dpi_privileged;
2380                cq->qplib_cq.sghead = NULL;
2381                cq->qplib_cq.nmap = 0;
2382        }
2383        /*
2384         * Allocating the NQ in a round robin fashion. nq_alloc_cnt is a
2385         * used for getting the NQ index.
2386         */
2387        nq_alloc_cnt = atomic_inc_return(&rdev->nq_alloc_cnt);
2388        nq = &rdev->nq[nq_alloc_cnt % (rdev->num_msix - 1)];
2389        cq->qplib_cq.max_wqe = entries;
2390        cq->qplib_cq.cnq_hw_ring_id = nq->ring_id;
2391        cq->qplib_cq.nq = nq;
2392
2393        rc = bnxt_qplib_create_cq(&rdev->qplib_res, &cq->qplib_cq);
2394        if (rc) {
2395                dev_err(rdev_to_dev(rdev), "Failed to create HW CQ");
2396                goto fail;
2397        }
2398
2399        cq->ib_cq.cqe = entries;
2400        cq->cq_period = cq->qplib_cq.period;
2401        nq->budget++;
2402
2403        atomic_inc(&rdev->cq_count);
2404
2405        if (context) {
2406                struct bnxt_re_cq_resp resp;
2407
2408                resp.cqid = cq->qplib_cq.id;
2409                resp.tail = cq->qplib_cq.hwq.cons;
2410                resp.phase = cq->qplib_cq.period;
2411                resp.rsvd = 0;
2412                rc = ib_copy_to_udata(udata, &resp, sizeof(resp));
2413                if (rc) {
2414                        dev_err(rdev_to_dev(rdev), "Failed to copy CQ udata");
2415                        bnxt_qplib_destroy_cq(&rdev->qplib_res, &cq->qplib_cq);
2416                        goto c2fail;
2417                }
2418        }
2419
2420        return &cq->ib_cq;
2421
2422c2fail:
2423        if (context)
2424                ib_umem_release(cq->umem);
2425fail:
2426        kfree(cq->cql);
2427        kfree(cq);
2428        return ERR_PTR(rc);
2429}
2430
2431static u8 __req_to_ib_wc_status(u8 qstatus)
2432{
2433        switch (qstatus) {
2434        case CQ_REQ_STATUS_OK:
2435                return IB_WC_SUCCESS;
2436        case CQ_REQ_STATUS_BAD_RESPONSE_ERR:
2437                return IB_WC_BAD_RESP_ERR;
2438        case CQ_REQ_STATUS_LOCAL_LENGTH_ERR:
2439                return IB_WC_LOC_LEN_ERR;
2440        case CQ_REQ_STATUS_LOCAL_QP_OPERATION_ERR:
2441                return IB_WC_LOC_QP_OP_ERR;
2442        case CQ_REQ_STATUS_LOCAL_PROTECTION_ERR:
2443                return IB_WC_LOC_PROT_ERR;
2444        case CQ_REQ_STATUS_MEMORY_MGT_OPERATION_ERR:
2445                return IB_WC_GENERAL_ERR;
2446        case CQ_REQ_STATUS_REMOTE_INVALID_REQUEST_ERR:
2447                return IB_WC_REM_INV_REQ_ERR;
2448        case CQ_REQ_STATUS_REMOTE_ACCESS_ERR:
2449                return IB_WC_REM_ACCESS_ERR;
2450        case CQ_REQ_STATUS_REMOTE_OPERATION_ERR:
2451                return IB_WC_REM_OP_ERR;
2452        case CQ_REQ_STATUS_RNR_NAK_RETRY_CNT_ERR:
2453                return IB_WC_RNR_RETRY_EXC_ERR;
2454        case CQ_REQ_STATUS_TRANSPORT_RETRY_CNT_ERR:
2455                return IB_WC_RETRY_EXC_ERR;
2456        case CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR:
2457                return IB_WC_WR_FLUSH_ERR;
2458        default:
2459                return IB_WC_GENERAL_ERR;
2460        }
2461        return 0;
2462}
2463
2464static u8 __rawqp1_to_ib_wc_status(u8 qstatus)
2465{
2466        switch (qstatus) {
2467        case CQ_RES_RAWETH_QP1_STATUS_OK:
2468                return IB_WC_SUCCESS;
2469        case CQ_RES_RAWETH_QP1_STATUS_LOCAL_ACCESS_ERROR:
2470                return IB_WC_LOC_ACCESS_ERR;
2471        case CQ_RES_RAWETH_QP1_STATUS_HW_LOCAL_LENGTH_ERR:
2472                return IB_WC_LOC_LEN_ERR;
2473        case CQ_RES_RAWETH_QP1_STATUS_LOCAL_PROTECTION_ERR:
2474                return IB_WC_LOC_PROT_ERR;
2475        case CQ_RES_RAWETH_QP1_STATUS_LOCAL_QP_OPERATION_ERR:
2476                return IB_WC_LOC_QP_OP_ERR;
2477        case CQ_RES_RAWETH_QP1_STATUS_MEMORY_MGT_OPERATION_ERR:
2478                return IB_WC_GENERAL_ERR;
2479        case CQ_RES_RAWETH_QP1_STATUS_WORK_REQUEST_FLUSHED_ERR:
2480                return IB_WC_WR_FLUSH_ERR;
2481        case CQ_RES_RAWETH_QP1_STATUS_HW_FLUSH_ERR:
2482                return IB_WC_WR_FLUSH_ERR;
2483        default:
2484                return IB_WC_GENERAL_ERR;
2485        }
2486}
2487
2488static u8 __rc_to_ib_wc_status(u8 qstatus)
2489{
2490        switch (qstatus) {
2491        case CQ_RES_RC_STATUS_OK:
2492                return IB_WC_SUCCESS;
2493        case CQ_RES_RC_STATUS_LOCAL_ACCESS_ERROR:
2494                return IB_WC_LOC_ACCESS_ERR;
2495        case CQ_RES_RC_STATUS_LOCAL_LENGTH_ERR:
2496                return IB_WC_LOC_LEN_ERR;
2497        case CQ_RES_RC_STATUS_LOCAL_PROTECTION_ERR:
2498                return IB_WC_LOC_PROT_ERR;
2499        case CQ_RES_RC_STATUS_LOCAL_QP_OPERATION_ERR:
2500                return IB_WC_LOC_QP_OP_ERR;
2501        case CQ_RES_RC_STATUS_MEMORY_MGT_OPERATION_ERR:
2502                return IB_WC_GENERAL_ERR;
2503        case CQ_RES_RC_STATUS_REMOTE_INVALID_REQUEST_ERR:
2504                return IB_WC_REM_INV_REQ_ERR;
2505        case CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR:
2506                return IB_WC_WR_FLUSH_ERR;
2507        case CQ_RES_RC_STATUS_HW_FLUSH_ERR:
2508                return IB_WC_WR_FLUSH_ERR;
2509        default:
2510                return IB_WC_GENERAL_ERR;
2511        }
2512}
2513
2514static void bnxt_re_process_req_wc(struct ib_wc *wc, struct bnxt_qplib_cqe *cqe)
2515{
2516        switch (cqe->type) {
2517        case BNXT_QPLIB_SWQE_TYPE_SEND:
2518                wc->opcode = IB_WC_SEND;
2519                break;
2520        case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
2521                wc->opcode = IB_WC_SEND;
2522                wc->wc_flags |= IB_WC_WITH_IMM;
2523                break;
2524        case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
2525                wc->opcode = IB_WC_SEND;
2526                wc->wc_flags |= IB_WC_WITH_INVALIDATE;
2527                break;
2528        case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
2529                wc->opcode = IB_WC_RDMA_WRITE;
2530                break;
2531        case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
2532                wc->opcode = IB_WC_RDMA_WRITE;
2533                wc->wc_flags |= IB_WC_WITH_IMM;
2534                break;
2535        case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
2536                wc->opcode = IB_WC_RDMA_READ;
2537                break;
2538        case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
2539                wc->opcode = IB_WC_COMP_SWAP;
2540                break;
2541        case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
2542                wc->opcode = IB_WC_FETCH_ADD;
2543                break;
2544        case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
2545                wc->opcode = IB_WC_LOCAL_INV;
2546                break;
2547        case BNXT_QPLIB_SWQE_TYPE_REG_MR:
2548                wc->opcode = IB_WC_REG_MR;
2549                break;
2550        default:
2551                wc->opcode = IB_WC_SEND;
2552                break;
2553        }
2554
2555        wc->status = __req_to_ib_wc_status(cqe->status);
2556}
2557
2558static int bnxt_re_check_packet_type(u16 raweth_qp1_flags,
2559                                     u16 raweth_qp1_flags2)
2560{
2561        bool is_ipv6 = false, is_ipv4 = false;
2562
2563        /* raweth_qp1_flags Bit 9-6 indicates itype */
2564        if ((raweth_qp1_flags & CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_ROCE)
2565            != CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS_ITYPE_ROCE)
2566                return -1;
2567
2568        if (raweth_qp1_flags2 &
2569            CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_IP_CS_CALC &&
2570            raweth_qp1_flags2 &
2571            CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_L4_CS_CALC) {
2572                /* raweth_qp1_flags2 Bit 8 indicates ip_type. 0-v4 1 - v6 */
2573                (raweth_qp1_flags2 &
2574                 CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_IP_TYPE) ?
2575                        (is_ipv6 = true) : (is_ipv4 = true);
2576                return ((is_ipv6) ?
2577                         BNXT_RE_ROCEV2_IPV6_PACKET :
2578                         BNXT_RE_ROCEV2_IPV4_PACKET);
2579        } else {
2580                return BNXT_RE_ROCE_V1_PACKET;
2581        }
2582}
2583
2584static int bnxt_re_to_ib_nw_type(int nw_type)
2585{
2586        u8 nw_hdr_type = 0xFF;
2587
2588        switch (nw_type) {
2589        case BNXT_RE_ROCE_V1_PACKET:
2590                nw_hdr_type = RDMA_NETWORK_ROCE_V1;
2591                break;
2592        case BNXT_RE_ROCEV2_IPV4_PACKET:
2593                nw_hdr_type = RDMA_NETWORK_IPV4;
2594                break;
2595        case BNXT_RE_ROCEV2_IPV6_PACKET:
2596                nw_hdr_type = RDMA_NETWORK_IPV6;
2597                break;
2598        }
2599        return nw_hdr_type;
2600}
2601
2602static bool bnxt_re_is_loopback_packet(struct bnxt_re_dev *rdev,
2603                                       void *rq_hdr_buf)
2604{
2605        u8 *tmp_buf = NULL;
2606        struct ethhdr *eth_hdr;
2607        u16 eth_type;
2608        bool rc = false;
2609
2610        tmp_buf = (u8 *)rq_hdr_buf;
2611        /*
2612         * If dest mac is not same as I/F mac, this could be a
2613         * loopback address or multicast address, check whether
2614         * it is a loopback packet
2615         */
2616        if (!ether_addr_equal(tmp_buf, rdev->netdev->dev_addr)) {
2617                tmp_buf += 4;
2618                /* Check the  ether type */
2619                eth_hdr = (struct ethhdr *)tmp_buf;
2620                eth_type = ntohs(eth_hdr->h_proto);
2621                switch (eth_type) {
2622                case ETH_P_IBOE:
2623                        rc = true;
2624                        break;
2625                case ETH_P_IP:
2626                case ETH_P_IPV6: {
2627                        u32 len;
2628                        struct udphdr *udp_hdr;
2629
2630                        len = (eth_type == ETH_P_IP ? sizeof(struct iphdr) :
2631                                                      sizeof(struct ipv6hdr));
2632                        tmp_buf += sizeof(struct ethhdr) + len;
2633                        udp_hdr = (struct udphdr *)tmp_buf;
2634                        if (ntohs(udp_hdr->dest) ==
2635                                    ROCE_V2_UDP_DPORT)
2636                                rc = true;
2637                        break;
2638                        }
2639                default:
2640                        break;
2641                }
2642        }
2643
2644        return rc;
2645}
2646
2647static int bnxt_re_process_raw_qp_pkt_rx(struct bnxt_re_qp *qp1_qp,
2648                                         struct bnxt_qplib_cqe *cqe)
2649{
2650        struct bnxt_re_dev *rdev = qp1_qp->rdev;
2651        struct bnxt_re_sqp_entries *sqp_entry = NULL;
2652        struct bnxt_re_qp *qp = rdev->qp1_sqp;
2653        struct ib_send_wr *swr;
2654        struct ib_ud_wr udwr;
2655        struct ib_recv_wr rwr;
2656        int pkt_type = 0;
2657        u32 tbl_idx;
2658        void *rq_hdr_buf;
2659        dma_addr_t rq_hdr_buf_map;
2660        dma_addr_t shrq_hdr_buf_map;
2661        u32 offset = 0;
2662        u32 skip_bytes = 0;
2663        struct ib_sge s_sge[2];
2664        struct ib_sge r_sge[2];
2665        int rc;
2666
2667        memset(&udwr, 0, sizeof(udwr));
2668        memset(&rwr, 0, sizeof(rwr));
2669        memset(&s_sge, 0, sizeof(s_sge));
2670        memset(&r_sge, 0, sizeof(r_sge));
2671
2672        swr = &udwr.wr;
2673        tbl_idx = cqe->wr_id;
2674
2675        rq_hdr_buf = qp1_qp->qplib_qp.rq_hdr_buf +
2676                        (tbl_idx * qp1_qp->qplib_qp.rq_hdr_buf_size);
2677        rq_hdr_buf_map = bnxt_qplib_get_qp_buf_from_index(&qp1_qp->qplib_qp,
2678                                                          tbl_idx);
2679
2680        /* Shadow QP header buffer */
2681        shrq_hdr_buf_map = bnxt_qplib_get_qp_buf_from_index(&qp->qplib_qp,
2682                                                            tbl_idx);
2683        sqp_entry = &rdev->sqp_tbl[tbl_idx];
2684
2685        /* Store this cqe */
2686        memcpy(&sqp_entry->cqe, cqe, sizeof(struct bnxt_qplib_cqe));
2687        sqp_entry->qp1_qp = qp1_qp;
2688
2689        /* Find packet type from the cqe */
2690
2691        pkt_type = bnxt_re_check_packet_type(cqe->raweth_qp1_flags,
2692                                             cqe->raweth_qp1_flags2);
2693        if (pkt_type < 0) {
2694                dev_err(rdev_to_dev(rdev), "Invalid packet\n");
2695                return -EINVAL;
2696        }
2697
2698        /* Adjust the offset for the user buffer and post in the rq */
2699
2700        if (pkt_type == BNXT_RE_ROCEV2_IPV4_PACKET)
2701                offset = 20;
2702
2703        /*
2704         * QP1 loopback packet has 4 bytes of internal header before
2705         * ether header. Skip these four bytes.
2706         */
2707        if (bnxt_re_is_loopback_packet(rdev, rq_hdr_buf))
2708                skip_bytes = 4;
2709
2710        /* First send SGE . Skip the ether header*/
2711        s_sge[0].addr = rq_hdr_buf_map + BNXT_QPLIB_MAX_QP1_RQ_ETH_HDR_SIZE
2712                        + skip_bytes;
2713        s_sge[0].lkey = 0xFFFFFFFF;
2714        s_sge[0].length = offset ? BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV4 :
2715                                BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV6;
2716
2717        /* Second Send SGE */
2718        s_sge[1].addr = s_sge[0].addr + s_sge[0].length +
2719                        BNXT_QPLIB_MAX_QP1_RQ_BDETH_HDR_SIZE;
2720        if (pkt_type != BNXT_RE_ROCE_V1_PACKET)
2721                s_sge[1].addr += 8;
2722        s_sge[1].lkey = 0xFFFFFFFF;
2723        s_sge[1].length = 256;
2724
2725        /* First recv SGE */
2726
2727        r_sge[0].addr = shrq_hdr_buf_map;
2728        r_sge[0].lkey = 0xFFFFFFFF;
2729        r_sge[0].length = 40;
2730
2731        r_sge[1].addr = sqp_entry->sge.addr + offset;
2732        r_sge[1].lkey = sqp_entry->sge.lkey;
2733        r_sge[1].length = BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV6 + 256 - offset;
2734
2735        /* Create receive work request */
2736        rwr.num_sge = 2;
2737        rwr.sg_list = r_sge;
2738        rwr.wr_id = tbl_idx;
2739        rwr.next = NULL;
2740
2741        rc = bnxt_re_post_recv_shadow_qp(rdev, qp, &rwr);
2742        if (rc) {
2743                dev_err(rdev_to_dev(rdev),
2744                        "Failed to post Rx buffers to shadow QP");
2745                return -ENOMEM;
2746        }
2747
2748        swr->num_sge = 2;
2749        swr->sg_list = s_sge;
2750        swr->wr_id = tbl_idx;
2751        swr->opcode = IB_WR_SEND;
2752        swr->next = NULL;
2753
2754        udwr.ah = &rdev->sqp_ah->ib_ah;
2755        udwr.remote_qpn = rdev->qp1_sqp->qplib_qp.id;
2756        udwr.remote_qkey = rdev->qp1_sqp->qplib_qp.qkey;
2757
2758        /* post data received  in the send queue */
2759        rc = bnxt_re_post_send_shadow_qp(rdev, qp, swr);
2760
2761        return 0;
2762}
2763
2764static void bnxt_re_process_res_rawqp1_wc(struct ib_wc *wc,
2765                                          struct bnxt_qplib_cqe *cqe)
2766{
2767        wc->opcode = IB_WC_RECV;
2768        wc->status = __rawqp1_to_ib_wc_status(cqe->status);
2769        wc->wc_flags |= IB_WC_GRH;
2770}
2771
2772static bool bnxt_re_is_vlan_pkt(struct bnxt_qplib_cqe *orig_cqe,
2773                                u16 *vid, u8 *sl)
2774{
2775        bool ret = false;
2776        u32 metadata;
2777        u16 tpid;
2778
2779        metadata = orig_cqe->raweth_qp1_metadata;
2780        if (orig_cqe->raweth_qp1_flags2 &
2781                CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_VLAN) {
2782                tpid = ((metadata &
2783                         CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_TPID_MASK) >>
2784                         CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_TPID_SFT);
2785                if (tpid == ETH_P_8021Q) {
2786                        *vid = metadata &
2787                               CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_VID_MASK;
2788                        *sl = (metadata &
2789                               CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_PRI_MASK) >>
2790                               CQ_RES_RAWETH_QP1_RAWETH_QP1_METADATA_PRI_SFT;
2791                        ret = true;
2792                }
2793        }
2794
2795        return ret;
2796}
2797
2798static void bnxt_re_process_res_rc_wc(struct ib_wc *wc,
2799                                      struct bnxt_qplib_cqe *cqe)
2800{
2801        wc->opcode = IB_WC_RECV;
2802        wc->status = __rc_to_ib_wc_status(cqe->status);
2803
2804        if (cqe->flags & CQ_RES_RC_FLAGS_IMM)
2805                wc->wc_flags |= IB_WC_WITH_IMM;
2806        if (cqe->flags & CQ_RES_RC_FLAGS_INV)
2807                wc->wc_flags |= IB_WC_WITH_INVALIDATE;
2808        if ((cqe->flags & (CQ_RES_RC_FLAGS_RDMA | CQ_RES_RC_FLAGS_IMM)) ==
2809            (CQ_RES_RC_FLAGS_RDMA | CQ_RES_RC_FLAGS_IMM))
2810                wc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2811}
2812
2813static void bnxt_re_process_res_shadow_qp_wc(struct bnxt_re_qp *qp,
2814                                             struct ib_wc *wc,
2815                                             struct bnxt_qplib_cqe *cqe)
2816{
2817        struct bnxt_re_dev *rdev = qp->rdev;
2818        struct bnxt_re_qp *qp1_qp = NULL;
2819        struct bnxt_qplib_cqe *orig_cqe = NULL;
2820        struct bnxt_re_sqp_entries *sqp_entry = NULL;
2821        int nw_type;
2822        u32 tbl_idx;
2823        u16 vlan_id;
2824        u8 sl;
2825
2826        tbl_idx = cqe->wr_id;
2827
2828        sqp_entry = &rdev->sqp_tbl[tbl_idx];
2829        qp1_qp = sqp_entry->qp1_qp;
2830        orig_cqe = &sqp_entry->cqe;
2831
2832        wc->wr_id = sqp_entry->wrid;
2833        wc->byte_len = orig_cqe->length;
2834        wc->qp = &qp1_qp->ib_qp;
2835
2836        wc->ex.imm_data = orig_cqe->immdata;
2837        wc->src_qp = orig_cqe->src_qp;
2838        memcpy(wc->smac, orig_cqe->smac, ETH_ALEN);
2839        if (bnxt_re_is_vlan_pkt(orig_cqe, &vlan_id, &sl)) {
2840                wc->vlan_id = vlan_id;
2841                wc->sl = sl;
2842                wc->wc_flags |= IB_WC_WITH_VLAN;
2843        }
2844        wc->port_num = 1;
2845        wc->vendor_err = orig_cqe->status;
2846
2847        wc->opcode = IB_WC_RECV;
2848        wc->status = __rawqp1_to_ib_wc_status(orig_cqe->status);
2849        wc->wc_flags |= IB_WC_GRH;
2850
2851        nw_type = bnxt_re_check_packet_type(orig_cqe->raweth_qp1_flags,
2852                                            orig_cqe->raweth_qp1_flags2);
2853        if (nw_type >= 0) {
2854                wc->network_hdr_type = bnxt_re_to_ib_nw_type(nw_type);
2855                wc->wc_flags |= IB_WC_WITH_NETWORK_HDR_TYPE;
2856        }
2857}
2858
2859static void bnxt_re_process_res_ud_wc(struct ib_wc *wc,
2860                                      struct bnxt_qplib_cqe *cqe)
2861{
2862        wc->opcode = IB_WC_RECV;
2863        wc->status = __rc_to_ib_wc_status(cqe->status);
2864
2865        if (cqe->flags & CQ_RES_RC_FLAGS_IMM)
2866                wc->wc_flags |= IB_WC_WITH_IMM;
2867        if (cqe->flags & CQ_RES_RC_FLAGS_INV)
2868                wc->wc_flags |= IB_WC_WITH_INVALIDATE;
2869        if ((cqe->flags & (CQ_RES_RC_FLAGS_RDMA | CQ_RES_RC_FLAGS_IMM)) ==
2870            (CQ_RES_RC_FLAGS_RDMA | CQ_RES_RC_FLAGS_IMM))
2871                wc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2872}
2873
2874static int send_phantom_wqe(struct bnxt_re_qp *qp)
2875{
2876        struct bnxt_qplib_qp *lib_qp = &qp->qplib_qp;
2877        unsigned long flags;
2878        int rc = 0;
2879
2880        spin_lock_irqsave(&qp->sq_lock, flags);
2881
2882        rc = bnxt_re_bind_fence_mw(lib_qp);
2883        if (!rc) {
2884                lib_qp->sq.phantom_wqe_cnt++;
2885                dev_dbg(&lib_qp->sq.hwq.pdev->dev,
2886                        "qp %#x sq->prod %#x sw_prod %#x phantom_wqe_cnt %d\n",
2887                        lib_qp->id, lib_qp->sq.hwq.prod,
2888                        HWQ_CMP(lib_qp->sq.hwq.prod, &lib_qp->sq.hwq),
2889                        lib_qp->sq.phantom_wqe_cnt);
2890        }
2891
2892        spin_unlock_irqrestore(&qp->sq_lock, flags);
2893        return rc;
2894}
2895
2896int bnxt_re_poll_cq(struct ib_cq *ib_cq, int num_entries, struct ib_wc *wc)
2897{
2898        struct bnxt_re_cq *cq = container_of(ib_cq, struct bnxt_re_cq, ib_cq);
2899        struct bnxt_re_qp *qp;
2900        struct bnxt_qplib_cqe *cqe;
2901        int i, ncqe, budget;
2902        struct bnxt_qplib_q *sq;
2903        struct bnxt_qplib_qp *lib_qp;
2904        u32 tbl_idx;
2905        struct bnxt_re_sqp_entries *sqp_entry = NULL;
2906        unsigned long flags;
2907
2908        spin_lock_irqsave(&cq->cq_lock, flags);
2909        budget = min_t(u32, num_entries, cq->max_cql);
2910        num_entries = budget;
2911        if (!cq->cql) {
2912                dev_err(rdev_to_dev(cq->rdev), "POLL CQ : no CQL to use");
2913                goto exit;
2914        }
2915        cqe = &cq->cql[0];
2916        while (budget) {
2917                lib_qp = NULL;
2918                ncqe = bnxt_qplib_poll_cq(&cq->qplib_cq, cqe, budget, &lib_qp);
2919                if (lib_qp) {
2920                        sq = &lib_qp->sq;
2921                        if (sq->send_phantom) {
2922                                qp = container_of(lib_qp,
2923                                                  struct bnxt_re_qp, qplib_qp);
2924                                if (send_phantom_wqe(qp) == -ENOMEM)
2925                                        dev_err(rdev_to_dev(cq->rdev),
2926                                                "Phantom failed! Scheduled to send again\n");
2927                                else
2928                                        sq->send_phantom = false;
2929                        }
2930                }
2931                if (ncqe < budget)
2932                        ncqe += bnxt_qplib_process_flush_list(&cq->qplib_cq,
2933                                                              cqe + ncqe,
2934                                                              budget - ncqe);
2935
2936                if (!ncqe)
2937                        break;
2938
2939                for (i = 0; i < ncqe; i++, cqe++) {
2940                        /* Transcribe each qplib_wqe back to ib_wc */
2941                        memset(wc, 0, sizeof(*wc));
2942
2943                        wc->wr_id = cqe->wr_id;
2944                        wc->byte_len = cqe->length;
2945                        qp = container_of
2946                                ((struct bnxt_qplib_qp *)
2947                                 (unsigned long)(cqe->qp_handle),
2948                                 struct bnxt_re_qp, qplib_qp);
2949                        if (!qp) {
2950                                dev_err(rdev_to_dev(cq->rdev),
2951                                        "POLL CQ : bad QP handle");
2952                                continue;
2953                        }
2954                        wc->qp = &qp->ib_qp;
2955                        wc->ex.imm_data = cqe->immdata;
2956                        wc->src_qp = cqe->src_qp;
2957                        memcpy(wc->smac, cqe->smac, ETH_ALEN);
2958                        wc->port_num = 1;
2959                        wc->vendor_err = cqe->status;
2960
2961                        switch (cqe->opcode) {
2962                        case CQ_BASE_CQE_TYPE_REQ:
2963                                if (qp->qplib_qp.id ==
2964                                    qp->rdev->qp1_sqp->qplib_qp.id) {
2965                                        /* Handle this completion with
2966                                         * the stored completion
2967                                         */
2968                                        memset(wc, 0, sizeof(*wc));
2969                                        continue;
2970                                }
2971                                bnxt_re_process_req_wc(wc, cqe);
2972                                break;
2973                        case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
2974                                if (!cqe->status) {
2975                                        int rc = 0;
2976
2977                                        rc = bnxt_re_process_raw_qp_pkt_rx
2978                                                                (qp, cqe);
2979                                        if (!rc) {
2980                                                memset(wc, 0, sizeof(*wc));
2981                                                continue;
2982                                        }
2983                                        cqe->status = -1;
2984                                }
2985                                /* Errors need not be looped back.
2986                                 * But change the wr_id to the one
2987                                 * stored in the table
2988                                 */
2989                                tbl_idx = cqe->wr_id;
2990                                sqp_entry = &cq->rdev->sqp_tbl[tbl_idx];
2991                                wc->wr_id = sqp_entry->wrid;
2992                                bnxt_re_process_res_rawqp1_wc(wc, cqe);
2993                                break;
2994                        case CQ_BASE_CQE_TYPE_RES_RC:
2995                                bnxt_re_process_res_rc_wc(wc, cqe);
2996                                break;
2997                        case CQ_BASE_CQE_TYPE_RES_UD:
2998                                if (qp->qplib_qp.id ==
2999                                    qp->rdev->qp1_sqp->qplib_qp.id) {
3000                                        /* Handle this completion with
3001                                         * the stored completion
3002                                         */
3003                                        if (cqe->status) {
3004                                                continue;
3005                                        } else {
3006                                                bnxt_re_process_res_shadow_qp_wc
3007                                                                (qp, wc, cqe);
3008                                                break;
3009                                        }
3010                                }
3011                                bnxt_re_process_res_ud_wc(wc, cqe);
3012                                break;
3013                        default:
3014                                dev_err(rdev_to_dev(cq->rdev),
3015                                        "POLL CQ : type 0x%x not handled",
3016                                        cqe->opcode);
3017                                continue;
3018                        }
3019                        wc++;
3020                        budget--;
3021                }
3022        }
3023exit:
3024        spin_unlock_irqrestore(&cq->cq_lock, flags);
3025        return num_entries - budget;
3026}
3027
3028int bnxt_re_req_notify_cq(struct ib_cq *ib_cq,
3029                          enum ib_cq_notify_flags ib_cqn_flags)
3030{
3031        struct bnxt_re_cq *cq = container_of(ib_cq, struct bnxt_re_cq, ib_cq);
3032        int type = 0, rc = 0;
3033        unsigned long flags;
3034
3035        spin_lock_irqsave(&cq->cq_lock, flags);
3036        /* Trigger on the very next completion */
3037        if (ib_cqn_flags & IB_CQ_NEXT_COMP)
3038                type = DBR_DBR_TYPE_CQ_ARMALL;
3039        /* Trigger on the next solicited completion */
3040        else if (ib_cqn_flags & IB_CQ_SOLICITED)
3041                type = DBR_DBR_TYPE_CQ_ARMSE;
3042
3043        /* Poll to see if there are missed events */
3044        if ((ib_cqn_flags & IB_CQ_REPORT_MISSED_EVENTS) &&
3045            !(bnxt_qplib_is_cq_empty(&cq->qplib_cq))) {
3046                rc = 1;
3047                goto exit;
3048        }
3049        bnxt_qplib_req_notify_cq(&cq->qplib_cq, type);
3050
3051exit:
3052        spin_unlock_irqrestore(&cq->cq_lock, flags);
3053        return rc;
3054}
3055
3056/* Memory Regions */
3057struct ib_mr *bnxt_re_get_dma_mr(struct ib_pd *ib_pd, int mr_access_flags)
3058{
3059        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
3060        struct bnxt_re_dev *rdev = pd->rdev;
3061        struct bnxt_re_mr *mr;
3062        u64 pbl = 0;
3063        int rc;
3064
3065        mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3066        if (!mr)
3067                return ERR_PTR(-ENOMEM);
3068
3069        mr->rdev = rdev;
3070        mr->qplib_mr.pd = &pd->qplib_pd;
3071        mr->qplib_mr.flags = __from_ib_access_flags(mr_access_flags);
3072        mr->qplib_mr.type = CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR;
3073
3074        /* Allocate and register 0 as the address */
3075        rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr);
3076        if (rc)
3077                goto fail;
3078
3079        mr->qplib_mr.hwq.level = PBL_LVL_MAX;
3080        mr->qplib_mr.total_size = -1; /* Infinte length */
3081        rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &mr->qplib_mr, &pbl, 0, false);
3082        if (rc)
3083                goto fail_mr;
3084
3085        mr->ib_mr.lkey = mr->qplib_mr.lkey;
3086        if (mr_access_flags & (IB_ACCESS_REMOTE_WRITE | IB_ACCESS_REMOTE_READ |
3087                               IB_ACCESS_REMOTE_ATOMIC))
3088                mr->ib_mr.rkey = mr->ib_mr.lkey;
3089        atomic_inc(&rdev->mr_count);
3090
3091        return &mr->ib_mr;
3092
3093fail_mr:
3094        bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr);
3095fail:
3096        kfree(mr);
3097        return ERR_PTR(rc);
3098}
3099
3100int bnxt_re_dereg_mr(struct ib_mr *ib_mr)
3101{
3102        struct bnxt_re_mr *mr = container_of(ib_mr, struct bnxt_re_mr, ib_mr);
3103        struct bnxt_re_dev *rdev = mr->rdev;
3104        int rc;
3105
3106        rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr);
3107        if (rc) {
3108                dev_err(rdev_to_dev(rdev), "Dereg MR failed: %#x\n", rc);
3109                return rc;
3110        }
3111
3112        if (mr->pages) {
3113                rc = bnxt_qplib_free_fast_reg_page_list(&rdev->qplib_res,
3114                                                        &mr->qplib_frpl);
3115                kfree(mr->pages);
3116                mr->npages = 0;
3117                mr->pages = NULL;
3118        }
3119        if (!IS_ERR_OR_NULL(mr->ib_umem))
3120                ib_umem_release(mr->ib_umem);
3121
3122        kfree(mr);
3123        atomic_dec(&rdev->mr_count);
3124        return rc;
3125}
3126
3127static int bnxt_re_set_page(struct ib_mr *ib_mr, u64 addr)
3128{
3129        struct bnxt_re_mr *mr = container_of(ib_mr, struct bnxt_re_mr, ib_mr);
3130
3131        if (unlikely(mr->npages == mr->qplib_frpl.max_pg_ptrs))
3132                return -ENOMEM;
3133
3134        mr->pages[mr->npages++] = addr;
3135        return 0;
3136}
3137
3138int bnxt_re_map_mr_sg(struct ib_mr *ib_mr, struct scatterlist *sg, int sg_nents,
3139                      unsigned int *sg_offset)
3140{
3141        struct bnxt_re_mr *mr = container_of(ib_mr, struct bnxt_re_mr, ib_mr);
3142
3143        mr->npages = 0;
3144        return ib_sg_to_pages(ib_mr, sg, sg_nents, sg_offset, bnxt_re_set_page);
3145}
3146
3147struct ib_mr *bnxt_re_alloc_mr(struct ib_pd *ib_pd, enum ib_mr_type type,
3148                               u32 max_num_sg)
3149{
3150        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
3151        struct bnxt_re_dev *rdev = pd->rdev;
3152        struct bnxt_re_mr *mr = NULL;
3153        int rc;
3154
3155        if (type != IB_MR_TYPE_MEM_REG) {
3156                dev_dbg(rdev_to_dev(rdev), "MR type 0x%x not supported", type);
3157                return ERR_PTR(-EINVAL);
3158        }
3159        if (max_num_sg > MAX_PBL_LVL_1_PGS)
3160                return ERR_PTR(-EINVAL);
3161
3162        mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3163        if (!mr)
3164                return ERR_PTR(-ENOMEM);
3165
3166        mr->rdev = rdev;
3167        mr->qplib_mr.pd = &pd->qplib_pd;
3168        mr->qplib_mr.flags = BNXT_QPLIB_FR_PMR;
3169        mr->qplib_mr.type = CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR;
3170
3171        rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr);
3172        if (rc)
3173                goto fail;
3174
3175        mr->ib_mr.lkey = mr->qplib_mr.lkey;
3176        mr->ib_mr.rkey = mr->ib_mr.lkey;
3177
3178        mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL);
3179        if (!mr->pages) {
3180                rc = -ENOMEM;
3181                goto fail;
3182        }
3183        rc = bnxt_qplib_alloc_fast_reg_page_list(&rdev->qplib_res,
3184                                                 &mr->qplib_frpl, max_num_sg);
3185        if (rc) {
3186                dev_err(rdev_to_dev(rdev),
3187                        "Failed to allocate HW FR page list");
3188                goto fail_mr;
3189        }
3190
3191        atomic_inc(&rdev->mr_count);
3192        return &mr->ib_mr;
3193
3194fail_mr:
3195        bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr);
3196fail:
3197        kfree(mr->pages);
3198        kfree(mr);
3199        return ERR_PTR(rc);
3200}
3201
3202struct ib_mw *bnxt_re_alloc_mw(struct ib_pd *ib_pd, enum ib_mw_type type,
3203                               struct ib_udata *udata)
3204{
3205        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
3206        struct bnxt_re_dev *rdev = pd->rdev;
3207        struct bnxt_re_mw *mw;
3208        int rc;
3209
3210        mw = kzalloc(sizeof(*mw), GFP_KERNEL);
3211        if (!mw)
3212                return ERR_PTR(-ENOMEM);
3213        mw->rdev = rdev;
3214        mw->qplib_mw.pd = &pd->qplib_pd;
3215
3216        mw->qplib_mw.type = (type == IB_MW_TYPE_1 ?
3217                               CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1 :
3218                               CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B);
3219        rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mw->qplib_mw);
3220        if (rc) {
3221                dev_err(rdev_to_dev(rdev), "Allocate MW failed!");
3222                goto fail;
3223        }
3224        mw->ib_mw.rkey = mw->qplib_mw.rkey;
3225
3226        atomic_inc(&rdev->mw_count);
3227        return &mw->ib_mw;
3228
3229fail:
3230        kfree(mw);
3231        return ERR_PTR(rc);
3232}
3233
3234int bnxt_re_dealloc_mw(struct ib_mw *ib_mw)
3235{
3236        struct bnxt_re_mw *mw = container_of(ib_mw, struct bnxt_re_mw, ib_mw);
3237        struct bnxt_re_dev *rdev = mw->rdev;
3238        int rc;
3239
3240        rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &mw->qplib_mw);
3241        if (rc) {
3242                dev_err(rdev_to_dev(rdev), "Free MW failed: %#x\n", rc);
3243                return rc;
3244        }
3245
3246        kfree(mw);
3247        atomic_dec(&rdev->mw_count);
3248        return rc;
3249}
3250
3251/* uverbs */
3252struct ib_mr *bnxt_re_reg_user_mr(struct ib_pd *ib_pd, u64 start, u64 length,
3253                                  u64 virt_addr, int mr_access_flags,
3254                                  struct ib_udata *udata)
3255{
3256        struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd);
3257        struct bnxt_re_dev *rdev = pd->rdev;
3258        struct bnxt_re_mr *mr;
3259        struct ib_umem *umem;
3260        u64 *pbl_tbl, *pbl_tbl_orig;
3261        int i, umem_pgs, pages, rc;
3262        struct scatterlist *sg;
3263        int entry;
3264
3265        if (length > BNXT_RE_MAX_MR_SIZE) {
3266                dev_err(rdev_to_dev(rdev), "MR Size: %lld > Max supported:%ld\n",
3267                        length, BNXT_RE_MAX_MR_SIZE);
3268                return ERR_PTR(-ENOMEM);
3269        }
3270
3271        mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3272        if (!mr)
3273                return ERR_PTR(-ENOMEM);
3274
3275        mr->rdev = rdev;
3276        mr->qplib_mr.pd = &pd->qplib_pd;
3277        mr->qplib_mr.flags = __from_ib_access_flags(mr_access_flags);
3278        mr->qplib_mr.type = CMDQ_ALLOCATE_MRW_MRW_FLAGS_MR;
3279
3280        umem = ib_umem_get(ib_pd->uobject->context, start, length,
3281                           mr_access_flags, 0);
3282        if (IS_ERR(umem)) {
3283                dev_err(rdev_to_dev(rdev), "Failed to get umem");
3284                rc = -EFAULT;
3285                goto free_mr;
3286        }
3287        mr->ib_umem = umem;
3288
3289        rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr);
3290        if (rc) {
3291                dev_err(rdev_to_dev(rdev), "Failed to allocate MR");
3292                goto release_umem;
3293        }
3294        /* The fixed portion of the rkey is the same as the lkey */
3295        mr->ib_mr.rkey = mr->qplib_mr.rkey;
3296
3297        mr->qplib_mr.va = virt_addr;
3298        umem_pgs = ib_umem_page_count(umem);
3299        if (!umem_pgs) {
3300                dev_err(rdev_to_dev(rdev), "umem is invalid!");
3301                rc = -EINVAL;
3302                goto free_mrw;
3303        }
3304        mr->qplib_mr.total_size = length;
3305
3306        pbl_tbl = kcalloc(umem_pgs, sizeof(u64 *), GFP_KERNEL);
3307        if (!pbl_tbl) {
3308                rc = -EINVAL;
3309                goto free_mrw;
3310        }
3311        pbl_tbl_orig = pbl_tbl;
3312
3313        if (umem->hugetlb) {
3314                dev_err(rdev_to_dev(rdev), "umem hugetlb not supported!");
3315                rc = -EFAULT;
3316                goto fail;
3317        }
3318
3319        if (umem->page_shift != PAGE_SHIFT) {
3320                dev_err(rdev_to_dev(rdev), "umem page shift unsupported!");
3321                rc = -EFAULT;
3322                goto fail;
3323        }
3324        /* Map umem buf ptrs to the PBL */
3325        for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
3326                pages = sg_dma_len(sg) >> umem->page_shift;
3327                for (i = 0; i < pages; i++, pbl_tbl++)
3328                        *pbl_tbl = sg_dma_address(sg) + (i << umem->page_shift);
3329        }
3330        rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &mr->qplib_mr, pbl_tbl_orig,
3331                               umem_pgs, false);
3332        if (rc) {
3333                dev_err(rdev_to_dev(rdev), "Failed to register user MR");
3334                goto fail;
3335        }
3336
3337        kfree(pbl_tbl_orig);
3338
3339        mr->ib_mr.lkey = mr->qplib_mr.lkey;
3340        mr->ib_mr.rkey = mr->qplib_mr.lkey;
3341        atomic_inc(&rdev->mr_count);
3342
3343        return &mr->ib_mr;
3344fail:
3345        kfree(pbl_tbl_orig);
3346free_mrw:
3347        bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr);
3348release_umem:
3349        ib_umem_release(umem);
3350free_mr:
3351        kfree(mr);
3352        return ERR_PTR(rc);
3353}
3354
3355struct ib_ucontext *bnxt_re_alloc_ucontext(struct ib_device *ibdev,
3356                                           struct ib_udata *udata)
3357{
3358        struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);
3359        struct bnxt_re_uctx_resp resp;
3360        struct bnxt_re_ucontext *uctx;
3361        struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
3362        int rc;
3363
3364        dev_dbg(rdev_to_dev(rdev), "ABI version requested %d",
3365                ibdev->uverbs_abi_ver);
3366
3367        if (ibdev->uverbs_abi_ver != BNXT_RE_ABI_VERSION) {
3368                dev_dbg(rdev_to_dev(rdev), " is different from the device %d ",
3369                        BNXT_RE_ABI_VERSION);
3370                return ERR_PTR(-EPERM);
3371        }
3372
3373        uctx = kzalloc(sizeof(*uctx), GFP_KERNEL);
3374        if (!uctx)
3375                return ERR_PTR(-ENOMEM);
3376
3377        uctx->rdev = rdev;
3378
3379        uctx->shpg = (void *)__get_free_page(GFP_KERNEL);
3380        if (!uctx->shpg) {
3381                rc = -ENOMEM;
3382                goto fail;
3383        }
3384        spin_lock_init(&uctx->sh_lock);
3385
3386        resp.dev_id = rdev->en_dev->pdev->devfn; /*Temp, Use idr_alloc instead*/
3387        resp.max_qp = rdev->qplib_ctx.qpc_count;
3388        resp.pg_size = PAGE_SIZE;
3389        resp.cqe_sz = sizeof(struct cq_base);
3390        resp.max_cqd = dev_attr->max_cq_wqes;
3391        resp.rsvd    = 0;
3392
3393        rc = ib_copy_to_udata(udata, &resp, sizeof(resp));
3394        if (rc) {
3395                dev_err(rdev_to_dev(rdev), "Failed to copy user context");
3396                rc = -EFAULT;
3397                goto cfail;
3398        }
3399
3400        return &uctx->ib_uctx;
3401cfail:
3402        free_page((unsigned long)uctx->shpg);
3403        uctx->shpg = NULL;
3404fail:
3405        kfree(uctx);
3406        return ERR_PTR(rc);
3407}
3408
3409int bnxt_re_dealloc_ucontext(struct ib_ucontext *ib_uctx)
3410{
3411        struct bnxt_re_ucontext *uctx = container_of(ib_uctx,
3412                                                   struct bnxt_re_ucontext,
3413                                                   ib_uctx);
3414
3415        struct bnxt_re_dev *rdev = uctx->rdev;
3416        int rc = 0;
3417
3418        if (uctx->shpg)
3419                free_page((unsigned long)uctx->shpg);
3420
3421        if (uctx->dpi.dbr) {
3422                /* Free DPI only if this is the first PD allocated by the
3423                 * application and mark the context dpi as NULL
3424                 */
3425                rc = bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
3426                                            &rdev->qplib_res.dpi_tbl,
3427                                            &uctx->dpi);
3428                if (rc)
3429                        dev_err(rdev_to_dev(rdev), "Deallocate HW DPI failed!");
3430                        /* Don't fail, continue*/
3431                uctx->dpi.dbr = NULL;
3432        }
3433
3434        kfree(uctx);
3435        return 0;
3436}
3437
3438/* Helper function to mmap the virtual memory from user app */
3439int bnxt_re_mmap(struct ib_ucontext *ib_uctx, struct vm_area_struct *vma)
3440{
3441        struct bnxt_re_ucontext *uctx = container_of(ib_uctx,
3442                                                   struct bnxt_re_ucontext,
3443                                                   ib_uctx);
3444        struct bnxt_re_dev *rdev = uctx->rdev;
3445        u64 pfn;
3446
3447        if (vma->vm_end - vma->vm_start != PAGE_SIZE)
3448                return -EINVAL;
3449
3450        if (vma->vm_pgoff) {
3451                vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
3452                if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
3453                                       PAGE_SIZE, vma->vm_page_prot)) {
3454                        dev_err(rdev_to_dev(rdev), "Failed to map DPI");
3455                        return -EAGAIN;
3456                }
3457        } else {
3458                pfn = virt_to_phys(uctx->shpg) >> PAGE_SHIFT;
3459                if (remap_pfn_range(vma, vma->vm_start,
3460                                    pfn, PAGE_SIZE, vma->vm_page_prot)) {
3461                        dev_err(rdev_to_dev(rdev),
3462                                "Failed to map shared page");
3463                        return -EAGAIN;
3464                }
3465        }
3466
3467        return 0;
3468}
3469