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20#include <linux/kernel.h>
21#include <linux/sched/signal.h>
22#include <linux/module.h>
23#include <linux/slab.h>
24#include <linux/vmalloc.h>
25#include <linux/pci.h>
26#include <linux/kthread.h>
27#include <linux/freezer.h>
28#include <linux/ratelimit.h>
29
30#include "dvbdev.h"
31#include "dvb_demux.h"
32#include "dmxdev.h"
33#include "dvb_net.h"
34#include "dvb_frontend.h"
35
36#include "va1j5jf8007t.h"
37#include "va1j5jf8007s.h"
38
39#define DRIVER_NAME "earth-pt1"
40
41#define PT1_PAGE_SHIFT 12
42#define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
43#define PT1_NR_UPACKETS 1024
44#define PT1_NR_BUFS 511
45
46struct pt1_buffer_page {
47 __le32 upackets[PT1_NR_UPACKETS];
48};
49
50struct pt1_table_page {
51 __le32 next_pfn;
52 __le32 buf_pfns[PT1_NR_BUFS];
53};
54
55struct pt1_buffer {
56 struct pt1_buffer_page *page;
57 dma_addr_t addr;
58};
59
60struct pt1_table {
61 struct pt1_table_page *page;
62 dma_addr_t addr;
63 struct pt1_buffer bufs[PT1_NR_BUFS];
64};
65
66#define PT1_NR_ADAPS 4
67
68struct pt1_adapter;
69
70struct pt1 {
71 struct pci_dev *pdev;
72 void __iomem *regs;
73 struct i2c_adapter i2c_adap;
74 int i2c_running;
75 struct pt1_adapter *adaps[PT1_NR_ADAPS];
76 struct pt1_table *tables;
77 struct task_struct *kthread;
78 int table_index;
79 int buf_index;
80
81 struct mutex lock;
82 int power;
83 int reset;
84};
85
86struct pt1_adapter {
87 struct pt1 *pt1;
88 int index;
89
90 u8 *buf;
91 int upacket_count;
92 int packet_count;
93 int st_count;
94
95 struct dvb_adapter adap;
96 struct dvb_demux demux;
97 int users;
98 struct dmxdev dmxdev;
99 struct dvb_frontend *fe;
100 int (*orig_set_voltage)(struct dvb_frontend *fe,
101 enum fe_sec_voltage voltage);
102 int (*orig_sleep)(struct dvb_frontend *fe);
103 int (*orig_init)(struct dvb_frontend *fe);
104
105 enum fe_sec_voltage voltage;
106 int sleep;
107};
108
109static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
110{
111 writel(data, pt1->regs + reg * 4);
112}
113
114static u32 pt1_read_reg(struct pt1 *pt1, int reg)
115{
116 return readl(pt1->regs + reg * 4);
117}
118
119static int pt1_nr_tables = 8;
120module_param_named(nr_tables, pt1_nr_tables, int, 0);
121
122static void pt1_increment_table_count(struct pt1 *pt1)
123{
124 pt1_write_reg(pt1, 0, 0x00000020);
125}
126
127static void pt1_init_table_count(struct pt1 *pt1)
128{
129 pt1_write_reg(pt1, 0, 0x00000010);
130}
131
132static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
133{
134 pt1_write_reg(pt1, 5, first_pfn);
135 pt1_write_reg(pt1, 0, 0x0c000040);
136}
137
138static void pt1_unregister_tables(struct pt1 *pt1)
139{
140 pt1_write_reg(pt1, 0, 0x08080000);
141}
142
143static int pt1_sync(struct pt1 *pt1)
144{
145 int i;
146 for (i = 0; i < 57; i++) {
147 if (pt1_read_reg(pt1, 0) & 0x20000000)
148 return 0;
149 pt1_write_reg(pt1, 0, 0x00000008);
150 }
151 dev_err(&pt1->pdev->dev, "could not sync\n");
152 return -EIO;
153}
154
155static u64 pt1_identify(struct pt1 *pt1)
156{
157 int i;
158 u64 id;
159 id = 0;
160 for (i = 0; i < 57; i++) {
161 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
162 pt1_write_reg(pt1, 0, 0x00000008);
163 }
164 return id;
165}
166
167static int pt1_unlock(struct pt1 *pt1)
168{
169 int i;
170 pt1_write_reg(pt1, 0, 0x00000008);
171 for (i = 0; i < 3; i++) {
172 if (pt1_read_reg(pt1, 0) & 0x80000000)
173 return 0;
174 schedule_timeout_uninterruptible((HZ + 999) / 1000);
175 }
176 dev_err(&pt1->pdev->dev, "could not unlock\n");
177 return -EIO;
178}
179
180static int pt1_reset_pci(struct pt1 *pt1)
181{
182 int i;
183 pt1_write_reg(pt1, 0, 0x01010000);
184 pt1_write_reg(pt1, 0, 0x01000000);
185 for (i = 0; i < 10; i++) {
186 if (pt1_read_reg(pt1, 0) & 0x00000001)
187 return 0;
188 schedule_timeout_uninterruptible((HZ + 999) / 1000);
189 }
190 dev_err(&pt1->pdev->dev, "could not reset PCI\n");
191 return -EIO;
192}
193
194static int pt1_reset_ram(struct pt1 *pt1)
195{
196 int i;
197 pt1_write_reg(pt1, 0, 0x02020000);
198 pt1_write_reg(pt1, 0, 0x02000000);
199 for (i = 0; i < 10; i++) {
200 if (pt1_read_reg(pt1, 0) & 0x00000002)
201 return 0;
202 schedule_timeout_uninterruptible((HZ + 999) / 1000);
203 }
204 dev_err(&pt1->pdev->dev, "could not reset RAM\n");
205 return -EIO;
206}
207
208static int pt1_do_enable_ram(struct pt1 *pt1)
209{
210 int i, j;
211 u32 status;
212 status = pt1_read_reg(pt1, 0) & 0x00000004;
213 pt1_write_reg(pt1, 0, 0x00000002);
214 for (i = 0; i < 10; i++) {
215 for (j = 0; j < 1024; j++) {
216 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
217 return 0;
218 }
219 schedule_timeout_uninterruptible((HZ + 999) / 1000);
220 }
221 dev_err(&pt1->pdev->dev, "could not enable RAM\n");
222 return -EIO;
223}
224
225static int pt1_enable_ram(struct pt1 *pt1)
226{
227 int i, ret;
228 int phase;
229 schedule_timeout_uninterruptible((HZ + 999) / 1000);
230 phase = pt1->pdev->device == 0x211a ? 128 : 166;
231 for (i = 0; i < phase; i++) {
232 ret = pt1_do_enable_ram(pt1);
233 if (ret < 0)
234 return ret;
235 }
236 return 0;
237}
238
239static void pt1_disable_ram(struct pt1 *pt1)
240{
241 pt1_write_reg(pt1, 0, 0x0b0b0000);
242}
243
244static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
245{
246 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
247}
248
249static void pt1_init_streams(struct pt1 *pt1)
250{
251 int i;
252 for (i = 0; i < PT1_NR_ADAPS; i++)
253 pt1_set_stream(pt1, i, 0);
254}
255
256static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
257{
258 u32 upacket;
259 int i;
260 int index;
261 struct pt1_adapter *adap;
262 int offset;
263 u8 *buf;
264 int sc;
265
266 if (!page->upackets[PT1_NR_UPACKETS - 1])
267 return 0;
268
269 for (i = 0; i < PT1_NR_UPACKETS; i++) {
270 upacket = le32_to_cpu(page->upackets[i]);
271 index = (upacket >> 29) - 1;
272 if (index < 0 || index >= PT1_NR_ADAPS)
273 continue;
274
275 adap = pt1->adaps[index];
276 if (upacket >> 25 & 1)
277 adap->upacket_count = 0;
278 else if (!adap->upacket_count)
279 continue;
280
281 if (upacket >> 24 & 1)
282 printk_ratelimited(KERN_INFO "earth-pt1: device buffer overflowing. table[%d] buf[%d]\n",
283 pt1->table_index, pt1->buf_index);
284 sc = upacket >> 26 & 0x7;
285 if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
286 printk_ratelimited(KERN_INFO "earth-pt1: data loss in streamID(adapter)[%d]\n",
287 index);
288 adap->st_count = sc;
289
290 buf = adap->buf;
291 offset = adap->packet_count * 188 + adap->upacket_count * 3;
292 buf[offset] = upacket >> 16;
293 buf[offset + 1] = upacket >> 8;
294 if (adap->upacket_count != 62)
295 buf[offset + 2] = upacket;
296
297 if (++adap->upacket_count >= 63) {
298 adap->upacket_count = 0;
299 if (++adap->packet_count >= 21) {
300 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
301 adap->packet_count = 0;
302 }
303 }
304 }
305
306 page->upackets[PT1_NR_UPACKETS - 1] = 0;
307 return 1;
308}
309
310static int pt1_thread(void *data)
311{
312 struct pt1 *pt1;
313 struct pt1_buffer_page *page;
314
315 pt1 = data;
316 set_freezable();
317
318 while (!kthread_should_stop()) {
319 try_to_freeze();
320
321 page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
322 if (!pt1_filter(pt1, page)) {
323 schedule_timeout_interruptible((HZ + 999) / 1000);
324 continue;
325 }
326
327 if (++pt1->buf_index >= PT1_NR_BUFS) {
328 pt1_increment_table_count(pt1);
329 pt1->buf_index = 0;
330 if (++pt1->table_index >= pt1_nr_tables)
331 pt1->table_index = 0;
332 }
333 }
334
335 return 0;
336}
337
338static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
339{
340 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
341}
342
343static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
344{
345 void *page;
346 dma_addr_t addr;
347
348 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
349 GFP_KERNEL);
350 if (page == NULL)
351 return NULL;
352
353 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
354 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
355
356 *addrp = addr;
357 *pfnp = addr >> PT1_PAGE_SHIFT;
358 return page;
359}
360
361static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
362{
363 pt1_free_page(pt1, buf->page, buf->addr);
364}
365
366static int
367pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
368{
369 struct pt1_buffer_page *page;
370 dma_addr_t addr;
371
372 page = pt1_alloc_page(pt1, &addr, pfnp);
373 if (page == NULL)
374 return -ENOMEM;
375
376 page->upackets[PT1_NR_UPACKETS - 1] = 0;
377
378 buf->page = page;
379 buf->addr = addr;
380 return 0;
381}
382
383static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
384{
385 int i;
386
387 for (i = 0; i < PT1_NR_BUFS; i++)
388 pt1_cleanup_buffer(pt1, &table->bufs[i]);
389
390 pt1_free_page(pt1, table->page, table->addr);
391}
392
393static int
394pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
395{
396 struct pt1_table_page *page;
397 dma_addr_t addr;
398 int i, ret;
399 u32 buf_pfn;
400
401 page = pt1_alloc_page(pt1, &addr, pfnp);
402 if (page == NULL)
403 return -ENOMEM;
404
405 for (i = 0; i < PT1_NR_BUFS; i++) {
406 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
407 if (ret < 0)
408 goto err;
409
410 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
411 }
412
413 pt1_increment_table_count(pt1);
414 table->page = page;
415 table->addr = addr;
416 return 0;
417
418err:
419 while (i--)
420 pt1_cleanup_buffer(pt1, &table->bufs[i]);
421
422 pt1_free_page(pt1, page, addr);
423 return ret;
424}
425
426static void pt1_cleanup_tables(struct pt1 *pt1)
427{
428 struct pt1_table *tables;
429 int i;
430
431 tables = pt1->tables;
432 pt1_unregister_tables(pt1);
433
434 for (i = 0; i < pt1_nr_tables; i++)
435 pt1_cleanup_table(pt1, &tables[i]);
436
437 vfree(tables);
438}
439
440static int pt1_init_tables(struct pt1 *pt1)
441{
442 struct pt1_table *tables;
443 int i, ret;
444 u32 first_pfn, pfn;
445
446 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
447 if (tables == NULL)
448 return -ENOMEM;
449
450 pt1_init_table_count(pt1);
451
452 i = 0;
453 if (pt1_nr_tables) {
454 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
455 if (ret)
456 goto err;
457 i++;
458 }
459
460 while (i < pt1_nr_tables) {
461 ret = pt1_init_table(pt1, &tables[i], &pfn);
462 if (ret)
463 goto err;
464 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
465 i++;
466 }
467
468 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
469
470 pt1_register_tables(pt1, first_pfn);
471 pt1->tables = tables;
472 return 0;
473
474err:
475 while (i--)
476 pt1_cleanup_table(pt1, &tables[i]);
477
478 vfree(tables);
479 return ret;
480}
481
482static int pt1_start_polling(struct pt1 *pt1)
483{
484 int ret = 0;
485
486 mutex_lock(&pt1->lock);
487 if (!pt1->kthread) {
488 pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
489 if (IS_ERR(pt1->kthread)) {
490 ret = PTR_ERR(pt1->kthread);
491 pt1->kthread = NULL;
492 }
493 }
494 mutex_unlock(&pt1->lock);
495 return ret;
496}
497
498static int pt1_start_feed(struct dvb_demux_feed *feed)
499{
500 struct pt1_adapter *adap;
501 adap = container_of(feed->demux, struct pt1_adapter, demux);
502 if (!adap->users++) {
503 int ret;
504
505 ret = pt1_start_polling(adap->pt1);
506 if (ret)
507 return ret;
508 pt1_set_stream(adap->pt1, adap->index, 1);
509 }
510 return 0;
511}
512
513static void pt1_stop_polling(struct pt1 *pt1)
514{
515 int i, count;
516
517 mutex_lock(&pt1->lock);
518 for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
519 count += pt1->adaps[i]->users;
520
521 if (count == 0 && pt1->kthread) {
522 kthread_stop(pt1->kthread);
523 pt1->kthread = NULL;
524 }
525 mutex_unlock(&pt1->lock);
526}
527
528static int pt1_stop_feed(struct dvb_demux_feed *feed)
529{
530 struct pt1_adapter *adap;
531 adap = container_of(feed->demux, struct pt1_adapter, demux);
532 if (!--adap->users) {
533 pt1_set_stream(adap->pt1, adap->index, 0);
534 pt1_stop_polling(adap->pt1);
535 }
536 return 0;
537}
538
539static void
540pt1_update_power(struct pt1 *pt1)
541{
542 int bits;
543 int i;
544 struct pt1_adapter *adap;
545 static const int sleep_bits[] = {
546 1 << 4,
547 1 << 6 | 1 << 7,
548 1 << 5,
549 1 << 6 | 1 << 8,
550 };
551
552 bits = pt1->power | !pt1->reset << 3;
553 mutex_lock(&pt1->lock);
554 for (i = 0; i < PT1_NR_ADAPS; i++) {
555 adap = pt1->adaps[i];
556 switch (adap->voltage) {
557 case SEC_VOLTAGE_13:
558 bits |= 1 << 1;
559 break;
560 case SEC_VOLTAGE_18:
561 bits |= 1 << 1 | 1 << 2;
562 break;
563 default:
564 break;
565 }
566
567
568 bits |= sleep_bits[i];
569 }
570 pt1_write_reg(pt1, 1, bits);
571 mutex_unlock(&pt1->lock);
572}
573
574static int pt1_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
575{
576 struct pt1_adapter *adap;
577
578 adap = container_of(fe->dvb, struct pt1_adapter, adap);
579 adap->voltage = voltage;
580 pt1_update_power(adap->pt1);
581
582 if (adap->orig_set_voltage)
583 return adap->orig_set_voltage(fe, voltage);
584 else
585 return 0;
586}
587
588static int pt1_sleep(struct dvb_frontend *fe)
589{
590 struct pt1_adapter *adap;
591
592 adap = container_of(fe->dvb, struct pt1_adapter, adap);
593 adap->sleep = 1;
594 pt1_update_power(adap->pt1);
595
596 if (adap->orig_sleep)
597 return adap->orig_sleep(fe);
598 else
599 return 0;
600}
601
602static int pt1_wakeup(struct dvb_frontend *fe)
603{
604 struct pt1_adapter *adap;
605
606 adap = container_of(fe->dvb, struct pt1_adapter, adap);
607 adap->sleep = 0;
608 pt1_update_power(adap->pt1);
609 schedule_timeout_uninterruptible((HZ + 999) / 1000);
610
611 if (adap->orig_init)
612 return adap->orig_init(fe);
613 else
614 return 0;
615}
616
617static void pt1_free_adapter(struct pt1_adapter *adap)
618{
619 adap->demux.dmx.close(&adap->demux.dmx);
620 dvb_dmxdev_release(&adap->dmxdev);
621 dvb_dmx_release(&adap->demux);
622 dvb_unregister_adapter(&adap->adap);
623 free_page((unsigned long)adap->buf);
624 kfree(adap);
625}
626
627DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
628
629static struct pt1_adapter *
630pt1_alloc_adapter(struct pt1 *pt1)
631{
632 struct pt1_adapter *adap;
633 void *buf;
634 struct dvb_adapter *dvb_adap;
635 struct dvb_demux *demux;
636 struct dmxdev *dmxdev;
637 int ret;
638
639 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
640 if (!adap) {
641 ret = -ENOMEM;
642 goto err;
643 }
644
645 adap->pt1 = pt1;
646
647 adap->voltage = SEC_VOLTAGE_OFF;
648 adap->sleep = 1;
649
650 buf = (u8 *)__get_free_page(GFP_KERNEL);
651 if (!buf) {
652 ret = -ENOMEM;
653 goto err_kfree;
654 }
655
656 adap->buf = buf;
657 adap->upacket_count = 0;
658 adap->packet_count = 0;
659 adap->st_count = -1;
660
661 dvb_adap = &adap->adap;
662 dvb_adap->priv = adap;
663 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
664 &pt1->pdev->dev, adapter_nr);
665 if (ret < 0)
666 goto err_free_page;
667
668 demux = &adap->demux;
669 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
670 demux->priv = adap;
671 demux->feednum = 256;
672 demux->filternum = 256;
673 demux->start_feed = pt1_start_feed;
674 demux->stop_feed = pt1_stop_feed;
675 demux->write_to_decoder = NULL;
676 ret = dvb_dmx_init(demux);
677 if (ret < 0)
678 goto err_unregister_adapter;
679
680 dmxdev = &adap->dmxdev;
681 dmxdev->filternum = 256;
682 dmxdev->demux = &demux->dmx;
683 dmxdev->capabilities = 0;
684 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
685 if (ret < 0)
686 goto err_dmx_release;
687
688 return adap;
689
690err_dmx_release:
691 dvb_dmx_release(demux);
692err_unregister_adapter:
693 dvb_unregister_adapter(dvb_adap);
694err_free_page:
695 free_page((unsigned long)buf);
696err_kfree:
697 kfree(adap);
698err:
699 return ERR_PTR(ret);
700}
701
702static void pt1_cleanup_adapters(struct pt1 *pt1)
703{
704 int i;
705 for (i = 0; i < PT1_NR_ADAPS; i++)
706 pt1_free_adapter(pt1->adaps[i]);
707}
708
709static int pt1_init_adapters(struct pt1 *pt1)
710{
711 int i;
712 struct pt1_adapter *adap;
713 int ret;
714
715 for (i = 0; i < PT1_NR_ADAPS; i++) {
716 adap = pt1_alloc_adapter(pt1);
717 if (IS_ERR(adap)) {
718 ret = PTR_ERR(adap);
719 goto err;
720 }
721
722 adap->index = i;
723 pt1->adaps[i] = adap;
724 }
725 return 0;
726
727err:
728 while (i--)
729 pt1_free_adapter(pt1->adaps[i]);
730
731 return ret;
732}
733
734static void pt1_cleanup_frontend(struct pt1_adapter *adap)
735{
736 dvb_unregister_frontend(adap->fe);
737}
738
739static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
740{
741 int ret;
742
743 adap->orig_set_voltage = fe->ops.set_voltage;
744 adap->orig_sleep = fe->ops.sleep;
745 adap->orig_init = fe->ops.init;
746 fe->ops.set_voltage = pt1_set_voltage;
747 fe->ops.sleep = pt1_sleep;
748 fe->ops.init = pt1_wakeup;
749
750 ret = dvb_register_frontend(&adap->adap, fe);
751 if (ret < 0)
752 return ret;
753
754 adap->fe = fe;
755 return 0;
756}
757
758static void pt1_cleanup_frontends(struct pt1 *pt1)
759{
760 int i;
761 for (i = 0; i < PT1_NR_ADAPS; i++)
762 pt1_cleanup_frontend(pt1->adaps[i]);
763}
764
765struct pt1_config {
766 struct va1j5jf8007s_config va1j5jf8007s_config;
767 struct va1j5jf8007t_config va1j5jf8007t_config;
768};
769
770static const struct pt1_config pt1_configs[2] = {
771 {
772 {
773 .demod_address = 0x1b,
774 .frequency = VA1J5JF8007S_20MHZ,
775 },
776 {
777 .demod_address = 0x1a,
778 .frequency = VA1J5JF8007T_20MHZ,
779 },
780 }, {
781 {
782 .demod_address = 0x19,
783 .frequency = VA1J5JF8007S_20MHZ,
784 },
785 {
786 .demod_address = 0x18,
787 .frequency = VA1J5JF8007T_20MHZ,
788 },
789 },
790};
791
792static const struct pt1_config pt2_configs[2] = {
793 {
794 {
795 .demod_address = 0x1b,
796 .frequency = VA1J5JF8007S_25MHZ,
797 },
798 {
799 .demod_address = 0x1a,
800 .frequency = VA1J5JF8007T_25MHZ,
801 },
802 }, {
803 {
804 .demod_address = 0x19,
805 .frequency = VA1J5JF8007S_25MHZ,
806 },
807 {
808 .demod_address = 0x18,
809 .frequency = VA1J5JF8007T_25MHZ,
810 },
811 },
812};
813
814static int pt1_init_frontends(struct pt1 *pt1)
815{
816 int i, j;
817 struct i2c_adapter *i2c_adap;
818 const struct pt1_config *configs, *config;
819 struct dvb_frontend *fe[4];
820 int ret;
821
822 i = 0;
823 j = 0;
824
825 i2c_adap = &pt1->i2c_adap;
826 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
827 do {
828 config = &configs[i / 2];
829
830 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
831 i2c_adap);
832 if (!fe[i]) {
833 ret = -ENODEV;
834 goto err;
835 }
836 i++;
837
838 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
839 i2c_adap);
840 if (!fe[i]) {
841 ret = -ENODEV;
842 goto err;
843 }
844 i++;
845
846 ret = va1j5jf8007s_prepare(fe[i - 2]);
847 if (ret < 0)
848 goto err;
849
850 ret = va1j5jf8007t_prepare(fe[i - 1]);
851 if (ret < 0)
852 goto err;
853
854 } while (i < 4);
855
856 do {
857 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
858 if (ret < 0)
859 goto err;
860 } while (++j < 4);
861
862 return 0;
863
864err:
865 while (i-- > j)
866 fe[i]->ops.release(fe[i]);
867
868 while (j--)
869 dvb_unregister_frontend(fe[j]);
870
871 return ret;
872}
873
874static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
875 int clock, int data, int next_addr)
876{
877 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
878 !clock << 11 | !data << 10 | next_addr);
879}
880
881static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
882{
883 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
884 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
885 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
886 *addrp = addr + 3;
887}
888
889static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
890{
891 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
892 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
893 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
894 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
895 *addrp = addr + 4;
896}
897
898static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
899{
900 int i;
901 for (i = 0; i < 8; i++)
902 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
903 pt1_i2c_write_bit(pt1, addr, &addr, 1);
904 *addrp = addr;
905}
906
907static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
908{
909 int i;
910 for (i = 0; i < 8; i++)
911 pt1_i2c_read_bit(pt1, addr, &addr);
912 pt1_i2c_write_bit(pt1, addr, &addr, last);
913 *addrp = addr;
914}
915
916static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
917{
918 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
919 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
920 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
921 *addrp = addr + 3;
922}
923
924static void
925pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
926{
927 int i;
928 pt1_i2c_prepare(pt1, addr, &addr);
929 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
930 for (i = 0; i < msg->len; i++)
931 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
932 *addrp = addr;
933}
934
935static void
936pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
937{
938 int i;
939 pt1_i2c_prepare(pt1, addr, &addr);
940 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
941 for (i = 0; i < msg->len; i++)
942 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
943 *addrp = addr;
944}
945
946static int pt1_i2c_end(struct pt1 *pt1, int addr)
947{
948 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
949 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
950 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
951
952 pt1_write_reg(pt1, 0, 0x00000004);
953 do {
954 if (signal_pending(current))
955 return -EINTR;
956 schedule_timeout_interruptible((HZ + 999) / 1000);
957 } while (pt1_read_reg(pt1, 0) & 0x00000080);
958 return 0;
959}
960
961static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
962{
963 int addr;
964 addr = 0;
965
966 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr );
967 addr = addr + 1;
968
969 if (!pt1->i2c_running) {
970 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
971 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
972 addr = addr + 2;
973 pt1->i2c_running = 1;
974 }
975 *addrp = addr;
976}
977
978static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
979{
980 struct pt1 *pt1;
981 int i;
982 struct i2c_msg *msg, *next_msg;
983 int addr, ret;
984 u16 len;
985 u32 word;
986
987 pt1 = i2c_get_adapdata(adap);
988
989 for (i = 0; i < num; i++) {
990 msg = &msgs[i];
991 if (msg->flags & I2C_M_RD)
992 return -ENOTSUPP;
993
994 if (i + 1 < num)
995 next_msg = &msgs[i + 1];
996 else
997 next_msg = NULL;
998
999 if (next_msg && next_msg->flags & I2C_M_RD) {
1000 i++;
1001
1002 len = next_msg->len;
1003 if (len > 4)
1004 return -ENOTSUPP;
1005
1006 pt1_i2c_begin(pt1, &addr);
1007 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1008 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
1009 ret = pt1_i2c_end(pt1, addr);
1010 if (ret < 0)
1011 return ret;
1012
1013 word = pt1_read_reg(pt1, 2);
1014 while (len--) {
1015 next_msg->buf[len] = word;
1016 word >>= 8;
1017 }
1018 } else {
1019 pt1_i2c_begin(pt1, &addr);
1020 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1021 ret = pt1_i2c_end(pt1, addr);
1022 if (ret < 0)
1023 return ret;
1024 }
1025 }
1026
1027 return num;
1028}
1029
1030static u32 pt1_i2c_func(struct i2c_adapter *adap)
1031{
1032 return I2C_FUNC_I2C;
1033}
1034
1035static const struct i2c_algorithm pt1_i2c_algo = {
1036 .master_xfer = pt1_i2c_xfer,
1037 .functionality = pt1_i2c_func,
1038};
1039
1040static void pt1_i2c_wait(struct pt1 *pt1)
1041{
1042 int i;
1043 for (i = 0; i < 128; i++)
1044 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1045}
1046
1047static void pt1_i2c_init(struct pt1 *pt1)
1048{
1049 int i;
1050 for (i = 0; i < 1024; i++)
1051 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1052}
1053
1054static void pt1_remove(struct pci_dev *pdev)
1055{
1056 struct pt1 *pt1;
1057 void __iomem *regs;
1058
1059 pt1 = pci_get_drvdata(pdev);
1060 regs = pt1->regs;
1061
1062 if (pt1->kthread)
1063 kthread_stop(pt1->kthread);
1064 pt1_cleanup_tables(pt1);
1065 pt1_cleanup_frontends(pt1);
1066 pt1_disable_ram(pt1);
1067 pt1->power = 0;
1068 pt1->reset = 1;
1069 pt1_update_power(pt1);
1070 pt1_cleanup_adapters(pt1);
1071 i2c_del_adapter(&pt1->i2c_adap);
1072 kfree(pt1);
1073 pci_iounmap(pdev, regs);
1074 pci_release_regions(pdev);
1075 pci_disable_device(pdev);
1076}
1077
1078static int pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1079{
1080 int ret;
1081 void __iomem *regs;
1082 struct pt1 *pt1;
1083 struct i2c_adapter *i2c_adap;
1084
1085 ret = pci_enable_device(pdev);
1086 if (ret < 0)
1087 goto err;
1088
1089 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1090 if (ret < 0)
1091 goto err_pci_disable_device;
1092
1093 pci_set_master(pdev);
1094
1095 ret = pci_request_regions(pdev, DRIVER_NAME);
1096 if (ret < 0)
1097 goto err_pci_disable_device;
1098
1099 regs = pci_iomap(pdev, 0, 0);
1100 if (!regs) {
1101 ret = -EIO;
1102 goto err_pci_release_regions;
1103 }
1104
1105 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1106 if (!pt1) {
1107 ret = -ENOMEM;
1108 goto err_pci_iounmap;
1109 }
1110
1111 mutex_init(&pt1->lock);
1112 pt1->pdev = pdev;
1113 pt1->regs = regs;
1114 pci_set_drvdata(pdev, pt1);
1115
1116 ret = pt1_init_adapters(pt1);
1117 if (ret < 0)
1118 goto err_kfree;
1119
1120 mutex_init(&pt1->lock);
1121
1122 pt1->power = 0;
1123 pt1->reset = 1;
1124 pt1_update_power(pt1);
1125
1126 i2c_adap = &pt1->i2c_adap;
1127 i2c_adap->algo = &pt1_i2c_algo;
1128 i2c_adap->algo_data = NULL;
1129 i2c_adap->dev.parent = &pdev->dev;
1130 strcpy(i2c_adap->name, DRIVER_NAME);
1131 i2c_set_adapdata(i2c_adap, pt1);
1132 ret = i2c_add_adapter(i2c_adap);
1133 if (ret < 0)
1134 goto err_pt1_cleanup_adapters;
1135
1136 pt1_i2c_init(pt1);
1137 pt1_i2c_wait(pt1);
1138
1139 ret = pt1_sync(pt1);
1140 if (ret < 0)
1141 goto err_i2c_del_adapter;
1142
1143 pt1_identify(pt1);
1144
1145 ret = pt1_unlock(pt1);
1146 if (ret < 0)
1147 goto err_i2c_del_adapter;
1148
1149 ret = pt1_reset_pci(pt1);
1150 if (ret < 0)
1151 goto err_i2c_del_adapter;
1152
1153 ret = pt1_reset_ram(pt1);
1154 if (ret < 0)
1155 goto err_i2c_del_adapter;
1156
1157 ret = pt1_enable_ram(pt1);
1158 if (ret < 0)
1159 goto err_i2c_del_adapter;
1160
1161 pt1_init_streams(pt1);
1162
1163 pt1->power = 1;
1164 pt1_update_power(pt1);
1165 schedule_timeout_uninterruptible((HZ + 49) / 50);
1166
1167 pt1->reset = 0;
1168 pt1_update_power(pt1);
1169 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1170
1171 ret = pt1_init_frontends(pt1);
1172 if (ret < 0)
1173 goto err_pt1_disable_ram;
1174
1175 ret = pt1_init_tables(pt1);
1176 if (ret < 0)
1177 goto err_pt1_cleanup_frontends;
1178
1179 return 0;
1180
1181err_pt1_cleanup_frontends:
1182 pt1_cleanup_frontends(pt1);
1183err_pt1_disable_ram:
1184 pt1_disable_ram(pt1);
1185 pt1->power = 0;
1186 pt1->reset = 1;
1187 pt1_update_power(pt1);
1188err_i2c_del_adapter:
1189 i2c_del_adapter(i2c_adap);
1190err_pt1_cleanup_adapters:
1191 pt1_cleanup_adapters(pt1);
1192err_kfree:
1193 kfree(pt1);
1194err_pci_iounmap:
1195 pci_iounmap(pdev, regs);
1196err_pci_release_regions:
1197 pci_release_regions(pdev);
1198err_pci_disable_device:
1199 pci_disable_device(pdev);
1200err:
1201 return ret;
1202
1203}
1204
1205static const struct pci_device_id pt1_id_table[] = {
1206 { PCI_DEVICE(0x10ee, 0x211a) },
1207 { PCI_DEVICE(0x10ee, 0x222a) },
1208 { },
1209};
1210MODULE_DEVICE_TABLE(pci, pt1_id_table);
1211
1212static struct pci_driver pt1_driver = {
1213 .name = DRIVER_NAME,
1214 .probe = pt1_probe,
1215 .remove = pt1_remove,
1216 .id_table = pt1_id_table,
1217};
1218
1219module_pci_driver(pt1_driver);
1220
1221MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1222MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1223MODULE_LICENSE("GPL");
1224
