LXR linux/drivers/media/platform/vsp1/vsp1

   1/*
   2 * vsp1_bru.c  --  R-Car VSP1 Blend ROP Unit
   3 *
   4 * Copyright (C) 2013 Renesas Corporation
   5 *
   6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 */
  13
  14#include <linux/device.h>
  15#include <linux/gfp.h>
  16
  17#include <media/v4l2-subdev.h>
  18
  19#include "vsp1.h"
  20#include "vsp1_bru.h"
  21#include "vsp1_dl.h"
  22#include "vsp1_pipe.h"
  23#include "vsp1_rwpf.h"
  24#include "vsp1_video.h"
  25
  26#define BRU_MIN_SIZE                            1U
  27#define BRU_MAX_SIZE                            8190U
  28
  29/* -----------------------------------------------------------------------------
  30 * Device Access
  31 */
  32
  33static inline void vsp1_bru_write(struct vsp1_bru *bru, struct vsp1_dl_list *dl,
  34                                  u32 reg, u32 data)
  35{
  36        vsp1_dl_list_write(dl, bru->base + reg, data);
  37}
  38
  39/* -----------------------------------------------------------------------------
  40 * Controls
  41 */
  42
  43static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
  44{
  45        struct vsp1_bru *bru =
  46                container_of(ctrl->handler, struct vsp1_bru, ctrls);
  47
  48        switch (ctrl->id) {
  49        case V4L2_CID_BG_COLOR:
  50                bru->bgcolor = ctrl->val;
  51                break;
  52        }
  53
  54        return 0;
  55}
  56
  57static const struct v4l2_ctrl_ops bru_ctrl_ops = {
  58        .s_ctrl = bru_s_ctrl,
  59};
  60
  61/* -----------------------------------------------------------------------------
  62 * V4L2 Subdevice Operations
  63 */
  64
  65/*
  66 * The BRU can't perform format conversion, all sink and source formats must be
  67 * identical. We pick the format on the first sink pad (pad 0) and propagate it
  68 * to all other pads.
  69 */
  70
  71static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
  72                              struct v4l2_subdev_pad_config *cfg,
  73                              struct v4l2_subdev_mbus_code_enum *code)
  74{
  75        static const unsigned int codes[] = {
  76                MEDIA_BUS_FMT_ARGB8888_1X32,
  77                MEDIA_BUS_FMT_AYUV8_1X32,
  78        };
  79
  80        return vsp1_subdev_enum_mbus_code(subdev, cfg, code, codes,
  81                                          ARRAY_SIZE(codes));
  82}
  83
  84static int bru_enum_frame_size(struct v4l2_subdev *subdev,
  85                               struct v4l2_subdev_pad_config *cfg,
  86                               struct v4l2_subdev_frame_size_enum *fse)
  87{
  88        if (fse->index)
  89                return -EINVAL;
  90
  91        if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
  92            fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
  93                return -EINVAL;
  94
  95        fse->min_width = BRU_MIN_SIZE;
  96        fse->max_width = BRU_MAX_SIZE;
  97        fse->min_height = BRU_MIN_SIZE;
  98        fse->max_height = BRU_MAX_SIZE;
  99
 100        return 0;
 101}
 102
 103static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
 104                                         struct v4l2_subdev_pad_config *cfg,
 105                                         unsigned int pad)
 106{
 107        return v4l2_subdev_get_try_compose(&bru->entity.subdev, cfg, pad);
 108}
 109
 110static void bru_try_format(struct vsp1_bru *bru,
 111                           struct v4l2_subdev_pad_config *config,
 112                           unsigned int pad, struct v4l2_mbus_framefmt *fmt)
 113{
 114        struct v4l2_mbus_framefmt *format;
 115
 116        switch (pad) {
 117        case BRU_PAD_SINK(0):
 118                /* Default to YUV if the requested format is not supported. */
 119                if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
 120                    fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
 121                        fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
 122                break;
 123
 124        default:
 125                /* The BRU can't perform format conversion. */
 126                format = vsp1_entity_get_pad_format(&bru->entity, config,
 127                                                    BRU_PAD_SINK(0));
 128                fmt->code = format->code;
 129                break;
 130        }
 131
 132        fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
 133        fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
 134        fmt->field = V4L2_FIELD_NONE;
 135        fmt->colorspace = V4L2_COLORSPACE_SRGB;
 136}
 137
 138static int bru_set_format(struct v4l2_subdev *subdev,
 139                          struct v4l2_subdev_pad_config *cfg,
 140                          struct v4l2_subdev_format *fmt)
 141{
 142        struct vsp1_bru *bru = to_bru(subdev);
 143        struct v4l2_subdev_pad_config *config;
 144        struct v4l2_mbus_framefmt *format;
 145        int ret = 0;
 146
 147        mutex_lock(&bru->entity.lock);
 148
 149        config = vsp1_entity_get_pad_config(&bru->entity, cfg, fmt->which);
 150        if (!config) {
 151                ret = -EINVAL;
 152                goto done;
 153        }
 154
 155        bru_try_format(bru, config, fmt->pad, &fmt->format);
 156
 157        format = vsp1_entity_get_pad_format(&bru->entity, config, fmt->pad);
 158        *format = fmt->format;
 159
 160        /* Reset the compose rectangle */
 161        if (fmt->pad != bru->entity.source_pad) {
 162                struct v4l2_rect *compose;
 163
 164                compose = bru_get_compose(bru, config, fmt->pad);
 165                compose->left = 0;
 166                compose->top = 0;
 167                compose->width = format->width;
 168                compose->height = format->height;
 169        }
 170
 171        /* Propagate the format code to all pads */
 172        if (fmt->pad == BRU_PAD_SINK(0)) {
 173                unsigned int i;
 174
 175                for (i = 0; i <= bru->entity.source_pad; ++i) {
 176                        format = vsp1_entity_get_pad_format(&bru->entity,
 177                                                            config, i);
 178                        format->code = fmt->format.code;
 179                }
 180        }
 181
 182done:
 183        mutex_unlock(&bru->entity.lock);
 184        return ret;
 185}
 186
 187static int bru_get_selection(struct v4l2_subdev *subdev,
 188                             struct v4l2_subdev_pad_config *cfg,
 189                             struct v4l2_subdev_selection *sel)
 190{
 191        struct vsp1_bru *bru = to_bru(subdev);
 192        struct v4l2_subdev_pad_config *config;
 193
 194        if (sel->pad == bru->entity.source_pad)
 195                return -EINVAL;
 196
 197        switch (sel->target) {
 198        case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 199                sel->r.left = 0;
 200                sel->r.top = 0;
 201                sel->r.width = BRU_MAX_SIZE;
 202                sel->r.height = BRU_MAX_SIZE;
 203                return 0;
 204
 205        case V4L2_SEL_TGT_COMPOSE:
 206                config = vsp1_entity_get_pad_config(&bru->entity, cfg,
 207                                                    sel->which);
 208                if (!config)
 209                        return -EINVAL;
 210
 211                mutex_lock(&bru->entity.lock);
 212                sel->r = *bru_get_compose(bru, config, sel->pad);
 213                mutex_unlock(&bru->entity.lock);
 214                return 0;
 215
 216        default:
 217                return -EINVAL;
 218        }
 219}
 220
 221static int bru_set_selection(struct v4l2_subdev *subdev,
 222                             struct v4l2_subdev_pad_config *cfg,
 223                             struct v4l2_subdev_selection *sel)
 224{
 225        struct vsp1_bru *bru = to_bru(subdev);
 226        struct v4l2_subdev_pad_config *config;
 227        struct v4l2_mbus_framefmt *format;
 228        struct v4l2_rect *compose;
 229        int ret = 0;
 230
 231        if (sel->pad == bru->entity.source_pad)
 232                return -EINVAL;
 233
 234        if (sel->target != V4L2_SEL_TGT_COMPOSE)
 235                return -EINVAL;
 236
 237        mutex_lock(&bru->entity.lock);
 238
 239        config = vsp1_entity_get_pad_config(&bru->entity, cfg, sel->which);
 240        if (!config) {
 241                ret = -EINVAL;
 242                goto done;
 243        }
 244
 245        /*
 246         * The compose rectangle top left corner must be inside the output
 247         * frame.
 248         */
 249        format = vsp1_entity_get_pad_format(&bru->entity, config,
 250                                            bru->entity.source_pad);
 251        sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
 252        sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
 253
 254        /*
 255         * Scaling isn't supported, the compose rectangle size must be identical
 256         * to the sink format size.
 257         */
 258        format = vsp1_entity_get_pad_format(&bru->entity, config, sel->pad);
 259        sel->r.width = format->width;
 260        sel->r.height = format->height;
 261
 262        compose = bru_get_compose(bru, config, sel->pad);
 263        *compose = sel->r;
 264
 265done:
 266        mutex_unlock(&bru->entity.lock);
 267        return ret;
 268}
 269
 270static const struct v4l2_subdev_pad_ops bru_pad_ops = {
 271        .init_cfg = vsp1_entity_init_cfg,
 272        .enum_mbus_code = bru_enum_mbus_code,
 273        .enum_frame_size = bru_enum_frame_size,
 274        .get_fmt = vsp1_subdev_get_pad_format,
 275        .set_fmt = bru_set_format,
 276        .get_selection = bru_get_selection,
 277        .set_selection = bru_set_selection,
 278};
 279
 280static const struct v4l2_subdev_ops bru_ops = {
 281        .pad    = &bru_pad_ops,
 282};
 283
 284/* -----------------------------------------------------------------------------
 285 * VSP1 Entity Operations
 286 */
 287
 288static void bru_configure(struct vsp1_entity *entity,
 289                          struct vsp1_pipeline *pipe,
 290                          struct vsp1_dl_list *dl,
 291                          enum vsp1_entity_params params)
 292{
 293        struct vsp1_bru *bru = to_bru(&entity->subdev);
 294        struct v4l2_mbus_framefmt *format;
 295        unsigned int flags;
 296        unsigned int i;
 297
 298        if (params != VSP1_ENTITY_PARAMS_INIT)
 299                return;
 300
 301        format = vsp1_entity_get_pad_format(&bru->entity, bru->entity.config,
 302                                            bru->entity.source_pad);
 303
 304        /*
 305         * The hardware is extremely flexible but we have no userspace API to
 306         * expose all the parameters, nor is it clear whether we would have use
 307         * cases for all the supported modes. Let's just harcode the parameters
 308         * to sane default values for now.
 309         */
 310
 311        /*
 312         * Disable dithering and enable color data normalization unless the
 313         * format at the pipeline output is premultiplied.
 314         */
 315        flags = pipe->output ? pipe->output->format.flags : 0;
 316        vsp1_bru_write(bru, dl, VI6_BRU_INCTRL,
 317                       flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
 318                       0 : VI6_BRU_INCTRL_NRM);
 319
 320        /*
 321         * Set the background position to cover the whole output image and
 322         * configure its color.
 323         */
 324        vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_SIZE,
 325                       (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
 326                       (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
 327        vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_LOC, 0);
 328
 329        vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_COL, bru->bgcolor |
 330                       (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
 331
 332        /*
 333         * Route BRU input 1 as SRC input to the ROP unit and configure the ROP
 334         * unit with a NOP operation to make BRU input 1 available as the
 335         * Blend/ROP unit B SRC input. Only needed for BRU, the BRS has no ROP
 336         * unit.
 337         */
 338        if (entity->type == VSP1_ENTITY_BRU)
 339                vsp1_bru_write(bru, dl, VI6_BRU_ROP,
 340                               VI6_BRU_ROP_DSTSEL_BRUIN(1) |
 341                               VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
 342                               VI6_BRU_ROP_AROP(VI6_ROP_NOP));
 343
 344        for (i = 0; i < bru->entity.source_pad; ++i) {
 345                bool premultiplied = false;
 346                u32 ctrl = 0;
 347
 348                /*
 349                 * Configure all Blend/ROP units corresponding to an enabled BRU
 350                 * input for alpha blending. Blend/ROP units corresponding to
 351                 * disabled BRU inputs are used in ROP NOP mode to ignore the
 352                 * SRC input.
 353                 */
 354                if (bru->inputs[i].rpf) {
 355                        ctrl |= VI6_BRU_CTRL_RBC;
 356
 357                        premultiplied = bru->inputs[i].rpf->format.flags
 358                                      & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
 359                } else {
 360                        ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
 361                             |  VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
 362                }
 363
 364                /*
 365                 * Select the virtual RPF as the Blend/ROP unit A DST input to
 366                 * serve as a background color.
 367                 */
 368                if (i == 0)
 369                        ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
 370
 371                /*
 372                 * Route inputs 0 to 3 as SRC inputs to Blend/ROP units A to D
 373                 * in that order. In the BRU the Blend/ROP unit B SRC is
 374                 * hardwired to the ROP unit output, the corresponding register
 375                 * bits must be set to 0. The BRS has no ROP unit and doesn't
 376                 * need any special processing.
 377                 */
 378                if (!(entity->type == VSP1_ENTITY_BRU && i == 1))
 379                        ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
 380
 381                vsp1_bru_write(bru, dl, VI6_BRU_CTRL(i), ctrl);
 382
 383                /*
 384                 * Harcode the blending formula to
 385                 *
 386                 *      DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
 387                 *      DSTa = DSTa * (1 - SRCa) + SRCa
 388                 *
 389                 * when the SRC input isn't premultiplied, and to
 390                 *
 391                 *      DSTc = DSTc * (1 - SRCa) + SRCc
 392                 *      DSTa = DSTa * (1 - SRCa) + SRCa
 393                 *
 394                 * otherwise.
 395                 */
 396                vsp1_bru_write(bru, dl, VI6_BRU_BLD(i),
 397                               VI6_BRU_BLD_CCMDX_255_SRC_A |
 398                               (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
 399                                                VI6_BRU_BLD_CCMDY_SRC_A) |
 400                               VI6_BRU_BLD_ACMDX_255_SRC_A |
 401                               VI6_BRU_BLD_ACMDY_COEFY |
 402                               (0xff << VI6_BRU_BLD_COEFY_SHIFT));
 403        }
 404}
 405
 406static const struct vsp1_entity_operations bru_entity_ops = {
 407        .configure = bru_configure,
 408};
 409
 410/* -----------------------------------------------------------------------------
 411 * Initialization and Cleanup
 412 */
 413
 414struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1,
 415                                 enum vsp1_entity_type type)
 416{
 417        struct vsp1_bru *bru;
 418        unsigned int num_pads;
 419        const char *name;
 420        int ret;
 421
 422        bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
 423        if (bru == NULL)
 424                return ERR_PTR(-ENOMEM);
 425
 426        bru->base = type == VSP1_ENTITY_BRU ? VI6_BRU_BASE : VI6_BRS_BASE;
 427        bru->entity.ops = &bru_entity_ops;
 428        bru->entity.type = type;
 429
 430        if (type == VSP1_ENTITY_BRU) {
 431                num_pads = vsp1->info->num_bru_inputs + 1;
 432                name = "bru";
 433        } else {
 434                num_pads = 3;
 435                name = "brs";
 436        }
 437
 438        ret = vsp1_entity_init(vsp1, &bru->entity, name, num_pads, &bru_ops,
 439                               MEDIA_ENT_F_PROC_VIDEO_COMPOSER);
 440        if (ret < 0)
 441                return ERR_PTR(ret);
 442
 443        /* Initialize the control handler. */
 444        v4l2_ctrl_handler_init(&bru->ctrls, 1);
 445        v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
 446                          0, 0xffffff, 1, 0);
 447
 448        bru->bgcolor = 0;
 449
 450        bru->entity.subdev.ctrl_handler = &bru->ctrls;
 451
 452        if (bru->ctrls.error) {
 453                dev_err(vsp1->dev, "%s: failed to initialize controls\n", name);
 454                ret = bru->ctrls.error;
 455                vsp1_entity_destroy(&bru->entity);
 456                return ERR_PTR(ret);
 457        }
 458
 459        return bru;
 460}
 461