LXR linux/drivers/misc/ibmasm/lowlevel.h

   1/*
   2 * IBM ASM Service Processor Device Driver
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17 *
  18 * Copyright (C) IBM Corporation, 2004
  19 *
  20 * Author: Max Asböck <amax@us.ibm.com>
  21 *
  22 */
  23
  24/* Condor service processor specific hardware definitions */
  25
  26#ifndef __IBMASM_CONDOR_H__
  27#define __IBMASM_CONDOR_H__
  28
  29#include <asm/io.h>
  30
  31#define VENDORID_IBM    0x1014
  32#define DEVICEID_RSA    0x010F
  33
  34#define GET_MFA_ADDR(x)  (x & 0xFFFFFF00)
  35
  36#define MAILBOX_FULL(x)  (x & 0x00000001)
  37
  38#define NO_MFAS_AVAILABLE     0xFFFFFFFF
  39
  40
  41#define INBOUND_QUEUE_PORT   0x40  /* contains address of next free MFA */
  42#define OUTBOUND_QUEUE_PORT  0x44  /* contains address of posted MFA    */
  43
  44#define SP_INTR_MASK    0x00000008
  45#define UART_INTR_MASK  0x00000010
  46
  47#define INTR_STATUS_REGISTER   0x13A0
  48#define INTR_CONTROL_REGISTER  0x13A4
  49
  50#define SCOUT_COM_A_BASE         0x0000
  51#define SCOUT_COM_B_BASE         0x0100
  52#define SCOUT_COM_C_BASE         0x0200
  53#define SCOUT_COM_D_BASE         0x0300
  54
  55static inline int sp_interrupt_pending(void __iomem *base_address)
  56{
  57        return SP_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER);
  58}
  59
  60static inline int uart_interrupt_pending(void __iomem *base_address)
  61{
  62        return UART_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER);
  63}
  64
  65static inline void ibmasm_enable_interrupts(void __iomem *base_address, int mask)
  66{
  67        void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER;
  68        writel( readl(ctrl_reg) & ~mask, ctrl_reg);
  69}
  70
  71static inline void ibmasm_disable_interrupts(void __iomem *base_address, int mask)
  72{
  73        void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER;
  74        writel( readl(ctrl_reg) | mask, ctrl_reg);
  75}
  76
  77static inline void enable_sp_interrupts(void __iomem *base_address)
  78{
  79        ibmasm_enable_interrupts(base_address, SP_INTR_MASK);
  80}
  81
  82static inline void disable_sp_interrupts(void __iomem *base_address)
  83{
  84        ibmasm_disable_interrupts(base_address, SP_INTR_MASK);
  85}
  86
  87static inline void enable_uart_interrupts(void __iomem *base_address)
  88{
  89        ibmasm_enable_interrupts(base_address, UART_INTR_MASK);
  90}
  91
  92static inline void disable_uart_interrupts(void __iomem *base_address)
  93{
  94        ibmasm_disable_interrupts(base_address, UART_INTR_MASK);
  95}
  96
  97#define valid_mfa(mfa)  ( (mfa) != NO_MFAS_AVAILABLE )
  98
  99static inline u32 get_mfa_outbound(void __iomem *base_address)
 100{
 101        int retry;
 102        u32 mfa;
 103
 104        for (retry=0; retry<=10; retry++) {
 105                mfa = readl(base_address + OUTBOUND_QUEUE_PORT);
 106                if (valid_mfa(mfa))
 107                        break;
 108        }
 109        return mfa;
 110}
 111
 112static inline void set_mfa_outbound(void __iomem *base_address, u32 mfa)
 113{
 114        writel(mfa, base_address + OUTBOUND_QUEUE_PORT);
 115}
 116
 117static inline u32 get_mfa_inbound(void __iomem *base_address)
 118{
 119        u32 mfa = readl(base_address + INBOUND_QUEUE_PORT);
 120
 121        if (MAILBOX_FULL(mfa))
 122                return 0;
 123
 124        return mfa;
 125}
 126
 127static inline void set_mfa_inbound(void __iomem *base_address, u32 mfa)
 128{
 129        writel(mfa, base_address + INBOUND_QUEUE_PORT);
 130}
 131
 132static inline struct i2o_message *get_i2o_message(void __iomem *base_address, u32 mfa)
 133{
 134        return (struct i2o_message *)(GET_MFA_ADDR(mfa) + base_address);
 135}
 136
 137#endif /* __IBMASM_CONDOR_H__ */
 138