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20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static struct mwifiex_if_ops pcie_ops;
35
36static const struct of_device_id mwifiex_pcie_of_match_table[] = {
37 { .compatible = "pci11ab,2b42" },
38 { .compatible = "pci1b4b,2b42" },
39 { }
40};
41
42static int mwifiex_pcie_probe_of(struct device *dev)
43{
44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) {
45 dev_err(dev, "required compatible string missing\n");
46 return -EINVAL;
47 }
48
49 return 0;
50}
51
52static void mwifiex_pcie_work(struct work_struct *work);
53
54static int
55mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
56 size_t size, int flags)
57{
58 struct pcie_service_card *card = adapter->card;
59 struct mwifiex_dma_mapping mapping;
60
61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
62 if (pci_dma_mapping_error(card->dev, mapping.addr)) {
63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
64 return -1;
65 }
66 mapping.len = size;
67 mwifiex_store_mapping(skb, &mapping);
68 return 0;
69}
70
71static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
72 struct sk_buff *skb, int flags)
73{
74 struct pcie_service_card *card = adapter->card;
75 struct mwifiex_dma_mapping mapping;
76
77 mwifiex_get_mapping(skb, &mapping);
78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
79}
80
81
82
83
84static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
85{
86 struct pcie_service_card *card = adapter->card;
87
88 iowrite32(data, card->pci_mmap1 + reg);
89
90 return 0;
91}
92
93
94
95static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
96{
97 struct pcie_service_card *card = adapter->card;
98
99 *data = ioread32(card->pci_mmap1 + reg);
100 if (*data == 0xffffffff)
101 return 0xffffffff;
102
103 return 0;
104}
105
106
107static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
108 int reg, u8 *data)
109{
110 struct pcie_service_card *card = adapter->card;
111
112 *data = ioread8(card->pci_mmap1 + reg);
113
114 return 0;
115}
116
117
118
119
120static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
121{
122 u32 cookie_value;
123 struct pcie_service_card *card = adapter->card;
124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
125
126 if (!reg->sleep_cookie)
127 return true;
128
129 if (card->sleep_cookie_vbase) {
130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
131 mwifiex_dbg(adapter, INFO,
132 "info: ACCESS_HW: sleep cookie=0x%x\n",
133 cookie_value);
134 if (cookie_value == FW_AWAKE_COOKIE)
135 return true;
136 }
137
138 return false;
139}
140
141#ifdef CONFIG_PM_SLEEP
142
143
144
145
146
147
148
149
150static int mwifiex_pcie_suspend(struct device *dev)
151{
152 struct mwifiex_adapter *adapter;
153 struct pcie_service_card *card;
154 struct pci_dev *pdev = to_pci_dev(dev);
155
156 card = pci_get_drvdata(pdev);
157
158
159 wait_for_completion(&card->fw_done);
160
161 adapter = card->adapter;
162 if (!adapter) {
163 dev_err(dev, "adapter is not valid\n");
164 return 0;
165 }
166
167 mwifiex_enable_wake(adapter);
168
169
170 if (!mwifiex_enable_hs(adapter)) {
171 mwifiex_dbg(adapter, ERROR,
172 "cmd: failed to suspend\n");
173 adapter->hs_enabling = false;
174 mwifiex_disable_wake(adapter);
175 return -EFAULT;
176 }
177
178 flush_workqueue(adapter->workqueue);
179
180
181 adapter->is_suspended = true;
182 adapter->hs_enabling = false;
183
184 return 0;
185}
186
187
188
189
190
191
192
193
194
195static int mwifiex_pcie_resume(struct device *dev)
196{
197 struct mwifiex_adapter *adapter;
198 struct pcie_service_card *card;
199 struct pci_dev *pdev = to_pci_dev(dev);
200
201 card = pci_get_drvdata(pdev);
202
203 if (!card->adapter) {
204 dev_err(dev, "adapter structure is not valid\n");
205 return 0;
206 }
207
208 adapter = card->adapter;
209
210 if (!adapter->is_suspended) {
211 mwifiex_dbg(adapter, WARN,
212 "Device already resumed\n");
213 return 0;
214 }
215
216 adapter->is_suspended = false;
217
218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
219 MWIFIEX_ASYNC_CMD);
220 mwifiex_disable_wake(adapter);
221
222 return 0;
223}
224#endif
225
226
227
228
229
230
231
232static int mwifiex_pcie_probe(struct pci_dev *pdev,
233 const struct pci_device_id *ent)
234{
235 struct pcie_service_card *card;
236 int ret;
237
238 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
239 pdev->vendor, pdev->device, pdev->revision);
240
241 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
242 if (!card)
243 return -ENOMEM;
244
245 init_completion(&card->fw_done);
246
247 card->dev = pdev;
248
249 if (ent->driver_data) {
250 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
251 card->pcie.reg = data->reg;
252 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
253 card->pcie.tx_buf_size = data->tx_buf_size;
254 card->pcie.can_dump_fw = data->can_dump_fw;
255 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
256 card->pcie.num_mem_types = data->num_mem_types;
257 card->pcie.can_ext_scan = data->can_ext_scan;
258 INIT_WORK(&card->work, mwifiex_pcie_work);
259 }
260
261
262 if (pdev->dev.of_node) {
263 ret = mwifiex_pcie_probe_of(&pdev->dev);
264 if (ret)
265 return ret;
266 }
267
268 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops,
269 MWIFIEX_PCIE, &pdev->dev)) {
270 pr_err("%s failed\n", __func__);
271 return -1;
272 }
273
274 return 0;
275}
276
277
278
279
280static void mwifiex_pcie_remove(struct pci_dev *pdev)
281{
282 struct pcie_service_card *card;
283 struct mwifiex_adapter *adapter;
284 struct mwifiex_private *priv;
285 const struct mwifiex_pcie_card_reg *reg;
286 u32 fw_status;
287 int ret;
288
289 card = pci_get_drvdata(pdev);
290
291 wait_for_completion(&card->fw_done);
292
293 adapter = card->adapter;
294 if (!adapter || !adapter->priv_num)
295 return;
296
297 reg = card->pcie.reg;
298 if (reg)
299 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
300 else
301 fw_status = -1;
302
303 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) {
304 mwifiex_deauthenticate_all(adapter);
305
306 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
307
308 mwifiex_disable_auto_ds(priv);
309
310 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
311 }
312
313 mwifiex_remove_card(adapter);
314}
315
316static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
317{
318 mwifiex_pcie_remove(pdev);
319
320 return;
321}
322
323static const struct pci_device_id mwifiex_ids[] = {
324 {
325 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
326 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
327 .driver_data = (unsigned long)&mwifiex_pcie8766,
328 },
329 {
330 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
331 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
332 .driver_data = (unsigned long)&mwifiex_pcie8897,
333 },
334 {
335 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
336 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
337 .driver_data = (unsigned long)&mwifiex_pcie8997,
338 },
339 {
340 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
341 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
342 .driver_data = (unsigned long)&mwifiex_pcie8997,
343 },
344 {},
345};
346
347MODULE_DEVICE_TABLE(pci, mwifiex_ids);
348
349
350
351
352static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev)
353{
354 struct pcie_service_card *card = pci_get_drvdata(pdev);
355 struct mwifiex_adapter *adapter = card->adapter;
356
357 if (!adapter) {
358 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
359 __func__);
360 return;
361 }
362
363 mwifiex_dbg(adapter, INFO,
364 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n",
365 __func__, pdev->vendor, pdev->device, pdev->revision);
366
367 mwifiex_shutdown_sw(adapter);
368 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
369 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
370 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
371}
372
373
374
375
376
377
378static void mwifiex_pcie_reset_done(struct pci_dev *pdev)
379{
380 struct pcie_service_card *card = pci_get_drvdata(pdev);
381 struct mwifiex_adapter *adapter = card->adapter;
382 int ret;
383
384 if (!adapter) {
385 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
386 __func__);
387 return;
388 }
389
390 mwifiex_dbg(adapter, INFO,
391 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n",
392 __func__, pdev->vendor, pdev->device, pdev->revision);
393
394 ret = mwifiex_reinit_sw(adapter);
395 if (ret)
396 dev_err(&pdev->dev, "reinit failed: %d\n", ret);
397 else
398 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
399}
400
401static const struct pci_error_handlers mwifiex_pcie_err_handler = {
402 .reset_prepare = mwifiex_pcie_reset_prepare,
403 .reset_done = mwifiex_pcie_reset_done,
404};
405
406#ifdef CONFIG_PM_SLEEP
407
408static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
409 mwifiex_pcie_resume);
410#endif
411
412
413static struct pci_driver __refdata mwifiex_pcie = {
414 .name = "mwifiex_pcie",
415 .id_table = mwifiex_ids,
416 .probe = mwifiex_pcie_probe,
417 .remove = mwifiex_pcie_remove,
418#ifdef CONFIG_PM_SLEEP
419 .driver = {
420 .pm = &mwifiex_pcie_pm_ops,
421 },
422#endif
423 .shutdown = mwifiex_pcie_shutdown,
424 .err_handler = &mwifiex_pcie_err_handler,
425};
426
427
428
429
430static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
431{
432 int i = 0;
433
434 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
435 i++;
436 usleep_range(10, 20);
437
438 if (i == 5000)
439 break;
440 }
441
442 return;
443}
444
445static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
446 u32 max_delay_loop_cnt)
447{
448 struct pcie_service_card *card = adapter->card;
449 u8 *buffer;
450 u32 sleep_cookie, count;
451 struct sk_buff *cmdrsp = card->cmdrsp_buf;
452
453 for (count = 0; count < max_delay_loop_cnt; count++) {
454 pci_dma_sync_single_for_cpu(card->dev,
455 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
456 sizeof(sleep_cookie),
457 PCI_DMA_FROMDEVICE);
458 buffer = cmdrsp->data;
459 sleep_cookie = get_unaligned_le32(buffer);
460
461 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
462 mwifiex_dbg(adapter, INFO,
463 "sleep cookie found at count %d\n", count);
464 break;
465 }
466 pci_dma_sync_single_for_device(card->dev,
467 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
468 sizeof(sleep_cookie),
469 PCI_DMA_FROMDEVICE);
470 usleep_range(20, 30);
471 }
472
473 if (count >= max_delay_loop_cnt)
474 mwifiex_dbg(adapter, INFO,
475 "max count reached while accessing sleep cookie\n");
476}
477
478
479static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
480{
481 struct pcie_service_card *card = adapter->card;
482 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
483
484 mwifiex_dbg(adapter, EVENT,
485 "event: Wakeup device...\n");
486
487 if (reg->sleep_cookie)
488 mwifiex_pcie_dev_wakeup_delay(adapter);
489
490
491 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
492 mwifiex_dbg(adapter, ERROR,
493 "Writing fw_status register failed\n");
494 return -1;
495 }
496
497 if (reg->sleep_cookie) {
498 mwifiex_pcie_dev_wakeup_delay(adapter);
499 mwifiex_dbg(adapter, INFO,
500 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
501 adapter->ps_state = PS_STATE_AWAKE;
502 }
503
504 return 0;
505}
506
507
508
509
510
511
512static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
513{
514 mwifiex_dbg(adapter, CMD,
515 "cmd: Wakeup device completed\n");
516
517 return 0;
518}
519
520
521
522
523
524
525
526static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
527{
528 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
529 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
530 0x00000000)) {
531 mwifiex_dbg(adapter, ERROR,
532 "Disable host interrupt failed\n");
533 return -1;
534 }
535 }
536
537 atomic_set(&adapter->tx_hw_pending, 0);
538 return 0;
539}
540
541static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
542{
543 WARN_ON(mwifiex_pcie_disable_host_int(adapter));
544}
545
546
547
548
549
550
551
552static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
553{
554 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
555
556 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
557 HOST_INTR_MASK)) {
558 mwifiex_dbg(adapter, ERROR,
559 "Enable host interrupt failed\n");
560 return -1;
561 }
562 }
563
564 return 0;
565}
566
567
568
569
570static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
571{
572 struct pcie_service_card *card = adapter->card;
573 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
574 struct mwifiex_pcie_buf_desc *desc;
575 struct mwifiex_pfu_buf_desc *desc2;
576 int i;
577
578 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
579 card->tx_buf_list[i] = NULL;
580 if (reg->pfu_enabled) {
581 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
582 (sizeof(*desc2) * i);
583 desc2 = card->txbd_ring[i];
584 memset(desc2, 0, sizeof(*desc2));
585 } else {
586 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
587 (sizeof(*desc) * i);
588 desc = card->txbd_ring[i];
589 memset(desc, 0, sizeof(*desc));
590 }
591 }
592
593 return 0;
594}
595
596
597
598
599
600static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
601{
602 struct pcie_service_card *card = adapter->card;
603 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
604 struct sk_buff *skb;
605 struct mwifiex_pcie_buf_desc *desc;
606 struct mwifiex_pfu_buf_desc *desc2;
607 dma_addr_t buf_pa;
608 int i;
609
610 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
611
612 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
613 GFP_KERNEL);
614 if (!skb) {
615 mwifiex_dbg(adapter, ERROR,
616 "Unable to allocate skb for RX ring.\n");
617 kfree(card->rxbd_ring_vbase);
618 return -ENOMEM;
619 }
620
621 if (mwifiex_map_pci_memory(adapter, skb,
622 MWIFIEX_RX_DATA_BUF_SIZE,
623 PCI_DMA_FROMDEVICE))
624 return -1;
625
626 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
627
628 mwifiex_dbg(adapter, INFO,
629 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
630 skb, skb->len, skb->data, (u32)buf_pa,
631 (u32)((u64)buf_pa >> 32));
632
633 card->rx_buf_list[i] = skb;
634 if (reg->pfu_enabled) {
635 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
636 (sizeof(*desc2) * i);
637 desc2 = card->rxbd_ring[i];
638 desc2->paddr = buf_pa;
639 desc2->len = (u16)skb->len;
640 desc2->frag_len = (u16)skb->len;
641 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
642 desc2->offset = 0;
643 } else {
644 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
645 (sizeof(*desc) * i));
646 desc = card->rxbd_ring[i];
647 desc->paddr = buf_pa;
648 desc->len = (u16)skb->len;
649 desc->flags = 0;
650 }
651 }
652
653 return 0;
654}
655
656
657
658
659
660static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
661{
662 struct pcie_service_card *card = adapter->card;
663 struct mwifiex_evt_buf_desc *desc;
664 struct sk_buff *skb;
665 dma_addr_t buf_pa;
666 int i;
667
668 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
669
670 skb = dev_alloc_skb(MAX_EVENT_SIZE);
671 if (!skb) {
672 mwifiex_dbg(adapter, ERROR,
673 "Unable to allocate skb for EVENT buf.\n");
674 kfree(card->evtbd_ring_vbase);
675 return -ENOMEM;
676 }
677 skb_put(skb, MAX_EVENT_SIZE);
678
679 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
680 PCI_DMA_FROMDEVICE))
681 return -1;
682
683 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
684
685 mwifiex_dbg(adapter, EVENT,
686 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
687 skb, skb->len, skb->data, (u32)buf_pa,
688 (u32)((u64)buf_pa >> 32));
689
690 card->evt_buf_list[i] = skb;
691 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
692 (sizeof(*desc) * i));
693 desc = card->evtbd_ring[i];
694 desc->paddr = buf_pa;
695 desc->len = (u16)skb->len;
696 desc->flags = 0;
697 }
698
699 return 0;
700}
701
702
703
704
705static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
706{
707 struct pcie_service_card *card = adapter->card;
708 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
709 struct sk_buff *skb;
710 struct mwifiex_pcie_buf_desc *desc;
711 struct mwifiex_pfu_buf_desc *desc2;
712 int i;
713
714 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
715 if (reg->pfu_enabled) {
716 desc2 = card->txbd_ring[i];
717 if (card->tx_buf_list[i]) {
718 skb = card->tx_buf_list[i];
719 mwifiex_unmap_pci_memory(adapter, skb,
720 PCI_DMA_TODEVICE);
721 dev_kfree_skb_any(skb);
722 }
723 memset(desc2, 0, sizeof(*desc2));
724 } else {
725 desc = card->txbd_ring[i];
726 if (card->tx_buf_list[i]) {
727 skb = card->tx_buf_list[i];
728 mwifiex_unmap_pci_memory(adapter, skb,
729 PCI_DMA_TODEVICE);
730 dev_kfree_skb_any(skb);
731 }
732 memset(desc, 0, sizeof(*desc));
733 }
734 card->tx_buf_list[i] = NULL;
735 }
736
737 atomic_set(&adapter->tx_hw_pending, 0);
738 return;
739}
740
741
742
743
744static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
745{
746 struct pcie_service_card *card = adapter->card;
747 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
748 struct mwifiex_pcie_buf_desc *desc;
749 struct mwifiex_pfu_buf_desc *desc2;
750 struct sk_buff *skb;
751 int i;
752
753 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
754 if (reg->pfu_enabled) {
755 desc2 = card->rxbd_ring[i];
756 if (card->rx_buf_list[i]) {
757 skb = card->rx_buf_list[i];
758 mwifiex_unmap_pci_memory(adapter, skb,
759 PCI_DMA_FROMDEVICE);
760 dev_kfree_skb_any(skb);
761 }
762 memset(desc2, 0, sizeof(*desc2));
763 } else {
764 desc = card->rxbd_ring[i];
765 if (card->rx_buf_list[i]) {
766 skb = card->rx_buf_list[i];
767 mwifiex_unmap_pci_memory(adapter, skb,
768 PCI_DMA_FROMDEVICE);
769 dev_kfree_skb_any(skb);
770 }
771 memset(desc, 0, sizeof(*desc));
772 }
773 card->rx_buf_list[i] = NULL;
774 }
775
776 return;
777}
778
779
780
781
782static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
783{
784 struct pcie_service_card *card = adapter->card;
785 struct mwifiex_evt_buf_desc *desc;
786 struct sk_buff *skb;
787 int i;
788
789 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
790 desc = card->evtbd_ring[i];
791 if (card->evt_buf_list[i]) {
792 skb = card->evt_buf_list[i];
793 mwifiex_unmap_pci_memory(adapter, skb,
794 PCI_DMA_FROMDEVICE);
795 dev_kfree_skb_any(skb);
796 }
797 card->evt_buf_list[i] = NULL;
798 memset(desc, 0, sizeof(*desc));
799 }
800
801 return;
802}
803
804
805
806static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
807{
808 struct pcie_service_card *card = adapter->card;
809 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
810
811
812
813
814
815
816 card->txbd_wrptr = 0;
817
818 if (reg->pfu_enabled)
819 card->txbd_rdptr = 0;
820 else
821 card->txbd_rdptr |= reg->tx_rollover_ind;
822
823
824
825 if (reg->pfu_enabled)
826 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
827 MWIFIEX_MAX_TXRX_BD;
828 else
829 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
830 MWIFIEX_MAX_TXRX_BD;
831
832 mwifiex_dbg(adapter, INFO,
833 "info: txbd_ring: Allocating %d bytes\n",
834 card->txbd_ring_size);
835 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
836 card->txbd_ring_size,
837 &card->txbd_ring_pbase);
838 if (!card->txbd_ring_vbase) {
839 mwifiex_dbg(adapter, ERROR,
840 "allocate consistent memory (%d bytes) failed!\n",
841 card->txbd_ring_size);
842 return -ENOMEM;
843 }
844 mwifiex_dbg(adapter, DATA,
845 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
846 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
847 (u32)((u64)card->txbd_ring_pbase >> 32),
848 card->txbd_ring_size);
849
850 return mwifiex_init_txq_ring(adapter);
851}
852
853static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
854{
855 struct pcie_service_card *card = adapter->card;
856 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
857
858 mwifiex_cleanup_txq_ring(adapter);
859
860 if (card->txbd_ring_vbase)
861 pci_free_consistent(card->dev, card->txbd_ring_size,
862 card->txbd_ring_vbase,
863 card->txbd_ring_pbase);
864 card->txbd_ring_size = 0;
865 card->txbd_wrptr = 0;
866 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
867 card->txbd_ring_vbase = NULL;
868 card->txbd_ring_pbase = 0;
869
870 return 0;
871}
872
873
874
875
876static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
877{
878 struct pcie_service_card *card = adapter->card;
879 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
880
881
882
883
884
885
886 card->rxbd_wrptr = 0;
887 card->rxbd_rdptr = reg->rx_rollover_ind;
888
889 if (reg->pfu_enabled)
890 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
891 MWIFIEX_MAX_TXRX_BD;
892 else
893 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
894 MWIFIEX_MAX_TXRX_BD;
895
896 mwifiex_dbg(adapter, INFO,
897 "info: rxbd_ring: Allocating %d bytes\n",
898 card->rxbd_ring_size);
899 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
900 card->rxbd_ring_size,
901 &card->rxbd_ring_pbase);
902 if (!card->rxbd_ring_vbase) {
903 mwifiex_dbg(adapter, ERROR,
904 "allocate consistent memory (%d bytes) failed!\n",
905 card->rxbd_ring_size);
906 return -ENOMEM;
907 }
908
909 mwifiex_dbg(adapter, DATA,
910 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
911 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
912 (u32)((u64)card->rxbd_ring_pbase >> 32),
913 card->rxbd_ring_size);
914
915 return mwifiex_init_rxq_ring(adapter);
916}
917
918
919
920
921static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
922{
923 struct pcie_service_card *card = adapter->card;
924 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
925
926 mwifiex_cleanup_rxq_ring(adapter);
927
928 if (card->rxbd_ring_vbase)
929 pci_free_consistent(card->dev, card->rxbd_ring_size,
930 card->rxbd_ring_vbase,
931 card->rxbd_ring_pbase);
932 card->rxbd_ring_size = 0;
933 card->rxbd_wrptr = 0;
934 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
935 card->rxbd_ring_vbase = NULL;
936 card->rxbd_ring_pbase = 0;
937
938 return 0;
939}
940
941
942
943
944static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
945{
946 struct pcie_service_card *card = adapter->card;
947 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
948
949
950
951
952
953
954 card->evtbd_wrptr = 0;
955 card->evtbd_rdptr = reg->evt_rollover_ind;
956
957 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
958 MWIFIEX_MAX_EVT_BD;
959
960 mwifiex_dbg(adapter, INFO,
961 "info: evtbd_ring: Allocating %d bytes\n",
962 card->evtbd_ring_size);
963 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
964 card->evtbd_ring_size,
965 &card->evtbd_ring_pbase);
966 if (!card->evtbd_ring_vbase) {
967 mwifiex_dbg(adapter, ERROR,
968 "allocate consistent memory (%d bytes) failed!\n",
969 card->evtbd_ring_size);
970 return -ENOMEM;
971 }
972
973 mwifiex_dbg(adapter, EVENT,
974 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
975 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
976 (u32)((u64)card->evtbd_ring_pbase >> 32),
977 card->evtbd_ring_size);
978
979 return mwifiex_pcie_init_evt_ring(adapter);
980}
981
982
983
984
985static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
986{
987 struct pcie_service_card *card = adapter->card;
988 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
989
990 mwifiex_cleanup_evt_ring(adapter);
991
992 if (card->evtbd_ring_vbase)
993 pci_free_consistent(card->dev, card->evtbd_ring_size,
994 card->evtbd_ring_vbase,
995 card->evtbd_ring_pbase);
996 card->evtbd_wrptr = 0;
997 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
998 card->evtbd_ring_size = 0;
999 card->evtbd_ring_vbase = NULL;
1000 card->evtbd_ring_pbase = 0;
1001
1002 return 0;
1003}
1004
1005
1006
1007
1008static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
1009{
1010 struct pcie_service_card *card = adapter->card;
1011 struct sk_buff *skb;
1012
1013
1014 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1015 if (!skb) {
1016 mwifiex_dbg(adapter, ERROR,
1017 "Unable to allocate skb for command response data.\n");
1018 return -ENOMEM;
1019 }
1020 skb_put(skb, MWIFIEX_UPLD_SIZE);
1021 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1022 PCI_DMA_FROMDEVICE))
1023 return -1;
1024
1025 card->cmdrsp_buf = skb;
1026
1027 return 0;
1028}
1029
1030
1031
1032
1033static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
1034{
1035 struct pcie_service_card *card;
1036
1037 if (!adapter)
1038 return 0;
1039
1040 card = adapter->card;
1041
1042 if (card && card->cmdrsp_buf) {
1043 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
1044 PCI_DMA_FROMDEVICE);
1045 dev_kfree_skb_any(card->cmdrsp_buf);
1046 card->cmdrsp_buf = NULL;
1047 }
1048
1049 if (card && card->cmd_buf) {
1050 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1051 PCI_DMA_TODEVICE);
1052 dev_kfree_skb_any(card->cmd_buf);
1053 card->cmd_buf = NULL;
1054 }
1055 return 0;
1056}
1057
1058
1059
1060
1061static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1062{
1063 struct pcie_service_card *card = adapter->card;
1064 u32 tmp;
1065
1066 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
1067 &card->sleep_cookie_pbase);
1068 if (!card->sleep_cookie_vbase) {
1069 mwifiex_dbg(adapter, ERROR,
1070 "pci_alloc_consistent failed!\n");
1071 return -ENOMEM;
1072 }
1073
1074 tmp = FW_AWAKE_COOKIE;
1075 put_unaligned(tmp, card->sleep_cookie_vbase);
1076
1077 mwifiex_dbg(adapter, INFO,
1078 "alloc_scook: sleep cookie=0x%x\n",
1079 get_unaligned(card->sleep_cookie_vbase));
1080
1081 return 0;
1082}
1083
1084
1085
1086
1087static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1088{
1089 struct pcie_service_card *card;
1090
1091 if (!adapter)
1092 return 0;
1093
1094 card = adapter->card;
1095
1096 if (card && card->sleep_cookie_vbase) {
1097 pci_free_consistent(card->dev, sizeof(u32),
1098 card->sleep_cookie_vbase,
1099 card->sleep_cookie_pbase);
1100 card->sleep_cookie_vbase = NULL;
1101 }
1102
1103 return 0;
1104}
1105
1106
1107
1108
1109
1110static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1111{
1112 struct pcie_service_card *card = adapter->card;
1113
1114 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1115 card->txbd_flush = 1;
1116
1117
1118
1119 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1120 CPU_INTR_DNLD_RDY)) {
1121 mwifiex_dbg(adapter, ERROR,
1122 "failed to assert dnld-rdy interrupt.\n");
1123 return -1;
1124 }
1125 }
1126 return 0;
1127}
1128
1129
1130
1131
1132static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1133{
1134 struct sk_buff *skb;
1135 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1136 struct mwifiex_pcie_buf_desc *desc;
1137 struct mwifiex_pfu_buf_desc *desc2;
1138 struct pcie_service_card *card = adapter->card;
1139 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1140
1141 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1142 mwifiex_pm_wakeup_card(adapter);
1143
1144
1145 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1146 mwifiex_dbg(adapter, ERROR,
1147 "SEND COMP: failed to read reg->tx_rdptr\n");
1148 return -1;
1149 }
1150
1151 mwifiex_dbg(adapter, DATA,
1152 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1153 card->txbd_rdptr, rdptr);
1154
1155 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1156
1157 while (((card->txbd_rdptr & reg->tx_mask) !=
1158 (rdptr & reg->tx_mask)) ||
1159 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1160 (rdptr & reg->tx_rollover_ind))) {
1161 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1162 reg->tx_start_ptr;
1163
1164 skb = card->tx_buf_list[wrdoneidx];
1165
1166 if (skb) {
1167 mwifiex_dbg(adapter, DATA,
1168 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1169 skb, wrdoneidx);
1170 mwifiex_unmap_pci_memory(adapter, skb,
1171 PCI_DMA_TODEVICE);
1172
1173 unmap_count++;
1174
1175 if (card->txbd_flush)
1176 mwifiex_write_data_complete(adapter, skb, 0,
1177 -1);
1178 else
1179 mwifiex_write_data_complete(adapter, skb, 0, 0);
1180 atomic_dec(&adapter->tx_hw_pending);
1181 }
1182
1183 card->tx_buf_list[wrdoneidx] = NULL;
1184
1185 if (reg->pfu_enabled) {
1186 desc2 = card->txbd_ring[wrdoneidx];
1187 memset(desc2, 0, sizeof(*desc2));
1188 } else {
1189 desc = card->txbd_ring[wrdoneidx];
1190 memset(desc, 0, sizeof(*desc));
1191 }
1192 switch (card->dev->device) {
1193 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1194 card->txbd_rdptr++;
1195 break;
1196 case PCIE_DEVICE_ID_MARVELL_88W8897:
1197 case PCIE_DEVICE_ID_MARVELL_88W8997:
1198 card->txbd_rdptr += reg->ring_tx_start_ptr;
1199 break;
1200 }
1201
1202
1203 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1204 card->txbd_rdptr = ((card->txbd_rdptr &
1205 reg->tx_rollover_ind) ^
1206 reg->tx_rollover_ind);
1207 }
1208
1209 if (unmap_count)
1210 adapter->data_sent = false;
1211
1212 if (card->txbd_flush) {
1213 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1214 card->txbd_flush = 0;
1215 else
1216 mwifiex_clean_pcie_ring_buf(adapter);
1217 }
1218
1219 return 0;
1220}
1221
1222
1223
1224
1225
1226
1227
1228
1229static int
1230mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1231 struct mwifiex_tx_param *tx_param)
1232{
1233 struct pcie_service_card *card = adapter->card;
1234 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1235 u32 wrindx, num_tx_buffs, rx_val;
1236 int ret;
1237 dma_addr_t buf_pa;
1238 struct mwifiex_pcie_buf_desc *desc = NULL;
1239 struct mwifiex_pfu_buf_desc *desc2 = NULL;
1240
1241 if (!(skb->data && skb->len)) {
1242 mwifiex_dbg(adapter, ERROR,
1243 "%s(): invalid parameter <%p, %#x>\n",
1244 __func__, skb->data, skb->len);
1245 return -1;
1246 }
1247
1248 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1249 mwifiex_pm_wakeup_card(adapter);
1250
1251 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1252 mwifiex_dbg(adapter, DATA,
1253 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1254 card->txbd_rdptr, card->txbd_wrptr);
1255 if (mwifiex_pcie_txbd_not_full(card)) {
1256 u8 *payload;
1257
1258 adapter->data_sent = true;
1259 payload = skb->data;
1260 put_unaligned_le16((u16)skb->len, payload + 0);
1261 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
1262
1263 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1264 PCI_DMA_TODEVICE))
1265 return -1;
1266
1267 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1268 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1269 card->tx_buf_list[wrindx] = skb;
1270 atomic_inc(&adapter->tx_hw_pending);
1271
1272 if (reg->pfu_enabled) {
1273 desc2 = card->txbd_ring[wrindx];
1274 desc2->paddr = buf_pa;
1275 desc2->len = (u16)skb->len;
1276 desc2->frag_len = (u16)skb->len;
1277 desc2->offset = 0;
1278 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1279 MWIFIEX_BD_FLAG_LAST_DESC;
1280 } else {
1281 desc = card->txbd_ring[wrindx];
1282 desc->paddr = buf_pa;
1283 desc->len = (u16)skb->len;
1284 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1285 MWIFIEX_BD_FLAG_LAST_DESC;
1286 }
1287
1288 switch (card->dev->device) {
1289 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1290 card->txbd_wrptr++;
1291 break;
1292 case PCIE_DEVICE_ID_MARVELL_88W8897:
1293 case PCIE_DEVICE_ID_MARVELL_88W8997:
1294 card->txbd_wrptr += reg->ring_tx_start_ptr;
1295 break;
1296 }
1297
1298 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1299 card->txbd_wrptr = ((card->txbd_wrptr &
1300 reg->tx_rollover_ind) ^
1301 reg->tx_rollover_ind);
1302
1303 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1304
1305 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1306 card->txbd_wrptr | rx_val)) {
1307 mwifiex_dbg(adapter, ERROR,
1308 "SEND DATA: failed to write reg->tx_wrptr\n");
1309 ret = -1;
1310 goto done_unmap;
1311 }
1312 if ((mwifiex_pcie_txbd_not_full(card)) &&
1313 tx_param->next_pkt_len) {
1314
1315 mwifiex_dbg(adapter, DATA,
1316 "SEND DATA: delay dnld-rdy interrupt.\n");
1317 adapter->data_sent = false;
1318 } else {
1319
1320 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1321 CPU_INTR_DNLD_RDY)) {
1322 mwifiex_dbg(adapter, ERROR,
1323 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1324 ret = -1;
1325 goto done_unmap;
1326 }
1327 }
1328 mwifiex_dbg(adapter, DATA,
1329 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1330 "%#x> and sent packet to firmware successfully\n",
1331 card->txbd_rdptr, card->txbd_wrptr);
1332 } else {
1333 mwifiex_dbg(adapter, DATA,
1334 "info: TX Ring full, can't send packets to fw\n");
1335 adapter->data_sent = true;
1336
1337 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1338 CPU_INTR_DNLD_RDY))
1339 mwifiex_dbg(adapter, ERROR,
1340 "SEND DATA: failed to assert door-bell intr\n");
1341 return -EBUSY;
1342 }
1343
1344 return -EINPROGRESS;
1345done_unmap:
1346 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1347 card->tx_buf_list[wrindx] = NULL;
1348 atomic_dec(&adapter->tx_hw_pending);
1349 if (reg->pfu_enabled)
1350 memset(desc2, 0, sizeof(*desc2));
1351 else
1352 memset(desc, 0, sizeof(*desc));
1353
1354 return ret;
1355}
1356
1357
1358
1359
1360
1361static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1362{
1363 struct pcie_service_card *card = adapter->card;
1364 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1365 u32 wrptr, rd_index, tx_val;
1366 dma_addr_t buf_pa;
1367 int ret = 0;
1368 struct sk_buff *skb_tmp = NULL;
1369 struct mwifiex_pcie_buf_desc *desc;
1370 struct mwifiex_pfu_buf_desc *desc2;
1371
1372 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1373 mwifiex_pm_wakeup_card(adapter);
1374
1375
1376 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1377 mwifiex_dbg(adapter, ERROR,
1378 "RECV DATA: failed to read reg->rx_wrptr\n");
1379 ret = -1;
1380 goto done;
1381 }
1382 card->rxbd_wrptr = wrptr;
1383
1384 while (((wrptr & reg->rx_mask) !=
1385 (card->rxbd_rdptr & reg->rx_mask)) ||
1386 ((wrptr & reg->rx_rollover_ind) ==
1387 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1388 struct sk_buff *skb_data;
1389 u16 rx_len;
1390
1391 rd_index = card->rxbd_rdptr & reg->rx_mask;
1392 skb_data = card->rx_buf_list[rd_index];
1393
1394
1395
1396
1397 if (!skb_data)
1398 return -ENOMEM;
1399
1400 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
1401 card->rx_buf_list[rd_index] = NULL;
1402
1403
1404
1405
1406 rx_len = get_unaligned_le16(skb_data->data);
1407 if (WARN_ON(rx_len <= adapter->intf_hdr_len ||
1408 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1409 mwifiex_dbg(adapter, ERROR,
1410 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1411 rx_len, card->rxbd_rdptr, wrptr);
1412 dev_kfree_skb_any(skb_data);
1413 } else {
1414 skb_put(skb_data, rx_len);
1415 mwifiex_dbg(adapter, DATA,
1416 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1417 card->rxbd_rdptr, wrptr, rx_len);
1418 skb_pull(skb_data, adapter->intf_hdr_len);
1419 if (adapter->rx_work_enabled) {
1420 skb_queue_tail(&adapter->rx_data_q, skb_data);
1421 adapter->data_received = true;
1422 atomic_inc(&adapter->rx_pending);
1423 } else {
1424 mwifiex_handle_rx_packet(adapter, skb_data);
1425 }
1426 }
1427
1428 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1429 GFP_KERNEL);
1430 if (!skb_tmp) {
1431 mwifiex_dbg(adapter, ERROR,
1432 "Unable to allocate skb.\n");
1433 return -ENOMEM;
1434 }
1435
1436 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1437 MWIFIEX_RX_DATA_BUF_SIZE,
1438 PCI_DMA_FROMDEVICE))
1439 return -1;
1440
1441 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1442
1443 mwifiex_dbg(adapter, INFO,
1444 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1445 skb_tmp, rd_index);
1446 card->rx_buf_list[rd_index] = skb_tmp;
1447
1448 if (reg->pfu_enabled) {
1449 desc2 = card->rxbd_ring[rd_index];
1450 desc2->paddr = buf_pa;
1451 desc2->len = skb_tmp->len;
1452 desc2->frag_len = skb_tmp->len;
1453 desc2->offset = 0;
1454 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1455 } else {
1456 desc = card->rxbd_ring[rd_index];
1457 desc->paddr = buf_pa;
1458 desc->len = skb_tmp->len;
1459 desc->flags = 0;
1460 }
1461
1462 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1463 MWIFIEX_MAX_TXRX_BD) {
1464 card->rxbd_rdptr = ((card->rxbd_rdptr &
1465 reg->rx_rollover_ind) ^
1466 reg->rx_rollover_ind);
1467 }
1468 mwifiex_dbg(adapter, DATA,
1469 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1470 card->rxbd_rdptr, wrptr);
1471
1472 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1473
1474 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1475 card->rxbd_rdptr | tx_val)) {
1476 mwifiex_dbg(adapter, DATA,
1477 "RECV DATA: failed to write reg->rx_rdptr\n");
1478 ret = -1;
1479 goto done;
1480 }
1481
1482
1483 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1484 mwifiex_dbg(adapter, ERROR,
1485 "RECV DATA: failed to read reg->rx_wrptr\n");
1486 ret = -1;
1487 goto done;
1488 }
1489 mwifiex_dbg(adapter, DATA,
1490 "info: RECV DATA: Rcvd packet from fw successfully\n");
1491 card->rxbd_wrptr = wrptr;
1492 }
1493
1494done:
1495 return ret;
1496}
1497
1498
1499
1500
1501static int
1502mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1503{
1504 dma_addr_t buf_pa;
1505 struct pcie_service_card *card = adapter->card;
1506 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1507
1508 if (!(skb->data && skb->len)) {
1509 mwifiex_dbg(adapter, ERROR,
1510 "Invalid parameter in %s <%p. len %d>\n",
1511 __func__, skb->data, skb->len);
1512 return -1;
1513 }
1514
1515 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1516 return -1;
1517
1518 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1519
1520
1521
1522
1523 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1524 mwifiex_dbg(adapter, ERROR,
1525 "%s: failed to write download command to boot code.\n",
1526 __func__);
1527 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1528 return -1;
1529 }
1530
1531
1532
1533
1534 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1535 (u32)((u64)buf_pa >> 32))) {
1536 mwifiex_dbg(adapter, ERROR,
1537 "%s: failed to write download command to boot code.\n",
1538 __func__);
1539 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1540 return -1;
1541 }
1542
1543
1544 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1545 mwifiex_dbg(adapter, ERROR,
1546 "%s: failed to write command len to cmd_size scratch reg\n",
1547 __func__);
1548 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1549 return -1;
1550 }
1551
1552
1553 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1554 CPU_INTR_DOOR_BELL)) {
1555 mwifiex_dbg(adapter, ERROR,
1556 "%s: failed to assert door-bell intr\n", __func__);
1557 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1558 return -1;
1559 }
1560
1561 return 0;
1562}
1563
1564
1565
1566
1567static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1568{
1569 struct pcie_service_card *card = adapter->card;
1570 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1571 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1572
1573
1574 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1575 tx_wrap)) {
1576 mwifiex_dbg(adapter, ERROR,
1577 "RECV DATA: failed to write reg->rx_rdptr\n");
1578 return -1;
1579 }
1580 return 0;
1581}
1582
1583
1584
1585static int
1586mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1587{
1588 struct pcie_service_card *card = adapter->card;
1589 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1590 int ret = 0;
1591 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1592 u8 *payload = (u8 *)skb->data;
1593
1594 if (!(skb->data && skb->len)) {
1595 mwifiex_dbg(adapter, ERROR,
1596 "Invalid parameter in %s <%p, %#x>\n",
1597 __func__, skb->data, skb->len);
1598 return -1;
1599 }
1600
1601
1602 if (!card->cmdrsp_buf) {
1603 mwifiex_dbg(adapter, ERROR,
1604 "No response buffer available, send command failed\n");
1605 return -EBUSY;
1606 }
1607
1608 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1609 mwifiex_pm_wakeup_card(adapter);
1610
1611 adapter->cmd_sent = true;
1612
1613 put_unaligned_le16((u16)skb->len, &payload[0]);
1614 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
1615
1616 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1617 return -1;
1618
1619 card->cmd_buf = skb;
1620
1621
1622
1623
1624 skb_get(skb);
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636 if (card->cmdrsp_buf) {
1637 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1638
1639
1640 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1641 (u32)cmdrsp_buf_pa)) {
1642 mwifiex_dbg(adapter, ERROR,
1643 "Failed to write download cmd to boot code.\n");
1644 ret = -1;
1645 goto done;
1646 }
1647
1648
1649 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1650 (u32)((u64)cmdrsp_buf_pa >> 32))) {
1651 mwifiex_dbg(adapter, ERROR,
1652 "Failed to write download cmd to boot code.\n");
1653 ret = -1;
1654 goto done;
1655 }
1656 }
1657
1658 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1659
1660 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1661 (u32)cmd_buf_pa)) {
1662 mwifiex_dbg(adapter, ERROR,
1663 "Failed to write download cmd to boot code.\n");
1664 ret = -1;
1665 goto done;
1666 }
1667
1668 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1669 (u32)((u64)cmd_buf_pa >> 32))) {
1670 mwifiex_dbg(adapter, ERROR,
1671 "Failed to write download cmd to boot code.\n");
1672 ret = -1;
1673 goto done;
1674 }
1675
1676
1677 if (mwifiex_write_reg(adapter, reg->cmd_size,
1678 card->cmd_buf->len)) {
1679 mwifiex_dbg(adapter, ERROR,
1680 "Failed to write cmd len to reg->cmd_size\n");
1681 ret = -1;
1682 goto done;
1683 }
1684
1685
1686 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1687 CPU_INTR_DOOR_BELL)) {
1688 mwifiex_dbg(adapter, ERROR,
1689 "Failed to assert door-bell intr\n");
1690 ret = -1;
1691 goto done;
1692 }
1693
1694done:
1695 if (ret)
1696 adapter->cmd_sent = false;
1697
1698 return 0;
1699}
1700
1701
1702
1703
1704static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1705{
1706 struct pcie_service_card *card = adapter->card;
1707 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1708 struct sk_buff *skb = card->cmdrsp_buf;
1709 int count = 0;
1710 u16 rx_len;
1711
1712 mwifiex_dbg(adapter, CMD,
1713 "info: Rx CMD Response\n");
1714
1715 if (adapter->curr_cmd)
1716 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
1717 else
1718 pci_dma_sync_single_for_cpu(card->dev,
1719 MWIFIEX_SKB_DMA_ADDR(skb),
1720 MWIFIEX_UPLD_SIZE,
1721 PCI_DMA_FROMDEVICE);
1722
1723
1724 if (card->cmd_buf) {
1725 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1726 PCI_DMA_TODEVICE);
1727 dev_kfree_skb_any(card->cmd_buf);
1728 card->cmd_buf = NULL;
1729 }
1730
1731 rx_len = get_unaligned_le16(skb->data);
1732 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1733 skb_trim(skb, rx_len);
1734
1735 if (!adapter->curr_cmd) {
1736 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1737 pci_dma_sync_single_for_device(card->dev,
1738 MWIFIEX_SKB_DMA_ADDR(skb),
1739 MWIFIEX_SLEEP_COOKIE_SIZE,
1740 PCI_DMA_FROMDEVICE);
1741 if (mwifiex_write_reg(adapter,
1742 PCIE_CPU_INT_EVENT,
1743 CPU_INTR_SLEEP_CFM_DONE)) {
1744 mwifiex_dbg(adapter, ERROR,
1745 "Write register failed\n");
1746 return -1;
1747 }
1748 mwifiex_delay_for_sleep_cookie(adapter,
1749 MWIFIEX_MAX_DELAY_COUNT);
1750 mwifiex_unmap_pci_memory(adapter, skb,
1751 PCI_DMA_FROMDEVICE);
1752 skb_pull(skb, adapter->intf_hdr_len);
1753 while (reg->sleep_cookie && (count++ < 10) &&
1754 mwifiex_pcie_ok_to_access_hw(adapter))
1755 usleep_range(50, 60);
1756 mwifiex_pcie_enable_host_int(adapter);
1757 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1758 skb->len);
1759 } else {
1760 mwifiex_dbg(adapter, ERROR,
1761 "There is no command but got cmdrsp\n");
1762 }
1763 memcpy(adapter->upld_buf, skb->data,
1764 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1765 skb_push(skb, adapter->intf_hdr_len);
1766 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1767 PCI_DMA_FROMDEVICE))
1768 return -1;
1769 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1770 skb_pull(skb, adapter->intf_hdr_len);
1771 adapter->curr_cmd->resp_skb = skb;
1772 adapter->cmd_resp_received = true;
1773
1774
1775 card->cmdrsp_buf = NULL;
1776
1777
1778
1779
1780 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1781 mwifiex_dbg(adapter, ERROR,
1782 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1783 return -1;
1784 }
1785
1786
1787 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1788 mwifiex_dbg(adapter, ERROR,
1789 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1790 return -1;
1791 }
1792 }
1793
1794 return 0;
1795}
1796
1797
1798
1799
1800static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1801 struct sk_buff *skb)
1802{
1803 struct pcie_service_card *card = adapter->card;
1804
1805 if (skb) {
1806 card->cmdrsp_buf = skb;
1807 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len);
1808 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1809 PCI_DMA_FROMDEVICE))
1810 return -1;
1811 }
1812
1813 return 0;
1814}
1815
1816
1817
1818
1819static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1820{
1821 struct pcie_service_card *card = adapter->card;
1822 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1823 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1824 u32 wrptr, event;
1825 struct mwifiex_evt_buf_desc *desc;
1826
1827 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1828 mwifiex_pm_wakeup_card(adapter);
1829
1830 if (adapter->event_received) {
1831 mwifiex_dbg(adapter, EVENT,
1832 "info: Event being processed,\t"
1833 "do not process this interrupt just yet\n");
1834 return 0;
1835 }
1836
1837 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1838 mwifiex_dbg(adapter, ERROR,
1839 "info: Invalid read pointer...\n");
1840 return -1;
1841 }
1842
1843
1844 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1845 mwifiex_dbg(adapter, ERROR,
1846 "EventReady: failed to read reg->evt_wrptr\n");
1847 return -1;
1848 }
1849
1850 mwifiex_dbg(adapter, EVENT,
1851 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1852 card->evtbd_rdptr, wrptr);
1853 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1854 & MWIFIEX_EVTBD_MASK)) ||
1855 ((wrptr & reg->evt_rollover_ind) ==
1856 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
1857 struct sk_buff *skb_cmd;
1858 __le16 data_len = 0;
1859 u16 evt_len;
1860
1861 mwifiex_dbg(adapter, INFO,
1862 "info: Read Index: %d\n", rdptr);
1863 skb_cmd = card->evt_buf_list[rdptr];
1864 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
1865
1866
1867
1868 card->evt_buf_list[rdptr] = NULL;
1869 desc = card->evtbd_ring[rdptr];
1870 memset(desc, 0, sizeof(*desc));
1871
1872 event = get_unaligned_le32(
1873 &skb_cmd->data[adapter->intf_hdr_len]);
1874 adapter->event_cause = event;
1875
1876
1877 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1878 evt_len = le16_to_cpu(data_len);
1879 skb_trim(skb_cmd, evt_len);
1880 skb_pull(skb_cmd, adapter->intf_hdr_len);
1881 mwifiex_dbg(adapter, EVENT,
1882 "info: Event length: %d\n", evt_len);
1883
1884 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1885 memcpy(adapter->event_body, skb_cmd->data +
1886 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1887 MWIFIEX_EVENT_HEADER_LEN);
1888
1889 adapter->event_received = true;
1890 adapter->event_skb = skb_cmd;
1891
1892
1893
1894
1895
1896 } else {
1897 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1898 CPU_INTR_EVENT_DONE)) {
1899 mwifiex_dbg(adapter, ERROR,
1900 "Write register failed\n");
1901 return -1;
1902 }
1903 }
1904
1905 return 0;
1906}
1907
1908
1909
1910
1911static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1912 struct sk_buff *skb)
1913{
1914 struct pcie_service_card *card = adapter->card;
1915 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1916 int ret = 0;
1917 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1918 u32 wrptr;
1919 struct mwifiex_evt_buf_desc *desc;
1920
1921 if (!skb)
1922 return 0;
1923
1924 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1925 mwifiex_dbg(adapter, ERROR,
1926 "event_complete: Invalid rdptr 0x%x\n",
1927 rdptr);
1928 return -EINVAL;
1929 }
1930
1931
1932 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1933 mwifiex_dbg(adapter, ERROR,
1934 "event_complete: failed to read reg->evt_wrptr\n");
1935 return -1;
1936 }
1937
1938 if (!card->evt_buf_list[rdptr]) {
1939 skb_push(skb, adapter->intf_hdr_len);
1940 skb_put(skb, MAX_EVENT_SIZE - skb->len);
1941 if (mwifiex_map_pci_memory(adapter, skb,
1942 MAX_EVENT_SIZE,
1943 PCI_DMA_FROMDEVICE))
1944 return -1;
1945 card->evt_buf_list[rdptr] = skb;
1946 desc = card->evtbd_ring[rdptr];
1947 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
1948 desc->len = (u16)skb->len;
1949 desc->flags = 0;
1950 skb = NULL;
1951 } else {
1952 mwifiex_dbg(adapter, ERROR,
1953 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1954 rdptr, card->evt_buf_list[rdptr], skb);
1955 }
1956
1957 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1958 card->evtbd_rdptr = ((card->evtbd_rdptr &
1959 reg->evt_rollover_ind) ^
1960 reg->evt_rollover_ind);
1961 }
1962
1963 mwifiex_dbg(adapter, EVENT,
1964 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1965 card->evtbd_rdptr, wrptr);
1966
1967
1968 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1969 card->evtbd_rdptr)) {
1970 mwifiex_dbg(adapter, ERROR,
1971 "event_complete: failed to read reg->evt_rdptr\n");
1972 return -1;
1973 }
1974
1975 mwifiex_dbg(adapter, EVENT,
1976 "info: Check Events Again\n");
1977 ret = mwifiex_pcie_process_event_ready(adapter);
1978
1979 return ret;
1980}
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter,
1993 const void *firmware, u32 firmware_len) {
1994 const struct mwifiex_fw_data *fwdata;
1995 u32 offset = 0, data_len, dnld_cmd;
1996 int ret = 0;
1997 bool cmd7_before = false, first_cmd = false;
1998
1999 while (1) {
2000
2001 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) ||
2002 offset + sizeof(fwdata->header) >= firmware_len) {
2003 mwifiex_dbg(adapter, ERROR,
2004 "extract wifi-only fw failure!\n");
2005 ret = -1;
2006 goto done;
2007 }
2008
2009 fwdata = firmware + offset;
2010 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd);
2011 data_len = le32_to_cpu(fwdata->header.data_length);
2012
2013
2014 offset += sizeof(fwdata->header);
2015
2016 switch (dnld_cmd) {
2017 case MWIFIEX_FW_DNLD_CMD_1:
2018 if (offset + data_len < data_len) {
2019 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2020 ret = -1;
2021 goto done;
2022 }
2023
2024
2025 if (!first_cmd) {
2026 mwifiex_dbg(adapter, MSG,
2027 "input wifi-only firmware\n");
2028 return 0;
2029 }
2030
2031 if (!cmd7_before) {
2032 mwifiex_dbg(adapter, ERROR,
2033 "no cmd7 before cmd1!\n");
2034 ret = -1;
2035 goto done;
2036 }
2037 offset += data_len;
2038 break;
2039 case MWIFIEX_FW_DNLD_CMD_5:
2040 first_cmd = true;
2041
2042 if (offset + data_len < data_len) {
2043 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2044 ret = -1;
2045 goto done;
2046 }
2047 offset += data_len;
2048 break;
2049 case MWIFIEX_FW_DNLD_CMD_6:
2050 first_cmd = true;
2051
2052 if (offset + data_len < data_len) {
2053 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2054 ret = -1;
2055 goto done;
2056 }
2057 offset += data_len;
2058 if (offset >= firmware_len) {
2059 mwifiex_dbg(adapter, ERROR,
2060 "extract wifi-only fw failure!\n");
2061 ret = -1;
2062 } else {
2063 ret = offset;
2064 }
2065 goto done;
2066 case MWIFIEX_FW_DNLD_CMD_7:
2067 first_cmd = true;
2068 cmd7_before = true;
2069 break;
2070 default:
2071 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n",
2072 dnld_cmd);
2073 ret = -1;
2074 goto done;
2075 }
2076 }
2077
2078done:
2079 return ret;
2080}
2081
2082
2083
2084
2085
2086
2087
2088
2089static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
2090 struct mwifiex_fw_image *fw)
2091{
2092 int ret;
2093 u8 *firmware = fw->fw_buf;
2094 u32 firmware_len = fw->fw_len;
2095 u32 offset = 0;
2096 struct sk_buff *skb;
2097 u32 txlen, tx_blocks = 0, tries, len, val;
2098 u32 block_retry_cnt = 0;
2099 struct pcie_service_card *card = adapter->card;
2100 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2101
2102 if (!firmware || !firmware_len) {
2103 mwifiex_dbg(adapter, ERROR,
2104 "No firmware image found! Terminating download\n");
2105 return -1;
2106 }
2107
2108 mwifiex_dbg(adapter, INFO,
2109 "info: Downloading FW image (%d bytes)\n",
2110 firmware_len);
2111
2112 if (mwifiex_pcie_disable_host_int(adapter)) {
2113 mwifiex_dbg(adapter, ERROR,
2114 "%s: Disabling interrupts failed.\n", __func__);
2115 return -1;
2116 }
2117
2118 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
2119 if (!skb) {
2120 ret = -ENOMEM;
2121 goto done;
2122 }
2123
2124 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val);
2125 if (ret) {
2126 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n");
2127 goto done;
2128 }
2129
2130
2131 if (val == MWIFIEX_PCIE_FLR_HAPPENS) {
2132 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len);
2133 if (ret < 0) {
2134 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n");
2135 goto done;
2136 }
2137 offset = ret;
2138 mwifiex_dbg(adapter, MSG,
2139 "info: dnld wifi firmware from %d bytes\n", offset);
2140 }
2141
2142
2143 do {
2144 u32 ireg_intr = 0;
2145
2146
2147 if (offset >= firmware_len)
2148 break;
2149
2150 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2151 ret = mwifiex_read_reg(adapter, reg->cmd_size,
2152 &len);
2153 if (ret) {
2154 mwifiex_dbg(adapter, FATAL,
2155 "Failed reading len from boot code\n");
2156 goto done;
2157 }
2158 if (len)
2159 break;
2160 usleep_range(10, 20);
2161 }
2162
2163 if (!len) {
2164 break;
2165 } else if (len > MWIFIEX_UPLD_SIZE) {
2166 mwifiex_dbg(adapter, ERROR,
2167 "FW download failure @ %d, invalid length %d\n",
2168 offset, len);
2169 ret = -1;
2170 goto done;
2171 }
2172
2173 txlen = len;
2174
2175 if (len & BIT(0)) {
2176 block_retry_cnt++;
2177 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
2178 mwifiex_dbg(adapter, ERROR,
2179 "FW download failure @ %d, over max\t"
2180 "retry count\n", offset);
2181 ret = -1;
2182 goto done;
2183 }
2184 mwifiex_dbg(adapter, ERROR,
2185 "FW CRC error indicated by the\t"
2186 "helper: len = 0x%04X, txlen = %d\n",
2187 len, txlen);
2188 len &= ~BIT(0);
2189
2190 txlen = 0;
2191 } else {
2192 block_retry_cnt = 0;
2193
2194
2195 if (firmware_len - offset < txlen)
2196 txlen = firmware_len - offset;
2197
2198 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2199 card->pcie.blksz_fw_dl;
2200
2201
2202 memmove(skb->data, &firmware[offset], txlen);
2203 }
2204
2205 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2206 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2207
2208
2209 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2210 mwifiex_dbg(adapter, ERROR,
2211 "Failed to send firmware download command\n");
2212 ret = -1;
2213 goto done;
2214 }
2215
2216
2217 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2218 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2219 &ireg_intr)) {
2220 mwifiex_dbg(adapter, ERROR,
2221 "%s: Failed to read\t"
2222 "interrupt status during fw dnld.\n",
2223 __func__);
2224 mwifiex_unmap_pci_memory(adapter, skb,
2225 PCI_DMA_TODEVICE);
2226 ret = -1;
2227 goto done;
2228 }
2229 if (!(ireg_intr & CPU_INTR_DOOR_BELL))
2230 break;
2231 usleep_range(10, 20);
2232 }
2233 if (ireg_intr & CPU_INTR_DOOR_BELL) {
2234 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n",
2235 __func__);
2236 mwifiex_unmap_pci_memory(adapter, skb,
2237 PCI_DMA_TODEVICE);
2238 ret = -1;
2239 goto done;
2240 }
2241
2242 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
2243
2244 offset += txlen;
2245 } while (true);
2246
2247 mwifiex_dbg(adapter, MSG,
2248 "info: FW download over, size %d bytes\n", offset);
2249
2250 ret = 0;
2251
2252done:
2253 dev_kfree_skb_any(skb);
2254 return ret;
2255}
2256
2257
2258
2259
2260static int
2261mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2262{
2263 int ret = 0;
2264 u32 firmware_stat;
2265 struct pcie_service_card *card = adapter->card;
2266 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2267 u32 tries;
2268
2269
2270 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2271 HOST_INTR_MASK)) {
2272 mwifiex_dbg(adapter, ERROR,
2273 "Write register failed\n");
2274 return -1;
2275 }
2276
2277 mwifiex_dbg(adapter, INFO,
2278 "Setting driver ready signature\n");
2279 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2280 FIRMWARE_READY_PCIE)) {
2281 mwifiex_dbg(adapter, ERROR,
2282 "Failed to write driver ready signature\n");
2283 return -1;
2284 }
2285
2286
2287 for (tries = 0; tries < poll_num; tries++) {
2288 if (mwifiex_read_reg(adapter, reg->fw_status,
2289 &firmware_stat))
2290 ret = -1;
2291 else
2292 ret = 0;
2293
2294 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2295 tries, ret, firmware_stat);
2296
2297 if (ret)
2298 continue;
2299 if (firmware_stat == FIRMWARE_READY_PCIE) {
2300 ret = 0;
2301 break;
2302 } else {
2303 msleep(100);
2304 ret = -1;
2305 }
2306 }
2307
2308 return ret;
2309}
2310
2311
2312
2313static int
2314mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2315{
2316 u32 winner = 0;
2317 int ret = 0;
2318 struct pcie_service_card *card = adapter->card;
2319 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2320
2321 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2322 ret = -1;
2323 } else if (!winner) {
2324 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2325 adapter->winner = 1;
2326 } else {
2327 mwifiex_dbg(adapter, ERROR,
2328 "PCI-E is not the winner <%#x>", winner);
2329 }
2330
2331 return ret;
2332}
2333
2334
2335
2336
2337static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2338 int msg_id)
2339{
2340 u32 pcie_ireg;
2341 unsigned long flags;
2342 struct pcie_service_card *card = adapter->card;
2343
2344 if (card->msi_enable) {
2345 spin_lock_irqsave(&adapter->int_lock, flags);
2346 adapter->int_status = 1;
2347 spin_unlock_irqrestore(&adapter->int_lock, flags);
2348 return;
2349 }
2350
2351 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2352 return;
2353
2354 if (card->msix_enable && msg_id >= 0) {
2355 pcie_ireg = BIT(msg_id);
2356 } else {
2357 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2358 &pcie_ireg)) {
2359 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2360 return;
2361 }
2362
2363 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2364 return;
2365
2366
2367 mwifiex_pcie_disable_host_int(adapter);
2368
2369
2370 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2371 ~pcie_ireg)) {
2372 mwifiex_dbg(adapter, ERROR,
2373 "Write register failed\n");
2374 return;
2375 }
2376 }
2377
2378 if (!adapter->pps_uapsd_mode &&
2379 adapter->ps_state == PS_STATE_SLEEP &&
2380 mwifiex_pcie_ok_to_access_hw(adapter)) {
2381
2382
2383
2384
2385 adapter->ps_state = PS_STATE_AWAKE;
2386 adapter->pm_wakeup_fw_try = false;
2387 del_timer(&adapter->wakeup_timer);
2388 }
2389
2390 spin_lock_irqsave(&adapter->int_lock, flags);
2391 adapter->int_status |= pcie_ireg;
2392 spin_unlock_irqrestore(&adapter->int_lock, flags);
2393 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2394}
2395
2396
2397
2398
2399
2400
2401
2402static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2403{
2404 struct mwifiex_msix_context *ctx = context;
2405 struct pci_dev *pdev = ctx->dev;
2406 struct pcie_service_card *card;
2407 struct mwifiex_adapter *adapter;
2408
2409 card = pci_get_drvdata(pdev);
2410
2411 if (!card->adapter) {
2412 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2413 card ? card->adapter : NULL);
2414 goto exit;
2415 }
2416 adapter = card->adapter;
2417
2418 if (adapter->surprise_removed)
2419 goto exit;
2420
2421 if (card->msix_enable)
2422 mwifiex_interrupt_status(adapter, ctx->msg_id);
2423 else
2424 mwifiex_interrupt_status(adapter, -1);
2425
2426 mwifiex_queue_main_work(adapter);
2427
2428exit:
2429 return IRQ_HANDLED;
2430}
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2446{
2447 int ret;
2448 u32 pcie_ireg = 0;
2449 unsigned long flags;
2450 struct pcie_service_card *card = adapter->card;
2451
2452 spin_lock_irqsave(&adapter->int_lock, flags);
2453 if (!card->msi_enable) {
2454
2455 pcie_ireg = adapter->int_status;
2456 }
2457 adapter->int_status = 0;
2458 spin_unlock_irqrestore(&adapter->int_lock, flags);
2459
2460 if (card->msi_enable) {
2461 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2462 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2463 &pcie_ireg)) {
2464 mwifiex_dbg(adapter, ERROR,
2465 "Read register failed\n");
2466 return -1;
2467 }
2468
2469 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2470 if (mwifiex_write_reg(adapter,
2471 PCIE_HOST_INT_STATUS,
2472 ~pcie_ireg)) {
2473 mwifiex_dbg(adapter, ERROR,
2474 "Write register failed\n");
2475 return -1;
2476 }
2477 if (!adapter->pps_uapsd_mode &&
2478 adapter->ps_state == PS_STATE_SLEEP) {
2479 adapter->ps_state = PS_STATE_AWAKE;
2480 adapter->pm_wakeup_fw_try = false;
2481 del_timer(&adapter->wakeup_timer);
2482 }
2483 }
2484 }
2485 }
2486
2487 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2488 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n");
2489 ret = mwifiex_pcie_send_data_complete(adapter);
2490 if (ret)
2491 return ret;
2492 }
2493 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2494 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n");
2495 ret = mwifiex_pcie_process_recv_data(adapter);
2496 if (ret)
2497 return ret;
2498 }
2499 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2500 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n");
2501 ret = mwifiex_pcie_process_event_ready(adapter);
2502 if (ret)
2503 return ret;
2504 }
2505 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2506 if (adapter->cmd_sent) {
2507 mwifiex_dbg(adapter, INTR,
2508 "info: CMD sent Interrupt\n");
2509 adapter->cmd_sent = false;
2510 }
2511
2512 ret = mwifiex_pcie_process_cmd_complete(adapter);
2513 if (ret)
2514 return ret;
2515 }
2516
2517 mwifiex_dbg(adapter, INTR,
2518 "info: cmd_sent=%d data_sent=%d\n",
2519 adapter->cmd_sent, adapter->data_sent);
2520 if (!card->msi_enable && !card->msix_enable &&
2521 adapter->ps_state != PS_STATE_SLEEP)
2522 mwifiex_pcie_enable_host_int(adapter);
2523
2524 return 0;
2525}
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2538 struct sk_buff *skb,
2539 struct mwifiex_tx_param *tx_param)
2540{
2541 if (!skb) {
2542 mwifiex_dbg(adapter, ERROR,
2543 "Passed NULL skb to %s\n", __func__);
2544 return -1;
2545 }
2546
2547 if (type == MWIFIEX_TYPE_DATA)
2548 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2549 else if (type == MWIFIEX_TYPE_CMD)
2550 return mwifiex_pcie_send_cmd(adapter, skb);
2551
2552 return 0;
2553}
2554
2555
2556
2557static int
2558mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2559{
2560 char *p = drv_buf;
2561 char buf[256], *ptr;
2562 int i;
2563 u32 value;
2564 struct pcie_service_card *card = adapter->card;
2565 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2566 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2567 PCIE_SCRATCH_14_REG,
2568 PCIE_SCRATCH_15_REG};
2569
2570 if (!p)
2571 return 0;
2572
2573 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2574
2575 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2576 mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2577 return 0;
2578 }
2579
2580 ptr = buf;
2581 mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2582 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2583 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2584 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2585 pcie_scratch_reg[i], value);
2586 }
2587
2588 mwifiex_dbg(adapter, MSG, "%s\n", buf);
2589 p += sprintf(p, "%s\n", buf);
2590
2591 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2592
2593 return p - drv_buf;
2594}
2595
2596
2597static enum rdwr_status
2598mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2599{
2600 int ret, tries;
2601 u8 ctrl_data;
2602 u32 fw_status;
2603 struct pcie_service_card *card = adapter->card;
2604 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2605
2606 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2607 return RDWR_STATUS_FAILURE;
2608
2609 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2610 reg->fw_dump_host_ready);
2611 if (ret) {
2612 mwifiex_dbg(adapter, ERROR,
2613 "PCIE write err\n");
2614 return RDWR_STATUS_FAILURE;
2615 }
2616
2617 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2618 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2619 if (ctrl_data == FW_DUMP_DONE)
2620 return RDWR_STATUS_SUCCESS;
2621 if (doneflag && ctrl_data == doneflag)
2622 return RDWR_STATUS_DONE;
2623 if (ctrl_data != reg->fw_dump_host_ready) {
2624 mwifiex_dbg(adapter, WARN,
2625 "The ctrl reg was changed, re-try again!\n");
2626 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2627 reg->fw_dump_host_ready);
2628 if (ret) {
2629 mwifiex_dbg(adapter, ERROR,
2630 "PCIE write err\n");
2631 return RDWR_STATUS_FAILURE;
2632 }
2633 }
2634 usleep_range(100, 200);
2635 }
2636
2637 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2638 return RDWR_STATUS_FAILURE;
2639}
2640
2641
2642static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2643{
2644 struct pcie_service_card *card = adapter->card;
2645 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2646 unsigned int reg, reg_start, reg_end;
2647 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2648 u8 idx, i, read_reg, doneflag = 0;
2649 enum rdwr_status stat;
2650 u32 memory_size;
2651 int ret;
2652
2653 if (!card->pcie.can_dump_fw)
2654 return;
2655
2656 for (idx = 0; idx < adapter->num_mem_types; idx++) {
2657 struct memory_type_mapping *entry =
2658 &adapter->mem_type_mapping_tbl[idx];
2659
2660 if (entry->mem_ptr) {
2661 vfree(entry->mem_ptr);
2662 entry->mem_ptr = NULL;
2663 }
2664 entry->mem_size = 0;
2665 }
2666
2667 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2668
2669
2670 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2671 if (stat == RDWR_STATUS_FAILURE)
2672 return;
2673
2674 reg = creg->fw_dump_start;
2675 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2676
2677
2678 if (fw_dump_num == 0)
2679 dump_num = 1;
2680 else
2681 dump_num = fw_dump_num;
2682
2683
2684 for (idx = 0; idx < dump_num; idx++) {
2685 struct memory_type_mapping *entry =
2686 &adapter->mem_type_mapping_tbl[idx];
2687 memory_size = 0;
2688 if (fw_dump_num != 0) {
2689 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2690 if (stat == RDWR_STATUS_FAILURE)
2691 return;
2692
2693 reg = creg->fw_dump_start;
2694 for (i = 0; i < 4; i++) {
2695 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2696 memory_size |= (read_reg << (i * 8));
2697 reg++;
2698 }
2699 } else {
2700 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2701 }
2702
2703 if (memory_size == 0) {
2704 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2705 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2706 creg->fw_dump_read_done);
2707 if (ret) {
2708 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2709 return;
2710 }
2711 break;
2712 }
2713
2714 mwifiex_dbg(adapter, DUMP,
2715 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2716 entry->mem_ptr = vmalloc(memory_size + 1);
2717 entry->mem_size = memory_size;
2718 if (!entry->mem_ptr) {
2719 mwifiex_dbg(adapter, ERROR,
2720 "Vmalloc %s failed\n", entry->mem_name);
2721 return;
2722 }
2723 dbg_ptr = entry->mem_ptr;
2724 end_ptr = dbg_ptr + memory_size;
2725
2726 doneflag = entry->done_flag;
2727 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2728 entry->mem_name);
2729
2730 do {
2731 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2732 if (RDWR_STATUS_FAILURE == stat)
2733 return;
2734
2735 reg_start = creg->fw_dump_start;
2736 reg_end = creg->fw_dump_end;
2737 for (reg = reg_start; reg <= reg_end; reg++) {
2738 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2739 if (dbg_ptr < end_ptr) {
2740 dbg_ptr++;
2741 continue;
2742 }
2743 mwifiex_dbg(adapter, ERROR,
2744 "pre-allocated buf not enough\n");
2745 tmp_ptr =
2746 vzalloc(memory_size + MWIFIEX_SIZE_4K);
2747 if (!tmp_ptr)
2748 return;
2749 memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2750 vfree(entry->mem_ptr);
2751 entry->mem_ptr = tmp_ptr;
2752 tmp_ptr = NULL;
2753 dbg_ptr = entry->mem_ptr + memory_size;
2754 memory_size += MWIFIEX_SIZE_4K;
2755 end_ptr = entry->mem_ptr + memory_size;
2756 }
2757
2758 if (stat != RDWR_STATUS_DONE)
2759 continue;
2760
2761 mwifiex_dbg(adapter, DUMP,
2762 "%s done: size=0x%tx\n",
2763 entry->mem_name, dbg_ptr - entry->mem_ptr);
2764 break;
2765 } while (true);
2766 }
2767 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2768}
2769
2770static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2771{
2772 int drv_info_size;
2773 void *drv_info;
2774
2775 drv_info_size = mwifiex_drv_info_dump(adapter, &drv_info);
2776 mwifiex_pcie_fw_dump(adapter);
2777 mwifiex_upload_device_dump(adapter, drv_info, drv_info_size);
2778}
2779
2780static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter)
2781{
2782 struct pcie_service_card *card = adapter->card;
2783
2784 pci_reset_function(card->dev);
2785}
2786
2787static void mwifiex_pcie_work(struct work_struct *work)
2788{
2789 struct pcie_service_card *card =
2790 container_of(work, struct pcie_service_card, work);
2791
2792 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2793 &card->work_flags))
2794 mwifiex_pcie_device_dump_work(card->adapter);
2795 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
2796 &card->work_flags))
2797 mwifiex_pcie_card_reset_work(card->adapter);
2798}
2799
2800
2801static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2802{
2803 struct pcie_service_card *card = adapter->card;
2804
2805 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2806 &card->work_flags))
2807 schedule_work(&card->work);
2808}
2809
2810static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter)
2811{
2812 struct pcie_service_card *card = adapter->card;
2813
2814 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
2815 schedule_work(&card->work);
2816}
2817
2818static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter)
2819{
2820 struct pcie_service_card *card = adapter->card;
2821 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2822 int ret;
2823
2824 card->cmdrsp_buf = NULL;
2825 ret = mwifiex_pcie_create_txbd_ring(adapter);
2826 if (ret) {
2827 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
2828 goto err_cre_txbd;
2829 }
2830
2831 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2832 if (ret) {
2833 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
2834 goto err_cre_rxbd;
2835 }
2836
2837 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2838 if (ret) {
2839 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
2840 goto err_cre_evtbd;
2841 }
2842
2843 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2844 if (ret) {
2845 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
2846 goto err_alloc_cmdbuf;
2847 }
2848
2849 if (reg->sleep_cookie) {
2850 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2851 if (ret) {
2852 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
2853 goto err_alloc_cookie;
2854 }
2855 } else {
2856 card->sleep_cookie_vbase = NULL;
2857 }
2858
2859 return 0;
2860
2861err_alloc_cookie:
2862 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2863err_alloc_cmdbuf:
2864 mwifiex_pcie_delete_evtbd_ring(adapter);
2865err_cre_evtbd:
2866 mwifiex_pcie_delete_rxbd_ring(adapter);
2867err_cre_rxbd:
2868 mwifiex_pcie_delete_txbd_ring(adapter);
2869err_cre_txbd:
2870 return ret;
2871}
2872
2873static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter)
2874{
2875 struct pcie_service_card *card = adapter->card;
2876 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2877
2878 if (reg->sleep_cookie)
2879 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2880
2881 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2882 mwifiex_pcie_delete_evtbd_ring(adapter);
2883 mwifiex_pcie_delete_rxbd_ring(adapter);
2884 mwifiex_pcie_delete_txbd_ring(adapter);
2885}
2886
2887
2888
2889
2890static int mwifiex_init_pcie(struct mwifiex_adapter *adapter)
2891{
2892 struct pcie_service_card *card = adapter->card;
2893 int ret;
2894 struct pci_dev *pdev = card->dev;
2895
2896 pci_set_drvdata(pdev, card);
2897
2898 ret = pci_enable_device(pdev);
2899 if (ret)
2900 goto err_enable_dev;
2901
2902 pci_set_master(pdev);
2903
2904 pr_notice("try set_consistent_dma_mask(32)\n");
2905 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2906 if (ret) {
2907 pr_err("set_dma_mask(32) failed\n");
2908 goto err_set_dma_mask;
2909 }
2910
2911 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2912 if (ret) {
2913 pr_err("set_consistent_dma_mask(64) failed\n");
2914 goto err_set_dma_mask;
2915 }
2916
2917 ret = pci_request_region(pdev, 0, DRV_NAME);
2918 if (ret) {
2919 pr_err("req_reg(0) error\n");
2920 goto err_req_region0;
2921 }
2922 card->pci_mmap = pci_iomap(pdev, 0, 0);
2923 if (!card->pci_mmap) {
2924 pr_err("iomap(0) error\n");
2925 ret = -EIO;
2926 goto err_iomap0;
2927 }
2928 ret = pci_request_region(pdev, 2, DRV_NAME);
2929 if (ret) {
2930 pr_err("req_reg(2) error\n");
2931 goto err_req_region2;
2932 }
2933 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2934 if (!card->pci_mmap1) {
2935 pr_err("iomap(2) error\n");
2936 ret = -EIO;
2937 goto err_iomap2;
2938 }
2939
2940 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2941 card->pci_mmap, card->pci_mmap1);
2942
2943 ret = mwifiex_pcie_alloc_buffers(adapter);
2944 if (ret)
2945 goto err_alloc_buffers;
2946
2947 return 0;
2948
2949err_alloc_buffers:
2950 pci_iounmap(pdev, card->pci_mmap1);
2951err_iomap2:
2952 pci_release_region(pdev, 2);
2953err_req_region2:
2954 pci_iounmap(pdev, card->pci_mmap);
2955err_iomap0:
2956 pci_release_region(pdev, 0);
2957err_req_region0:
2958err_set_dma_mask:
2959 pci_disable_device(pdev);
2960err_enable_dev:
2961 return ret;
2962}
2963
2964
2965
2966
2967static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter)
2968{
2969 struct pcie_service_card *card = adapter->card;
2970 struct pci_dev *pdev = card->dev;
2971 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2972 int ret;
2973 u32 fw_status;
2974
2975 cancel_work_sync(&card->work);
2976
2977 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
2978 if (fw_status == FIRMWARE_READY_PCIE) {
2979 mwifiex_dbg(adapter, INFO,
2980 "Clearing driver ready signature\n");
2981 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
2982 mwifiex_dbg(adapter, ERROR,
2983 "Failed to write driver not-ready signature\n");
2984 }
2985
2986 pci_disable_device(pdev);
2987
2988 pci_iounmap(pdev, card->pci_mmap);
2989 pci_iounmap(pdev, card->pci_mmap1);
2990 pci_release_region(pdev, 2);
2991 pci_release_region(pdev, 0);
2992
2993 mwifiex_pcie_free_buffers(adapter);
2994}
2995
2996static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
2997{
2998 int ret, i, j;
2999 struct pcie_service_card *card = adapter->card;
3000 struct pci_dev *pdev = card->dev;
3001
3002 if (card->pcie.reg->msix_support) {
3003 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3004 card->msix_entries[i].entry = i;
3005 ret = pci_enable_msix_exact(pdev, card->msix_entries,
3006 MWIFIEX_NUM_MSIX_VECTORS);
3007 if (!ret) {
3008 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
3009 card->msix_ctx[i].dev = pdev;
3010 card->msix_ctx[i].msg_id = i;
3011
3012 ret = request_irq(card->msix_entries[i].vector,
3013 mwifiex_pcie_interrupt, 0,
3014 "MWIFIEX_PCIE_MSIX",
3015 &card->msix_ctx[i]);
3016 if (ret)
3017 break;
3018 }
3019
3020 if (ret) {
3021 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
3022 ret);
3023 for (j = 0; j < i; j++)
3024 free_irq(card->msix_entries[j].vector,
3025 &card->msix_ctx[i]);
3026 pci_disable_msix(pdev);
3027 } else {
3028 mwifiex_dbg(adapter, MSG, "MSIx enabled!");
3029 card->msix_enable = 1;
3030 return 0;
3031 }
3032 }
3033 }
3034
3035 if (pci_enable_msi(pdev) != 0)
3036 pci_disable_msi(pdev);
3037 else
3038 card->msi_enable = 1;
3039
3040 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
3041
3042 card->share_irq_ctx.dev = pdev;
3043 card->share_irq_ctx.msg_id = -1;
3044 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
3045 "MRVL_PCIE", &card->share_irq_ctx);
3046 if (ret) {
3047 pr_err("request_irq failed: ret=%d\n", ret);
3048 return -1;
3049 }
3050
3051 return 0;
3052}
3053
3054
3055
3056
3057
3058
3059static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
3060{
3061 int revision_id = 0;
3062 int version, magic;
3063 struct pcie_service_card *card = adapter->card;
3064
3065 switch (card->dev->device) {
3066 case PCIE_DEVICE_ID_MARVELL_88W8766P:
3067 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
3068 break;
3069 case PCIE_DEVICE_ID_MARVELL_88W8897:
3070 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
3071 mwifiex_read_reg(adapter, 0x0c58, &revision_id);
3072 revision_id &= 0xff00;
3073 switch (revision_id) {
3074 case PCIE8897_A0:
3075 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
3076 break;
3077 case PCIE8897_B0:
3078 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
3079 break;
3080 default:
3081 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
3082
3083 break;
3084 }
3085 break;
3086 case PCIE_DEVICE_ID_MARVELL_88W8997:
3087 mwifiex_read_reg(adapter, 0x8, &revision_id);
3088 mwifiex_read_reg(adapter, 0x0cd0, &version);
3089 mwifiex_read_reg(adapter, 0x0cd4, &magic);
3090 revision_id &= 0xff;
3091 version &= 0x7;
3092 magic &= 0xff;
3093 if (revision_id == PCIE8997_A1 &&
3094 magic == CHIP_MAGIC_VALUE &&
3095 version == CHIP_VER_PCIEUART)
3096 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
3097 else
3098 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
3099 break;
3100 default:
3101 break;
3102 }
3103}
3104
3105
3106
3107
3108
3109
3110static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
3111{
3112 struct pcie_service_card *card = adapter->card;
3113
3114
3115 card->adapter = adapter;
3116
3117 if (mwifiex_pcie_request_irq(adapter))
3118 return -1;
3119
3120 adapter->tx_buf_size = card->pcie.tx_buf_size;
3121 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
3122 adapter->num_mem_types = card->pcie.num_mem_types;
3123 adapter->ext_scan = card->pcie.can_ext_scan;
3124 mwifiex_pcie_get_fw_name(adapter);
3125
3126 return 0;
3127}
3128
3129
3130
3131
3132
3133
3134
3135static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
3136{
3137 struct pcie_service_card *card = adapter->card;
3138 struct pci_dev *pdev = card->dev;
3139 int i;
3140
3141 if (card->msix_enable) {
3142 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3143 synchronize_irq(card->msix_entries[i].vector);
3144
3145 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3146 free_irq(card->msix_entries[i].vector,
3147 &card->msix_ctx[i]);
3148
3149 card->msix_enable = 0;
3150 pci_disable_msix(pdev);
3151 } else {
3152 mwifiex_dbg(adapter, INFO,
3153 "%s(): calling free_irq()\n", __func__);
3154 free_irq(card->dev->irq, &card->share_irq_ctx);
3155
3156 if (card->msi_enable)
3157 pci_disable_msi(pdev);
3158 }
3159 card->adapter = NULL;
3160}
3161
3162
3163
3164
3165
3166static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3167{
3168 struct pcie_service_card *card = adapter->card;
3169 struct pci_dev *pdev = card->dev;
3170
3171
3172
3173
3174 adapter->tx_buf_size = card->pcie.tx_buf_size;
3175
3176 mwifiex_pcie_alloc_buffers(adapter);
3177
3178 pci_set_master(pdev);
3179}
3180
3181
3182static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3183{
3184 struct pcie_service_card *card = adapter->card;
3185 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3186 struct pci_dev *pdev = card->dev;
3187
3188 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3189 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3190
3191 pci_clear_master(pdev);
3192
3193 adapter->seq_num = 0;
3194
3195 mwifiex_pcie_free_buffers(adapter);
3196}
3197
3198static struct mwifiex_if_ops pcie_ops = {
3199 .init_if = mwifiex_init_pcie,
3200 .cleanup_if = mwifiex_cleanup_pcie,
3201 .check_fw_status = mwifiex_check_fw_status,
3202 .check_winner_status = mwifiex_check_winner_status,
3203 .prog_fw = mwifiex_prog_fw_w_helper,
3204 .register_dev = mwifiex_register_dev,
3205 .unregister_dev = mwifiex_unregister_dev,
3206 .enable_int = mwifiex_pcie_enable_host_int,
3207 .disable_int = mwifiex_pcie_disable_host_int_noerr,
3208 .process_int_status = mwifiex_process_int_status,
3209 .host_to_card = mwifiex_pcie_host_to_card,
3210 .wakeup = mwifiex_pm_wakeup_card,
3211 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
3212
3213
3214 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
3215 .event_complete = mwifiex_pcie_event_complete,
3216 .update_mp_end_port = NULL,
3217 .cleanup_mpa_buf = NULL,
3218 .init_fw_port = mwifiex_pcie_init_fw_port,
3219 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
3220 .card_reset = mwifiex_pcie_card_reset,
3221 .reg_dump = mwifiex_pcie_reg_dump,
3222 .device_dump = mwifiex_pcie_device_dump,
3223 .down_dev = mwifiex_pcie_down_dev,
3224 .up_dev = mwifiex_pcie_up_dev,
3225};
3226
3227module_pci_driver(mwifiex_pcie);
3228
3229MODULE_AUTHOR("Marvell International Ltd.");
3230MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3231MODULE_VERSION(PCIE_VERSION);
3232MODULE_LICENSE("GPL v2");
3233