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29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/types.h>
32#include <linux/slab.h>
33#include <linux/workqueue.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/wait.h>
37#include <linux/pci.h>
38#include <linux/pci_hotplug.h>
39#include <linux/kthread.h>
40#include "cpqphp.h"
41
42static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
43 u8 behind_bridge, struct resource_lists *resources);
44static int configure_new_function(struct controller *ctrl, struct pci_func *func,
45 u8 behind_bridge, struct resource_lists *resources);
46static void interrupt_event_handler(struct controller *ctrl);
47
48
49static struct task_struct *cpqhp_event_thread;
50static struct timer_list *pushbutton_pending;
51
52
53static void long_delay(int delay)
54{
55
56
57
58
59
60
61 msleep_interruptible(jiffies_to_msecs(delay));
62}
63
64
65
66#define WRONG_BUS_FREQUENCY 0x07
67static u8 handle_switch_change(u8 change, struct controller *ctrl)
68{
69 int hp_slot;
70 u8 rc = 0;
71 u16 temp_word;
72 struct pci_func *func;
73 struct event_info *taskInfo;
74
75 if (!change)
76 return 0;
77
78
79 dbg("cpqsbd: Switch interrupt received.\n");
80
81 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
82 if (change & (0x1L << hp_slot)) {
83
84
85
86 func = cpqhp_slot_find(ctrl->bus,
87 (hp_slot + ctrl->slot_device_offset), 0);
88
89
90
91
92 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
93 ctrl->next_event = (ctrl->next_event + 1) % 10;
94 taskInfo->hp_slot = hp_slot;
95
96 rc++;
97
98 temp_word = ctrl->ctrl_int_comp >> 16;
99 func->presence_save = (temp_word >> hp_slot) & 0x01;
100 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
101
102 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
103
104
105
106
107 func->switch_save = 0;
108
109 taskInfo->event_type = INT_SWITCH_OPEN;
110 } else {
111
112
113
114
115 func->switch_save = 0x10;
116
117 taskInfo->event_type = INT_SWITCH_CLOSE;
118 }
119 }
120 }
121
122 return rc;
123}
124
125
126
127
128
129
130static struct slot *cpqhp_find_slot(struct controller *ctrl, u8 device)
131{
132 struct slot *slot = ctrl->slot;
133
134 while (slot && (slot->device != device))
135 slot = slot->next;
136
137 return slot;
138}
139
140
141static u8 handle_presence_change(u16 change, struct controller *ctrl)
142{
143 int hp_slot;
144 u8 rc = 0;
145 u8 temp_byte;
146 u16 temp_word;
147 struct pci_func *func;
148 struct event_info *taskInfo;
149 struct slot *p_slot;
150
151 if (!change)
152 return 0;
153
154
155
156
157 dbg("cpqsbd: Presence/Notify input change.\n");
158 dbg(" Changed bits are 0x%4.4x\n", change);
159
160 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
161 if (change & (0x0101 << hp_slot)) {
162
163
164
165 func = cpqhp_slot_find(ctrl->bus,
166 (hp_slot + ctrl->slot_device_offset), 0);
167
168 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
169 ctrl->next_event = (ctrl->next_event + 1) % 10;
170 taskInfo->hp_slot = hp_slot;
171
172 rc++;
173
174 p_slot = cpqhp_find_slot(ctrl, hp_slot + (readb(ctrl->hpc_reg + SLOT_MASK) >> 4));
175 if (!p_slot)
176 return 0;
177
178
179
180
181 if (func->switch_save && (ctrl->push_button == 1)) {
182 temp_word = ctrl->ctrl_int_comp >> 16;
183 temp_byte = (temp_word >> hp_slot) & 0x01;
184 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
185
186 if (temp_byte != func->presence_save) {
187
188
189
190 dbg("hp_slot %d button pressed\n", hp_slot);
191 taskInfo->event_type = INT_BUTTON_PRESS;
192 } else {
193
194
195
196 dbg("hp_slot %d button released\n", hp_slot);
197 taskInfo->event_type = INT_BUTTON_RELEASE;
198
199
200 if ((p_slot->state == BLINKINGON_STATE)
201 || (p_slot->state == BLINKINGOFF_STATE)) {
202 taskInfo->event_type = INT_BUTTON_CANCEL;
203 dbg("hp_slot %d button cancel\n", hp_slot);
204 } else if ((p_slot->state == POWERON_STATE)
205 || (p_slot->state == POWEROFF_STATE)) {
206
207 taskInfo->event_type = INT_BUTTON_IGNORE;
208 dbg("hp_slot %d button ignore\n", hp_slot);
209 }
210 }
211 } else {
212
213
214
215 temp_word = ctrl->ctrl_int_comp >> 16;
216 func->presence_save = (temp_word >> hp_slot) & 0x01;
217 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
218
219 if ((!(ctrl->ctrl_int_comp & (0x010000 << hp_slot))) ||
220 (!(ctrl->ctrl_int_comp & (0x01000000 << hp_slot)))) {
221
222 taskInfo->event_type = INT_PRESENCE_ON;
223 } else {
224
225 taskInfo->event_type = INT_PRESENCE_OFF;
226 }
227 }
228 }
229 }
230
231 return rc;
232}
233
234
235static u8 handle_power_fault(u8 change, struct controller *ctrl)
236{
237 int hp_slot;
238 u8 rc = 0;
239 struct pci_func *func;
240 struct event_info *taskInfo;
241
242 if (!change)
243 return 0;
244
245
246
247
248
249 info("power fault interrupt\n");
250
251 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
252 if (change & (0x01 << hp_slot)) {
253
254
255
256 func = cpqhp_slot_find(ctrl->bus,
257 (hp_slot + ctrl->slot_device_offset), 0);
258
259 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
260 ctrl->next_event = (ctrl->next_event + 1) % 10;
261 taskInfo->hp_slot = hp_slot;
262
263 rc++;
264
265 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) {
266
267
268
269 func->status = 0x00;
270
271 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
272 } else {
273
274
275
276 taskInfo->event_type = INT_POWER_FAULT;
277
278 if (ctrl->rev < 4) {
279 amber_LED_on(ctrl, hp_slot);
280 green_LED_off(ctrl, hp_slot);
281 set_SOGO(ctrl);
282
283
284
285
286
287
288
289
290
291
292
293
294
295 } else {
296
297 func->status = 0xFF;
298 info("power fault bit %x set\n", hp_slot);
299 }
300 }
301 }
302 }
303
304 return rc;
305}
306
307
308
309
310
311
312static int sort_by_size(struct pci_resource **head)
313{
314 struct pci_resource *current_res;
315 struct pci_resource *next_res;
316 int out_of_order = 1;
317
318 if (!(*head))
319 return 1;
320
321 if (!((*head)->next))
322 return 0;
323
324 while (out_of_order) {
325 out_of_order = 0;
326
327
328 if (((*head)->next) &&
329 ((*head)->length > (*head)->next->length)) {
330 out_of_order++;
331 current_res = *head;
332 *head = (*head)->next;
333 current_res->next = (*head)->next;
334 (*head)->next = current_res;
335 }
336
337 current_res = *head;
338
339 while (current_res->next && current_res->next->next) {
340 if (current_res->next->length > current_res->next->next->length) {
341 out_of_order++;
342 next_res = current_res->next;
343 current_res->next = current_res->next->next;
344 current_res = current_res->next;
345 next_res->next = current_res->next;
346 current_res->next = next_res;
347 } else
348 current_res = current_res->next;
349 }
350 }
351
352 return 0;
353}
354
355
356
357
358
359
360static int sort_by_max_size(struct pci_resource **head)
361{
362 struct pci_resource *current_res;
363 struct pci_resource *next_res;
364 int out_of_order = 1;
365
366 if (!(*head))
367 return 1;
368
369 if (!((*head)->next))
370 return 0;
371
372 while (out_of_order) {
373 out_of_order = 0;
374
375
376 if (((*head)->next) &&
377 ((*head)->length < (*head)->next->length)) {
378 out_of_order++;
379 current_res = *head;
380 *head = (*head)->next;
381 current_res->next = (*head)->next;
382 (*head)->next = current_res;
383 }
384
385 current_res = *head;
386
387 while (current_res->next && current_res->next->next) {
388 if (current_res->next->length < current_res->next->next->length) {
389 out_of_order++;
390 next_res = current_res->next;
391 current_res->next = current_res->next->next;
392 current_res = current_res->next;
393 next_res->next = current_res->next;
394 current_res->next = next_res;
395 } else
396 current_res = current_res->next;
397 }
398 }
399
400 return 0;
401}
402
403
404
405
406
407
408
409
410static struct pci_resource *do_pre_bridge_resource_split(struct pci_resource **head,
411 struct pci_resource **orig_head, u32 alignment)
412{
413 struct pci_resource *prevnode = NULL;
414 struct pci_resource *node;
415 struct pci_resource *split_node;
416 u32 rc;
417 u32 temp_dword;
418 dbg("do_pre_bridge_resource_split\n");
419
420 if (!(*head) || !(*orig_head))
421 return NULL;
422
423 rc = cpqhp_resource_sort_and_combine(head);
424
425 if (rc)
426 return NULL;
427
428 if ((*head)->base != (*orig_head)->base)
429 return NULL;
430
431 if ((*head)->length == (*orig_head)->length)
432 return NULL;
433
434
435
436
437
438
439 node = *head;
440
441 if (node->length & (alignment - 1)) {
442
443
444
445 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
446
447 if (!split_node)
448 return NULL;
449
450 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
451
452 split_node->base = node->base;
453 split_node->length = temp_dword;
454
455 node->length -= temp_dword;
456 node->base += split_node->length;
457
458
459 *head = split_node;
460 split_node->next = node;
461 }
462
463 if (node->length < alignment)
464 return NULL;
465
466
467 if (*head == node) {
468 *head = node->next;
469 } else {
470 prevnode = *head;
471 while (prevnode->next != node)
472 prevnode = prevnode->next;
473
474 prevnode->next = node->next;
475 }
476 node->next = NULL;
477
478 return node;
479}
480
481
482
483
484
485
486
487static struct pci_resource *do_bridge_resource_split(struct pci_resource **head, u32 alignment)
488{
489 struct pci_resource *prevnode = NULL;
490 struct pci_resource *node;
491 u32 rc;
492 u32 temp_dword;
493
494 rc = cpqhp_resource_sort_and_combine(head);
495
496 if (rc)
497 return NULL;
498
499 node = *head;
500
501 while (node->next) {
502 prevnode = node;
503 node = node->next;
504 kfree(prevnode);
505 }
506
507 if (node->length < alignment)
508 goto error;
509
510 if (node->base & (alignment - 1)) {
511
512 temp_dword = (node->base | (alignment-1)) + 1;
513 if ((node->length - (temp_dword - node->base)) < alignment)
514 goto error;
515
516 node->length -= (temp_dword - node->base);
517 node->base = temp_dword;
518 }
519
520 if (node->length & (alignment - 1))
521
522 goto error;
523
524 return node;
525error:
526 kfree(node);
527 return NULL;
528}
529
530
531
532
533
534
535
536
537
538
539
540static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
541{
542 struct pci_resource *prevnode;
543 struct pci_resource *node;
544 struct pci_resource *split_node;
545 u32 temp_dword;
546
547 if (!(*head))
548 return NULL;
549
550 if (cpqhp_resource_sort_and_combine(head))
551 return NULL;
552
553 if (sort_by_size(head))
554 return NULL;
555
556 for (node = *head; node; node = node->next) {
557 if (node->length < size)
558 continue;
559
560 if (node->base & (size - 1)) {
561
562
563
564 temp_dword = (node->base | (size-1)) + 1;
565
566
567 if ((node->length - (temp_dword - node->base)) < size)
568 continue;
569
570 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
571
572 if (!split_node)
573 return NULL;
574
575 split_node->base = node->base;
576 split_node->length = temp_dword - node->base;
577 node->base = temp_dword;
578 node->length -= split_node->length;
579
580
581 split_node->next = node->next;
582 node->next = split_node;
583 }
584
585
586 if (node->length > size) {
587
588
589
590 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
591
592 if (!split_node)
593 return NULL;
594
595 split_node->base = node->base + size;
596 split_node->length = node->length - size;
597 node->length = size;
598
599
600 split_node->next = node->next;
601 node->next = split_node;
602 }
603
604
605 if (node->base & 0x300L)
606 continue;
607
608
609
610
611 if (*head == node) {
612 *head = node->next;
613 } else {
614 prevnode = *head;
615 while (prevnode->next != node)
616 prevnode = prevnode->next;
617
618 prevnode->next = node->next;
619 }
620 node->next = NULL;
621 break;
622 }
623
624 return node;
625}
626
627
628
629
630
631
632
633
634
635
636
637static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
638{
639 struct pci_resource *max;
640 struct pci_resource *temp;
641 struct pci_resource *split_node;
642 u32 temp_dword;
643
644 if (cpqhp_resource_sort_and_combine(head))
645 return NULL;
646
647 if (sort_by_max_size(head))
648 return NULL;
649
650 for (max = *head; max; max = max->next) {
651
652
653
654 if (max->length < size)
655 continue;
656
657 if (max->base & (size - 1)) {
658
659
660
661 temp_dword = (max->base | (size-1)) + 1;
662
663
664 if ((max->length - (temp_dword - max->base)) < size)
665 continue;
666
667 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
668
669 if (!split_node)
670 return NULL;
671
672 split_node->base = max->base;
673 split_node->length = temp_dword - max->base;
674 max->base = temp_dword;
675 max->length -= split_node->length;
676
677 split_node->next = max->next;
678 max->next = split_node;
679 }
680
681 if ((max->base + max->length) & (size - 1)) {
682
683
684
685 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
686
687 if (!split_node)
688 return NULL;
689 temp_dword = ((max->base + max->length) & ~(size - 1));
690 split_node->base = temp_dword;
691 split_node->length = max->length + max->base
692 - split_node->base;
693 max->length -= split_node->length;
694
695 split_node->next = max->next;
696 max->next = split_node;
697 }
698
699
700 if (max->length < size)
701 continue;
702
703
704 temp = *head;
705 if (temp == max) {
706 *head = max->next;
707 } else {
708 while (temp && temp->next != max)
709 temp = temp->next;
710
711 if (temp)
712 temp->next = max->next;
713 }
714
715 max->next = NULL;
716 break;
717 }
718
719 return max;
720}
721
722
723
724
725
726
727
728
729
730
731
732
733
734static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
735{
736 struct pci_resource *prevnode;
737 struct pci_resource *node;
738 struct pci_resource *split_node;
739 u32 temp_dword;
740
741 if (cpqhp_resource_sort_and_combine(head))
742 return NULL;
743
744 if (sort_by_size(head))
745 return NULL;
746
747 for (node = *head; node; node = node->next) {
748 dbg("%s: req_size =%x node=%p, base=%x, length=%x\n",
749 __func__, size, node, node->base, node->length);
750 if (node->length < size)
751 continue;
752
753 if (node->base & (size - 1)) {
754 dbg("%s: not aligned\n", __func__);
755
756
757
758 temp_dword = (node->base | (size-1)) + 1;
759
760
761 if ((node->length - (temp_dword - node->base)) < size)
762 continue;
763
764 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
765
766 if (!split_node)
767 return NULL;
768
769 split_node->base = node->base;
770 split_node->length = temp_dword - node->base;
771 node->base = temp_dword;
772 node->length -= split_node->length;
773
774 split_node->next = node->next;
775 node->next = split_node;
776 }
777
778
779 if (node->length > size) {
780 dbg("%s: too big\n", __func__);
781
782
783
784 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
785
786 if (!split_node)
787 return NULL;
788
789 split_node->base = node->base + size;
790 split_node->length = node->length - size;
791 node->length = size;
792
793
794 split_node->next = node->next;
795 node->next = split_node;
796 }
797
798 dbg("%s: got one!!!\n", __func__);
799
800
801 if (*head == node) {
802 *head = node->next;
803 } else {
804 prevnode = *head;
805 while (prevnode->next != node)
806 prevnode = prevnode->next;
807
808 prevnode->next = node->next;
809 }
810 node->next = NULL;
811 break;
812 }
813 return node;
814}
815
816
817
818
819
820
821
822
823
824
825
826
827int cpqhp_resource_sort_and_combine(struct pci_resource **head)
828{
829 struct pci_resource *node1;
830 struct pci_resource *node2;
831 int out_of_order = 1;
832
833 dbg("%s: head = %p, *head = %p\n", __func__, head, *head);
834
835 if (!(*head))
836 return 1;
837
838 dbg("*head->next = %p\n", (*head)->next);
839
840 if (!(*head)->next)
841 return 0;
842
843 dbg("*head->base = 0x%x\n", (*head)->base);
844 dbg("*head->next->base = 0x%x\n", (*head)->next->base);
845 while (out_of_order) {
846 out_of_order = 0;
847
848
849 if (((*head)->next) &&
850 ((*head)->base > (*head)->next->base)) {
851 node1 = *head;
852 (*head) = (*head)->next;
853 node1->next = (*head)->next;
854 (*head)->next = node1;
855 out_of_order++;
856 }
857
858 node1 = (*head);
859
860 while (node1->next && node1->next->next) {
861 if (node1->next->base > node1->next->next->base) {
862 out_of_order++;
863 node2 = node1->next;
864 node1->next = node1->next->next;
865 node1 = node1->next;
866 node2->next = node1->next;
867 node1->next = node2;
868 } else
869 node1 = node1->next;
870 }
871 }
872
873 node1 = *head;
874
875 while (node1 && node1->next) {
876 if ((node1->base + node1->length) == node1->next->base) {
877
878 dbg("8..\n");
879 node1->length += node1->next->length;
880 node2 = node1->next;
881 node1->next = node1->next->next;
882 kfree(node2);
883 } else
884 node1 = node1->next;
885 }
886
887 return 0;
888}
889
890
891irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
892{
893 struct controller *ctrl = data;
894 u8 schedule_flag = 0;
895 u8 reset;
896 u16 misc;
897 u32 Diff;
898 u32 temp_dword;
899
900
901 misc = readw(ctrl->hpc_reg + MISC);
902
903
904
905 if (!(misc & 0x000C))
906 return IRQ_NONE;
907
908 if (misc & 0x0004) {
909
910
911
912
913
914 misc |= 0x0004;
915 writew(misc, ctrl->hpc_reg + MISC);
916
917
918 misc = readw(ctrl->hpc_reg + MISC);
919
920 dbg("%s - waking up\n", __func__);
921 wake_up_interruptible(&ctrl->queue);
922 }
923
924 if (misc & 0x0008) {
925
926 Diff = readl(ctrl->hpc_reg + INT_INPUT_CLEAR) ^ ctrl->ctrl_int_comp;
927
928 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
929
930
931 writel(Diff, ctrl->hpc_reg + INT_INPUT_CLEAR);
932
933
934 temp_dword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
935
936 if (!Diff)
937
938 writel(0xFFFFFFFF, ctrl->hpc_reg + INT_INPUT_CLEAR);
939
940 schedule_flag += handle_switch_change((u8)(Diff & 0xFFL), ctrl);
941 schedule_flag += handle_presence_change((u16)((Diff & 0xFFFF0000L) >> 16), ctrl);
942 schedule_flag += handle_power_fault((u8)((Diff & 0xFF00L) >> 8), ctrl);
943 }
944
945 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
946 if (reset & 0x40) {
947
948 reset &= 0xCF;
949 writeb(reset, ctrl->hpc_reg + RESET_FREQ_MODE);
950 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
951 wake_up_interruptible(&ctrl->queue);
952 }
953
954 if (schedule_flag) {
955 wake_up_process(cpqhp_event_thread);
956 dbg("Waking even thread");
957 }
958 return IRQ_HANDLED;
959}
960
961
962
963
964
965
966
967
968struct pci_func *cpqhp_slot_create(u8 busnumber)
969{
970 struct pci_func *new_slot;
971 struct pci_func *next;
972
973 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
974 if (new_slot == NULL)
975 return new_slot;
976
977 new_slot->next = NULL;
978 new_slot->configured = 1;
979
980 if (cpqhp_slot_list[busnumber] == NULL) {
981 cpqhp_slot_list[busnumber] = new_slot;
982 } else {
983 next = cpqhp_slot_list[busnumber];
984 while (next->next != NULL)
985 next = next->next;
986 next->next = new_slot;
987 }
988 return new_slot;
989}
990
991
992
993
994
995
996
997
998static int slot_remove(struct pci_func *old_slot)
999{
1000 struct pci_func *next;
1001
1002 if (old_slot == NULL)
1003 return 1;
1004
1005 next = cpqhp_slot_list[old_slot->bus];
1006 if (next == NULL)
1007 return 1;
1008
1009 if (next == old_slot) {
1010 cpqhp_slot_list[old_slot->bus] = old_slot->next;
1011 cpqhp_destroy_board_resources(old_slot);
1012 kfree(old_slot);
1013 return 0;
1014 }
1015
1016 while ((next->next != old_slot) && (next->next != NULL))
1017 next = next->next;
1018
1019 if (next->next == old_slot) {
1020 next->next = old_slot->next;
1021 cpqhp_destroy_board_resources(old_slot);
1022 kfree(old_slot);
1023 return 0;
1024 } else
1025 return 2;
1026}
1027
1028
1029
1030
1031
1032
1033
1034
1035static int bridge_slot_remove(struct pci_func *bridge)
1036{
1037 u8 subordinateBus, secondaryBus;
1038 u8 tempBus;
1039 struct pci_func *next;
1040
1041 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
1042 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
1043
1044 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
1045 next = cpqhp_slot_list[tempBus];
1046
1047 while (!slot_remove(next))
1048 next = cpqhp_slot_list[tempBus];
1049 }
1050
1051 next = cpqhp_slot_list[bridge->bus];
1052
1053 if (next == NULL)
1054 return 1;
1055
1056 if (next == bridge) {
1057 cpqhp_slot_list[bridge->bus] = bridge->next;
1058 goto out;
1059 }
1060
1061 while ((next->next != bridge) && (next->next != NULL))
1062 next = next->next;
1063
1064 if (next->next != bridge)
1065 return 2;
1066 next->next = bridge->next;
1067out:
1068 kfree(bridge);
1069 return 0;
1070}
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081struct pci_func *cpqhp_slot_find(u8 bus, u8 device, u8 index)
1082{
1083 int found = -1;
1084 struct pci_func *func;
1085
1086 func = cpqhp_slot_list[bus];
1087
1088 if ((func == NULL) || ((func->device == device) && (index == 0)))
1089 return func;
1090
1091 if (func->device == device)
1092 found++;
1093
1094 while (func->next != NULL) {
1095 func = func->next;
1096
1097 if (func->device == device)
1098 found++;
1099
1100 if (found == index)
1101 return func;
1102 }
1103
1104 return NULL;
1105}
1106
1107
1108
1109
1110static int is_bridge(struct pci_func *func)
1111{
1112
1113 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1114 return 1;
1115 else
1116 return 0;
1117}
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
1130{
1131 struct slot *slot;
1132 struct pci_bus *bus = ctrl->pci_bus;
1133 u8 reg;
1134 u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
1135 u16 reg16;
1136 u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
1137
1138 if (bus->cur_bus_speed == adapter_speed)
1139 return 0;
1140
1141
1142
1143
1144 for (slot = ctrl->slot; slot; slot = slot->next) {
1145 if (slot->device == (hp_slot + ctrl->slot_device_offset))
1146 continue;
1147 if (!slot->hotplug_slot || !slot->hotplug_slot->info)
1148 continue;
1149 if (slot->hotplug_slot->info->adapter_status == 0)
1150 continue;
1151
1152
1153
1154
1155 if (bus->cur_bus_speed < adapter_speed)
1156 return 0;
1157
1158 return 1;
1159 }
1160
1161
1162
1163
1164 if ((bus->cur_bus_speed > adapter_speed) && (!ctrl->pcix_speed_capability))
1165 return 1;
1166
1167
1168 if ((bus->cur_bus_speed < adapter_speed) && (!ctrl->pcix_speed_capability))
1169 return 0;
1170
1171
1172
1173
1174 if (bus->max_bus_speed < adapter_speed) {
1175 if (bus->cur_bus_speed == bus->max_bus_speed)
1176 return 0;
1177 adapter_speed = bus->max_bus_speed;
1178 }
1179
1180 writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
1181 writeb(0x00, ctrl->hpc_reg + SLOT_ENABLE);
1182
1183 set_SOGO(ctrl);
1184 wait_for_ctrl_irq(ctrl);
1185
1186 if (adapter_speed != PCI_SPEED_133MHz_PCIX)
1187 reg = 0xF5;
1188 else
1189 reg = 0xF4;
1190 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1191
1192 reg16 = readw(ctrl->hpc_reg + NEXT_CURR_FREQ);
1193 reg16 &= ~0x000F;
1194 switch (adapter_speed) {
1195 case(PCI_SPEED_133MHz_PCIX):
1196 reg = 0x75;
1197 reg16 |= 0xB;
1198 break;
1199 case(PCI_SPEED_100MHz_PCIX):
1200 reg = 0x74;
1201 reg16 |= 0xA;
1202 break;
1203 case(PCI_SPEED_66MHz_PCIX):
1204 reg = 0x73;
1205 reg16 |= 0x9;
1206 break;
1207 case(PCI_SPEED_66MHz):
1208 reg = 0x73;
1209 reg16 |= 0x1;
1210 break;
1211 default:
1212 reg = 0x71;
1213 break;
1214
1215 }
1216 reg16 |= 0xB << 12;
1217 writew(reg16, ctrl->hpc_reg + NEXT_CURR_FREQ);
1218
1219 mdelay(5);
1220
1221
1222 writel(0, ctrl->hpc_reg + INT_MASK);
1223
1224 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1225
1226
1227 reg = ~0xF;
1228 pci_read_config_byte(ctrl->pci_dev, 0x43, ®);
1229 pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
1230
1231
1232 if (((bus->cur_bus_speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
1233 ((bus->cur_bus_speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz)))
1234 set_SOGO(ctrl);
1235
1236 wait_for_ctrl_irq(ctrl);
1237 mdelay(1100);
1238
1239
1240 writel(leds, ctrl->hpc_reg + LED_CONTROL);
1241 writeb(slot_power, ctrl->hpc_reg + SLOT_ENABLE);
1242
1243 set_SOGO(ctrl);
1244 wait_for_ctrl_irq(ctrl);
1245
1246 bus->cur_bus_speed = adapter_speed;
1247 slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1248
1249 info("Successfully changed frequency/mode for adapter in slot %d\n",
1250 slot->number);
1251 return 0;
1252}
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1271{
1272 struct pci_bus *bus = ctrl->pci_bus;
1273 u8 hp_slot;
1274 u8 temp_byte;
1275 u8 adapter_speed;
1276 u32 rc = 0;
1277
1278 hp_slot = func->device - ctrl->slot_device_offset;
1279
1280
1281
1282
1283 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot))
1284 rc = INTERLOCK_OPEN;
1285
1286
1287
1288 else if (is_slot_enabled(ctrl, hp_slot))
1289 rc = CARD_FUNCTIONING;
1290 else {
1291 mutex_lock(&ctrl->crit_sect);
1292
1293
1294 enable_slot_power(ctrl, hp_slot);
1295
1296 set_SOGO(ctrl);
1297
1298
1299 wait_for_ctrl_irq(ctrl);
1300
1301
1302
1303 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1304 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1305 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1306
1307 set_SOGO(ctrl);
1308
1309
1310 wait_for_ctrl_irq(ctrl);
1311
1312 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1313 if (bus->cur_bus_speed != adapter_speed)
1314 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1315 rc = WRONG_BUS_FREQUENCY;
1316
1317
1318 disable_slot_power(ctrl, hp_slot);
1319
1320 set_SOGO(ctrl);
1321
1322
1323 wait_for_ctrl_irq(ctrl);
1324
1325 mutex_unlock(&ctrl->crit_sect);
1326
1327 if (rc)
1328 return rc;
1329
1330 mutex_lock(&ctrl->crit_sect);
1331
1332 slot_enable(ctrl, hp_slot);
1333 green_LED_blink(ctrl, hp_slot);
1334
1335 amber_LED_off(ctrl, hp_slot);
1336
1337 set_SOGO(ctrl);
1338
1339
1340 wait_for_ctrl_irq(ctrl);
1341
1342 mutex_unlock(&ctrl->crit_sect);
1343
1344
1345 long_delay(1*HZ);
1346
1347
1348 if (func->status == 0xFF) {
1349
1350 rc = POWER_FAILURE;
1351 func->status = 0;
1352 } else
1353 rc = cpqhp_valid_replace(ctrl, func);
1354
1355 if (!rc) {
1356
1357
1358 rc = cpqhp_configure_board(ctrl, func);
1359
1360
1361
1362
1363
1364
1365
1366
1367 mutex_lock(&ctrl->crit_sect);
1368
1369 amber_LED_on(ctrl, hp_slot);
1370 green_LED_off(ctrl, hp_slot);
1371 slot_disable(ctrl, hp_slot);
1372
1373 set_SOGO(ctrl);
1374
1375
1376 wait_for_ctrl_irq(ctrl);
1377
1378 mutex_unlock(&ctrl->crit_sect);
1379
1380 if (rc)
1381 return rc;
1382 else
1383 return 1;
1384
1385 } else {
1386
1387
1388
1389
1390
1391
1392
1393 mutex_lock(&ctrl->crit_sect);
1394
1395 amber_LED_on(ctrl, hp_slot);
1396 green_LED_off(ctrl, hp_slot);
1397 slot_disable(ctrl, hp_slot);
1398
1399 set_SOGO(ctrl);
1400
1401
1402 wait_for_ctrl_irq(ctrl);
1403
1404 mutex_unlock(&ctrl->crit_sect);
1405 }
1406
1407 }
1408 return rc;
1409
1410}
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421static u32 board_added(struct pci_func *func, struct controller *ctrl)
1422{
1423 u8 hp_slot;
1424 u8 temp_byte;
1425 u8 adapter_speed;
1426 int index;
1427 u32 temp_register = 0xFFFFFFFF;
1428 u32 rc = 0;
1429 struct pci_func *new_slot = NULL;
1430 struct pci_bus *bus = ctrl->pci_bus;
1431 struct slot *p_slot;
1432 struct resource_lists res_lists;
1433
1434 hp_slot = func->device - ctrl->slot_device_offset;
1435 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n",
1436 __func__, func->device, ctrl->slot_device_offset, hp_slot);
1437
1438 mutex_lock(&ctrl->crit_sect);
1439
1440
1441 enable_slot_power(ctrl, hp_slot);
1442
1443 set_SOGO(ctrl);
1444
1445
1446 wait_for_ctrl_irq(ctrl);
1447
1448
1449
1450
1451 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1452 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1453 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1454
1455 set_SOGO(ctrl);
1456
1457
1458 wait_for_ctrl_irq(ctrl);
1459
1460 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1461 if (bus->cur_bus_speed != adapter_speed)
1462 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1463 rc = WRONG_BUS_FREQUENCY;
1464
1465
1466 disable_slot_power(ctrl, hp_slot);
1467
1468 set_SOGO(ctrl);
1469
1470
1471 wait_for_ctrl_irq(ctrl);
1472
1473 mutex_unlock(&ctrl->crit_sect);
1474
1475 if (rc)
1476 return rc;
1477
1478 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1479
1480
1481
1482 dbg("%s: before down\n", __func__);
1483 mutex_lock(&ctrl->crit_sect);
1484 dbg("%s: after down\n", __func__);
1485
1486 dbg("%s: before slot_enable\n", __func__);
1487 slot_enable(ctrl, hp_slot);
1488
1489 dbg("%s: before green_LED_blink\n", __func__);
1490 green_LED_blink(ctrl, hp_slot);
1491
1492 dbg("%s: before amber_LED_blink\n", __func__);
1493 amber_LED_off(ctrl, hp_slot);
1494
1495 dbg("%s: before set_SOGO\n", __func__);
1496 set_SOGO(ctrl);
1497
1498
1499 dbg("%s: before wait_for_ctrl_irq\n", __func__);
1500 wait_for_ctrl_irq(ctrl);
1501 dbg("%s: after wait_for_ctrl_irq\n", __func__);
1502
1503 dbg("%s: before up\n", __func__);
1504 mutex_unlock(&ctrl->crit_sect);
1505 dbg("%s: after up\n", __func__);
1506
1507
1508 dbg("%s: before long_delay\n", __func__);
1509 long_delay(1*HZ);
1510 dbg("%s: after long_delay\n", __func__);
1511
1512 dbg("%s: func status = %x\n", __func__, func->status);
1513
1514 if (func->status == 0xFF) {
1515
1516 temp_register = 0xFFFFFFFF;
1517 dbg("%s: temp register set to %x by power fault\n", __func__, temp_register);
1518 rc = POWER_FAILURE;
1519 func->status = 0;
1520 } else {
1521
1522 ctrl->pci_bus->number = func->bus;
1523 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), PCI_VENDOR_ID, &temp_register);
1524 dbg("%s: pci_read_config_dword returns %d\n", __func__, rc);
1525 dbg("%s: temp_register is %x\n", __func__, temp_register);
1526
1527 if (rc != 0) {
1528
1529 temp_register = 0xFFFFFFFF;
1530 dbg("%s: temp register set to %x by error\n", __func__, temp_register);
1531 }
1532
1533 rc = NO_ADAPTER_PRESENT;
1534 }
1535
1536
1537 if (temp_register != 0xFFFFFFFF) {
1538 res_lists.io_head = ctrl->io_head;
1539 res_lists.mem_head = ctrl->mem_head;
1540 res_lists.p_mem_head = ctrl->p_mem_head;
1541 res_lists.bus_head = ctrl->bus_head;
1542 res_lists.irqs = NULL;
1543
1544 rc = configure_new_device(ctrl, func, 0, &res_lists);
1545
1546 dbg("%s: back from configure_new_device\n", __func__);
1547 ctrl->io_head = res_lists.io_head;
1548 ctrl->mem_head = res_lists.mem_head;
1549 ctrl->p_mem_head = res_lists.p_mem_head;
1550 ctrl->bus_head = res_lists.bus_head;
1551
1552 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1553 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1554 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1555 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1556
1557 if (rc) {
1558 mutex_lock(&ctrl->crit_sect);
1559
1560 amber_LED_on(ctrl, hp_slot);
1561 green_LED_off(ctrl, hp_slot);
1562 slot_disable(ctrl, hp_slot);
1563
1564 set_SOGO(ctrl);
1565
1566
1567 wait_for_ctrl_irq(ctrl);
1568
1569 mutex_unlock(&ctrl->crit_sect);
1570 return rc;
1571 } else {
1572 cpqhp_save_slot_config(ctrl, func);
1573 }
1574
1575
1576 func->status = 0;
1577 func->switch_save = 0x10;
1578 func->is_a_board = 0x01;
1579
1580
1581
1582 dbg("%s: configure linux pci_dev structure\n", __func__);
1583 index = 0;
1584 do {
1585 new_slot = cpqhp_slot_find(ctrl->bus, func->device, index++);
1586 if (new_slot && !new_slot->pci_dev)
1587 cpqhp_configure_device(ctrl, new_slot);
1588 } while (new_slot);
1589
1590 mutex_lock(&ctrl->crit_sect);
1591
1592 green_LED_on(ctrl, hp_slot);
1593
1594 set_SOGO(ctrl);
1595
1596
1597 wait_for_ctrl_irq(ctrl);
1598
1599 mutex_unlock(&ctrl->crit_sect);
1600 } else {
1601 mutex_lock(&ctrl->crit_sect);
1602
1603 amber_LED_on(ctrl, hp_slot);
1604 green_LED_off(ctrl, hp_slot);
1605 slot_disable(ctrl, hp_slot);
1606
1607 set_SOGO(ctrl);
1608
1609
1610 wait_for_ctrl_irq(ctrl);
1611
1612 mutex_unlock(&ctrl->crit_sect);
1613
1614 return rc;
1615 }
1616 return 0;
1617}
1618
1619
1620
1621
1622
1623
1624
1625
1626static u32 remove_board(struct pci_func *func, u32 replace_flag, struct controller *ctrl)
1627{
1628 int index;
1629 u8 skip = 0;
1630 u8 device;
1631 u8 hp_slot;
1632 u8 temp_byte;
1633 u32 rc;
1634 struct resource_lists res_lists;
1635 struct pci_func *temp_func;
1636
1637 if (cpqhp_unconfigure_device(func))
1638 return 1;
1639
1640 device = func->device;
1641
1642 hp_slot = func->device - ctrl->slot_device_offset;
1643 dbg("In %s, hp_slot = %d\n", __func__, hp_slot);
1644
1645
1646
1647 if (replace_flag || !ctrl->add_support)
1648 rc = cpqhp_save_base_addr_length(ctrl, func);
1649 else if (!func->bus_head && !func->mem_head &&
1650 !func->p_mem_head && !func->io_head) {
1651
1652
1653
1654 index = 0;
1655 temp_func = cpqhp_slot_find(func->bus, func->device, index++);
1656 while (temp_func) {
1657 if (temp_func->bus_head || temp_func->mem_head
1658 || temp_func->p_mem_head || temp_func->io_head) {
1659 skip = 1;
1660 break;
1661 }
1662 temp_func = cpqhp_slot_find(temp_func->bus, temp_func->device, index++);
1663 }
1664
1665 if (!skip)
1666 rc = cpqhp_save_used_resources(ctrl, func);
1667 }
1668
1669 if (func->is_a_board)
1670 func->status = 0x01;
1671 func->configured = 0;
1672
1673 mutex_lock(&ctrl->crit_sect);
1674
1675 green_LED_off(ctrl, hp_slot);
1676 slot_disable(ctrl, hp_slot);
1677
1678 set_SOGO(ctrl);
1679
1680
1681 temp_byte = readb(ctrl->hpc_reg + SLOT_SERR);
1682 temp_byte &= ~(0x01 << hp_slot);
1683 writeb(temp_byte, ctrl->hpc_reg + SLOT_SERR);
1684
1685
1686 wait_for_ctrl_irq(ctrl);
1687
1688 mutex_unlock(&ctrl->crit_sect);
1689
1690 if (!replace_flag && ctrl->add_support) {
1691 while (func) {
1692 res_lists.io_head = ctrl->io_head;
1693 res_lists.mem_head = ctrl->mem_head;
1694 res_lists.p_mem_head = ctrl->p_mem_head;
1695 res_lists.bus_head = ctrl->bus_head;
1696
1697 cpqhp_return_board_resources(func, &res_lists);
1698
1699 ctrl->io_head = res_lists.io_head;
1700 ctrl->mem_head = res_lists.mem_head;
1701 ctrl->p_mem_head = res_lists.p_mem_head;
1702 ctrl->bus_head = res_lists.bus_head;
1703
1704 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1705 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1706 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1707 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1708
1709 if (is_bridge(func)) {
1710 bridge_slot_remove(func);
1711 } else
1712 slot_remove(func);
1713
1714 func = cpqhp_slot_find(ctrl->bus, device, 0);
1715 }
1716
1717
1718 func = cpqhp_slot_create(ctrl->bus);
1719
1720 if (func == NULL)
1721 return 1;
1722
1723 func->bus = ctrl->bus;
1724 func->device = device;
1725 func->function = 0;
1726 func->configured = 0;
1727 func->switch_save = 0x10;
1728 func->is_a_board = 0;
1729 func->p_task_event = NULL;
1730 }
1731
1732 return 0;
1733}
1734
1735static void pushbutton_helper_thread(struct timer_list *t)
1736{
1737 pushbutton_pending = t;
1738
1739 wake_up_process(cpqhp_event_thread);
1740}
1741
1742
1743
1744static int event_thread(void *data)
1745{
1746 struct controller *ctrl;
1747
1748 while (1) {
1749 dbg("!!!!event_thread sleeping\n");
1750 set_current_state(TASK_INTERRUPTIBLE);
1751 schedule();
1752
1753 if (kthread_should_stop())
1754 break;
1755
1756 if (pushbutton_pending)
1757 cpqhp_pushbutton_thread(pushbutton_pending);
1758 else
1759 for (ctrl = cpqhp_ctrl_list; ctrl; ctrl = ctrl->next)
1760 interrupt_event_handler(ctrl);
1761 }
1762 dbg("event_thread signals exit\n");
1763 return 0;
1764}
1765
1766int cpqhp_event_start_thread(void)
1767{
1768 cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event");
1769 if (IS_ERR(cpqhp_event_thread)) {
1770 err("Can't start up our event thread\n");
1771 return PTR_ERR(cpqhp_event_thread);
1772 }
1773
1774 return 0;
1775}
1776
1777
1778void cpqhp_event_stop_thread(void)
1779{
1780 kthread_stop(cpqhp_event_thread);
1781}
1782
1783
1784static int update_slot_info(struct controller *ctrl, struct slot *slot)
1785{
1786 struct hotplug_slot_info *info;
1787 int result;
1788
1789 info = kmalloc(sizeof(*info), GFP_KERNEL);
1790 if (!info)
1791 return -ENOMEM;
1792
1793 info->power_status = get_slot_enabled(ctrl, slot);
1794 info->attention_status = cpq_get_attention_status(ctrl, slot);
1795 info->latch_status = cpq_get_latch_status(ctrl, slot);
1796 info->adapter_status = get_presence_status(ctrl, slot);
1797 result = pci_hp_change_slot_info(slot->hotplug_slot, info);
1798 kfree(info);
1799 return result;
1800}
1801
1802static void interrupt_event_handler(struct controller *ctrl)
1803{
1804 int loop = 0;
1805 int change = 1;
1806 struct pci_func *func;
1807 u8 hp_slot;
1808 struct slot *p_slot;
1809
1810 while (change) {
1811 change = 0;
1812
1813 for (loop = 0; loop < 10; loop++) {
1814
1815 if (ctrl->event_queue[loop].event_type != 0) {
1816 hp_slot = ctrl->event_queue[loop].hp_slot;
1817
1818 func = cpqhp_slot_find(ctrl->bus, (hp_slot + ctrl->slot_device_offset), 0);
1819 if (!func)
1820 return;
1821
1822 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1823 if (!p_slot)
1824 return;
1825
1826 dbg("hp_slot %d, func %p, p_slot %p\n",
1827 hp_slot, func, p_slot);
1828
1829 if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1830 dbg("button pressed\n");
1831 } else if (ctrl->event_queue[loop].event_type ==
1832 INT_BUTTON_CANCEL) {
1833 dbg("button cancel\n");
1834 del_timer(&p_slot->task_event);
1835
1836 mutex_lock(&ctrl->crit_sect);
1837
1838 if (p_slot->state == BLINKINGOFF_STATE) {
1839
1840 dbg("turn on green LED\n");
1841 green_LED_on(ctrl, hp_slot);
1842 } else if (p_slot->state == BLINKINGON_STATE) {
1843
1844 dbg("turn off green LED\n");
1845 green_LED_off(ctrl, hp_slot);
1846 }
1847
1848 info(msg_button_cancel, p_slot->number);
1849
1850 p_slot->state = STATIC_STATE;
1851
1852 amber_LED_off(ctrl, hp_slot);
1853
1854 set_SOGO(ctrl);
1855
1856
1857 wait_for_ctrl_irq(ctrl);
1858
1859 mutex_unlock(&ctrl->crit_sect);
1860 }
1861
1862 else if (ctrl->event_queue[loop].event_type == INT_BUTTON_RELEASE) {
1863 dbg("button release\n");
1864
1865 if (is_slot_enabled(ctrl, hp_slot)) {
1866 dbg("slot is on\n");
1867 p_slot->state = BLINKINGOFF_STATE;
1868 info(msg_button_off, p_slot->number);
1869 } else {
1870 dbg("slot is off\n");
1871 p_slot->state = BLINKINGON_STATE;
1872 info(msg_button_on, p_slot->number);
1873 }
1874 mutex_lock(&ctrl->crit_sect);
1875
1876 dbg("blink green LED and turn off amber\n");
1877
1878 amber_LED_off(ctrl, hp_slot);
1879 green_LED_blink(ctrl, hp_slot);
1880
1881 set_SOGO(ctrl);
1882
1883
1884 wait_for_ctrl_irq(ctrl);
1885
1886 mutex_unlock(&ctrl->crit_sect);
1887 timer_setup(&p_slot->task_event,
1888 pushbutton_helper_thread,
1889 0);
1890 p_slot->hp_slot = hp_slot;
1891 p_slot->ctrl = ctrl;
1892
1893 p_slot->task_event.expires = jiffies + 5 * HZ;
1894
1895 dbg("add_timer p_slot = %p\n", p_slot);
1896 add_timer(&p_slot->task_event);
1897 }
1898
1899 else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1900 dbg("power fault\n");
1901 } else {
1902
1903 update_slot_info(ctrl, p_slot);
1904 }
1905
1906 ctrl->event_queue[loop].event_type = 0;
1907
1908 change = 1;
1909 }
1910 }
1911 }
1912
1913 return;
1914}
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924void cpqhp_pushbutton_thread(struct timer_list *t)
1925{
1926 u8 hp_slot;
1927 u8 device;
1928 struct pci_func *func;
1929 struct slot *p_slot = from_timer(p_slot, t, task_event);
1930 struct controller *ctrl = (struct controller *) p_slot->ctrl;
1931
1932 pushbutton_pending = NULL;
1933 hp_slot = p_slot->hp_slot;
1934
1935 device = p_slot->device;
1936
1937 if (is_slot_enabled(ctrl, hp_slot)) {
1938 p_slot->state = POWEROFF_STATE;
1939
1940 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1941 dbg("In power_down_board, func = %p, ctrl = %p\n", func, ctrl);
1942 if (!func) {
1943 dbg("Error! func NULL in %s\n", __func__);
1944 return;
1945 }
1946
1947 if (cpqhp_process_SS(ctrl, func) != 0) {
1948 amber_LED_on(ctrl, hp_slot);
1949 green_LED_on(ctrl, hp_slot);
1950
1951 set_SOGO(ctrl);
1952
1953
1954 wait_for_ctrl_irq(ctrl);
1955 }
1956
1957 p_slot->state = STATIC_STATE;
1958 } else {
1959 p_slot->state = POWERON_STATE;
1960
1961
1962 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1963 dbg("In add_board, func = %p, ctrl = %p\n", func, ctrl);
1964 if (!func) {
1965 dbg("Error! func NULL in %s\n", __func__);
1966 return;
1967 }
1968
1969 if (ctrl != NULL) {
1970 if (cpqhp_process_SI(ctrl, func) != 0) {
1971 amber_LED_on(ctrl, hp_slot);
1972 green_LED_off(ctrl, hp_slot);
1973
1974 set_SOGO(ctrl);
1975
1976
1977 wait_for_ctrl_irq(ctrl);
1978 }
1979 }
1980
1981 p_slot->state = STATIC_STATE;
1982 }
1983
1984 return;
1985}
1986
1987
1988int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func)
1989{
1990 u8 device, hp_slot;
1991 u16 temp_word;
1992 u32 tempdword;
1993 int rc;
1994 struct slot *p_slot;
1995 int physical_slot = 0;
1996
1997 tempdword = 0;
1998
1999 device = func->device;
2000 hp_slot = device - ctrl->slot_device_offset;
2001 p_slot = cpqhp_find_slot(ctrl, device);
2002 if (p_slot)
2003 physical_slot = p_slot->number;
2004
2005
2006 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
2007
2008 if (tempdword & (0x01 << hp_slot))
2009 return 1;
2010
2011 if (func->is_a_board) {
2012 rc = board_replaced(func, ctrl);
2013 } else {
2014
2015 slot_remove(func);
2016
2017 func = cpqhp_slot_create(ctrl->bus);
2018 if (func == NULL)
2019 return 1;
2020
2021 func->bus = ctrl->bus;
2022 func->device = device;
2023 func->function = 0;
2024 func->configured = 0;
2025 func->is_a_board = 1;
2026
2027
2028 temp_word = ctrl->ctrl_int_comp >> 16;
2029 func->presence_save = (temp_word >> hp_slot) & 0x01;
2030 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
2031
2032 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2033 func->switch_save = 0;
2034 } else {
2035 func->switch_save = 0x10;
2036 }
2037
2038 rc = board_added(func, ctrl);
2039 if (rc) {
2040 if (is_bridge(func)) {
2041 bridge_slot_remove(func);
2042 } else
2043 slot_remove(func);
2044
2045
2046 func = cpqhp_slot_create(ctrl->bus);
2047
2048 if (func == NULL)
2049 return 1;
2050
2051 func->bus = ctrl->bus;
2052 func->device = device;
2053 func->function = 0;
2054 func->configured = 0;
2055 func->is_a_board = 0;
2056
2057
2058 temp_word = ctrl->ctrl_int_comp >> 16;
2059 func->presence_save = (temp_word >> hp_slot) & 0x01;
2060 func->presence_save |=
2061 (temp_word >> (hp_slot + 7)) & 0x02;
2062
2063 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2064 func->switch_save = 0;
2065 } else {
2066 func->switch_save = 0x10;
2067 }
2068 }
2069 }
2070
2071 if (rc)
2072 dbg("%s: rc = %d\n", __func__, rc);
2073
2074 if (p_slot)
2075 update_slot_info(ctrl, p_slot);
2076
2077 return rc;
2078}
2079
2080
2081int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
2082{
2083 u8 device, class_code, header_type, BCR;
2084 u8 index = 0;
2085 u8 replace_flag;
2086 u32 rc = 0;
2087 unsigned int devfn;
2088 struct slot *p_slot;
2089 struct pci_bus *pci_bus = ctrl->pci_bus;
2090 int physical_slot = 0;
2091
2092 device = func->device;
2093 func = cpqhp_slot_find(ctrl->bus, device, index++);
2094 p_slot = cpqhp_find_slot(ctrl, device);
2095 if (p_slot)
2096 physical_slot = p_slot->number;
2097
2098
2099 while (func && !rc) {
2100 pci_bus->number = func->bus;
2101 devfn = PCI_DEVFN(func->device, func->function);
2102
2103
2104 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2105 if (rc)
2106 return rc;
2107
2108 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2109
2110 rc = REMOVE_NOT_SUPPORTED;
2111 } else {
2112
2113 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2114 if (rc)
2115 return rc;
2116
2117
2118 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2119 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2120 if (rc)
2121 return rc;
2122
2123
2124
2125 if (BCR & PCI_BRIDGE_CTL_VGA)
2126 rc = REMOVE_NOT_SUPPORTED;
2127 }
2128 }
2129
2130 func = cpqhp_slot_find(ctrl->bus, device, index++);
2131 }
2132
2133 func = cpqhp_slot_find(ctrl->bus, device, 0);
2134 if ((func != NULL) && !rc) {
2135
2136 replace_flag = !(ctrl->add_support);
2137 rc = remove_board(func, replace_flag, ctrl);
2138 } else if (!rc) {
2139 rc = 1;
2140 }
2141
2142 if (p_slot)
2143 update_slot_info(ctrl, p_slot);
2144
2145 return rc;
2146}
2147
2148
2149
2150
2151
2152
2153
2154
2155static void switch_leds(struct controller *ctrl, const int num_of_slots,
2156 u32 *work_LED, const int direction)
2157{
2158 int loop;
2159
2160 for (loop = 0; loop < num_of_slots; loop++) {
2161 if (direction)
2162 *work_LED = *work_LED >> 1;
2163 else
2164 *work_LED = *work_LED << 1;
2165 writel(*work_LED, ctrl->hpc_reg + LED_CONTROL);
2166
2167 set_SOGO(ctrl);
2168
2169
2170 wait_for_ctrl_irq(ctrl);
2171
2172
2173 long_delay((2*HZ)/10);
2174 }
2175}
2176
2177
2178
2179
2180
2181
2182
2183
2184int cpqhp_hardware_test(struct controller *ctrl, int test_num)
2185{
2186 u32 save_LED;
2187 u32 work_LED;
2188 int loop;
2189 int num_of_slots;
2190
2191 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0f;
2192
2193 switch (test_num) {
2194 case 1:
2195
2196
2197
2198
2199 save_LED = readl(ctrl->hpc_reg + LED_CONTROL);
2200 work_LED = 0x01010101;
2201 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2202 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2203 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2204 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2205
2206 work_LED = 0x01010000;
2207 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2208 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2209 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2210 work_LED = 0x00000101;
2211 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2212 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2213 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2214
2215 work_LED = 0x01010000;
2216 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2217 for (loop = 0; loop < num_of_slots; loop++) {
2218 set_SOGO(ctrl);
2219
2220
2221 wait_for_ctrl_irq(ctrl);
2222
2223
2224 long_delay((3*HZ)/10);
2225 work_LED = work_LED >> 16;
2226 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2227
2228 set_SOGO(ctrl);
2229
2230
2231 wait_for_ctrl_irq(ctrl);
2232
2233
2234 long_delay((3*HZ)/10);
2235 work_LED = work_LED << 16;
2236 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2237 work_LED = work_LED << 1;
2238 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2239 }
2240
2241
2242 writel(save_LED, ctrl->hpc_reg + LED_CONTROL);
2243
2244 set_SOGO(ctrl);
2245
2246
2247 wait_for_ctrl_irq(ctrl);
2248 break;
2249 case 2:
2250
2251 break;
2252 case 3:
2253
2254 break;
2255 }
2256 return 0;
2257}
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
2270 u8 behind_bridge, struct resource_lists *resources)
2271{
2272 u8 temp_byte, function, max_functions, stop_it;
2273 int rc;
2274 u32 ID;
2275 struct pci_func *new_slot;
2276 int index;
2277
2278 new_slot = func;
2279
2280 dbg("%s\n", __func__);
2281
2282 ctrl->pci_bus->number = func->bus;
2283 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2284 if (rc) {
2285 dbg("%s: rc = %d\n", __func__, rc);
2286 return rc;
2287 }
2288
2289 if (temp_byte & 0x80)
2290 max_functions = 8;
2291 else
2292 max_functions = 1;
2293
2294 function = 0;
2295
2296 do {
2297 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources);
2298
2299 if (rc) {
2300 dbg("configure_new_function failed %d\n", rc);
2301 index = 0;
2302
2303 while (new_slot) {
2304 new_slot = cpqhp_slot_find(new_slot->bus, new_slot->device, index++);
2305
2306 if (new_slot)
2307 cpqhp_return_board_resources(new_slot, resources);
2308 }
2309
2310 return rc;
2311 }
2312
2313 function++;
2314
2315 stop_it = 0;
2316
2317
2318
2319
2320 while ((function < max_functions) && (!stop_it)) {
2321 pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2322
2323 if (ID == 0xFFFFFFFF) {
2324 function++;
2325 } else {
2326
2327 new_slot = cpqhp_slot_create(func->bus);
2328
2329 if (new_slot == NULL)
2330 return 1;
2331
2332 new_slot->bus = func->bus;
2333 new_slot->device = func->device;
2334 new_slot->function = function;
2335 new_slot->is_a_board = 1;
2336 new_slot->status = 0;
2337
2338 stop_it++;
2339 }
2340 }
2341
2342 } while (function < max_functions);
2343 dbg("returning from configure_new_device\n");
2344
2345 return 0;
2346}
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365static int configure_new_function(struct controller *ctrl, struct pci_func *func,
2366 u8 behind_bridge,
2367 struct resource_lists *resources)
2368{
2369 int cloop;
2370 u8 IRQ = 0;
2371 u8 temp_byte;
2372 u8 device;
2373 u8 class_code;
2374 u16 command;
2375 u16 temp_word;
2376 u32 temp_dword;
2377 u32 rc;
2378 u32 temp_register;
2379 u32 base;
2380 u32 ID;
2381 unsigned int devfn;
2382 struct pci_resource *mem_node;
2383 struct pci_resource *p_mem_node;
2384 struct pci_resource *io_node;
2385 struct pci_resource *bus_node;
2386 struct pci_resource *hold_mem_node;
2387 struct pci_resource *hold_p_mem_node;
2388 struct pci_resource *hold_IO_node;
2389 struct pci_resource *hold_bus_node;
2390 struct irq_mapping irqs;
2391 struct pci_func *new_slot;
2392 struct pci_bus *pci_bus;
2393 struct resource_lists temp_resources;
2394
2395 pci_bus = ctrl->pci_bus;
2396 pci_bus->number = func->bus;
2397 devfn = PCI_DEVFN(func->device, func->function);
2398
2399
2400 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2401 if (rc)
2402 return rc;
2403
2404 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2405
2406 dbg("set Primary bus = %d\n", func->bus);
2407 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2408 if (rc)
2409 return rc;
2410
2411
2412 dbg("find ranges of buses to use\n");
2413 bus_node = get_max_resource(&(resources->bus_head), 1);
2414
2415
2416 if (!bus_node)
2417 return -ENOMEM;
2418
2419
2420 temp_byte = bus_node->base;
2421 dbg("set Secondary bus = %d\n", bus_node->base);
2422 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2423 if (rc)
2424 return rc;
2425
2426
2427 temp_byte = bus_node->base + bus_node->length - 1;
2428 dbg("set subordinate bus = %d\n", bus_node->base + bus_node->length - 1);
2429 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2430 if (rc)
2431 return rc;
2432
2433
2434 temp_byte = 0x40;
2435 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
2436 if (rc)
2437 return rc;
2438 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
2439 if (rc)
2440 return rc;
2441
2442
2443 temp_byte = 0x08;
2444 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
2445 if (rc)
2446 return rc;
2447
2448
2449 io_node = get_max_resource(&(resources->io_head), 0x1000);
2450 if (!io_node)
2451 return -ENOMEM;
2452 mem_node = get_max_resource(&(resources->mem_head), 0x100000);
2453 if (!mem_node)
2454 return -ENOMEM;
2455 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000);
2456 if (!p_mem_node)
2457 return -ENOMEM;
2458 dbg("Setup the IO, memory, and prefetchable windows\n");
2459 dbg("io_node\n");
2460 dbg("(base, len, next) (%x, %x, %p)\n", io_node->base,
2461 io_node->length, io_node->next);
2462 dbg("mem_node\n");
2463 dbg("(base, len, next) (%x, %x, %p)\n", mem_node->base,
2464 mem_node->length, mem_node->next);
2465 dbg("p_mem_node\n");
2466 dbg("(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2467 p_mem_node->length, p_mem_node->next);
2468
2469
2470 if (!resources->irqs) {
2471 irqs.barber_pole = 0;
2472 irqs.interrupt[0] = 0;
2473 irqs.interrupt[1] = 0;
2474 irqs.interrupt[2] = 0;
2475 irqs.interrupt[3] = 0;
2476 irqs.valid_INT = 0;
2477 } else {
2478 irqs.barber_pole = resources->irqs->barber_pole;
2479 irqs.interrupt[0] = resources->irqs->interrupt[0];
2480 irqs.interrupt[1] = resources->irqs->interrupt[1];
2481 irqs.interrupt[2] = resources->irqs->interrupt[2];
2482 irqs.interrupt[3] = resources->irqs->interrupt[3];
2483 irqs.valid_INT = resources->irqs->valid_INT;
2484 }
2485
2486
2487
2488 temp_resources.bus_head = bus_node;
2489 temp_resources.io_head = io_node;
2490 temp_resources.mem_head = mem_node;
2491 temp_resources.p_mem_head = p_mem_node;
2492 temp_resources.irqs = &irqs;
2493
2494
2495
2496
2497 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2498 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2499 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2500 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2501
2502 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2503 kfree(hold_bus_node);
2504 kfree(hold_IO_node);
2505 kfree(hold_mem_node);
2506 kfree(hold_p_mem_node);
2507
2508 return 1;
2509 }
2510
2511 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2512
2513 bus_node->base += 1;
2514 bus_node->length -= 1;
2515 bus_node->next = NULL;
2516
2517
2518
2519 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2520 io_node->next = NULL;
2521
2522
2523 temp_byte = io_node->base >> 8;
2524 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2525
2526 temp_byte = (io_node->base + io_node->length - 1) >> 8;
2527 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2528
2529
2530
2531
2532 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2533 mem_node->next = NULL;
2534
2535
2536 temp_word = mem_node->base >> 16;
2537 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2538
2539 temp_word = (mem_node->base + mem_node->length - 1) >> 16;
2540 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2541
2542 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2543 p_mem_node->next = NULL;
2544
2545
2546 temp_word = p_mem_node->base >> 16;
2547 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2548
2549 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16;
2550 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2551
2552
2553
2554 irqs.barber_pole--;
2555
2556 rc = 0;
2557
2558
2559 for (device = 0; (device <= 0x1F) && !rc; device++) {
2560 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2561
2562 ID = 0xFFFFFFFF;
2563 pci_bus->number = hold_bus_node->base;
2564 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0), 0x00, &ID);
2565 pci_bus->number = func->bus;
2566
2567 if (ID != 0xFFFFFFFF) {
2568
2569 new_slot = cpqhp_slot_create(hold_bus_node->base);
2570
2571 if (new_slot == NULL) {
2572 rc = -ENOMEM;
2573 continue;
2574 }
2575
2576 new_slot->bus = hold_bus_node->base;
2577 new_slot->device = device;
2578 new_slot->function = 0;
2579 new_slot->is_a_board = 1;
2580 new_slot->status = 0;
2581
2582 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources);
2583 dbg("configure_new_device rc=0x%x\n", rc);
2584 }
2585 }
2586
2587 if (rc)
2588 goto free_and_out;
2589
2590 if (resources->irqs) {
2591 resources->irqs->interrupt[0] = irqs.interrupt[0];
2592 resources->irqs->interrupt[1] = irqs.interrupt[1];
2593 resources->irqs->interrupt[2] = irqs.interrupt[2];
2594 resources->irqs->interrupt[3] = irqs.interrupt[3];
2595 resources->irqs->valid_INT = irqs.valid_INT;
2596 } else if (!behind_bridge) {
2597
2598 for (cloop = 0; cloop < 4; cloop++) {
2599 if (irqs.valid_INT & (0x01 << cloop)) {
2600 rc = cpqhp_set_irq(func->bus, func->device,
2601 cloop + 1, irqs.interrupt[cloop]);
2602 if (rc)
2603 goto free_and_out;
2604 }
2605 }
2606 }
2607
2608
2609
2610 if (bus_node && temp_resources.bus_head) {
2611 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2612
2613 hold_bus_node->next = func->bus_head;
2614 func->bus_head = hold_bus_node;
2615
2616 temp_byte = temp_resources.bus_head->base - 1;
2617
2618
2619 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2620
2621 if (temp_resources.bus_head->length == 0) {
2622 kfree(temp_resources.bus_head);
2623 temp_resources.bus_head = NULL;
2624 } else {
2625 return_resource(&(resources->bus_head), temp_resources.bus_head);
2626 }
2627 }
2628
2629
2630
2631 if (hold_IO_node && temp_resources.io_head) {
2632 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2633 &hold_IO_node, 0x1000);
2634
2635
2636 if (io_node) {
2637 hold_IO_node->base = io_node->base + io_node->length;
2638
2639 temp_byte = (hold_IO_node->base) >> 8;
2640 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2641
2642 return_resource(&(resources->io_head), io_node);
2643 }
2644
2645 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2646
2647
2648 if (io_node) {
2649
2650
2651 hold_IO_node->length = io_node->base - hold_IO_node->base;
2652
2653
2654 if (hold_IO_node->length) {
2655 hold_IO_node->next = func->io_head;
2656 func->io_head = hold_IO_node;
2657
2658 temp_byte = (io_node->base - 1) >> 8;
2659 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2660
2661 return_resource(&(resources->io_head), io_node);
2662 } else {
2663
2664 temp_word = 0x0000;
2665 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_LIMIT, temp_word);
2666
2667 return_resource(&(resources->io_head), io_node);
2668 kfree(hold_IO_node);
2669 }
2670 } else {
2671
2672 hold_IO_node->next = func->io_head;
2673 func->io_head = hold_IO_node;
2674 }
2675 } else if (hold_IO_node) {
2676
2677 hold_IO_node->next = func->io_head;
2678 func->io_head = hold_IO_node;
2679 }
2680
2681
2682 if (hold_mem_node && temp_resources.mem_head) {
2683 mem_node = do_pre_bridge_resource_split(&(temp_resources. mem_head),
2684 &hold_mem_node, 0x100000);
2685
2686
2687 if (mem_node) {
2688 hold_mem_node->base = mem_node->base + mem_node->length;
2689
2690 temp_word = (hold_mem_node->base) >> 16;
2691 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2692
2693 return_resource(&(resources->mem_head), mem_node);
2694 }
2695
2696 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000);
2697
2698
2699 if (mem_node) {
2700
2701
2702 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2703
2704 if (hold_mem_node->length) {
2705 hold_mem_node->next = func->mem_head;
2706 func->mem_head = hold_mem_node;
2707
2708
2709 temp_word = (mem_node->base - 1) >> 16;
2710 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2711
2712
2713 return_resource(&(resources->mem_head), mem_node);
2714 } else {
2715
2716 temp_word = 0x0000;
2717 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2718
2719 return_resource(&(resources->mem_head), mem_node);
2720 kfree(hold_mem_node);
2721 }
2722 } else {
2723
2724 hold_mem_node->next = func->mem_head;
2725 func->mem_head = hold_mem_node;
2726 }
2727 } else if (hold_mem_node) {
2728
2729 hold_mem_node->next = func->mem_head;
2730 func->mem_head = hold_mem_node;
2731 }
2732
2733
2734 if (temp_resources.p_mem_head) {
2735 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2736 &hold_p_mem_node, 0x100000);
2737
2738
2739 if (p_mem_node) {
2740 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2741
2742 temp_word = (hold_p_mem_node->base) >> 16;
2743 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2744
2745 return_resource(&(resources->p_mem_head), p_mem_node);
2746 }
2747
2748 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000);
2749
2750
2751 if (p_mem_node) {
2752
2753
2754 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2755
2756
2757 if (hold_p_mem_node->length) {
2758 hold_p_mem_node->next = func->p_mem_head;
2759 func->p_mem_head = hold_p_mem_node;
2760
2761 temp_word = (p_mem_node->base - 1) >> 16;
2762 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2763
2764 return_resource(&(resources->p_mem_head), p_mem_node);
2765 } else {
2766
2767 temp_word = 0x0000;
2768 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2769
2770 return_resource(&(resources->p_mem_head), p_mem_node);
2771 kfree(hold_p_mem_node);
2772 }
2773 } else {
2774
2775 hold_p_mem_node->next = func->p_mem_head;
2776 func->p_mem_head = hold_p_mem_node;
2777 }
2778 } else if (hold_p_mem_node) {
2779
2780 hold_p_mem_node->next = func->p_mem_head;
2781 func->p_mem_head = hold_p_mem_node;
2782 }
2783
2784
2785
2786
2787
2788 command = 0x0157;
2789
2790
2791
2792
2793
2794 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
2795
2796
2797 command = 0x07;
2798
2799
2800 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
2801 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2802
2803 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2804
2805 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2806
2807 return DEVICE_TYPE_NOT_SUPPORTED;
2808 }
2809
2810 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
2811 temp_register = 0xFFFFFFFF;
2812
2813 dbg("CND: bus=%d, devfn=%d, offset=%d\n", pci_bus->number, devfn, cloop);
2814 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
2815
2816 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2817 dbg("CND: base = 0x%x\n", temp_register);
2818
2819 if (temp_register) {
2820 if ((temp_register & 0x03L) == 0x01) {
2821
2822
2823
2824 base = temp_register & 0xFFFFFFFC;
2825 base = ~base + 1;
2826
2827 dbg("CND: length = 0x%x\n", base);
2828 io_node = get_io_resource(&(resources->io_head), base);
2829 dbg("Got io_node start = %8.8x, length = %8.8x next (%p)\n",
2830 io_node->base, io_node->length, io_node->next);
2831 dbg("func (%p) io_head (%p)\n", func, func->io_head);
2832
2833
2834 if (io_node) {
2835 base = io_node->base;
2836
2837 io_node->next = func->io_head;
2838 func->io_head = io_node;
2839 } else
2840 return -ENOMEM;
2841 } else if ((temp_register & 0x0BL) == 0x08) {
2842
2843 base = temp_register & 0xFFFFFFF0;
2844 base = ~base + 1;
2845
2846 dbg("CND: length = 0x%x\n", base);
2847 p_mem_node = get_resource(&(resources->p_mem_head), base);
2848
2849
2850 if (p_mem_node) {
2851 base = p_mem_node->base;
2852
2853 p_mem_node->next = func->p_mem_head;
2854 func->p_mem_head = p_mem_node;
2855 } else
2856 return -ENOMEM;
2857 } else if ((temp_register & 0x0BL) == 0x00) {
2858
2859 base = temp_register & 0xFFFFFFF0;
2860 base = ~base + 1;
2861
2862 dbg("CND: length = 0x%x\n", base);
2863 mem_node = get_resource(&(resources->mem_head), base);
2864
2865
2866 if (mem_node) {
2867 base = mem_node->base;
2868
2869 mem_node->next = func->mem_head;
2870 func->mem_head = mem_node;
2871 } else
2872 return -ENOMEM;
2873 } else {
2874
2875 return NOT_ENOUGH_RESOURCES;
2876 }
2877
2878 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2879
2880
2881 if ((temp_register & 0x07L) == 0x04) {
2882 cloop += 4;
2883
2884
2885
2886
2887
2888 base = 0;
2889 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2890 }
2891 }
2892 }
2893 if (cpqhp_legacy_mode) {
2894
2895 rc = pci_bus_read_config_byte(pci_bus, devfn,
2896 PCI_INTERRUPT_PIN, &temp_byte);
2897
2898
2899
2900
2901 if (temp_byte && resources->irqs &&
2902 (resources->irqs->valid_INT &
2903 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2904
2905 IRQ = resources->irqs->interrupt[(temp_byte +
2906 resources->irqs->barber_pole - 1) & 0x03];
2907 } else {
2908
2909 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2910
2911 if (class_code == PCI_BASE_CLASS_STORAGE)
2912 IRQ = cpqhp_disk_irq;
2913 else
2914 IRQ = cpqhp_nic_irq;
2915 }
2916
2917
2918 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2919 }
2920
2921 if (!behind_bridge) {
2922 rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
2923 if (rc)
2924 return 1;
2925 } else {
2926
2927
2928 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2929 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2930 }
2931
2932
2933 temp_byte = 0x40;
2934 rc = pci_bus_write_config_byte(pci_bus, devfn,
2935 PCI_LATENCY_TIMER, temp_byte);
2936
2937
2938 temp_byte = 0x08;
2939 rc = pci_bus_write_config_byte(pci_bus, devfn,
2940 PCI_CACHE_LINE_SIZE, temp_byte);
2941
2942
2943 temp_dword = 0x00L;
2944 rc = pci_bus_write_config_word(pci_bus, devfn,
2945 PCI_ROM_ADDRESS, temp_dword);
2946
2947
2948 temp_word = 0x0157;
2949
2950
2951
2952
2953
2954 rc = pci_bus_write_config_word(pci_bus, devfn,
2955 PCI_COMMAND, temp_word);
2956 } else {
2957
2958 return DEVICE_TYPE_NOT_SUPPORTED;
2959 }
2960
2961 func->configured = 1;
2962
2963 return 0;
2964free_and_out:
2965 cpqhp_destroy_resource_list(&temp_resources);
2966
2967 return_resource(&(resources->bus_head), hold_bus_node);
2968 return_resource(&(resources->io_head), hold_IO_node);
2969 return_resource(&(resources->mem_head), hold_mem_node);
2970 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2971 return rc;
2972}
2973