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46#ifndef MPT3SAS_BASE_H_INCLUDED
47#define MPT3SAS_BASE_H_INCLUDED
48
49#include "mpi/mpi2_type.h"
50#include "mpi/mpi2.h"
51#include "mpi/mpi2_ioc.h"
52#include "mpi/mpi2_cnfg.h"
53#include "mpi/mpi2_init.h"
54#include "mpi/mpi2_raid.h"
55#include "mpi/mpi2_tool.h"
56#include "mpi/mpi2_sas.h"
57#include "mpi/mpi2_pci.h"
58
59#include <scsi/scsi.h>
60#include <scsi/scsi_cmnd.h>
61#include <scsi/scsi_device.h>
62#include <scsi/scsi_host.h>
63#include <scsi/scsi_tcq.h>
64#include <scsi/scsi_transport_sas.h>
65#include <scsi/scsi_dbg.h>
66#include <scsi/scsi_eh.h>
67#include <linux/pci.h>
68#include <linux/poll.h>
69
70#include "mpt3sas_debug.h"
71#include "mpt3sas_trigger_diag.h"
72
73
74#define MPT3SAS_DRIVER_NAME "mpt3sas"
75#define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
76#define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
77#define MPT3SAS_DRIVER_VERSION "17.100.00.00"
78#define MPT3SAS_MAJOR_VERSION 17
79#define MPT3SAS_MINOR_VERSION 100
80#define MPT3SAS_BUILD_VERSION 0
81#define MPT3SAS_RELEASE_VERSION 00
82
83#define MPT2SAS_DRIVER_NAME "mpt2sas"
84#define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
85#define MPT2SAS_DRIVER_VERSION "20.102.00.00"
86#define MPT2SAS_MAJOR_VERSION 20
87#define MPT2SAS_MINOR_VERSION 102
88#define MPT2SAS_BUILD_VERSION 0
89#define MPT2SAS_RELEASE_VERSION 00
90
91
92
93
94#define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
95#define MPT_MIN_PHYS_SEGMENTS 16
96#define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
97
98#ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
99#define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
100#else
101#define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
102#endif
103
104#ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
105#define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
106#else
107#define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
108#endif
109
110
111
112
113#define MPT3SAS_SATA_QUEUE_DEPTH 32
114#define MPT3SAS_SAS_QUEUE_DEPTH 254
115#define MPT3SAS_RAID_QUEUE_DEPTH 128
116#define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
117
118#define MPT3SAS_RAID_MAX_SECTORS 8192
119#define MPT3SAS_HOST_PAGE_SIZE_4K 12
120#define MPT3SAS_NVME_QUEUE_DEPTH 128
121#define MPT_NAME_LENGTH 32
122#define MPT_STRING_LENGTH 64
123
124#define MPT_MAX_CALLBACKS 32
125
126#define INTERNAL_CMDS_COUNT 10
127
128#define INTERNAL_SCSIIO_CMDS_COUNT 3
129
130#define MPI3_HIM_MASK 0xFFFFFFFF
131
132#define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
133
134#define MAX_CHAIN_ELEMT_SZ 16
135#define DEFAULT_NUM_FWCHAIN_ELEMTS 8
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137
138
139
140#define NVME_PRP_SIZE 8
141#define NVME_CMD_PRP1_OFFSET 24
142#define NVME_CMD_PRP2_OFFSET 32
143#define NVME_ERROR_RESPONSE_SIZE 16
144#define NVME_PRP_PAGE_SIZE 4096
145
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147
148
149#define MPT3_IOC_PRE_RESET 1
150#define MPT3_IOC_AFTER_RESET 2
151#define MPT3_IOC_DONE_RESET 3
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155
156#define MPT3SAS_FMT "%s: "
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161
162#define MPT2_WARPDRIVE_LOGENTRY (0x8002)
163#define MPT2_WARPDRIVE_LC_SSDT (0x41)
164#define MPT2_WARPDRIVE_LC_SSDLW (0x43)
165#define MPT2_WARPDRIVE_LC_SSDLF (0x44)
166#define MPT2_WARPDRIVE_LC_BRMF (0x4D)
167
168
169
170
171#define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
172#define MPT_TARGET_FLAGS_VOLUME 0x02
173#define MPT_TARGET_FLAGS_DELETED 0x04
174#define MPT_TARGET_FASTPATH_IO 0x08
175#define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
176
177#define SAS2_PCI_DEVICE_B0_REVISION (0x01)
178#define SAS3_PCI_DEVICE_C0_REVISION (0x02)
179
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182
183#define MPT2SAS_INTEL_RMS25JB080_BRANDING \
184 "Intel(R) Integrated RAID Module RMS25JB080"
185#define MPT2SAS_INTEL_RMS25JB040_BRANDING \
186 "Intel(R) Integrated RAID Module RMS25JB040"
187#define MPT2SAS_INTEL_RMS25KB080_BRANDING \
188 "Intel(R) Integrated RAID Module RMS25KB080"
189#define MPT2SAS_INTEL_RMS25KB040_BRANDING \
190 "Intel(R) Integrated RAID Module RMS25KB040"
191#define MPT2SAS_INTEL_RMS25LB040_BRANDING \
192 "Intel(R) Integrated RAID Module RMS25LB040"
193#define MPT2SAS_INTEL_RMS25LB080_BRANDING \
194 "Intel(R) Integrated RAID Module RMS25LB080"
195#define MPT2SAS_INTEL_RMS2LL080_BRANDING \
196 "Intel Integrated RAID Module RMS2LL080"
197#define MPT2SAS_INTEL_RMS2LL040_BRANDING \
198 "Intel Integrated RAID Module RMS2LL040"
199#define MPT2SAS_INTEL_RS25GB008_BRANDING \
200 "Intel(R) RAID Controller RS25GB008"
201#define MPT2SAS_INTEL_SSD910_BRANDING \
202 "Intel(R) SSD 910 Series"
203
204#define MPT3SAS_INTEL_RMS3JC080_BRANDING \
205 "Intel(R) Integrated RAID Module RMS3JC080"
206#define MPT3SAS_INTEL_RS3GC008_BRANDING \
207 "Intel(R) RAID Controller RS3GC008"
208#define MPT3SAS_INTEL_RS3FC044_BRANDING \
209 "Intel(R) RAID Controller RS3FC044"
210#define MPT3SAS_INTEL_RS3UC080_BRANDING \
211 "Intel(R) RAID Controller RS3UC080"
212
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214
215
216#define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
217#define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
218#define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
219#define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
220#define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
221#define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
222#define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
223#define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
224#define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
225#define MPT2SAS_INTEL_SSD910_SSDID 0x3700
226
227#define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
228#define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
229#define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
230#define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
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234
235#define MPT2SAS_DELL_BRANDING_SIZE 32
236
237#define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
238#define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
239#define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
240#define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
241#define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
242#define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
243#define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
244
245#define MPT3SAS_DELL_12G_HBA_BRANDING \
246 "Dell 12Gbps HBA"
247
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250
251#define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
252#define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
253#define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
254#define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
255#define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
256#define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
257#define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
258
259#define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
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263
264#define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
265 "Cisco 9300-8E 12G SAS HBA"
266#define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
267 "Cisco 9300-8i 12G SAS HBA"
268#define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
269 "Cisco 12G Modular SAS Pass through Controller"
270#define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
271 "UCS C3X60 12G SAS Pass through Controller"
272
273
274
275#define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
276#define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
277#define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
278#define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
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282
283#define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
284#define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
285#define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
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289
290#define MPT2SAS_HP_3PAR_SSVID 0x1590
291
292#define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
293 "HP H220 Host Bus Adapter"
294#define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
295 "HP H221 Host Bus Adapter"
296#define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
297 "HP H222 Host Bus Adapter"
298#define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
299 "HP H220i Host Bus Adapter"
300#define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
301 "HP H210i Host Bus Adapter"
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303
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305
306#define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
307#define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
308#define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
309#define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
310#define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
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317#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
318#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
319#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
320
321
322#define MFG10_OEM_ID_INVALID (0x00000000)
323#define MFG10_OEM_ID_DELL (0x00000001)
324#define MFG10_OEM_ID_FSC (0x00000002)
325#define MFG10_OEM_ID_SUN (0x00000003)
326#define MFG10_OEM_ID_IBM (0x00000004)
327
328
329#define MFG10_GF0_OCE_DISABLED (0x00000001)
330#define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
331#define MFG10_GF0_R10_DISPLAY (0x00000004)
332#define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
333#define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
334
335#define VIRTUAL_IO_FAILED_RETRY (0x32010081)
336
337
338struct Mpi2ManufacturingPage10_t {
339 MPI2_CONFIG_PAGE_HEADER Header;
340 U8 OEMIdentifier;
341 U8 Reserved1;
342 U16 Reserved2;
343 U32 Reserved3;
344 U32 GenericFlags0;
345 U32 GenericFlags1;
346 U32 Reserved4;
347 U32 OEMSpecificFlags0;
348 U32 OEMSpecificFlags1;
349 U32 Reserved5[18];
350};
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354struct Mpi2ManufacturingPage11_t {
355 MPI2_CONFIG_PAGE_HEADER Header;
356 __le32 Reserved1;
357 u8 Reserved2;
358 u8 EEDPTagMode;
359 u8 Reserved3;
360 u8 Reserved4;
361 __le32 Reserved5[23];
362};
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377struct MPT3SAS_TARGET {
378 struct scsi_target *starget;
379 u64 sas_address;
380 struct _raid_device *raid_device;
381 u16 handle;
382 int num_luns;
383 u32 flags;
384 u8 deleted;
385 u8 tm_busy;
386 struct _sas_device *sas_dev;
387 struct _pcie_device *pcie_dev;
388};
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393
394#define MPT_DEVICE_FLAGS_INIT 0x01
395
396#define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
397#define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
398#define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
399#define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
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414struct MPT3SAS_DEVICE {
415 struct MPT3SAS_TARGET *sas_target;
416 unsigned int lun;
417 u32 flags;
418 u8 configured_lun;
419 u8 block;
420 u8 tlr_snoop_check;
421 u8 ignore_delay_remove;
422
423 u8 ncq_prio_enable;
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434 unsigned long ata_command_pending;
435
436};
437
438#define MPT3_CMD_NOT_USED 0x8000
439#define MPT3_CMD_COMPLETE 0x0001
440#define MPT3_CMD_PENDING 0x0002
441#define MPT3_CMD_REPLY_VALID 0x0004
442#define MPT3_CMD_RESET 0x0008
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453struct _internal_cmd {
454 struct mutex mutex;
455 struct completion done;
456 void *reply;
457 void *sense;
458 u16 status;
459 u16 smid;
460};
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489struct _sas_device {
490 struct list_head list;
491 struct scsi_target *starget;
492 u64 sas_address;
493 u64 device_name;
494 u16 handle;
495 u64 sas_address_parent;
496 u16 enclosure_handle;
497 u64 enclosure_logical_id;
498 u16 volume_handle;
499 u64 volume_wwid;
500 u32 device_info;
501 int id;
502 int channel;
503 u16 slot;
504 u8 phy;
505 u8 responding;
506 u8 fast_path;
507 u8 pfa_led_on;
508 u8 pend_sas_rphy_add;
509 u8 enclosure_level;
510 u8 chassis_slot;
511 u8 is_chassis_slot_valid;
512 u8 connector_name[5];
513 struct kref refcount;
514};
515
516static inline void sas_device_get(struct _sas_device *s)
517{
518 kref_get(&s->refcount);
519}
520
521static inline void sas_device_free(struct kref *r)
522{
523 kfree(container_of(r, struct _sas_device, refcount));
524}
525
526static inline void sas_device_put(struct _sas_device *s)
527{
528 kref_put(&s->refcount, sas_device_free);
529}
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553struct _pcie_device {
554 struct list_head list;
555 struct scsi_target *starget;
556 u64 wwid;
557 u16 handle;
558 u32 device_info;
559 int id;
560 int channel;
561 u16 slot;
562 u8 port_num;
563 u8 responding;
564 u8 fast_path;
565 u32 nvme_mdts;
566 u16 enclosure_handle;
567 u64 enclosure_logical_id;
568 u8 enclosure_level;
569 u8 connector_name[4];
570 u8 *serial_number;
571 struct kref refcount;
572};
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582static inline void pcie_device_get(struct _pcie_device *p)
583{
584 kref_get(&p->refcount);
585}
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594static inline void pcie_device_free(struct kref *r)
595{
596 kfree(container_of(r, struct _pcie_device, refcount));
597}
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610static inline void pcie_device_put(struct _pcie_device *p)
611{
612 kref_put(&p->refcount, pcie_device_free);
613}
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637#define MPT_MAX_WARPDRIVE_PDS 8
638struct _raid_device {
639 struct list_head list;
640 struct scsi_target *starget;
641 struct scsi_device *sdev;
642 u64 wwid;
643 u16 handle;
644 u16 block_sz;
645 int id;
646 int channel;
647 u8 volume_type;
648 u8 num_pds;
649 u8 responding;
650 u8 percent_complete;
651 u8 direct_io_enabled;
652 u8 stripe_exponent;
653 u8 block_exponent;
654 u64 max_lba;
655 u32 stripe_sz;
656 u32 device_info;
657 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
658};
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667struct _boot_device {
668 int channel;
669 void *device;
670};
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681struct _sas_port {
682 struct list_head port_list;
683 u8 num_phys;
684 struct sas_identify remote_identify;
685 struct sas_rphy *rphy;
686 struct sas_port *port;
687 struct list_head phy_list;
688};
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701struct _sas_phy {
702 struct list_head port_siblings;
703 struct sas_identify identify;
704 struct sas_identify remote_identify;
705 struct sas_phy *phy;
706 u8 phy_id;
707 u16 handle;
708 u16 attached_handle;
709 u8 phy_belongs_to_port;
710};
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726struct _sas_node {
727 struct list_head list;
728 struct device *parent_dev;
729 u8 num_phys;
730 u64 sas_address;
731 u16 handle;
732 u64 sas_address_parent;
733 u16 enclosure_handle;
734 u64 enclosure_logical_id;
735 u8 responding;
736 struct _sas_phy *phy;
737 struct list_head sas_port_list;
738};
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745enum reset_type {
746 FORCE_BIG_HAMMER,
747 SOFT_RESET,
748};
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755struct pcie_sg_list {
756 void *pcie_sgl;
757 dma_addr_t pcie_sgl_dma;
758};
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766struct chain_tracker {
767 void *chain_buffer;
768 dma_addr_t chain_buffer_dma;
769 struct list_head tracker_list;
770};
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781struct scsiio_tracker {
782 u16 smid;
783 struct scsi_cmnd *scmd;
784 u8 cb_idx;
785 u8 direct_io;
786 struct pcie_sg_list pcie_sg_list;
787 struct list_head chain_list;
788 struct list_head tracker_list;
789 u16 msix_io;
790};
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798struct request_tracker {
799 u16 smid;
800 u8 cb_idx;
801 struct list_head tracker_list;
802};
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809struct _tr_list {
810 struct list_head list;
811 u16 handle;
812 u16 state;
813};
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819struct _sc_list {
820 struct list_head list;
821 u16 handle;
822};
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829struct _event_ack_list {
830 struct list_head list;
831 u16 Event;
832 u32 EventContext;
833};
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846struct adapter_reply_queue {
847 struct MPT3SAS_ADAPTER *ioc;
848 u8 msix_index;
849 u32 reply_post_host_index;
850 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
851 char name[MPT_NAME_LENGTH];
852 atomic_t busy;
853 struct list_head list;
854};
855
856typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
857
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859typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
860 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
861typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
862 dma_addr_t data_out_dma, size_t data_out_sz,
863 dma_addr_t data_in_dma, size_t data_in_sz);
864typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
865 void *paddr);
866
867
868typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
869 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
870 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
871 size_t data_in_sz);
872
873
874typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
875 u16 funcdep);
876typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
877
878
879union mpi3_version_union {
880 MPI2_VERSION_STRUCT Struct;
881 u32 Word;
882};
883
884struct mpt3sas_facts {
885 u16 MsgVersion;
886 u16 HeaderVersion;
887 u8 IOCNumber;
888 u8 VP_ID;
889 u8 VF_ID;
890 u16 IOCExceptions;
891 u16 IOCStatus;
892 u32 IOCLogInfo;
893 u8 MaxChainDepth;
894 u8 WhoInit;
895 u8 NumberOfPorts;
896 u8 MaxMSIxVectors;
897 u16 RequestCredit;
898 u16 ProductID;
899 u32 IOCCapabilities;
900 union mpi3_version_union FWVersion;
901 u16 IOCRequestFrameSize;
902 u16 IOCMaxChainSegmentSize;
903 u16 MaxInitiators;
904 u16 MaxTargets;
905 u16 MaxSasExpanders;
906 u16 MaxEnclosures;
907 u16 ProtocolFlags;
908 u16 HighPriorityCredit;
909 u16 MaxReplyDescriptorPostQueueDepth;
910 u8 ReplyFrameSize;
911 u8 MaxVolumes;
912 u16 MaxDevHandle;
913 u16 MaxPersistentEntries;
914 u16 MinDevHandle;
915 u8 CurrentHostPageSize;
916};
917
918struct mpt3sas_port_facts {
919 u8 PortNumber;
920 u8 VP_ID;
921 u8 VF_ID;
922 u8 PortType;
923 u16 MaxPostedCmdBuffers;
924};
925
926struct reply_post_struct {
927 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
928 dma_addr_t reply_post_free_dma;
929};
930
931typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
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1095struct MPT3SAS_ADAPTER {
1096 struct list_head list;
1097 struct Scsi_Host *shost;
1098 u8 id;
1099 int cpu_count;
1100 char name[MPT_NAME_LENGTH];
1101 char driver_name[MPT_NAME_LENGTH - 8];
1102 char tmp_string[MPT_STRING_LENGTH];
1103 struct pci_dev *pdev;
1104 Mpi2SystemInterfaceRegs_t __iomem *chip;
1105 resource_size_t chip_phys;
1106 int logging_level;
1107 int fwfault_debug;
1108 u8 ir_firmware;
1109 int bars;
1110 u8 mask_interrupts;
1111 int dma_mask;
1112
1113
1114 char fault_reset_work_q_name[20];
1115 struct workqueue_struct *fault_reset_work_q;
1116 struct delayed_work fault_reset_work;
1117
1118
1119 char firmware_event_name[20];
1120 struct workqueue_struct *firmware_event_thread;
1121 spinlock_t fw_event_lock;
1122 struct list_head fw_event_list;
1123
1124
1125 int aen_event_read_flag;
1126 u8 broadcast_aen_busy;
1127 u16 broadcast_aen_pending;
1128 u8 shost_recovery;
1129 u8 got_task_abort_from_ioctl;
1130
1131 struct mutex reset_in_progress_mutex;
1132 spinlock_t ioc_reset_in_progress_lock;
1133 u8 ioc_link_reset_in_progress;
1134 u8 ioc_reset_in_progress_status;
1135
1136 u8 ignore_loginfos;
1137 u8 remove_host;
1138 u8 pci_error_recovery;
1139 u8 wait_for_discovery_to_complete;
1140 u8 is_driver_loading;
1141 u8 port_enable_failed;
1142 u8 start_scan;
1143 u16 start_scan_failed;
1144
1145 u8 msix_enable;
1146 u16 msix_vector_count;
1147 u8 *cpu_msix_table;
1148 u16 cpu_msix_table_sz;
1149 resource_size_t __iomem **reply_post_host_index;
1150 u32 ioc_reset_count;
1151 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1152 u32 non_operational_loop;
1153
1154
1155 u8 scsi_io_cb_idx;
1156 u8 tm_cb_idx;
1157 u8 transport_cb_idx;
1158 u8 scsih_cb_idx;
1159 u8 ctl_cb_idx;
1160 u8 base_cb_idx;
1161 u8 port_enable_cb_idx;
1162 u8 config_cb_idx;
1163 u8 tm_tr_cb_idx;
1164 u8 tm_tr_volume_cb_idx;
1165 u8 tm_sas_control_cb_idx;
1166 struct _internal_cmd base_cmds;
1167 struct _internal_cmd port_enable_cmds;
1168 struct _internal_cmd transport_cmds;
1169 struct _internal_cmd scsih_cmds;
1170 struct _internal_cmd tm_cmds;
1171 struct _internal_cmd ctl_cmds;
1172 struct _internal_cmd config_cmds;
1173
1174 MPT_ADD_SGE base_add_sg_single;
1175
1176
1177 MPT_BUILD_SG_SCMD build_sg_scmd;
1178 MPT_BUILD_SG build_sg;
1179 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1180 u16 sge_size_ieee;
1181 u16 hba_mpi_version_belonged;
1182
1183
1184 MPT_BUILD_SG build_sg_mpi;
1185 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1186
1187
1188 NVME_BUILD_PRP build_nvme_prp;
1189
1190
1191 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1192 u32 event_context;
1193 void *event_log;
1194 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1195
1196
1197 struct mpt3sas_facts facts;
1198 struct mpt3sas_port_facts *pfacts;
1199 Mpi2ManufacturingPage0_t manu_pg0;
1200 struct Mpi2ManufacturingPage10_t manu_pg10;
1201 struct Mpi2ManufacturingPage11_t manu_pg11;
1202 Mpi2BiosPage2_t bios_pg2;
1203 Mpi2BiosPage3_t bios_pg3;
1204 Mpi2IOCPage8_t ioc_pg8;
1205 Mpi2IOUnitPage0_t iounit_pg0;
1206 Mpi2IOUnitPage1_t iounit_pg1;
1207 Mpi2IOUnitPage8_t iounit_pg8;
1208
1209 struct _boot_device req_boot_device;
1210 struct _boot_device req_alt_boot_device;
1211 struct _boot_device current_boot_device;
1212
1213
1214 struct _sas_node sas_hba;
1215 struct list_head sas_expander_list;
1216 spinlock_t sas_node_lock;
1217 struct list_head sas_device_list;
1218 struct list_head sas_device_init_list;
1219 spinlock_t sas_device_lock;
1220 struct list_head pcie_device_list;
1221 struct list_head pcie_device_init_list;
1222 spinlock_t pcie_device_lock;
1223
1224 struct list_head raid_device_list;
1225 spinlock_t raid_device_lock;
1226 u8 io_missing_delay;
1227 u16 device_missing_delay;
1228 int sas_id;
1229 int pcie_target_id;
1230
1231 void *blocking_handles;
1232 void *pd_handles;
1233 u16 pd_handles_sz;
1234
1235 void *pend_os_device_add;
1236 u16 pend_os_device_add_sz;
1237
1238
1239 u16 config_page_sz;
1240 void *config_page;
1241 dma_addr_t config_page_dma;
1242
1243
1244 u16 hba_queue_depth;
1245 u16 sge_size;
1246 u16 scsiio_depth;
1247 u16 request_sz;
1248 u8 *request;
1249 dma_addr_t request_dma;
1250 u32 request_dma_sz;
1251 struct scsiio_tracker *scsi_lookup;
1252 ulong scsi_lookup_pages;
1253 spinlock_t scsi_lookup_lock;
1254 struct list_head free_list;
1255 int pending_io_count;
1256 wait_queue_head_t reset_wq;
1257
1258
1259 struct dma_pool *pcie_sgl_dma_pool;
1260
1261 u32 page_size;
1262
1263
1264 struct chain_tracker *chain_lookup;
1265 struct list_head free_chain_list;
1266 struct dma_pool *chain_dma_pool;
1267 ulong chain_pages;
1268 u16 max_sges_in_main_message;
1269 u16 max_sges_in_chain_message;
1270 u16 chains_needed_per_io;
1271 u32 chain_depth;
1272 u16 chain_segment_sz;
1273
1274
1275 u16 hi_priority_smid;
1276 u8 *hi_priority;
1277 dma_addr_t hi_priority_dma;
1278 u16 hi_priority_depth;
1279 struct request_tracker *hpr_lookup;
1280 struct list_head hpr_free_list;
1281
1282
1283 u16 internal_smid;
1284 u8 *internal;
1285 dma_addr_t internal_dma;
1286 u16 internal_depth;
1287 struct request_tracker *internal_lookup;
1288 struct list_head internal_free_list;
1289
1290
1291 u8 *sense;
1292 dma_addr_t sense_dma;
1293 struct dma_pool *sense_dma_pool;
1294
1295
1296 u16 reply_sz;
1297 u8 *reply;
1298 dma_addr_t reply_dma;
1299 u32 reply_dma_max_address;
1300 u32 reply_dma_min_address;
1301 struct dma_pool *reply_dma_pool;
1302
1303
1304 u16 reply_free_queue_depth;
1305 __le32 *reply_free;
1306 dma_addr_t reply_free_dma;
1307 struct dma_pool *reply_free_dma_pool;
1308 u32 reply_free_host_index;
1309
1310
1311 u16 reply_post_queue_depth;
1312 struct reply_post_struct *reply_post;
1313 u8 rdpq_array_capable;
1314 u8 rdpq_array_enable;
1315 u8 rdpq_array_enable_assigned;
1316 struct dma_pool *reply_post_free_dma_pool;
1317 u8 reply_queue_count;
1318 struct list_head reply_queue_list;
1319
1320 u8 combined_reply_queue;
1321 u8 combined_reply_index_count;
1322
1323 resource_size_t **replyPostRegisterIndex;
1324
1325 struct list_head delayed_tr_list;
1326 struct list_head delayed_tr_volume_list;
1327 struct list_head delayed_sc_list;
1328 struct list_head delayed_event_ack_list;
1329 u8 temp_sensors_count;
1330 struct mutex pci_access_mutex;
1331
1332
1333 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1334 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1335 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1336 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1337 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1338 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1339 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1340 u32 ring_buffer_offset;
1341 u32 ring_buffer_sz;
1342 u8 is_warpdrive;
1343 u8 hide_ir_msg;
1344 u8 mfg_pg10_hide_flag;
1345 u8 hide_drives;
1346 spinlock_t diag_trigger_lock;
1347 u8 diag_trigger_active;
1348 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1349 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1350 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1351 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1352 void *device_remove_in_progress;
1353 u16 device_remove_in_progress_sz;
1354 u8 is_gen35_ioc;
1355 u8 atomic_desc_capable;
1356 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1357 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1358 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1359 PUT_SMID_DEFAULT put_smid_default;
1360 PUT_SMID_DEFAULT put_smid_nvme_encap;
1361
1362};
1363
1364typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1365 u32 reply);
1366
1367
1368
1369extern struct list_head mpt3sas_ioc_list;
1370extern char driver_name[MPT_NAME_LENGTH];
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381extern spinlock_t gioc_lock;
1382
1383void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1384void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1385
1386int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1387void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1388int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1389void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1390int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1391 enum reset_type type);
1392
1393void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1394void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1395__le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1396 u16 smid);
1397void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1398dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1399void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1400
1401
1402u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1403u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1404 struct scsi_cmnd *scmd);
1405
1406u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1407void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1408void mpt3sas_base_initialize_callback_handler(void);
1409u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1410void mpt3sas_base_release_callback_handler(u8 cb_idx);
1411
1412u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1413 u32 reply);
1414u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1415 u8 msix_index, u32 reply);
1416void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1417 u32 phys_addr);
1418
1419u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1420
1421void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1422int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1423 Mpi2SasIoUnitControlReply_t *mpi_reply,
1424 Mpi2SasIoUnitControlRequest_t *mpi_request);
1425int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1426 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1427
1428void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1429 u32 *event_type);
1430
1431void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1432
1433void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1434 u16 device_missing_delay, u8 io_missing_delay);
1435
1436int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1437
1438
1439
1440u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1441 u32 reply);
1442void mpt3sas_scsih_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase);
1443
1444int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1445 uint channel, uint id, uint lun, u8 type, u16 smid_task,
1446 ulong timeout);
1447int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1448 uint channel, uint id, uint lun, u8 type, u16 smid_task,
1449 ulong timeout);
1450
1451void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1452void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1453void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1454void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1455 u64 sas_address);
1456u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1457 u16 smid);
1458
1459struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1460 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1461struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1462 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1463struct _sas_device *mpt3sas_get_sdev_by_addr(
1464 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1465struct _sas_device *__mpt3sas_get_sdev_by_addr(
1466 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1467struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1468 u16 handle);
1469struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1470 u16 handle);
1471
1472void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1473struct _raid_device *
1474mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1475
1476
1477u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1478 u32 reply);
1479int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1480 u8 *num_phys);
1481int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1482 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1483int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1484 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1485 u16 sz);
1486int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1487 Mpi2ConfigReply_t *mpi_reply,
1488 struct Mpi2ManufacturingPage10_t *config_page);
1489
1490int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1491 Mpi2ConfigReply_t *mpi_reply,
1492 struct Mpi2ManufacturingPage11_t *config_page);
1493int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1494 Mpi2ConfigReply_t *mpi_reply,
1495 struct Mpi2ManufacturingPage11_t *config_page);
1496
1497int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1498 *mpi_reply, Mpi2BiosPage2_t *config_page);
1499int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1500 *mpi_reply, Mpi2BiosPage3_t *config_page);
1501int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1502 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1503int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1504 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1505 u32 form, u32 handle);
1506int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1507 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1508 u32 form, u32 handle);
1509int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1510 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1511 u32 form, u32 handle);
1512int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1513 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1514 u32 form, u32 handle);
1515int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1516 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1517 u16 sz);
1518int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1519 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1520int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1521 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1522int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1523 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1524int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1525 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1526int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1527 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1528 u16 sz);
1529int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1530 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1531 u16 sz);
1532int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1533 *mpi_reply, Mpi2IOCPage8_t *config_page);
1534int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1535 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1536 u32 form, u32 handle);
1537int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1538 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1539 u32 phy_number, u16 handle);
1540int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1541 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1542 u32 form, u32 handle);
1543int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1544 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1545int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1546 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1547int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1548 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1549 u32 handle);
1550int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1551 u8 *num_pds);
1552int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1553 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1554 u32 handle, u16 sz);
1555int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1556 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1557 u32 form, u32 form_specific);
1558int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1559 u16 *volume_handle);
1560int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1561 u16 volume_handle, u64 *wwid);
1562
1563
1564extern struct device_attribute *mpt3sas_host_attrs[];
1565extern struct device_attribute *mpt3sas_dev_attrs[];
1566void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1567void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1568u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1569 u32 reply);
1570void mpt3sas_ctl_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase);
1571u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1572 u8 msix_index, u32 reply);
1573void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1574 Mpi2EventNotificationReply_t *mpi_reply);
1575
1576void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1577 u8 bits_to_register);
1578int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1579 u8 *issue_reset);
1580
1581
1582extern struct scsi_transport_template *mpt3sas_transport_template;
1583u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1584 u32 reply);
1585struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1586 u16 handle, u64 sas_address);
1587void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1588 u64 sas_address_parent);
1589int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1590 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1591int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1592 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1593 struct device *parent_dev);
1594void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1595 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1596extern struct sas_function_template mpt3sas_transport_functions;
1597extern struct scsi_transport_template *mpt3sas_transport_template;
1598
1599void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1600 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1601void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1602 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1603void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1604 u32 tigger_bitmask);
1605void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1606 u16 log_entry_qualifier);
1607void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1608 u8 asc, u8 ascq);
1609void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1610 u32 loginfo);
1611
1612
1613u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1614void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1615 struct _raid_device *raid_device);
1616u8
1617mpt3sas_scsi_direct_io_get(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1618void
1619mpt3sas_scsi_direct_io_set(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 direct_io);
1620void
1621mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1622 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request,
1623 u16 smid);
1624
1625
1626bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1627
1628#endif
1629