LXR linux/drivers/staging/rtl8192u/r819xU

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef R819XUSB_CMDPKT_H
   3#define R819XUSB_CMDPKT_H
   4/* Different command packet have dedicated message length and definition. */
   5#define         CMPK_RX_TX_FB_SIZE              sizeof(cmpk_txfb_t)     /* 20 */
   6#define         CMPK_TX_SET_CONFIG_SIZE         sizeof(cmpk_set_cfg_t)  /* 16 */
   7#define         CMPK_BOTH_QUERY_CONFIG_SIZE     sizeof(cmpk_set_cfg_t)  /* 16 */
   8#define         CMPK_RX_TX_STS_SIZE             sizeof(cmpk_tx_status_t)
   9#define         CMPK_RX_DBG_MSG_SIZE            sizeof(cmpk_rx_dbginfo_t)
  10#define         CMPK_TX_RAHIS_SIZE              sizeof(cmpk_tx_rahis_t)
  11
  12/* 2008/05/08 amy For USB constant. */
  13#define ISR_TxBcnOk             BIT(27)         /* Transmit Beacon OK */
  14#define ISR_TxBcnErr            BIT(26)         /* Transmit Beacon Error */
  15#define ISR_BcnTimerIntr        BIT(13)         /* Beacon Timer Interrupt */
  16
  17
  18/* Define element ID of command packet. */
  19
  20/*------------------------------Define structure----------------------------*/
  21/* Define different command packet structure. */
  22/* 1. RX side: TX feedback packet. */
  23typedef struct tag_cmd_pkt_tx_feedback {
  24        /* DWORD 0 */
  25        u8      element_id;                     /* Command packet type. */
  26        u8      length;                         /* Command packet length. */
  27        /* Change tx feedback info field. */
  28        /*------TX Feedback Info Field */
  29        u8      TID:4;
  30        u8      fail_reason:3;
  31        u8      tok:1;                          /* Transmit ok. */
  32        u8      reserve1:4;
  33        u8      pkt_type:2;
  34        u8      bandwidth:1;
  35        u8      qos_pkt:1;
  36
  37        /* DWORD 1 */
  38        u8      reserve2;
  39        /*------TX Feedback Info Field */
  40        u8      retry_cnt;
  41        u16     pkt_id;
  42
  43        /* DWORD 3 */
  44        u16     seq_num;
  45        u8      s_rate;                         /* Start rate. */
  46        u8      f_rate;                         /* Final rate. */
  47
  48        /* DWORD 4 */
  49        u8      s_rts_rate;
  50        u8      f_rts_rate;
  51        u16     pkt_length;
  52
  53        /* DWORD 5 */
  54        u16     reserve3;
  55        u16     duration;
  56} cmpk_txfb_t;
  57
  58/* 2. RX side: Interrupt status packet. It includes Beacon State,
  59 * Beacon Timer Interrupt and other useful informations in MAC ISR Reg.
  60 */
  61typedef struct tag_cmd_pkt_interrupt_status {
  62        u8      element_id;                     /* Command packet type. */
  63        u8      length;                         /* Command packet length. */
  64        u16     reserve;
  65        u32     interrupt_status;               /* Interrupt Status. */
  66} cmpk_intr_sta_t;
  67
  68
  69/* 3. TX side: Set configuration packet. */
  70typedef struct tag_cmd_pkt_set_configuration {
  71        u8      element_id;                     /* Command packet type. */
  72        u8      length;                         /* Command packet length. */
  73        u16     reserve1;
  74        /* Configuration info. */
  75        u8      cfg_reserve1:3;
  76        u8      cfg_size:2;
  77        u8      cfg_type:2;
  78        u8      cfg_action:1;
  79        u8      cfg_reserve2;
  80        u8      cfg_page:4;
  81        u8      cfg_reserve3:4;
  82        u8      cfg_offset;
  83        u32     value;
  84        u32     mask;
  85} cmpk_set_cfg_t;
  86
  87/* 4. Both side : TX/RX query configuraton packet. The query structure is the
  88 *    same as set configuration.
  89 */
  90#define         cmpk_query_cfg_t        cmpk_set_cfg_t
  91
  92/* 5. Multi packet feedback status. */
  93typedef struct tag_tx_stats_feedback {
  94        /* For endian transfer --> Driver will not the same as
  95         *  firmware structure.
  96         */
  97        /* DW 0 */
  98        u16     reserve1;
  99        u8      length;                         /* Command packet length */
 100        u8      element_id;                     /* Command packet type */
 101
 102        /* DW 1 */
 103        u16     txfail;                         /* Tx fail count */
 104        u16     txok;                           /* Tx ok count */
 105
 106        /* DW 2 */
 107        u16     txmcok;                         /* Tx multicast */
 108        u16     txretry;                        /* Tx retry count */
 109
 110        /* DW 3 */
 111        u16     txucok;                         /* Tx unicast */
 112        u16     txbcok;                         /* Tx broadcast */
 113
 114        /* DW 4 */
 115        u16     txbcfail;
 116        u16     txmcfail;
 117
 118        /* DW 5 */
 119        u16     reserve2;
 120        u16     txucfail;
 121
 122        /* DW 6-8 */
 123        u32     txmclength;
 124        u32     txbclength;
 125        u32     txuclength;
 126
 127        /* DW 9 */
 128        u16     reserve3_23;
 129        u8      reserve3_1;
 130        u8      rate;
 131} __packed cmpk_tx_status_t;
 132
 133/* 6. Debug feedback message. */
 134/* Define RX debug message  */
 135typedef struct tag_rx_debug_message_feedback {
 136        /* For endian transfer --> for driver */
 137        /* DW 0 */
 138        u16     reserve1;
 139        u8      length;                         /* Command packet length */
 140        u8      element_id;                     /* Command packet type */
 141
 142        /* DW 1-?? */
 143        /* Variable debug message. */
 144
 145} cmpk_rx_dbginfo_t;
 146
 147/* Define transmit rate history. For big endian format. */
 148typedef struct tag_tx_rate_history {
 149        /* For endian transfer --> for driver */
 150        /* DW 0 */
 151        u8      element_id;                     /* Command packet type */
 152        u8      length;                         /* Command packet length */
 153        u16     reserved1;
 154
 155        /* DW 1-2       CCK rate counter */
 156        u16     cck[4];
 157
 158        /* DW 3-6 */
 159        u16     ofdm[8];
 160
 161        /* DW 7-14      BW=0 SG=0
 162         * DW 15-22     BW=1 SG=0
 163         * DW 23-30     BW=0 SG=1
 164         * DW 31-38     BW=1 SG=1
 165         */
 166        u16     ht_mcs[4][16];
 167
 168} __packed cmpk_tx_rahis_t;
 169
 170typedef enum tag_command_packet_directories {
 171        RX_TX_FEEDBACK                  = 0,
 172        RX_INTERRUPT_STATUS             = 1,
 173        TX_SET_CONFIG                   = 2,
 174        BOTH_QUERY_CONFIG               = 3,
 175        RX_TX_STATUS                    = 4,
 176        RX_DBGINFO_FEEDBACK             = 5,
 177        RX_TX_PER_PKT_FEEDBACK          = 6,
 178        RX_TX_RATE_HISTORY              = 7,
 179        RX_CMD_ELE_MAX
 180} cmpk_element_e;
 181
 182typedef enum _rt_status {
 183        RT_STATUS_SUCCESS,
 184        RT_STATUS_FAILURE,
 185        RT_STATUS_PENDING,
 186        RT_STATUS_RESOURCE
 187} rt_status, *prt_status;
 188
 189u32 cmpk_message_handle_rx(struct net_device *dev,
 190                           struct ieee80211_rx_stats *pstats);
 191rt_status SendTxCommandPacket(struct net_device *dev,
 192                              void *pData, u32 DataLen);
 193
 194
 195#endif
 196