linux/drivers/staging/rtlwifi/phydm/phydm_interface.c
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   1/******************************************************************************
   2 *
   3 * Copyright(c) 2007 - 2016  Realtek Corporation.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * The full GNU General Public License is included in this distribution in the
  15 * file called LICENSE.
  16 *
  17 * Contact Information:
  18 * wlanfae <wlanfae@realtek.com>
  19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20 * Hsinchu 300, Taiwan.
  21 *
  22 * Larry Finger <Larry.Finger@lwfinger.net>
  23 *
  24 *****************************************************************************/
  25
  26/* ************************************************************
  27 * include files
  28 * *************************************************************/
  29
  30#include "mp_precomp.h"
  31#include "phydm_precomp.h"
  32
  33/*
  34 * ODM IO Relative API.
  35 */
  36
  37u8 odm_read_1byte(struct phy_dm_struct *dm, u32 reg_addr)
  38{
  39        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  40
  41        return rtl_read_byte(rtlpriv, reg_addr);
  42}
  43
  44u16 odm_read_2byte(struct phy_dm_struct *dm, u32 reg_addr)
  45{
  46        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  47
  48        return rtl_read_word(rtlpriv, reg_addr);
  49}
  50
  51u32 odm_read_4byte(struct phy_dm_struct *dm, u32 reg_addr)
  52{
  53        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  54
  55        return rtl_read_dword(rtlpriv, reg_addr);
  56}
  57
  58void odm_write_1byte(struct phy_dm_struct *dm, u32 reg_addr, u8 data)
  59{
  60        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  61
  62        rtl_write_byte(rtlpriv, reg_addr, data);
  63}
  64
  65void odm_write_2byte(struct phy_dm_struct *dm, u32 reg_addr, u16 data)
  66{
  67        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  68
  69        rtl_write_word(rtlpriv, reg_addr, data);
  70}
  71
  72void odm_write_4byte(struct phy_dm_struct *dm, u32 reg_addr, u32 data)
  73{
  74        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  75
  76        rtl_write_dword(rtlpriv, reg_addr, data);
  77}
  78
  79void odm_set_mac_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask,
  80                     u32 data)
  81{
  82        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  83
  84        rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
  85}
  86
  87u32 odm_get_mac_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask)
  88{
  89        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  90
  91        return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
  92}
  93
  94void odm_set_bb_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask,
  95                    u32 data)
  96{
  97        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
  98
  99        rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
 100}
 101
 102u32 odm_get_bb_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask)
 103{
 104        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 105
 106        return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
 107}
 108
 109void odm_set_rf_reg(struct phy_dm_struct *dm, enum odm_rf_radio_path e_rf_path,
 110                    u32 reg_addr, u32 bit_mask, u32 data)
 111{
 112        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 113
 114        rtl_set_rfreg(rtlpriv->hw, (enum radio_path)e_rf_path, reg_addr,
 115                      bit_mask, data);
 116}
 117
 118u32 odm_get_rf_reg(struct phy_dm_struct *dm, enum odm_rf_radio_path e_rf_path,
 119                   u32 reg_addr, u32 bit_mask)
 120{
 121        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 122
 123        return rtl_get_rfreg(rtlpriv->hw, (enum radio_path)e_rf_path, reg_addr,
 124                             bit_mask);
 125}
 126
 127/*
 128 * ODM Memory relative API.
 129 */
 130void odm_allocate_memory(struct phy_dm_struct *dm, void **ptr, u32 length)
 131{
 132        *ptr = kmalloc(length, GFP_ATOMIC);
 133}
 134
 135/* length could be ignored, used to detect memory leakage. */
 136void odm_free_memory(struct phy_dm_struct *dm, void *ptr, u32 length)
 137{
 138        kfree(ptr);
 139}
 140
 141void odm_move_memory(struct phy_dm_struct *dm, void *p_dest, void *src,
 142                     u32 length)
 143{
 144        memcpy(p_dest, src, length);
 145}
 146
 147void odm_memory_set(struct phy_dm_struct *dm, void *pbuf, s8 value, u32 length)
 148{
 149        memset(pbuf, value, length);
 150}
 151
 152s32 odm_compare_memory(struct phy_dm_struct *dm, void *p_buf1, void *buf2,
 153                       u32 length)
 154{
 155        return memcmp(p_buf1, buf2, length);
 156}
 157
 158/*
 159 * ODM MISC relative API.
 160 */
 161void odm_acquire_spin_lock(struct phy_dm_struct *dm, enum rt_spinlock_type type)
 162{
 163}
 164
 165void odm_release_spin_lock(struct phy_dm_struct *dm, enum rt_spinlock_type type)
 166{
 167}
 168
 169/*
 170 * ODM Timer relative API.
 171 */
 172void odm_stall_execution(u32 us_delay) { udelay(us_delay); }
 173
 174void ODM_delay_ms(u32 ms) { mdelay(ms); }
 175
 176void ODM_delay_us(u32 us) { udelay(us); }
 177
 178void ODM_sleep_ms(u32 ms) { msleep(ms); }
 179
 180void ODM_sleep_us(u32 us) { usleep_range(us, us + 1); }
 181
 182static u8 phydm_trans_h2c_id(struct phy_dm_struct *dm, u8 phydm_h2c_id)
 183{
 184        u8 platform_h2c_id = phydm_h2c_id;
 185
 186        switch (phydm_h2c_id) {
 187        /* 1 [0] */
 188        case ODM_H2C_RSSI_REPORT:
 189
 190                break;
 191
 192        /* 1 [3] */
 193        case ODM_H2C_WIFI_CALIBRATION:
 194
 195                break;
 196
 197        /* 1 [4] */
 198        case ODM_H2C_IQ_CALIBRATION:
 199
 200                break;
 201        /* 1 [5] */
 202        case ODM_H2C_RA_PARA_ADJUST:
 203
 204                break;
 205
 206        /* 1 [6] */
 207        case PHYDM_H2C_DYNAMIC_TX_PATH:
 208
 209                break;
 210
 211        /* [7]*/
 212        case PHYDM_H2C_FW_TRACE_EN:
 213
 214                platform_h2c_id = 0x49;
 215
 216                break;
 217
 218        case PHYDM_H2C_TXBF:
 219                break;
 220
 221        case PHYDM_H2C_MU:
 222                platform_h2c_id = 0x4a; /*H2C_MU*/
 223                break;
 224
 225        default:
 226                platform_h2c_id = phydm_h2c_id;
 227                break;
 228        }
 229
 230        return platform_h2c_id;
 231}
 232
 233/*ODM FW relative API.*/
 234
 235void odm_fill_h2c_cmd(struct phy_dm_struct *dm, u8 phydm_h2c_id, u32 cmd_len,
 236                      u8 *cmd_buffer)
 237{
 238        struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 239        u8 platform_h2c_id;
 240
 241        platform_h2c_id = phydm_trans_h2c_id(dm, phydm_h2c_id);
 242
 243        ODM_RT_TRACE(dm, PHYDM_COMP_RA_DBG,
 244                     "[H2C]  platform_h2c_id = ((0x%x))\n", platform_h2c_id);
 245
 246        rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, platform_h2c_id, cmd_len,
 247                                        cmd_buffer);
 248}
 249
 250u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len,
 251                             u8 *tmp_buf)
 252{
 253        struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 254        u8 extend_c2h_sub_id = 0;
 255        u8 find_c2h_cmd = true;
 256
 257        switch (c2h_cmd_id) {
 258        case PHYDM_C2H_DBG:
 259                phydm_fw_trace_handler(dm, tmp_buf, c2h_cmd_len);
 260                break;
 261
 262        case PHYDM_C2H_RA_RPT:
 263                phydm_c2h_ra_report_handler(dm, tmp_buf, c2h_cmd_len);
 264                break;
 265
 266        case PHYDM_C2H_RA_PARA_RPT:
 267                odm_c2h_ra_para_report_handler(dm, tmp_buf, c2h_cmd_len);
 268                break;
 269
 270        case PHYDM_C2H_DYNAMIC_TX_PATH_RPT:
 271                break;
 272
 273        case PHYDM_C2H_IQK_FINISH:
 274                break;
 275
 276        case PHYDM_C2H_DBG_CODE:
 277                phydm_fw_trace_handler_code(dm, tmp_buf, c2h_cmd_len);
 278                break;
 279
 280        case PHYDM_C2H_EXTEND:
 281                extend_c2h_sub_id = tmp_buf[0];
 282                if (extend_c2h_sub_id == PHYDM_EXTEND_C2H_DBG_PRINT)
 283                        phydm_fw_trace_handler_8051(dm, tmp_buf, c2h_cmd_len);
 284
 285                break;
 286
 287        default:
 288                find_c2h_cmd = false;
 289                break;
 290        }
 291
 292        return find_c2h_cmd;
 293}
 294
 295u64 odm_get_current_time(struct phy_dm_struct *dm) { return jiffies; }
 296
 297u64 odm_get_progressing_time(struct phy_dm_struct *dm, u64 start_time)
 298{
 299        return jiffies_to_msecs(jiffies - (u32)start_time);
 300}
 301
 302void odm_set_tx_power_index_by_rate_section(struct phy_dm_struct *dm,
 303                                            u8 rf_path, u8 channel,
 304                                            u8 rate_section)
 305{
 306        void *adapter = dm->adapter;
 307
 308        phy_set_tx_power_index_by_rs(adapter, channel, rf_path, rate_section);
 309}
 310
 311u8 odm_get_tx_power_index(struct phy_dm_struct *dm, u8 rf_path, u8 tx_rate,
 312                          u8 band_width, u8 channel)
 313{
 314        void *adapter = dm->adapter;
 315
 316        return phy_get_tx_power_index(adapter, (enum odm_rf_radio_path)rf_path,
 317                                      tx_rate, band_width, channel);
 318}
 319