1/* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * File: desc.h 16 * 17 * Purpose:The header file of descriptor 18 * 19 * Revision History: 20 * 21 * Author: Tevin Chen 22 * 23 * Date: May 21, 1996 24 * 25 */ 26 27#ifndef __DESC_H__ 28#define __DESC_H__ 29 30#include <linux/types.h> 31#include <linux/mm.h> 32#include "linux/ieee80211.h" 33 34#define B_OWNED_BY_CHIP 1 35#define B_OWNED_BY_HOST 0 36 37/* Bits in the RSR register */ 38#define RSR_ADDRBROAD 0x80 39#define RSR_ADDRMULTI 0x40 40#define RSR_ADDRUNI 0x00 41#define RSR_IVLDTYP 0x20 42#define RSR_IVLDLEN 0x10 /* invalid len (> 2312 byte) */ 43#define RSR_BSSIDOK 0x08 44#define RSR_CRCOK 0x04 45#define RSR_BCNSSIDOK 0x02 46#define RSR_ADDROK 0x01 47 48/* Bits in the new RSR register */ 49#define NEWRSR_DECRYPTOK 0x10 50#define NEWRSR_CFPIND 0x08 51#define NEWRSR_HWUTSF 0x04 52#define NEWRSR_BCNHITAID 0x02 53#define NEWRSR_BCNHITAID0 0x01 54 55/* Bits in the TSR0 register */ 56#define TSR0_PWRSTS1_2 0xC0 57#define TSR0_PWRSTS7 0x20 58#define TSR0_NCR 0x1F 59 60/* Bits in the TSR1 register */ 61#define TSR1_TERR 0x80 62#define TSR1_PWRSTS4_6 0x70 63#define TSR1_RETRYTMO 0x08 64#define TSR1_TMO 0x04 65#define TSR1_PWRSTS3 0x02 66#define ACK_DATA 0x01 67 68/* Bits in the TCR register */ 69#define EDMSDU 0x04 /* end of sdu */ 70#define TCR_EDP 0x02 /* end of packet */ 71#define TCR_STP 0x01 /* start of packet */ 72 73/* max transmit or receive buffer size */ 74#define CB_MAX_BUF_SIZE 2900U 75 /* NOTE: must be multiple of 4 */ 76#define CB_MAX_TX_BUF_SIZE CB_MAX_BUF_SIZE 77#define CB_MAX_RX_BUF_SIZE_NORMAL CB_MAX_BUF_SIZE 78 79#define CB_BEACON_BUF_SIZE 512U 80 81#define CB_MAX_RX_DESC 128 82#define CB_MIN_RX_DESC 16 83#define CB_MAX_TX_DESC 64 84#define CB_MIN_TX_DESC 16 85 86#define CB_MAX_RECEIVED_PACKETS 16 87 /* 88 * limit our receive routine to indicating 89 * this many at a time for 2 reasons: 90 * 1. driver flow control to protocol layer 91 * 2. limit the time used in ISR routine 92 */ 93 94#define CB_EXTRA_RD_NUM 32 95#define CB_RD_NUM 32 96#define CB_TD_NUM 32 97 98/* 99 * max number of physical segments in a single NDIS packet. Above this 100 * threshold, the packet is copied into a single physically contiguous buffer 101 */ 102#define CB_MAX_SEGMENT 4 103 104#define CB_MIN_MAP_REG_NUM 4 105#define CB_MAX_MAP_REG_NUM CB_MAX_TX_DESC 106 107#define CB_PROTOCOL_RESERVED_SECTION 16 108 109/* 110 * if retrys excess 15 times , tx will abort, and if tx fifo underflow, 111 * tx will fail, we should try to resend it 112 */ 113#define CB_MAX_TX_ABORT_RETRY 3 114 115/* WMAC definition FIFO Control */ 116#define FIFOCTL_AUTO_FB_1 0x1000 117#define FIFOCTL_AUTO_FB_0 0x0800 118#define FIFOCTL_GRPACK 0x0400 119#define FIFOCTL_11GA 0x0300 120#define FIFOCTL_11GB 0x0200 121#define FIFOCTL_11B 0x0100 122#define FIFOCTL_11A 0x0000 123#define FIFOCTL_RTS 0x0080 124#define FIFOCTL_ISDMA0 0x0040 125#define FIFOCTL_GENINT 0x0020 126#define FIFOCTL_TMOEN 0x0010 127#define FIFOCTL_LRETRY 0x0008 128#define FIFOCTL_CRCDIS 0x0004 129#define FIFOCTL_NEEDACK 0x0002 130#define FIFOCTL_LHEAD 0x0001 131 132/* WMAC definition Frag Control */ 133#define FRAGCTL_AES 0x0300 134#define FRAGCTL_TKIP 0x0200 135#define FRAGCTL_LEGACY 0x0100 136#define FRAGCTL_NONENCRYPT 0x0000 137#define FRAGCTL_ENDFRAG 0x0003 138#define FRAGCTL_MIDFRAG 0x0002 139#define FRAGCTL_STAFRAG 0x0001 140#define FRAGCTL_NONFRAG 0x0000 141 142#define TYPE_TXDMA0 0 143#define TYPE_AC0DMA 1 144#define TYPE_ATIMDMA 2 145#define TYPE_SYNCDMA 3 146#define TYPE_MAXTD 2 147 148#define TYPE_BEACONDMA 4 149 150#define TYPE_RXDMA0 0 151#define TYPE_RXDMA1 1 152#define TYPE_MAXRD 2 153 154/* TD_INFO flags control bit */ 155#define TD_FLAGS_NETIF_SKB 0x01 /* check if need release skb */ 156/* check if called from private skb (hostap) */ 157#define TD_FLAGS_PRIV_SKB 0x02 158#define TD_FLAGS_PS_RETRY 0x04 /* check if PS STA frame re-transmit */ 159 160/* 161 * ref_sk_buff is used for mapping the skb structure between pre-built 162 * driver-obj & running kernel. Since different kernel version (2.4x) may 163 * change skb structure, i.e. pre-built driver-obj may link to older skb that 164 * leads error. 165 */ 166 167struct vnt_rd_info { 168 struct sk_buff *skb; 169 dma_addr_t skb_dma; 170}; 171 172struct vnt_rdes0 { 173 volatile __le16 res_count; 174#ifdef __BIG_ENDIAN 175 union { 176 volatile u16 f15_reserved; 177 struct { 178 volatile u8 f8_reserved1; 179 volatile u8 owner:1; 180 volatile u8 f7_reserved:7; 181 } __packed; 182 } __packed; 183#else 184 u16 f15_reserved:15; 185 u16 owner:1; 186#endif 187} __packed; 188 189struct vnt_rdes1 { 190 __le16 req_count; 191 u16 reserved; 192} __packed; 193 194/* Rx descriptor*/ 195struct vnt_rx_desc { 196 volatile struct vnt_rdes0 rd0; 197 volatile struct vnt_rdes1 rd1; 198 volatile __le32 buff_addr; 199 volatile __le32 next_desc; 200 struct vnt_rx_desc *next __aligned(8); 201 struct vnt_rd_info *rd_info __aligned(8); 202} __packed; 203 204struct vnt_tdes0 { 205 volatile u8 tsr0; 206 volatile u8 tsr1; 207#ifdef __BIG_ENDIAN 208 union { 209 volatile u16 f15_txtime; 210 struct { 211 volatile u8 f8_reserved; 212 volatile u8 owner:1; 213 volatile u8 f7_reserved:7; 214 } __packed; 215 } __packed; 216#else 217 volatile u16 f15_txtime:15; 218 volatile u16 owner:1; 219#endif 220} __packed; 221 222struct vnt_tdes1 { 223 volatile __le16 req_count; 224 volatile u8 tcr; 225 volatile u8 reserved; 226} __packed; 227 228struct vnt_td_info { 229 void *mic_hdr; 230 struct sk_buff *skb; 231 unsigned char *buf; 232 dma_addr_t buf_dma; 233 u16 req_count; 234 u8 flags; 235}; 236 237/* transmit descriptor */ 238struct vnt_tx_desc { 239 volatile struct vnt_tdes0 td0; 240 volatile struct vnt_tdes1 td1; 241 volatile __le32 buff_addr; 242 volatile __le32 next_desc; 243 struct vnt_tx_desc *next __aligned(8); 244 struct vnt_td_info *td_info __aligned(8); 245} __packed; 246 247/* Length, Service, and Signal fields of Phy for Tx */ 248struct vnt_phy_field { 249 u8 signal; 250 u8 service; 251 __le16 len; 252} __packed; 253 254union vnt_phy_field_swap { 255 struct vnt_phy_field field_read; 256 u16 swap[2]; 257 u32 field_write; 258}; 259 260#endif /* __DESC_H__ */ 261