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39#include "device.h"
40#include "card.h"
41#include "baseband.h"
42#include "mac.h"
43#include "desc.h"
44#include "rf.h"
45#include "power.h"
46#include "key.h"
47#include "usbpipe.h"
48
49
50
51
52
53static const u16 cw_rxbcntsf_off[MAX_RATE] = {
54 192, 96, 34, 17, 34, 23, 17, 11, 8, 5, 4, 3
55};
56
57
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59
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61
62
63
64
65
66
67void vnt_set_channel(struct vnt_private *priv, u32 connection_channel)
68{
69 if (connection_channel > CB_MAX_CHANNEL || !connection_channel)
70 return;
71
72
73 vnt_mac_reg_bits_on(priv, MAC_REG_MACCR, MACCR_CLRNAV);
74
75
76 vnt_mac_reg_bits_off(priv, MAC_REG_CHANNEL, 0xb0);
77
78 vnt_control_out(priv, MESSAGE_TYPE_SELECT_CHANNEL,
79 connection_channel, 0, 0, NULL);
80
81 vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG, MAC_REG_CHANNEL,
82 (u8)(connection_channel | 0x80));
83}
84
85
86
87
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89
90
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96
97
98static u16 vnt_get_cck_rate(struct vnt_private *priv, u16 rate_idx)
99{
100 u16 ui = rate_idx;
101
102 while (ui > RATE_1M) {
103 if (priv->basic_rates & (1 << ui))
104 return ui;
105 ui--;
106 }
107
108 return RATE_1M;
109}
110
111
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123
124static u16 vnt_get_ofdm_rate(struct vnt_private *priv, u16 rate_idx)
125{
126 u16 ui = rate_idx;
127
128 dev_dbg(&priv->usb->dev, "%s basic rate: %d\n",
129 __func__, priv->basic_rates);
130
131 if (!vnt_ofdm_min_rate(priv)) {
132 dev_dbg(&priv->usb->dev, "%s (NO OFDM) %d\n",
133 __func__, rate_idx);
134 if (rate_idx > RATE_24M)
135 rate_idx = RATE_24M;
136 return rate_idx;
137 }
138
139 while (ui > RATE_11M) {
140 if (priv->basic_rates & (1 << ui)) {
141 dev_dbg(&priv->usb->dev, "%s rate: %d\n",
142 __func__, ui);
143 return ui;
144 }
145 ui--;
146 }
147
148 dev_dbg(&priv->usb->dev, "%s basic rate: 24M\n", __func__);
149
150 return RATE_24M;
151}
152
153
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165
166
167static void vnt_calculate_ofdm_rate(u16 rate, u8 bb_type,
168 u8 *tx_rate, u8 *rsv_time)
169{
170 switch (rate) {
171 case RATE_6M:
172 if (bb_type == BB_TYPE_11A) {
173 *tx_rate = 0x9b;
174 *rsv_time = 24;
175 } else {
176 *tx_rate = 0x8b;
177 *rsv_time = 30;
178 }
179 break;
180 case RATE_9M:
181 if (bb_type == BB_TYPE_11A) {
182 *tx_rate = 0x9f;
183 *rsv_time = 16;
184 } else {
185 *tx_rate = 0x8f;
186 *rsv_time = 22;
187 }
188 break;
189 case RATE_12M:
190 if (bb_type == BB_TYPE_11A) {
191 *tx_rate = 0x9a;
192 *rsv_time = 12;
193 } else {
194 *tx_rate = 0x8a;
195 *rsv_time = 18;
196 }
197 break;
198 case RATE_18M:
199 if (bb_type == BB_TYPE_11A) {
200 *tx_rate = 0x9e;
201 *rsv_time = 8;
202 } else {
203 *tx_rate = 0x8e;
204 *rsv_time = 14;
205 }
206 break;
207 case RATE_36M:
208 if (bb_type == BB_TYPE_11A) {
209 *tx_rate = 0x9d;
210 *rsv_time = 4;
211 } else {
212 *tx_rate = 0x8d;
213 *rsv_time = 10;
214 }
215 break;
216 case RATE_48M:
217 if (bb_type == BB_TYPE_11A) {
218 *tx_rate = 0x98;
219 *rsv_time = 4;
220 } else {
221 *tx_rate = 0x88;
222 *rsv_time = 10;
223 }
224 break;
225 case RATE_54M:
226 if (bb_type == BB_TYPE_11A) {
227 *tx_rate = 0x9c;
228 *rsv_time = 4;
229 } else {
230 *tx_rate = 0x8c;
231 *rsv_time = 10;
232 }
233 break;
234 case RATE_24M:
235 default:
236 if (bb_type == BB_TYPE_11A) {
237 *tx_rate = 0x99;
238 *rsv_time = 8;
239 } else {
240 *tx_rate = 0x89;
241 *rsv_time = 14;
242 }
243 break;
244 }
245}
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259
260void vnt_set_rspinf(struct vnt_private *priv, u8 bb_type)
261{
262 struct vnt_phy_field phy[4];
263 u8 tx_rate[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
264 u8 rsv_time[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
265 u8 data[34];
266 int i;
267
268
269 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_1M),
270 PK_TYPE_11B, &phy[0]);
271
272
273 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_2M),
274 PK_TYPE_11B, &phy[1]);
275
276
277 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_5M),
278 PK_TYPE_11B, &phy[2]);
279
280
281 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_11M),
282 PK_TYPE_11B, &phy[3]);
283
284
285 vnt_calculate_ofdm_rate(RATE_6M, bb_type, &tx_rate[0], &rsv_time[0]);
286
287
288 vnt_calculate_ofdm_rate(RATE_9M, bb_type, &tx_rate[1], &rsv_time[1]);
289
290
291 vnt_calculate_ofdm_rate(RATE_12M, bb_type, &tx_rate[2], &rsv_time[2]);
292
293
294 vnt_calculate_ofdm_rate(RATE_18M, bb_type, &tx_rate[3], &rsv_time[3]);
295
296
297 vnt_calculate_ofdm_rate(RATE_24M, bb_type, &tx_rate[4], &rsv_time[4]);
298
299
300 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_36M),
301 bb_type, &tx_rate[5], &rsv_time[5]);
302
303
304 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_48M),
305 bb_type, &tx_rate[6], &rsv_time[6]);
306
307
308 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_54M),
309 bb_type, &tx_rate[7], &rsv_time[7]);
310
311
312 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_54M),
313 bb_type, &tx_rate[8], &rsv_time[8]);
314
315 put_unaligned(phy[0].len, (u16 *)&data[0]);
316 data[2] = phy[0].signal;
317 data[3] = phy[0].service;
318
319 put_unaligned(phy[1].len, (u16 *)&data[4]);
320 data[6] = phy[1].signal;
321 data[7] = phy[1].service;
322
323 put_unaligned(phy[2].len, (u16 *)&data[8]);
324 data[10] = phy[2].signal;
325 data[11] = phy[2].service;
326
327 put_unaligned(phy[3].len, (u16 *)&data[12]);
328 data[14] = phy[3].signal;
329 data[15] = phy[3].service;
330
331 for (i = 0; i < 9; i++) {
332 data[16 + i * 2] = tx_rate[i];
333 data[16 + i * 2 + 1] = rsv_time[i];
334 }
335
336 vnt_control_out(priv, MESSAGE_TYPE_WRITE, MAC_REG_RSPINF_B_1,
337 MESSAGE_REQUEST_MACREG, 34, &data[0]);
338}
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351
352void vnt_update_ifs(struct vnt_private *priv)
353{
354 u8 max_min = 0;
355 u8 data[4];
356
357 if (priv->packet_type == PK_TYPE_11A) {
358 priv->slot = C_SLOT_SHORT;
359 priv->sifs = C_SIFS_A;
360 priv->difs = C_SIFS_A + 2 * C_SLOT_SHORT;
361 max_min = 4;
362 } else {
363 priv->sifs = C_SIFS_BG;
364
365 if (priv->short_slot_time) {
366 priv->slot = C_SLOT_SHORT;
367 max_min = 4;
368 } else {
369 priv->slot = C_SLOT_LONG;
370 max_min = 5;
371 }
372
373 priv->difs = C_SIFS_BG + 2 * priv->slot;
374 }
375
376 priv->eifs = C_EIFS;
377
378 switch (priv->rf_type) {
379 case RF_VT3226D0:
380 if (priv->bb_type != BB_TYPE_11B) {
381 priv->sifs -= 1;
382 priv->difs -= 1;
383 break;
384 }
385
386 case RF_AIROHA7230:
387 case RF_AL2230:
388 case RF_AL2230S:
389 if (priv->bb_type != BB_TYPE_11B)
390 break;
391
392 case RF_RFMD2959:
393 case RF_VT3226:
394 case RF_VT3342A0:
395 priv->sifs -= 3;
396 priv->difs -= 3;
397 break;
398 case RF_MAXIM2829:
399 if (priv->bb_type == BB_TYPE_11A) {
400 priv->sifs -= 5;
401 priv->difs -= 5;
402 } else {
403 priv->sifs -= 2;
404 priv->difs -= 2;
405 }
406
407 break;
408 }
409
410 data[0] = (u8)priv->sifs;
411 data[1] = (u8)priv->difs;
412 data[2] = (u8)priv->eifs;
413 data[3] = (u8)priv->slot;
414
415 vnt_control_out(priv, MESSAGE_TYPE_WRITE, MAC_REG_SIFS,
416 MESSAGE_REQUEST_MACREG, 4, &data[0]);
417
418 max_min |= 0xa0;
419
420 vnt_control_out(priv, MESSAGE_TYPE_WRITE, MAC_REG_CWMAXMIN0,
421 MESSAGE_REQUEST_MACREG, 1, &max_min);
422}
423
424void vnt_update_top_rates(struct vnt_private *priv)
425{
426 u8 top_ofdm = RATE_24M, top_cck = RATE_1M;
427 u8 i;
428
429
430 for (i = RATE_54M; i >= RATE_6M; i--) {
431 if (priv->basic_rates & (u16)(1 << i)) {
432 top_ofdm = i;
433 break;
434 }
435 }
436
437 priv->top_ofdm_basic_rate = top_ofdm;
438
439 for (i = RATE_11M;; i--) {
440 if (priv->basic_rates & (u16)(1 << i)) {
441 top_cck = i;
442 break;
443 }
444 if (i == RATE_1M)
445 break;
446 }
447
448 priv->top_cck_basic_rate = top_cck;
449}
450
451int vnt_ofdm_min_rate(struct vnt_private *priv)
452{
453 int ii;
454
455 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
456 if ((priv->basic_rates) & ((u16)BIT(ii)))
457 return true;
458 }
459
460 return false;
461}
462
463u8 vnt_get_pkt_type(struct vnt_private *priv)
464{
465 if (priv->bb_type == BB_TYPE_11A || priv->bb_type == BB_TYPE_11B)
466 return (u8)priv->bb_type;
467 else if (vnt_ofdm_min_rate(priv))
468 return PK_TYPE_11GA;
469 return PK_TYPE_11GB;
470}
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487u64 vnt_get_tsf_offset(u8 rx_rate, u64 tsf1, u64 tsf2)
488{
489 return tsf1 - tsf2 - (u64)cw_rxbcntsf_off[rx_rate % MAX_RATE];
490}
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507void vnt_adjust_tsf(struct vnt_private *priv, u8 rx_rate,
508 u64 time_stamp, u64 local_tsf)
509{
510 u64 tsf_offset = 0;
511 u8 data[8];
512
513 tsf_offset = vnt_get_tsf_offset(rx_rate, time_stamp, local_tsf);
514
515 data[0] = (u8)tsf_offset;
516 data[1] = (u8)(tsf_offset >> 8);
517 data[2] = (u8)(tsf_offset >> 16);
518 data[3] = (u8)(tsf_offset >> 24);
519 data[4] = (u8)(tsf_offset >> 32);
520 data[5] = (u8)(tsf_offset >> 40);
521 data[6] = (u8)(tsf_offset >> 48);
522 data[7] = (u8)(tsf_offset >> 56);
523
524 vnt_control_out(priv, MESSAGE_TYPE_SET_TSFTBTT,
525 MESSAGE_REQUEST_TSF, 0, 8, data);
526}
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541bool vnt_get_current_tsf(struct vnt_private *priv, u64 *current_tsf)
542{
543 *current_tsf = priv->current_tsf;
544
545 return true;
546}
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559bool vnt_clear_current_tsf(struct vnt_private *priv)
560{
561 vnt_mac_reg_bits_on(priv, MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
562
563 priv->current_tsf = 0;
564
565 return true;
566}
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581
582u64 vnt_get_next_tbtt(u64 tsf, u16 beacon_interval)
583{
584 u32 beacon_int;
585
586 beacon_int = beacon_interval * 1024;
587
588
589
590
591 if (beacon_int) {
592 do_div(tsf, beacon_int);
593 tsf += 1;
594 tsf *= beacon_int;
595 }
596
597 return tsf;
598}
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614void vnt_reset_next_tbtt(struct vnt_private *priv, u16 beacon_interval)
615{
616 u64 next_tbtt = 0;
617 u8 data[8];
618
619 vnt_clear_current_tsf(priv);
620
621 next_tbtt = vnt_get_next_tbtt(next_tbtt, beacon_interval);
622
623 data[0] = (u8)next_tbtt;
624 data[1] = (u8)(next_tbtt >> 8);
625 data[2] = (u8)(next_tbtt >> 16);
626 data[3] = (u8)(next_tbtt >> 24);
627 data[4] = (u8)(next_tbtt >> 32);
628 data[5] = (u8)(next_tbtt >> 40);
629 data[6] = (u8)(next_tbtt >> 48);
630 data[7] = (u8)(next_tbtt >> 56);
631
632 vnt_control_out(priv, MESSAGE_TYPE_SET_TSFTBTT,
633 MESSAGE_REQUEST_TBTT, 0, 8, data);
634}
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650
651void vnt_update_next_tbtt(struct vnt_private *priv, u64 tsf,
652 u16 beacon_interval)
653{
654 u8 data[8];
655
656 tsf = vnt_get_next_tbtt(tsf, beacon_interval);
657
658 data[0] = (u8)tsf;
659 data[1] = (u8)(tsf >> 8);
660 data[2] = (u8)(tsf >> 16);
661 data[3] = (u8)(tsf >> 24);
662 data[4] = (u8)(tsf >> 32);
663 data[5] = (u8)(tsf >> 40);
664 data[6] = (u8)(tsf >> 48);
665 data[7] = (u8)(tsf >> 56);
666
667 vnt_control_out(priv, MESSAGE_TYPE_SET_TSFTBTT,
668 MESSAGE_REQUEST_TBTT, 0, 8, data);
669
670 dev_dbg(&priv->usb->dev, "%s TBTT: %8llx\n", __func__, tsf);
671}
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684
685int vnt_radio_power_off(struct vnt_private *priv)
686{
687 int ret = true;
688
689 switch (priv->rf_type) {
690 case RF_AL2230:
691 case RF_AL2230S:
692 case RF_AIROHA7230:
693 case RF_VT3226:
694 case RF_VT3226D0:
695 case RF_VT3342A0:
696 vnt_mac_reg_bits_off(priv, MAC_REG_SOFTPWRCTL,
697 (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3));
698 break;
699 }
700
701 vnt_mac_reg_bits_off(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
702
703 vnt_set_deep_sleep(priv);
704
705 vnt_mac_reg_bits_on(priv, MAC_REG_GPIOCTL1, GPIO3_INTMD);
706
707 return ret;
708}
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719
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721
722int vnt_radio_power_on(struct vnt_private *priv)
723{
724 int ret = true;
725
726 vnt_exit_deep_sleep(priv);
727
728 vnt_mac_reg_bits_on(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
729
730 switch (priv->rf_type) {
731 case RF_AL2230:
732 case RF_AL2230S:
733 case RF_AIROHA7230:
734 case RF_VT3226:
735 case RF_VT3226D0:
736 case RF_VT3342A0:
737 vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL,
738 (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3));
739 break;
740 }
741
742 vnt_mac_reg_bits_off(priv, MAC_REG_GPIOCTL1, GPIO3_INTMD);
743
744 return ret;
745}
746
747void vnt_set_bss_mode(struct vnt_private *priv)
748{
749 if (priv->rf_type == RF_AIROHA7230 && priv->bb_type == BB_TYPE_11A)
750 vnt_mac_set_bb_type(priv, BB_TYPE_11G);
751 else
752 vnt_mac_set_bb_type(priv, priv->bb_type);
753
754 priv->packet_type = vnt_get_pkt_type(priv);
755
756 if (priv->bb_type == BB_TYPE_11A)
757 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x03);
758 else if (priv->bb_type == BB_TYPE_11B)
759 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x02);
760 else if (priv->bb_type == BB_TYPE_11G)
761 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x08);
762
763 vnt_update_ifs(priv);
764 vnt_set_rspinf(priv, (u8)priv->bb_type);
765
766 if (priv->bb_type == BB_TYPE_11A) {
767 if (priv->rf_type == RF_AIROHA7230) {
768 priv->bb_vga[0] = 0x20;
769
770 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
771 0xe7, priv->bb_vga[0]);
772 }
773
774 priv->bb_vga[2] = 0x10;
775 priv->bb_vga[3] = 0x10;
776 } else {
777 if (priv->rf_type == RF_AIROHA7230) {
778 priv->bb_vga[0] = 0x1c;
779
780 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
781 0xe7, priv->bb_vga[0]);
782 }
783
784 priv->bb_vga[2] = 0x0;
785 priv->bb_vga[3] = 0x0;
786 }
787
788 vnt_set_vga_gain_offset(priv, priv->bb_vga[0]);
789}
790