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15
16#undef VERBOSE
17
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/ioport.h>
21#include <linux/types.h>
22#include <linux/errno.h>
23#include <linux/err.h>
24#include <linux/slab.h>
25#include <linux/init.h>
26#include <linux/list.h>
27#include <linux/interrupt.h>
28#include <linux/proc_fs.h>
29#include <linux/mm.h>
30#include <linux/moduleparam.h>
31#include <linux/device.h>
32#include <linux/usb/ch9.h>
33#include <linux/usb/gadget.h>
34#include <linux/usb/otg.h>
35#include <linux/dma-mapping.h>
36#include <linux/platform_device.h>
37#include <linux/fsl_devices.h>
38#include <linux/dmapool.h>
39#include <linux/delay.h>
40#include <linux/of_device.h>
41
42#include <asm/byteorder.h>
43#include <asm/io.h>
44#include <asm/unaligned.h>
45#include <asm/dma.h>
46
47#include "fsl_usb2_udc.h"
48
49#define DRIVER_DESC "Freescale High-Speed USB SOC Device Controller driver"
50#define DRIVER_AUTHOR "Li Yang/Jiang Bo"
51#define DRIVER_VERSION "Apr 20, 2007"
52
53#define DMA_ADDR_INVALID (~(dma_addr_t)0)
54
55static const char driver_name[] = "fsl-usb2-udc";
56static const char driver_desc[] = DRIVER_DESC;
57
58static struct usb_dr_device __iomem *dr_regs;
59
60static struct usb_sys_interface __iomem *usb_sys_regs;
61
62
63static struct fsl_udc *udc_controller = NULL;
64
65static const struct usb_endpoint_descriptor
66fsl_ep0_desc = {
67 .bLength = USB_DT_ENDPOINT_SIZE,
68 .bDescriptorType = USB_DT_ENDPOINT,
69 .bEndpointAddress = 0,
70 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
71 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
72};
73
74static void fsl_ep_fifo_flush(struct usb_ep *_ep);
75
76#ifdef CONFIG_PPC32
77
78
79
80
81
82
83
84
85
86
87
88
89
90static u32 _fsl_readl_be(const unsigned __iomem *p)
91{
92 return in_be32(p);
93}
94
95static u32 _fsl_readl_le(const unsigned __iomem *p)
96{
97 return in_le32(p);
98}
99
100static void _fsl_writel_be(u32 v, unsigned __iomem *p)
101{
102 out_be32(p, v);
103}
104
105static void _fsl_writel_le(u32 v, unsigned __iomem *p)
106{
107 out_le32(p, v);
108}
109
110static u32 (*_fsl_readl)(const unsigned __iomem *p);
111static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
112
113#define fsl_readl(p) (*_fsl_readl)((p))
114#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
115
116static inline void fsl_set_accessors(struct fsl_usb2_platform_data *pdata)
117{
118 if (pdata->big_endian_mmio) {
119 _fsl_readl = _fsl_readl_be;
120 _fsl_writel = _fsl_writel_be;
121 } else {
122 _fsl_readl = _fsl_readl_le;
123 _fsl_writel = _fsl_writel_le;
124 }
125}
126
127static inline u32 cpu_to_hc32(const u32 x)
128{
129 return udc_controller->pdata->big_endian_desc
130 ? (__force u32)cpu_to_be32(x)
131 : (__force u32)cpu_to_le32(x);
132}
133
134static inline u32 hc32_to_cpu(const u32 x)
135{
136 return udc_controller->pdata->big_endian_desc
137 ? be32_to_cpu((__force __be32)x)
138 : le32_to_cpu((__force __le32)x);
139}
140#else
141static inline void fsl_set_accessors(struct fsl_usb2_platform_data *pdata) {}
142
143#define fsl_readl(addr) readl(addr)
144#define fsl_writel(val32, addr) writel(val32, addr)
145#define cpu_to_hc32(x) cpu_to_le32(x)
146#define hc32_to_cpu(x) le32_to_cpu(x)
147#endif
148
149
150
151
152
153
154
155
156
157static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
158__releases(ep->udc->lock)
159__acquires(ep->udc->lock)
160{
161 struct fsl_udc *udc = NULL;
162 unsigned char stopped = ep->stopped;
163 struct ep_td_struct *curr_td, *next_td;
164 int j;
165
166 udc = (struct fsl_udc *)ep->udc;
167
168 list_del_init(&req->queue);
169
170
171 if (req->req.status == -EINPROGRESS)
172 req->req.status = status;
173 else
174 status = req->req.status;
175
176
177 next_td = req->head;
178 for (j = 0; j < req->dtd_count; j++) {
179 curr_td = next_td;
180 if (j != req->dtd_count - 1) {
181 next_td = curr_td->next_td_virt;
182 }
183 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
184 }
185
186 usb_gadget_unmap_request(&ep->udc->gadget, &req->req, ep_is_in(ep));
187
188 if (status && (status != -ESHUTDOWN))
189 VDBG("complete %s req %p stat %d len %u/%u",
190 ep->ep.name, &req->req, status,
191 req->req.actual, req->req.length);
192
193 ep->stopped = 1;
194
195 spin_unlock(&ep->udc->lock);
196
197 usb_gadget_giveback_request(&ep->ep, &req->req);
198
199 spin_lock(&ep->udc->lock);
200 ep->stopped = stopped;
201}
202
203
204
205
206
207static void nuke(struct fsl_ep *ep, int status)
208{
209 ep->stopped = 1;
210
211
212 fsl_ep_fifo_flush(&ep->ep);
213
214
215 while (!list_empty(&ep->queue)) {
216 struct fsl_req *req = NULL;
217
218 req = list_entry(ep->queue.next, struct fsl_req, queue);
219 done(ep, req, status);
220 }
221}
222
223
224
225
226
227static int dr_controller_setup(struct fsl_udc *udc)
228{
229 unsigned int tmp, portctrl, ep_num;
230 unsigned int max_no_of_ep;
231 unsigned int ctrl;
232 unsigned long timeout;
233
234#define FSL_UDC_RESET_TIMEOUT 1000
235
236
237 portctrl = fsl_readl(&dr_regs->portsc1);
238 portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
239 switch (udc->phy_mode) {
240 case FSL_USB2_PHY_ULPI:
241 if (udc->pdata->have_sysif_regs) {
242 if (udc->pdata->controller_ver) {
243
244 ctrl = __raw_readl(&usb_sys_regs->control);
245 ctrl &= ~USB_CTRL_UTMI_PHY_EN;
246 ctrl |= USB_CTRL_USB_EN;
247 __raw_writel(ctrl, &usb_sys_regs->control);
248 }
249 }
250 portctrl |= PORTSCX_PTS_ULPI;
251 break;
252 case FSL_USB2_PHY_UTMI_WIDE:
253 portctrl |= PORTSCX_PTW_16BIT;
254
255 case FSL_USB2_PHY_UTMI:
256 if (udc->pdata->have_sysif_regs) {
257 if (udc->pdata->controller_ver) {
258
259 ctrl = __raw_readl(&usb_sys_regs->control);
260 ctrl |= (USB_CTRL_UTMI_PHY_EN |
261 USB_CTRL_USB_EN);
262 __raw_writel(ctrl, &usb_sys_regs->control);
263 mdelay(FSL_UTMI_PHY_DLY);
264
265 }
266 }
267 portctrl |= PORTSCX_PTS_UTMI;
268 break;
269 case FSL_USB2_PHY_SERIAL:
270 portctrl |= PORTSCX_PTS_FSLS;
271 break;
272 default:
273 return -EINVAL;
274 }
275 fsl_writel(portctrl, &dr_regs->portsc1);
276
277
278 tmp = fsl_readl(&dr_regs->usbcmd);
279 tmp &= ~USB_CMD_RUN_STOP;
280 fsl_writel(tmp, &dr_regs->usbcmd);
281
282 tmp = fsl_readl(&dr_regs->usbcmd);
283 tmp |= USB_CMD_CTRL_RESET;
284 fsl_writel(tmp, &dr_regs->usbcmd);
285
286
287 timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
288 while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
289 if (time_after(jiffies, timeout)) {
290 ERR("udc reset timeout!\n");
291 return -ETIMEDOUT;
292 }
293 cpu_relax();
294 }
295
296
297 tmp = fsl_readl(&dr_regs->usbmode);
298 tmp &= ~USB_MODE_CTRL_MODE_MASK;
299 tmp |= USB_MODE_CTRL_MODE_DEVICE;
300
301 tmp |= USB_MODE_SETUP_LOCK_OFF;
302 if (udc->pdata->es)
303 tmp |= USB_MODE_ES;
304 fsl_writel(tmp, &dr_regs->usbmode);
305
306
307 fsl_writel(0, &dr_regs->usbsts);
308
309 tmp = udc->ep_qh_dma;
310 tmp &= USB_EP_LIST_ADDRESS_MASK;
311 fsl_writel(tmp, &dr_regs->endpointlistaddr);
312
313 VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
314 udc->ep_qh, (int)tmp,
315 fsl_readl(&dr_regs->endpointlistaddr));
316
317 max_no_of_ep = (0x0000001F & fsl_readl(&dr_regs->dccparams));
318 for (ep_num = 1; ep_num < max_no_of_ep; ep_num++) {
319 tmp = fsl_readl(&dr_regs->endptctrl[ep_num]);
320 tmp &= ~(EPCTRL_TX_TYPE | EPCTRL_RX_TYPE);
321 tmp |= (EPCTRL_EP_TYPE_BULK << EPCTRL_TX_EP_TYPE_SHIFT)
322 | (EPCTRL_EP_TYPE_BULK << EPCTRL_RX_EP_TYPE_SHIFT);
323 fsl_writel(tmp, &dr_regs->endptctrl[ep_num]);
324 }
325
326#ifndef CONFIG_ARCH_MXC
327 if (udc->pdata->have_sysif_regs) {
328 ctrl = __raw_readl(&usb_sys_regs->control);
329 ctrl |= USB_CTRL_IOENB;
330 __raw_writel(ctrl, &usb_sys_regs->control);
331 }
332#endif
333
334#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
335
336
337
338 if (udc->pdata->have_sysif_regs) {
339
340 tmp = SNOOP_SIZE_2GB;
341 __raw_writel(tmp, &usb_sys_regs->snoop1);
342 tmp |= 0x80000000;
343 __raw_writel(tmp, &usb_sys_regs->snoop2);
344 }
345#endif
346
347 return 0;
348}
349
350
351static void dr_controller_run(struct fsl_udc *udc)
352{
353 u32 temp;
354
355
356 temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
357 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
358 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
359
360 fsl_writel(temp, &dr_regs->usbintr);
361
362
363 udc->stopped = 0;
364
365
366 temp = fsl_readl(&dr_regs->usbmode);
367 temp |= USB_MODE_CTRL_MODE_DEVICE;
368 fsl_writel(temp, &dr_regs->usbmode);
369
370
371 temp = fsl_readl(&dr_regs->usbcmd);
372 temp |= USB_CMD_RUN_STOP;
373 fsl_writel(temp, &dr_regs->usbcmd);
374}
375
376static void dr_controller_stop(struct fsl_udc *udc)
377{
378 unsigned int tmp;
379
380 pr_debug("%s\n", __func__);
381
382
383
384
385
386 if (udc->gadget.is_otg) {
387 if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) {
388 pr_debug("udc: Leaving early\n");
389 return;
390 }
391 }
392
393
394 fsl_writel(0, &dr_regs->usbintr);
395
396
397 udc->stopped = 1;
398
399
400
401
402
403 tmp = fsl_readl(&dr_regs->usbcmd);
404 tmp &= ~USB_CMD_RUN_STOP;
405 fsl_writel(tmp, &dr_regs->usbcmd);
406}
407
408static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
409 unsigned char ep_type)
410{
411 unsigned int tmp_epctrl = 0;
412
413 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
414 if (dir) {
415 if (ep_num)
416 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
417 tmp_epctrl |= EPCTRL_TX_ENABLE;
418 tmp_epctrl &= ~EPCTRL_TX_TYPE;
419 tmp_epctrl |= ((unsigned int)(ep_type)
420 << EPCTRL_TX_EP_TYPE_SHIFT);
421 } else {
422 if (ep_num)
423 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
424 tmp_epctrl |= EPCTRL_RX_ENABLE;
425 tmp_epctrl &= ~EPCTRL_RX_TYPE;
426 tmp_epctrl |= ((unsigned int)(ep_type)
427 << EPCTRL_RX_EP_TYPE_SHIFT);
428 }
429
430 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
431}
432
433static void
434dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
435{
436 u32 tmp_epctrl = 0;
437
438 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
439
440 if (value) {
441
442 if (dir)
443 tmp_epctrl |= EPCTRL_TX_EP_STALL;
444 else
445 tmp_epctrl |= EPCTRL_RX_EP_STALL;
446 } else {
447
448 if (dir) {
449 tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
450 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
451 } else {
452 tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
453 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
454 }
455 }
456 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
457}
458
459
460
461static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
462{
463 u32 epctrl;
464
465 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
466 if (dir)
467 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
468 else
469 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
470}
471
472
473
474
475
476
477
478
479
480
481static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
482 unsigned char dir, unsigned char ep_type,
483 unsigned int max_pkt_len,
484 unsigned int zlt, unsigned char mult)
485{
486 struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
487 unsigned int tmp = 0;
488
489
490 switch (ep_type) {
491 case USB_ENDPOINT_XFER_CONTROL:
492
493 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
494 | EP_QUEUE_HEAD_IOS;
495 break;
496 case USB_ENDPOINT_XFER_ISOC:
497 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
498 | (mult << EP_QUEUE_HEAD_MULT_POS);
499 break;
500 case USB_ENDPOINT_XFER_BULK:
501 case USB_ENDPOINT_XFER_INT:
502 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
503 break;
504 default:
505 VDBG("error ep type is %d", ep_type);
506 return;
507 }
508 if (zlt)
509 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
510
511 p_QH->max_pkt_length = cpu_to_hc32(tmp);
512 p_QH->next_dtd_ptr = 1;
513 p_QH->size_ioc_int_sts = 0;
514}
515
516
517static void ep0_setup(struct fsl_udc *udc)
518{
519
520
521 struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
522 USB_MAX_CTRL_PAYLOAD, 0, 0);
523 struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
524 USB_MAX_CTRL_PAYLOAD, 0, 0);
525 dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
526 dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
527
528 return;
529
530}
531
532
533
534
535
536
537
538
539
540
541
542static int fsl_ep_enable(struct usb_ep *_ep,
543 const struct usb_endpoint_descriptor *desc)
544{
545 struct fsl_udc *udc = NULL;
546 struct fsl_ep *ep = NULL;
547 unsigned short max = 0;
548 unsigned char mult = 0, zlt;
549 int retval = -EINVAL;
550 unsigned long flags = 0;
551
552 ep = container_of(_ep, struct fsl_ep, ep);
553
554
555 if (!_ep || !desc
556 || (desc->bDescriptorType != USB_DT_ENDPOINT))
557 return -EINVAL;
558
559 udc = ep->udc;
560
561 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
562 return -ESHUTDOWN;
563
564 max = usb_endpoint_maxp(desc);
565
566
567
568
569 zlt = 1;
570
571
572 switch (desc->bmAttributes & 0x03) {
573 case USB_ENDPOINT_XFER_CONTROL:
574 case USB_ENDPOINT_XFER_BULK:
575 case USB_ENDPOINT_XFER_INT:
576
577
578
579
580 mult = 0;
581 break;
582 case USB_ENDPOINT_XFER_ISOC:
583
584 mult = usb_endpoint_maxp_mult(desc);
585
586 if (mult > 3)
587 goto en_done;
588 break;
589 default:
590 goto en_done;
591 }
592
593 spin_lock_irqsave(&udc->lock, flags);
594 ep->ep.maxpacket = max;
595 ep->ep.desc = desc;
596 ep->stopped = 0;
597
598
599
600
601 struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
602 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
603 ? USB_SEND : USB_RECV),
604 (unsigned char) (desc->bmAttributes
605 & USB_ENDPOINT_XFERTYPE_MASK),
606 max, zlt, mult);
607
608
609 dr_ep_setup((unsigned char) ep_index(ep),
610 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
611 ? USB_SEND : USB_RECV),
612 (unsigned char) (desc->bmAttributes
613 & USB_ENDPOINT_XFERTYPE_MASK));
614
615 spin_unlock_irqrestore(&udc->lock, flags);
616 retval = 0;
617
618 VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
619 ep->ep.desc->bEndpointAddress & 0x0f,
620 (desc->bEndpointAddress & USB_DIR_IN)
621 ? "in" : "out", max);
622en_done:
623 return retval;
624}
625
626
627
628
629
630static int fsl_ep_disable(struct usb_ep *_ep)
631{
632 struct fsl_udc *udc = NULL;
633 struct fsl_ep *ep = NULL;
634 unsigned long flags = 0;
635 u32 epctrl;
636 int ep_num;
637
638 ep = container_of(_ep, struct fsl_ep, ep);
639 if (!_ep || !ep->ep.desc) {
640 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
641 return -EINVAL;
642 }
643
644
645 ep_num = ep_index(ep);
646 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
647 if (ep_is_in(ep)) {
648 epctrl &= ~(EPCTRL_TX_ENABLE | EPCTRL_TX_TYPE);
649 epctrl |= EPCTRL_EP_TYPE_BULK << EPCTRL_TX_EP_TYPE_SHIFT;
650 } else {
651 epctrl &= ~(EPCTRL_RX_ENABLE | EPCTRL_TX_TYPE);
652 epctrl |= EPCTRL_EP_TYPE_BULK << EPCTRL_RX_EP_TYPE_SHIFT;
653 }
654 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
655
656 udc = (struct fsl_udc *)ep->udc;
657 spin_lock_irqsave(&udc->lock, flags);
658
659
660 nuke(ep, -ESHUTDOWN);
661
662 ep->ep.desc = NULL;
663 ep->stopped = 1;
664 spin_unlock_irqrestore(&udc->lock, flags);
665
666 VDBG("disabled %s OK", _ep->name);
667 return 0;
668}
669
670
671
672
673
674
675static struct usb_request *
676fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
677{
678 struct fsl_req *req = NULL;
679
680 req = kzalloc(sizeof *req, gfp_flags);
681 if (!req)
682 return NULL;
683
684 req->req.dma = DMA_ADDR_INVALID;
685 INIT_LIST_HEAD(&req->queue);
686
687 return &req->req;
688}
689
690static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
691{
692 struct fsl_req *req = NULL;
693
694 req = container_of(_req, struct fsl_req, req);
695
696 if (_req)
697 kfree(req);
698}
699
700
701static void fsl_prime_ep(struct fsl_ep *ep, struct ep_td_struct *td)
702{
703 struct ep_queue_head *qh = get_qh_by_ep(ep);
704
705
706 qh->next_dtd_ptr = cpu_to_hc32(td->td_dma
707 & EP_QUEUE_HEAD_NEXT_POINTER_MASK);
708
709
710 qh->size_ioc_int_sts &= cpu_to_hc32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
711 | EP_QUEUE_HEAD_STATUS_HALT));
712
713
714 wmb();
715
716
717 fsl_writel(ep_is_in(ep) ? (1 << (ep_index(ep) + 16))
718 : (1 << (ep_index(ep))), &dr_regs->endpointprime);
719}
720
721
722static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
723{
724 u32 temp, bitmask, tmp_stat;
725
726
727
728
729 bitmask = ep_is_in(ep)
730 ? (1 << (ep_index(ep) + 16))
731 : (1 << (ep_index(ep)));
732
733
734 if (!(list_empty(&ep->queue)) && !(ep_index(ep) == 0)) {
735
736 struct fsl_req *lastreq;
737 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
738 lastreq->tail->next_td_ptr =
739 cpu_to_hc32(req->head->td_dma & DTD_ADDR_MASK);
740
741 wmb();
742
743 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
744 return;
745
746 do {
747
748 temp = fsl_readl(&dr_regs->usbcmd);
749 fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
750
751
752 tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
753
754 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
755
756
757 temp = fsl_readl(&dr_regs->usbcmd);
758 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
759
760 if (tmp_stat)
761 return;
762 }
763
764 fsl_prime_ep(ep, req->head);
765}
766
767
768
769
770
771
772
773static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
774 dma_addr_t *dma, int *is_last, gfp_t gfp_flags)
775{
776 u32 swap_temp;
777 struct ep_td_struct *dtd;
778
779
780 *length = min(req->req.length - req->req.actual,
781 (unsigned)EP_MAX_LENGTH_TRANSFER);
782
783 dtd = dma_pool_alloc(udc_controller->td_pool, gfp_flags, dma);
784 if (dtd == NULL)
785 return dtd;
786
787 dtd->td_dma = *dma;
788
789 swap_temp = hc32_to_cpu(dtd->size_ioc_sts);
790 swap_temp &= ~DTD_RESERVED_FIELDS;
791 dtd->size_ioc_sts = cpu_to_hc32(swap_temp);
792
793
794 swap_temp = (u32) (req->req.dma + req->req.actual);
795 dtd->buff_ptr0 = cpu_to_hc32(swap_temp);
796 dtd->buff_ptr1 = cpu_to_hc32(swap_temp + 0x1000);
797 dtd->buff_ptr2 = cpu_to_hc32(swap_temp + 0x2000);
798 dtd->buff_ptr3 = cpu_to_hc32(swap_temp + 0x3000);
799 dtd->buff_ptr4 = cpu_to_hc32(swap_temp + 0x4000);
800
801 req->req.actual += *length;
802
803
804 if (req->req.zero) {
805 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
806 *is_last = 1;
807 else
808 *is_last = 0;
809 } else if (req->req.length == req->req.actual)
810 *is_last = 1;
811 else
812 *is_last = 0;
813
814 if ((*is_last) == 0)
815 VDBG("multi-dtd request!");
816
817 swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
818
819
820 if (*is_last && !req->req.no_interrupt)
821 swap_temp |= DTD_IOC;
822
823 dtd->size_ioc_sts = cpu_to_hc32(swap_temp);
824
825 mb();
826
827 VDBG("length = %d address= 0x%x", *length, (int)*dma);
828
829 return dtd;
830}
831
832
833static int fsl_req_to_dtd(struct fsl_req *req, gfp_t gfp_flags)
834{
835 unsigned count;
836 int is_last;
837 int is_first =1;
838 struct ep_td_struct *last_dtd = NULL, *dtd;
839 dma_addr_t dma;
840
841 do {
842 dtd = fsl_build_dtd(req, &count, &dma, &is_last, gfp_flags);
843 if (dtd == NULL)
844 return -ENOMEM;
845
846 if (is_first) {
847 is_first = 0;
848 req->head = dtd;
849 } else {
850 last_dtd->next_td_ptr = cpu_to_hc32(dma);
851 last_dtd->next_td_virt = dtd;
852 }
853 last_dtd = dtd;
854
855 req->dtd_count++;
856 } while (!is_last);
857
858 dtd->next_td_ptr = cpu_to_hc32(DTD_NEXT_TERMINATE);
859
860 req->tail = dtd;
861
862 return 0;
863}
864
865
866static int
867fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
868{
869 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
870 struct fsl_req *req = container_of(_req, struct fsl_req, req);
871 struct fsl_udc *udc;
872 unsigned long flags;
873 int ret;
874
875
876 if (!_req || !req->req.complete || !req->req.buf
877 || !list_empty(&req->queue)) {
878 VDBG("%s, bad params", __func__);
879 return -EINVAL;
880 }
881 if (unlikely(!_ep || !ep->ep.desc)) {
882 VDBG("%s, bad ep", __func__);
883 return -EINVAL;
884 }
885 if (usb_endpoint_xfer_isoc(ep->ep.desc)) {
886 if (req->req.length > ep->ep.maxpacket)
887 return -EMSGSIZE;
888 }
889
890 udc = ep->udc;
891 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
892 return -ESHUTDOWN;
893
894 req->ep = ep;
895
896 ret = usb_gadget_map_request(&ep->udc->gadget, &req->req, ep_is_in(ep));
897 if (ret)
898 return ret;
899
900 req->req.status = -EINPROGRESS;
901 req->req.actual = 0;
902 req->dtd_count = 0;
903
904
905 if (!fsl_req_to_dtd(req, gfp_flags)) {
906 spin_lock_irqsave(&udc->lock, flags);
907 fsl_queue_td(ep, req);
908 } else {
909 return -ENOMEM;
910 }
911
912
913 if (req != NULL)
914 list_add_tail(&req->queue, &ep->queue);
915 spin_unlock_irqrestore(&udc->lock, flags);
916
917 return 0;
918}
919
920
921static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
922{
923 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
924 struct fsl_req *req;
925 unsigned long flags;
926 int ep_num, stopped, ret = 0;
927 u32 epctrl;
928
929 if (!_ep || !_req)
930 return -EINVAL;
931
932 spin_lock_irqsave(&ep->udc->lock, flags);
933 stopped = ep->stopped;
934
935
936 ep->stopped = 1;
937 ep_num = ep_index(ep);
938 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
939 if (ep_is_in(ep))
940 epctrl &= ~EPCTRL_TX_ENABLE;
941 else
942 epctrl &= ~EPCTRL_RX_ENABLE;
943 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
944
945
946 list_for_each_entry(req, &ep->queue, queue) {
947 if (&req->req == _req)
948 break;
949 }
950 if (&req->req != _req) {
951 ret = -EINVAL;
952 goto out;
953 }
954
955
956 if (ep->queue.next == &req->queue) {
957 _req->status = -ECONNRESET;
958 fsl_ep_fifo_flush(_ep);
959
960
961 if (req->queue.next != &ep->queue) {
962 struct fsl_req *next_req;
963
964 next_req = list_entry(req->queue.next, struct fsl_req,
965 queue);
966
967
968 fsl_prime_ep(ep, next_req->head);
969 }
970
971 } else {
972 struct fsl_req *prev_req;
973
974 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
975 prev_req->tail->next_td_ptr = req->tail->next_td_ptr;
976 }
977
978 done(ep, req, -ECONNRESET);
979
980
981out: epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
982 if (ep_is_in(ep))
983 epctrl |= EPCTRL_TX_ENABLE;
984 else
985 epctrl |= EPCTRL_RX_ENABLE;
986 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
987 ep->stopped = stopped;
988
989 spin_unlock_irqrestore(&ep->udc->lock, flags);
990 return ret;
991}
992
993
994
995
996
997
998
999
1000
1001static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
1002{
1003 struct fsl_ep *ep = NULL;
1004 unsigned long flags = 0;
1005 int status = -EOPNOTSUPP;
1006 unsigned char ep_dir = 0, ep_num = 0;
1007 struct fsl_udc *udc = NULL;
1008
1009 ep = container_of(_ep, struct fsl_ep, ep);
1010 udc = ep->udc;
1011 if (!_ep || !ep->ep.desc) {
1012 status = -EINVAL;
1013 goto out;
1014 }
1015
1016 if (usb_endpoint_xfer_isoc(ep->ep.desc)) {
1017 status = -EOPNOTSUPP;
1018 goto out;
1019 }
1020
1021
1022
1023 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
1024 status = -EAGAIN;
1025 goto out;
1026 }
1027
1028 status = 0;
1029 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
1030 ep_num = (unsigned char)(ep_index(ep));
1031 spin_lock_irqsave(&ep->udc->lock, flags);
1032 dr_ep_change_stall(ep_num, ep_dir, value);
1033 spin_unlock_irqrestore(&ep->udc->lock, flags);
1034
1035 if (ep_index(ep) == 0) {
1036 udc->ep0_state = WAIT_FOR_SETUP;
1037 udc->ep0_dir = 0;
1038 }
1039out:
1040 VDBG(" %s %s halt stat %d", ep->ep.name,
1041 value ? "set" : "clear", status);
1042
1043 return status;
1044}
1045
1046static int fsl_ep_fifo_status(struct usb_ep *_ep)
1047{
1048 struct fsl_ep *ep;
1049 struct fsl_udc *udc;
1050 int size = 0;
1051 u32 bitmask;
1052 struct ep_queue_head *qh;
1053
1054 ep = container_of(_ep, struct fsl_ep, ep);
1055 if (!_ep || (!ep->ep.desc && ep_index(ep) != 0))
1056 return -ENODEV;
1057
1058 udc = (struct fsl_udc *)ep->udc;
1059
1060 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
1061 return -ESHUTDOWN;
1062
1063 qh = get_qh_by_ep(ep);
1064
1065 bitmask = (ep_is_in(ep)) ? (1 << (ep_index(ep) + 16)) :
1066 (1 << (ep_index(ep)));
1067
1068 if (fsl_readl(&dr_regs->endptstatus) & bitmask)
1069 size = (qh->size_ioc_int_sts & DTD_PACKET_SIZE)
1070 >> DTD_LENGTH_BIT_POS;
1071
1072 pr_debug("%s %u\n", __func__, size);
1073 return size;
1074}
1075
1076static void fsl_ep_fifo_flush(struct usb_ep *_ep)
1077{
1078 struct fsl_ep *ep;
1079 int ep_num, ep_dir;
1080 u32 bits;
1081 unsigned long timeout;
1082#define FSL_UDC_FLUSH_TIMEOUT 1000
1083
1084 if (!_ep) {
1085 return;
1086 } else {
1087 ep = container_of(_ep, struct fsl_ep, ep);
1088 if (!ep->ep.desc)
1089 return;
1090 }
1091 ep_num = ep_index(ep);
1092 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
1093
1094 if (ep_num == 0)
1095 bits = (1 << 16) | 1;
1096 else if (ep_dir == USB_SEND)
1097 bits = 1 << (16 + ep_num);
1098 else
1099 bits = 1 << ep_num;
1100
1101 timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
1102 do {
1103 fsl_writel(bits, &dr_regs->endptflush);
1104
1105
1106 while (fsl_readl(&dr_regs->endptflush)) {
1107 if (time_after(jiffies, timeout)) {
1108 ERR("ep flush timeout\n");
1109 return;
1110 }
1111 cpu_relax();
1112 }
1113
1114 } while (fsl_readl(&dr_regs->endptstatus) & bits);
1115}
1116
1117static const struct usb_ep_ops fsl_ep_ops = {
1118 .enable = fsl_ep_enable,
1119 .disable = fsl_ep_disable,
1120
1121 .alloc_request = fsl_alloc_request,
1122 .free_request = fsl_free_request,
1123
1124 .queue = fsl_ep_queue,
1125 .dequeue = fsl_ep_dequeue,
1126
1127 .set_halt = fsl_ep_set_halt,
1128 .fifo_status = fsl_ep_fifo_status,
1129 .fifo_flush = fsl_ep_fifo_flush,
1130};
1131
1132
1133
1134
1135
1136
1137
1138
1139static int fsl_get_frame(struct usb_gadget *gadget)
1140{
1141 return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1142}
1143
1144
1145
1146
1147static int fsl_wakeup(struct usb_gadget *gadget)
1148{
1149 struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1150 u32 portsc;
1151
1152
1153 if (!udc->remote_wakeup)
1154 return -ENOTSUPP;
1155
1156 portsc = fsl_readl(&dr_regs->portsc1);
1157
1158 if (!(portsc & PORTSCX_PORT_SUSPEND))
1159 return 0;
1160
1161 portsc |= PORTSCX_PORT_FORCE_RESUME;
1162 fsl_writel(portsc, &dr_regs->portsc1);
1163 return 0;
1164}
1165
1166static int can_pullup(struct fsl_udc *udc)
1167{
1168 return udc->driver && udc->softconnect && udc->vbus_active;
1169}
1170
1171
1172
1173static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1174{
1175 struct fsl_udc *udc;
1176 unsigned long flags;
1177
1178 udc = container_of(gadget, struct fsl_udc, gadget);
1179 spin_lock_irqsave(&udc->lock, flags);
1180 VDBG("VBUS %s", is_active ? "on" : "off");
1181 udc->vbus_active = (is_active != 0);
1182 if (can_pullup(udc))
1183 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1184 &dr_regs->usbcmd);
1185 else
1186 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1187 &dr_regs->usbcmd);
1188 spin_unlock_irqrestore(&udc->lock, flags);
1189 return 0;
1190}
1191
1192
1193
1194
1195
1196
1197
1198
1199static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1200{
1201 struct fsl_udc *udc;
1202
1203 udc = container_of(gadget, struct fsl_udc, gadget);
1204 if (!IS_ERR_OR_NULL(udc->transceiver))
1205 return usb_phy_set_power(udc->transceiver, mA);
1206 return -ENOTSUPP;
1207}
1208
1209
1210
1211
1212static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1213{
1214 struct fsl_udc *udc;
1215
1216 udc = container_of(gadget, struct fsl_udc, gadget);
1217
1218 if (!udc->vbus_active)
1219 return -EOPNOTSUPP;
1220
1221 udc->softconnect = (is_on != 0);
1222 if (can_pullup(udc))
1223 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1224 &dr_regs->usbcmd);
1225 else
1226 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1227 &dr_regs->usbcmd);
1228
1229 return 0;
1230}
1231
1232static int fsl_udc_start(struct usb_gadget *g,
1233 struct usb_gadget_driver *driver);
1234static int fsl_udc_stop(struct usb_gadget *g);
1235
1236static const struct usb_gadget_ops fsl_gadget_ops = {
1237 .get_frame = fsl_get_frame,
1238 .wakeup = fsl_wakeup,
1239
1240 .vbus_session = fsl_vbus_session,
1241 .vbus_draw = fsl_vbus_draw,
1242 .pullup = fsl_pullup,
1243 .udc_start = fsl_udc_start,
1244 .udc_stop = fsl_udc_stop,
1245};
1246
1247
1248
1249
1250
1251static void fsl_noop_complete(struct usb_ep *ep, struct usb_request *req) { }
1252
1253
1254
1255static void ep0stall(struct fsl_udc *udc)
1256{
1257 u32 tmp;
1258
1259
1260 tmp = fsl_readl(&dr_regs->endptctrl[0]);
1261 tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1262 fsl_writel(tmp, &dr_regs->endptctrl[0]);
1263 udc->ep0_state = WAIT_FOR_SETUP;
1264 udc->ep0_dir = 0;
1265}
1266
1267
1268static int ep0_prime_status(struct fsl_udc *udc, int direction)
1269{
1270 struct fsl_req *req = udc->status_req;
1271 struct fsl_ep *ep;
1272 int ret;
1273
1274 if (direction == EP_DIR_IN)
1275 udc->ep0_dir = USB_DIR_IN;
1276 else
1277 udc->ep0_dir = USB_DIR_OUT;
1278
1279 ep = &udc->eps[0];
1280 if (udc->ep0_state != DATA_STATE_XMIT)
1281 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1282
1283 req->ep = ep;
1284 req->req.length = 0;
1285 req->req.status = -EINPROGRESS;
1286 req->req.actual = 0;
1287 req->req.complete = fsl_noop_complete;
1288 req->dtd_count = 0;
1289
1290 ret = usb_gadget_map_request(&ep->udc->gadget, &req->req, ep_is_in(ep));
1291 if (ret)
1292 return ret;
1293
1294 if (fsl_req_to_dtd(req, GFP_ATOMIC) == 0)
1295 fsl_queue_td(ep, req);
1296 else
1297 return -ENOMEM;
1298
1299 list_add_tail(&req->queue, &ep->queue);
1300
1301 return 0;
1302}
1303
1304static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1305{
1306 struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1307
1308 if (ep->name)
1309 nuke(ep, -ESHUTDOWN);
1310}
1311
1312
1313
1314
1315static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1316{
1317
1318 udc->device_address = (u8) value;
1319
1320 udc->usb_state = USB_STATE_ADDRESS;
1321
1322 if (ep0_prime_status(udc, EP_DIR_IN))
1323 ep0stall(udc);
1324}
1325
1326
1327
1328
1329static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1330 u16 index, u16 length)
1331{
1332 u16 tmp = 0;
1333 struct fsl_req *req;
1334 struct fsl_ep *ep;
1335 int ret;
1336
1337 ep = &udc->eps[0];
1338
1339 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1340
1341 tmp = udc->gadget.is_selfpowered;
1342 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1343 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1344
1345
1346 tmp = 0;
1347 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1348
1349 struct fsl_ep *target_ep;
1350
1351 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1352
1353
1354 if (!target_ep->ep.desc)
1355 goto stall;
1356 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1357 << USB_ENDPOINT_HALT;
1358 }
1359
1360 udc->ep0_dir = USB_DIR_IN;
1361
1362 req = udc->status_req;
1363
1364 *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1365
1366 req->ep = ep;
1367 req->req.length = 2;
1368 req->req.status = -EINPROGRESS;
1369 req->req.actual = 0;
1370 req->req.complete = fsl_noop_complete;
1371 req->dtd_count = 0;
1372
1373 ret = usb_gadget_map_request(&ep->udc->gadget, &req->req, ep_is_in(ep));
1374 if (ret)
1375 goto stall;
1376
1377
1378 if ((fsl_req_to_dtd(req, GFP_ATOMIC) == 0))
1379 fsl_queue_td(ep, req);
1380 else
1381 goto stall;
1382
1383 list_add_tail(&req->queue, &ep->queue);
1384 udc->ep0_state = DATA_STATE_XMIT;
1385 if (ep0_prime_status(udc, EP_DIR_OUT))
1386 ep0stall(udc);
1387
1388 return;
1389stall:
1390 ep0stall(udc);
1391}
1392
1393static void setup_received_irq(struct fsl_udc *udc,
1394 struct usb_ctrlrequest *setup)
1395__releases(udc->lock)
1396__acquires(udc->lock)
1397{
1398 u16 wValue = le16_to_cpu(setup->wValue);
1399 u16 wIndex = le16_to_cpu(setup->wIndex);
1400 u16 wLength = le16_to_cpu(setup->wLength);
1401
1402 udc_reset_ep_queue(udc, 0);
1403
1404
1405 switch (setup->bRequest) {
1406 case USB_REQ_GET_STATUS:
1407
1408 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1409 != (USB_DIR_IN | USB_TYPE_STANDARD))
1410 break;
1411 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1412 return;
1413
1414 case USB_REQ_SET_ADDRESS:
1415
1416 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1417 | USB_RECIP_DEVICE))
1418 break;
1419 ch9setaddress(udc, wValue, wIndex, wLength);
1420 return;
1421
1422 case USB_REQ_CLEAR_FEATURE:
1423 case USB_REQ_SET_FEATURE:
1424
1425 {
1426 int rc = -EOPNOTSUPP;
1427 u16 ptc = 0;
1428
1429 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1430 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1431 int pipe = get_pipe_by_windex(wIndex);
1432 struct fsl_ep *ep;
1433
1434 if (wValue != 0 || wLength != 0 || pipe >= udc->max_ep)
1435 break;
1436 ep = get_ep_by_pipe(udc, pipe);
1437
1438 spin_unlock(&udc->lock);
1439 rc = fsl_ep_set_halt(&ep->ep,
1440 (setup->bRequest == USB_REQ_SET_FEATURE)
1441 ? 1 : 0);
1442 spin_lock(&udc->lock);
1443
1444 } else if ((setup->bRequestType & (USB_RECIP_MASK
1445 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1446 | USB_TYPE_STANDARD)) {
1447
1448
1449 if (wValue == USB_DEVICE_TEST_MODE)
1450 ptc = wIndex >> 8;
1451 else if (gadget_is_otg(&udc->gadget)) {
1452 if (setup->bRequest ==
1453 USB_DEVICE_B_HNP_ENABLE)
1454 udc->gadget.b_hnp_enable = 1;
1455 else if (setup->bRequest ==
1456 USB_DEVICE_A_HNP_SUPPORT)
1457 udc->gadget.a_hnp_support = 1;
1458 else if (setup->bRequest ==
1459 USB_DEVICE_A_ALT_HNP_SUPPORT)
1460 udc->gadget.a_alt_hnp_support = 1;
1461 }
1462 rc = 0;
1463 } else
1464 break;
1465
1466 if (rc == 0) {
1467 if (ep0_prime_status(udc, EP_DIR_IN))
1468 ep0stall(udc);
1469 }
1470 if (ptc) {
1471 u32 tmp;
1472
1473 mdelay(10);
1474 tmp = fsl_readl(&dr_regs->portsc1) | (ptc << 16);
1475 fsl_writel(tmp, &dr_regs->portsc1);
1476 printk(KERN_INFO "udc: switch to test mode %d.\n", ptc);
1477 }
1478
1479 return;
1480 }
1481
1482 default:
1483 break;
1484 }
1485
1486
1487 if (wLength) {
1488
1489 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1490 ? USB_DIR_IN : USB_DIR_OUT;
1491 spin_unlock(&udc->lock);
1492 if (udc->driver->setup(&udc->gadget,
1493 &udc->local_setup_buff) < 0)
1494 ep0stall(udc);
1495 spin_lock(&udc->lock);
1496 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1497 ? DATA_STATE_XMIT : DATA_STATE_RECV;
1498
1499
1500
1501
1502 if (udc->ep0_state == DATA_STATE_XMIT)
1503 if (ep0_prime_status(udc, EP_DIR_OUT))
1504 ep0stall(udc);
1505
1506 } else {
1507
1508 udc->ep0_dir = USB_DIR_IN;
1509 spin_unlock(&udc->lock);
1510 if (udc->driver->setup(&udc->gadget,
1511 &udc->local_setup_buff) < 0)
1512 ep0stall(udc);
1513 spin_lock(&udc->lock);
1514 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1515 }
1516}
1517
1518
1519
1520static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1521 struct fsl_req *req)
1522{
1523 if (udc->usb_state == USB_STATE_ADDRESS) {
1524
1525 u32 new_address = (u32) udc->device_address;
1526 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1527 &dr_regs->deviceaddr);
1528 }
1529
1530 done(ep0, req, 0);
1531
1532 switch (udc->ep0_state) {
1533 case DATA_STATE_XMIT:
1534
1535 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1536 break;
1537 case DATA_STATE_RECV:
1538
1539 if (ep0_prime_status(udc, EP_DIR_IN))
1540 ep0stall(udc);
1541 break;
1542 case WAIT_FOR_OUT_STATUS:
1543 udc->ep0_state = WAIT_FOR_SETUP;
1544 break;
1545 case WAIT_FOR_SETUP:
1546 ERR("Unexpect ep0 packets\n");
1547 break;
1548 default:
1549 ep0stall(udc);
1550 break;
1551 }
1552}
1553
1554
1555
1556static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1557{
1558 u32 temp;
1559 struct ep_queue_head *qh;
1560 struct fsl_usb2_platform_data *pdata = udc->pdata;
1561
1562 qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1563
1564
1565 temp = fsl_readl(&dr_regs->endptsetupstat);
1566 fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1567
1568
1569 do {
1570
1571 temp = fsl_readl(&dr_regs->usbcmd);
1572 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1573
1574
1575 if (pdata->le_setup_buf) {
1576 u32 *p = (u32 *)buffer_ptr;
1577 u32 *s = (u32 *)qh->setup_buffer;
1578
1579
1580 *p++ = le32_to_cpu(*s++);
1581 *p = le32_to_cpu(*s);
1582 } else {
1583 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1584 }
1585 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1586
1587
1588 temp = fsl_readl(&dr_regs->usbcmd);
1589 fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1590}
1591
1592
1593static int process_ep_req(struct fsl_udc *udc, int pipe,
1594 struct fsl_req *curr_req)
1595{
1596 struct ep_td_struct *curr_td;
1597 int td_complete, actual, remaining_length, j, tmp;
1598 int status = 0;
1599 int errors = 0;
1600 struct ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1601 int direction = pipe % 2;
1602
1603 curr_td = curr_req->head;
1604 td_complete = 0;
1605 actual = curr_req->req.length;
1606
1607 for (j = 0; j < curr_req->dtd_count; j++) {
1608 remaining_length = (hc32_to_cpu(curr_td->size_ioc_sts)
1609 & DTD_PACKET_SIZE)
1610 >> DTD_LENGTH_BIT_POS;
1611 actual -= remaining_length;
1612
1613 errors = hc32_to_cpu(curr_td->size_ioc_sts);
1614 if (errors & DTD_ERROR_MASK) {
1615 if (errors & DTD_STATUS_HALTED) {
1616 ERR("dTD error %08x QH=%d\n", errors, pipe);
1617
1618 tmp = hc32_to_cpu(curr_qh->size_ioc_int_sts);
1619 tmp &= ~errors;
1620 curr_qh->size_ioc_int_sts = cpu_to_hc32(tmp);
1621 status = -EPIPE;
1622
1623
1624 break;
1625 }
1626 if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1627 VDBG("Transfer overflow");
1628 status = -EPROTO;
1629 break;
1630 } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1631 VDBG("ISO error");
1632 status = -EILSEQ;
1633 break;
1634 } else
1635 ERR("Unknown error has occurred (0x%x)!\n",
1636 errors);
1637
1638 } else if (hc32_to_cpu(curr_td->size_ioc_sts)
1639 & DTD_STATUS_ACTIVE) {
1640 VDBG("Request not complete");
1641 status = REQ_UNCOMPLETE;
1642 return status;
1643 } else if (remaining_length) {
1644 if (direction) {
1645 VDBG("Transmit dTD remaining length not zero");
1646 status = -EPROTO;
1647 break;
1648 } else {
1649 td_complete++;
1650 break;
1651 }
1652 } else {
1653 td_complete++;
1654 VDBG("dTD transmitted successful");
1655 }
1656
1657 if (j != curr_req->dtd_count - 1)
1658 curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1659 }
1660
1661 if (status)
1662 return status;
1663
1664 curr_req->req.actual = actual;
1665
1666 return 0;
1667}
1668
1669
1670static void dtd_complete_irq(struct fsl_udc *udc)
1671{
1672 u32 bit_pos;
1673 int i, ep_num, direction, bit_mask, status;
1674 struct fsl_ep *curr_ep;
1675 struct fsl_req *curr_req, *temp_req;
1676
1677
1678 bit_pos = fsl_readl(&dr_regs->endptcomplete);
1679 fsl_writel(bit_pos, &dr_regs->endptcomplete);
1680
1681 if (!bit_pos)
1682 return;
1683
1684 for (i = 0; i < udc->max_ep; i++) {
1685 ep_num = i >> 1;
1686 direction = i % 2;
1687
1688 bit_mask = 1 << (ep_num + 16 * direction);
1689
1690 if (!(bit_pos & bit_mask))
1691 continue;
1692
1693 curr_ep = get_ep_by_pipe(udc, i);
1694
1695
1696 if (curr_ep->name == NULL) {
1697 WARNING("Invalid EP?");
1698 continue;
1699 }
1700
1701
1702 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1703 queue) {
1704 status = process_ep_req(udc, i, curr_req);
1705
1706 VDBG("status of process_ep_req= %d, ep = %d",
1707 status, ep_num);
1708 if (status == REQ_UNCOMPLETE)
1709 break;
1710
1711 curr_req->req.status = status;
1712
1713 if (ep_num == 0) {
1714 ep0_req_complete(udc, curr_ep, curr_req);
1715 break;
1716 } else
1717 done(curr_ep, curr_req, status);
1718 }
1719 }
1720}
1721
1722static inline enum usb_device_speed portscx_device_speed(u32 reg)
1723{
1724 switch (reg & PORTSCX_PORT_SPEED_MASK) {
1725 case PORTSCX_PORT_SPEED_HIGH:
1726 return USB_SPEED_HIGH;
1727 case PORTSCX_PORT_SPEED_FULL:
1728 return USB_SPEED_FULL;
1729 case PORTSCX_PORT_SPEED_LOW:
1730 return USB_SPEED_LOW;
1731 default:
1732 return USB_SPEED_UNKNOWN;
1733 }
1734}
1735
1736
1737static void port_change_irq(struct fsl_udc *udc)
1738{
1739 if (udc->bus_reset)
1740 udc->bus_reset = 0;
1741
1742
1743 if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET))
1744
1745 udc->gadget.speed =
1746 portscx_device_speed(fsl_readl(&dr_regs->portsc1));
1747
1748
1749 if (!udc->resume_state)
1750 udc->usb_state = USB_STATE_DEFAULT;
1751}
1752
1753
1754static void suspend_irq(struct fsl_udc *udc)
1755{
1756 udc->resume_state = udc->usb_state;
1757 udc->usb_state = USB_STATE_SUSPENDED;
1758
1759
1760 if (udc->driver->suspend)
1761 udc->driver->suspend(&udc->gadget);
1762}
1763
1764static void bus_resume(struct fsl_udc *udc)
1765{
1766 udc->usb_state = udc->resume_state;
1767 udc->resume_state = 0;
1768
1769
1770 if (udc->driver->resume)
1771 udc->driver->resume(&udc->gadget);
1772}
1773
1774
1775static int reset_queues(struct fsl_udc *udc, bool bus_reset)
1776{
1777 u8 pipe;
1778
1779 for (pipe = 0; pipe < udc->max_pipes; pipe++)
1780 udc_reset_ep_queue(udc, pipe);
1781
1782
1783 spin_unlock(&udc->lock);
1784 if (bus_reset)
1785 usb_gadget_udc_reset(&udc->gadget, udc->driver);
1786 else
1787 udc->driver->disconnect(&udc->gadget);
1788 spin_lock(&udc->lock);
1789
1790 return 0;
1791}
1792
1793
1794static void reset_irq(struct fsl_udc *udc)
1795{
1796 u32 temp;
1797 unsigned long timeout;
1798
1799
1800 temp = fsl_readl(&dr_regs->deviceaddr);
1801 fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1802
1803 udc->device_address = 0;
1804
1805
1806 udc->resume_state = 0;
1807 udc->ep0_dir = 0;
1808 udc->ep0_state = WAIT_FOR_SETUP;
1809 udc->remote_wakeup = 0;
1810 udc->gadget.b_hnp_enable = 0;
1811 udc->gadget.a_hnp_support = 0;
1812 udc->gadget.a_alt_hnp_support = 0;
1813
1814
1815 temp = fsl_readl(&dr_regs->endptsetupstat);
1816 fsl_writel(temp, &dr_regs->endptsetupstat);
1817
1818
1819 temp = fsl_readl(&dr_regs->endptcomplete);
1820 fsl_writel(temp, &dr_regs->endptcomplete);
1821
1822 timeout = jiffies + 100;
1823 while (fsl_readl(&dr_regs->endpointprime)) {
1824
1825 if (time_after(jiffies, timeout)) {
1826 ERR("Timeout for reset\n");
1827 break;
1828 }
1829 cpu_relax();
1830 }
1831
1832
1833 fsl_writel(0xffffffff, &dr_regs->endptflush);
1834
1835 if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1836 VDBG("Bus reset");
1837
1838 udc->bus_reset = 1;
1839
1840
1841 reset_queues(udc, true);
1842 udc->usb_state = USB_STATE_DEFAULT;
1843 } else {
1844 VDBG("Controller reset");
1845
1846
1847 dr_controller_setup(udc);
1848
1849
1850 reset_queues(udc, false);
1851
1852 ep0_setup(udc);
1853
1854
1855 dr_controller_run(udc);
1856 udc->usb_state = USB_STATE_ATTACHED;
1857 }
1858}
1859
1860
1861
1862
1863static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1864{
1865 struct fsl_udc *udc = _udc;
1866 u32 irq_src;
1867 irqreturn_t status = IRQ_NONE;
1868 unsigned long flags;
1869
1870
1871 if (udc->stopped)
1872 return IRQ_NONE;
1873 spin_lock_irqsave(&udc->lock, flags);
1874 irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1875
1876 fsl_writel(irq_src, &dr_regs->usbsts);
1877
1878
1879
1880
1881 if (udc->usb_state == USB_STATE_SUSPENDED)
1882 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1883 bus_resume(udc);
1884
1885
1886 if (irq_src & USB_STS_INT) {
1887 VDBG("Packet int");
1888
1889 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1890 tripwire_handler(udc, 0,
1891 (u8 *) (&udc->local_setup_buff));
1892 setup_received_irq(udc, &udc->local_setup_buff);
1893 status = IRQ_HANDLED;
1894 }
1895
1896
1897 if (fsl_readl(&dr_regs->endptcomplete)) {
1898 dtd_complete_irq(udc);
1899 status = IRQ_HANDLED;
1900 }
1901 }
1902
1903
1904 if (irq_src & USB_STS_SOF) {
1905 status = IRQ_HANDLED;
1906 }
1907
1908
1909 if (irq_src & USB_STS_PORT_CHANGE) {
1910 port_change_irq(udc);
1911 status = IRQ_HANDLED;
1912 }
1913
1914
1915 if (irq_src & USB_STS_RESET) {
1916 VDBG("reset int");
1917 reset_irq(udc);
1918 status = IRQ_HANDLED;
1919 }
1920
1921
1922 if (irq_src & USB_STS_SUSPEND) {
1923 suspend_irq(udc);
1924 status = IRQ_HANDLED;
1925 }
1926
1927 if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1928 VDBG("Error IRQ %x", irq_src);
1929 }
1930
1931 spin_unlock_irqrestore(&udc->lock, flags);
1932 return status;
1933}
1934
1935
1936
1937
1938
1939static int fsl_udc_start(struct usb_gadget *g,
1940 struct usb_gadget_driver *driver)
1941{
1942 int retval = 0;
1943 unsigned long flags = 0;
1944
1945
1946 spin_lock_irqsave(&udc_controller->lock, flags);
1947
1948 driver->driver.bus = NULL;
1949
1950 udc_controller->driver = driver;
1951 spin_unlock_irqrestore(&udc_controller->lock, flags);
1952 g->is_selfpowered = 1;
1953
1954 if (!IS_ERR_OR_NULL(udc_controller->transceiver)) {
1955
1956 udc_controller->stopped = 1;
1957 printk(KERN_INFO "Suspend udc for OTG auto detect\n");
1958
1959
1960 if (!IS_ERR_OR_NULL(udc_controller->transceiver)) {
1961 retval = otg_set_peripheral(
1962 udc_controller->transceiver->otg,
1963 &udc_controller->gadget);
1964 if (retval < 0) {
1965 ERR("can't bind to transceiver\n");
1966 udc_controller->driver = NULL;
1967 return retval;
1968 }
1969 }
1970 } else {
1971
1972 dr_controller_run(udc_controller);
1973 udc_controller->usb_state = USB_STATE_ATTACHED;
1974 udc_controller->ep0_state = WAIT_FOR_SETUP;
1975 udc_controller->ep0_dir = 0;
1976 }
1977
1978 return retval;
1979}
1980
1981
1982static int fsl_udc_stop(struct usb_gadget *g)
1983{
1984 struct fsl_ep *loop_ep;
1985 unsigned long flags;
1986
1987 if (!IS_ERR_OR_NULL(udc_controller->transceiver))
1988 otg_set_peripheral(udc_controller->transceiver->otg, NULL);
1989
1990
1991 dr_controller_stop(udc_controller);
1992
1993
1994 udc_controller->usb_state = USB_STATE_ATTACHED;
1995 udc_controller->ep0_state = WAIT_FOR_SETUP;
1996 udc_controller->ep0_dir = 0;
1997
1998
1999 spin_lock_irqsave(&udc_controller->lock, flags);
2000 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2001 nuke(&udc_controller->eps[0], -ESHUTDOWN);
2002 list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
2003 ep.ep_list)
2004 nuke(loop_ep, -ESHUTDOWN);
2005 spin_unlock_irqrestore(&udc_controller->lock, flags);
2006
2007 udc_controller->driver = NULL;
2008
2009 return 0;
2010}
2011
2012
2013
2014
2015#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2016
2017#include <linux/seq_file.h>
2018
2019static const char proc_filename[] = "driver/fsl_usb2_udc";
2020
2021static int fsl_proc_read(struct seq_file *m, void *v)
2022{
2023 unsigned long flags;
2024 int i;
2025 u32 tmp_reg;
2026 struct fsl_ep *ep = NULL;
2027 struct fsl_req *req;
2028
2029 struct fsl_udc *udc = udc_controller;
2030
2031 spin_lock_irqsave(&udc->lock, flags);
2032
2033
2034 seq_printf(m,
2035 DRIVER_DESC "\n"
2036 "%s version: %s\n"
2037 "Gadget driver: %s\n\n",
2038 driver_name, DRIVER_VERSION,
2039 udc->driver ? udc->driver->driver.name : "(none)");
2040
2041
2042 tmp_reg = fsl_readl(&dr_regs->usbcmd);
2043 seq_printf(m,
2044 "USBCMD reg:\n"
2045 "SetupTW: %d\n"
2046 "Run/Stop: %s\n\n",
2047 (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
2048 (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
2049
2050 tmp_reg = fsl_readl(&dr_regs->usbsts);
2051 seq_printf(m,
2052 "USB Status Reg:\n"
2053 "Dr Suspend: %d Reset Received: %d System Error: %s "
2054 "USB Error Interrupt: %s\n\n",
2055 (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
2056 (tmp_reg & USB_STS_RESET) ? 1 : 0,
2057 (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
2058 (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
2059
2060 tmp_reg = fsl_readl(&dr_regs->usbintr);
2061 seq_printf(m,
2062 "USB Interrupt Enable Reg:\n"
2063 "Sleep Enable: %d SOF Received Enable: %d "
2064 "Reset Enable: %d\n"
2065 "System Error Enable: %d "
2066 "Port Change Dectected Enable: %d\n"
2067 "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
2068 (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
2069 (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
2070 (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
2071 (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
2072 (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
2073 (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
2074 (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
2075
2076 tmp_reg = fsl_readl(&dr_regs->frindex);
2077 seq_printf(m,
2078 "USB Frame Index Reg: Frame Number is 0x%x\n\n",
2079 (tmp_reg & USB_FRINDEX_MASKS));
2080
2081 tmp_reg = fsl_readl(&dr_regs->deviceaddr);
2082 seq_printf(m,
2083 "USB Device Address Reg: Device Addr is 0x%x\n\n",
2084 (tmp_reg & USB_DEVICE_ADDRESS_MASK));
2085
2086 tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
2087 seq_printf(m,
2088 "USB Endpoint List Address Reg: "
2089 "Device Addr is 0x%x\n\n",
2090 (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
2091
2092 tmp_reg = fsl_readl(&dr_regs->portsc1);
2093 seq_printf(m,
2094 "USB Port Status&Control Reg:\n"
2095 "Port Transceiver Type : %s Port Speed: %s\n"
2096 "PHY Low Power Suspend: %s Port Reset: %s "
2097 "Port Suspend Mode: %s\n"
2098 "Over-current Change: %s "
2099 "Port Enable/Disable Change: %s\n"
2100 "Port Enabled/Disabled: %s "
2101 "Current Connect Status: %s\n\n", ( {
2102 const char *s;
2103 switch (tmp_reg & PORTSCX_PTS_FSLS) {
2104 case PORTSCX_PTS_UTMI:
2105 s = "UTMI"; break;
2106 case PORTSCX_PTS_ULPI:
2107 s = "ULPI "; break;
2108 case PORTSCX_PTS_FSLS:
2109 s = "FS/LS Serial"; break;
2110 default:
2111 s = "None"; break;
2112 }
2113 s;} ),
2114 usb_speed_string(portscx_device_speed(tmp_reg)),
2115 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
2116 "Normal PHY mode" : "Low power mode",
2117 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
2118 "Not in Reset",
2119 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
2120 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2121 "No",
2122 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2123 "Not change",
2124 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2125 "Not correct",
2126 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2127 "Attached" : "Not-Att");
2128
2129 tmp_reg = fsl_readl(&dr_regs->usbmode);
2130 seq_printf(m,
2131 "USB Mode Reg: Controller Mode is: %s\n\n", ( {
2132 const char *s;
2133 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2134 case USB_MODE_CTRL_MODE_IDLE:
2135 s = "Idle"; break;
2136 case USB_MODE_CTRL_MODE_DEVICE:
2137 s = "Device Controller"; break;
2138 case USB_MODE_CTRL_MODE_HOST:
2139 s = "Host Controller"; break;
2140 default:
2141 s = "None"; break;
2142 }
2143 s;
2144 } ));
2145
2146 tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2147 seq_printf(m,
2148 "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
2149 (tmp_reg & EP_SETUP_STATUS_MASK));
2150
2151 for (i = 0; i < udc->max_ep / 2; i++) {
2152 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2153 seq_printf(m, "EP Ctrl Reg [0x%x]: = [0x%x]\n", i, tmp_reg);
2154 }
2155 tmp_reg = fsl_readl(&dr_regs->endpointprime);
2156 seq_printf(m, "EP Prime Reg = [0x%x]\n\n", tmp_reg);
2157
2158#ifndef CONFIG_ARCH_MXC
2159 if (udc->pdata->have_sysif_regs) {
2160 tmp_reg = usb_sys_regs->snoop1;
2161 seq_printf(m, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
2162
2163 tmp_reg = usb_sys_regs->control;
2164 seq_printf(m, "General Control Reg : = [0x%x]\n\n", tmp_reg);
2165 }
2166#endif
2167
2168
2169 ep = &udc->eps[0];
2170 seq_printf(m, "For %s Maxpkt is 0x%x index is 0x%x\n",
2171 ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2172
2173 if (list_empty(&ep->queue)) {
2174 seq_puts(m, "its req queue is empty\n\n");
2175 } else {
2176 list_for_each_entry(req, &ep->queue, queue) {
2177 seq_printf(m,
2178 "req %p actual 0x%x length 0x%x buf %p\n",
2179 &req->req, req->req.actual,
2180 req->req.length, req->req.buf);
2181 }
2182 }
2183
2184 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2185 if (ep->ep.desc) {
2186 seq_printf(m,
2187 "\nFor %s Maxpkt is 0x%x "
2188 "index is 0x%x\n",
2189 ep->ep.name, ep_maxpacket(ep),
2190 ep_index(ep));
2191
2192 if (list_empty(&ep->queue)) {
2193 seq_puts(m, "its req queue is empty\n\n");
2194 } else {
2195 list_for_each_entry(req, &ep->queue, queue) {
2196 seq_printf(m,
2197 "req %p actual 0x%x length "
2198 "0x%x buf %p\n",
2199 &req->req, req->req.actual,
2200 req->req.length, req->req.buf);
2201 }
2202 }
2203 }
2204 }
2205
2206 spin_unlock_irqrestore(&udc->lock, flags);
2207 return 0;
2208}
2209
2210
2211
2212
2213static int fsl_proc_open(struct inode *inode, struct file *file)
2214{
2215 return single_open(file, fsl_proc_read, NULL);
2216}
2217
2218static const struct file_operations fsl_proc_fops = {
2219 .open = fsl_proc_open,
2220 .read = seq_read,
2221 .llseek = seq_lseek,
2222 .release = single_release,
2223};
2224
2225#define create_proc_file() proc_create(proc_filename, 0, NULL, &fsl_proc_fops)
2226#define remove_proc_file() remove_proc_entry(proc_filename, NULL)
2227
2228#else
2229
2230#define create_proc_file() do {} while (0)
2231#define remove_proc_file() do {} while (0)
2232
2233#endif
2234
2235
2236
2237
2238static void fsl_udc_release(struct device *dev)
2239{
2240 complete(udc_controller->done);
2241 dma_free_coherent(dev->parent, udc_controller->ep_qh_size,
2242 udc_controller->ep_qh, udc_controller->ep_qh_dma);
2243 kfree(udc_controller);
2244}
2245
2246
2247
2248
2249
2250
2251
2252
2253static int struct_udc_setup(struct fsl_udc *udc,
2254 struct platform_device *pdev)
2255{
2256 struct fsl_usb2_platform_data *pdata;
2257 size_t size;
2258
2259 pdata = dev_get_platdata(&pdev->dev);
2260 udc->phy_mode = pdata->phy_mode;
2261
2262 udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2263 if (!udc->eps)
2264 return -1;
2265
2266
2267 size = udc->max_ep * sizeof(struct ep_queue_head);
2268 if (size < QH_ALIGNMENT)
2269 size = QH_ALIGNMENT;
2270 else if ((size % QH_ALIGNMENT) != 0) {
2271 size += QH_ALIGNMENT + 1;
2272 size &= ~(QH_ALIGNMENT - 1);
2273 }
2274 udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2275 &udc->ep_qh_dma, GFP_KERNEL);
2276 if (!udc->ep_qh) {
2277 ERR("malloc QHs for udc failed\n");
2278 kfree(udc->eps);
2279 return -1;
2280 }
2281
2282 udc->ep_qh_size = size;
2283
2284
2285
2286 udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2287 struct fsl_req, req);
2288
2289 udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2290
2291 udc->resume_state = USB_STATE_NOTATTACHED;
2292 udc->usb_state = USB_STATE_POWERED;
2293 udc->ep0_dir = 0;
2294 udc->remote_wakeup = 0;
2295
2296 return 0;
2297}
2298
2299
2300
2301
2302
2303
2304
2305static int struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2306 char *name, int link)
2307{
2308 struct fsl_ep *ep = &udc->eps[index];
2309
2310 ep->udc = udc;
2311 strcpy(ep->name, name);
2312 ep->ep.name = ep->name;
2313
2314 ep->ep.ops = &fsl_ep_ops;
2315 ep->stopped = 0;
2316
2317 if (index == 0) {
2318 ep->ep.caps.type_control = true;
2319 } else {
2320 ep->ep.caps.type_iso = true;
2321 ep->ep.caps.type_bulk = true;
2322 ep->ep.caps.type_int = true;
2323 }
2324
2325 if (index & 1)
2326 ep->ep.caps.dir_in = true;
2327 else
2328 ep->ep.caps.dir_out = true;
2329
2330
2331
2332
2333 usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0);
2334
2335
2336 INIT_LIST_HEAD(&ep->queue);
2337
2338
2339 if (link)
2340 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2341 ep->gadget = &udc->gadget;
2342 ep->qh = &udc->ep_qh[index];
2343
2344 return 0;
2345}
2346
2347
2348
2349
2350
2351static int fsl_udc_probe(struct platform_device *pdev)
2352{
2353 struct fsl_usb2_platform_data *pdata;
2354 struct resource *res;
2355 int ret = -ENODEV;
2356 unsigned int i;
2357 u32 dccparams;
2358
2359 udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2360 if (udc_controller == NULL)
2361 return -ENOMEM;
2362
2363 pdata = dev_get_platdata(&pdev->dev);
2364 udc_controller->pdata = pdata;
2365 spin_lock_init(&udc_controller->lock);
2366 udc_controller->stopped = 1;
2367
2368#ifdef CONFIG_USB_OTG
2369 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
2370 udc_controller->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2371 if (IS_ERR_OR_NULL(udc_controller->transceiver)) {
2372 ERR("Can't find OTG driver!\n");
2373 ret = -ENODEV;
2374 goto err_kfree;
2375 }
2376 }
2377#endif
2378
2379 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2380 if (!res) {
2381 ret = -ENXIO;
2382 goto err_kfree;
2383 }
2384
2385 if (pdata->operating_mode == FSL_USB2_DR_DEVICE) {
2386 if (!request_mem_region(res->start, resource_size(res),
2387 driver_name)) {
2388 ERR("request mem region for %s failed\n", pdev->name);
2389 ret = -EBUSY;
2390 goto err_kfree;
2391 }
2392 }
2393
2394 dr_regs = ioremap(res->start, resource_size(res));
2395 if (!dr_regs) {
2396 ret = -ENOMEM;
2397 goto err_release_mem_region;
2398 }
2399
2400 pdata->regs = (void __iomem *)dr_regs;
2401
2402
2403
2404
2405 if (pdata->init && pdata->init(pdev)) {
2406 ret = -ENODEV;
2407 goto err_iounmap_noclk;
2408 }
2409
2410
2411 fsl_set_accessors(pdata);
2412
2413#ifndef CONFIG_ARCH_MXC
2414 if (pdata->have_sysif_regs)
2415 usb_sys_regs = (void *)dr_regs + USB_DR_SYS_OFFSET;
2416#endif
2417
2418
2419 ret = fsl_udc_clk_init(pdev);
2420 if (ret < 0)
2421 goto err_iounmap_noclk;
2422
2423
2424 dccparams = fsl_readl(&dr_regs->dccparams);
2425 if (!(dccparams & DCCPARAMS_DC)) {
2426 ERR("This SOC doesn't support device role\n");
2427 ret = -ENODEV;
2428 goto err_iounmap;
2429 }
2430
2431
2432 udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2433
2434 udc_controller->irq = platform_get_irq(pdev, 0);
2435 if (!udc_controller->irq) {
2436 ret = -ENODEV;
2437 goto err_iounmap;
2438 }
2439
2440 ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
2441 driver_name, udc_controller);
2442 if (ret != 0) {
2443 ERR("cannot request irq %d err %d\n",
2444 udc_controller->irq, ret);
2445 goto err_iounmap;
2446 }
2447
2448
2449 if (struct_udc_setup(udc_controller, pdev)) {
2450 ERR("Can't initialize udc data structure\n");
2451 ret = -ENOMEM;
2452 goto err_free_irq;
2453 }
2454
2455 if (IS_ERR_OR_NULL(udc_controller->transceiver)) {
2456
2457
2458 dr_controller_setup(udc_controller);
2459 }
2460
2461 ret = fsl_udc_clk_finalize(pdev);
2462 if (ret)
2463 goto err_free_irq;
2464
2465
2466 udc_controller->gadget.ops = &fsl_gadget_ops;
2467 udc_controller->gadget.max_speed = USB_SPEED_HIGH;
2468 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2469 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2470 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2471 udc_controller->gadget.name = driver_name;
2472
2473
2474 dev_set_name(&udc_controller->gadget.dev, "gadget");
2475 udc_controller->gadget.dev.of_node = pdev->dev.of_node;
2476
2477 if (!IS_ERR_OR_NULL(udc_controller->transceiver))
2478 udc_controller->gadget.is_otg = 1;
2479
2480
2481 ep0_setup(udc_controller);
2482
2483
2484 struct_ep_setup(udc_controller, 0, "ep0", 0);
2485
2486
2487
2488 udc_controller->eps[0].ep.desc = &fsl_ep0_desc;
2489 usb_ep_set_maxpacket_limit(&udc_controller->eps[0].ep,
2490 USB_MAX_CTRL_PAYLOAD);
2491
2492
2493
2494 for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2495 char name[14];
2496
2497 sprintf(name, "ep%dout", i);
2498 struct_ep_setup(udc_controller, i * 2, name, 1);
2499 sprintf(name, "ep%din", i);
2500 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2501 }
2502
2503
2504 udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2505 sizeof(struct ep_td_struct),
2506 DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2507 if (udc_controller->td_pool == NULL) {
2508 ret = -ENOMEM;
2509 goto err_free_irq;
2510 }
2511
2512 ret = usb_add_gadget_udc_release(&pdev->dev, &udc_controller->gadget,
2513 fsl_udc_release);
2514 if (ret)
2515 goto err_del_udc;
2516
2517 create_proc_file();
2518 return 0;
2519
2520err_del_udc:
2521 dma_pool_destroy(udc_controller->td_pool);
2522err_free_irq:
2523 free_irq(udc_controller->irq, udc_controller);
2524err_iounmap:
2525 if (pdata->exit)
2526 pdata->exit(pdev);
2527 fsl_udc_clk_release();
2528err_iounmap_noclk:
2529 iounmap(dr_regs);
2530err_release_mem_region:
2531 if (pdata->operating_mode == FSL_USB2_DR_DEVICE)
2532 release_mem_region(res->start, resource_size(res));
2533err_kfree:
2534 kfree(udc_controller);
2535 udc_controller = NULL;
2536 return ret;
2537}
2538
2539
2540
2541
2542static int fsl_udc_remove(struct platform_device *pdev)
2543{
2544 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2545 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
2546
2547 DECLARE_COMPLETION_ONSTACK(done);
2548
2549 if (!udc_controller)
2550 return -ENODEV;
2551
2552 udc_controller->done = &done;
2553 usb_del_gadget_udc(&udc_controller->gadget);
2554
2555 fsl_udc_clk_release();
2556
2557
2558 remove_proc_file();
2559
2560
2561 kfree(udc_controller->status_req->req.buf);
2562 kfree(udc_controller->status_req);
2563 kfree(udc_controller->eps);
2564
2565 dma_pool_destroy(udc_controller->td_pool);
2566 free_irq(udc_controller->irq, udc_controller);
2567 iounmap(dr_regs);
2568 if (pdata->operating_mode == FSL_USB2_DR_DEVICE)
2569 release_mem_region(res->start, resource_size(res));
2570
2571
2572 wait_for_completion(&done);
2573
2574
2575
2576
2577
2578 if (pdata->exit)
2579 pdata->exit(pdev);
2580
2581 return 0;
2582}
2583
2584
2585
2586
2587
2588static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2589{
2590 dr_controller_stop(udc_controller);
2591 return 0;
2592}
2593
2594
2595
2596
2597
2598static int fsl_udc_resume(struct platform_device *pdev)
2599{
2600
2601 if (udc_controller->stopped) {
2602 dr_controller_setup(udc_controller);
2603 dr_controller_run(udc_controller);
2604 }
2605 udc_controller->usb_state = USB_STATE_ATTACHED;
2606 udc_controller->ep0_state = WAIT_FOR_SETUP;
2607 udc_controller->ep0_dir = 0;
2608 return 0;
2609}
2610
2611static int fsl_udc_otg_suspend(struct device *dev, pm_message_t state)
2612{
2613 struct fsl_udc *udc = udc_controller;
2614 u32 mode, usbcmd;
2615
2616 mode = fsl_readl(&dr_regs->usbmode) & USB_MODE_CTRL_MODE_MASK;
2617
2618 pr_debug("%s(): mode 0x%x stopped %d\n", __func__, mode, udc->stopped);
2619
2620
2621
2622
2623
2624
2625 if (udc->stopped) {
2626 pr_debug("gadget already stopped, leaving early\n");
2627 udc->already_stopped = 1;
2628 return 0;
2629 }
2630
2631 if (mode != USB_MODE_CTRL_MODE_DEVICE) {
2632 pr_debug("gadget not in device mode, leaving early\n");
2633 return 0;
2634 }
2635
2636
2637 usbcmd = fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP;
2638 fsl_writel(usbcmd, &dr_regs->usbcmd);
2639
2640 udc->stopped = 1;
2641
2642 pr_info("USB Gadget suspended\n");
2643
2644 return 0;
2645}
2646
2647static int fsl_udc_otg_resume(struct device *dev)
2648{
2649 pr_debug("%s(): stopped %d already_stopped %d\n", __func__,
2650 udc_controller->stopped, udc_controller->already_stopped);
2651
2652
2653
2654
2655
2656 if (udc_controller->already_stopped) {
2657 udc_controller->already_stopped = 0;
2658 pr_debug("gadget was already stopped, leaving early\n");
2659 return 0;
2660 }
2661
2662 pr_info("USB Gadget resume\n");
2663
2664 return fsl_udc_resume(NULL);
2665}
2666
2667
2668
2669static const struct platform_device_id fsl_udc_devtype[] = {
2670 {
2671 .name = "imx-udc-mx27",
2672 }, {
2673 .name = "imx-udc-mx51",
2674 }, {
2675 .name = "fsl-usb2-udc",
2676 }, {
2677
2678 }
2679};
2680MODULE_DEVICE_TABLE(platform, fsl_udc_devtype);
2681static struct platform_driver udc_driver = {
2682 .remove = fsl_udc_remove,
2683
2684 .id_table = fsl_udc_devtype,
2685
2686 .suspend = fsl_udc_suspend,
2687 .resume = fsl_udc_resume,
2688 .driver = {
2689 .name = driver_name,
2690
2691 .suspend = fsl_udc_otg_suspend,
2692 .resume = fsl_udc_otg_resume,
2693 },
2694};
2695
2696module_platform_driver_probe(udc_driver, fsl_udc_probe);
2697
2698MODULE_DESCRIPTION(DRIVER_DESC);
2699MODULE_AUTHOR(DRIVER_AUTHOR);
2700MODULE_LICENSE("GPL");
2701MODULE_ALIAS("platform:fsl-usb2-udc");
2702