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17#include <linux/io.h>
18#include <linux/err.h>
19#include <linux/platform_device.h>
20#include <linux/dma-mapping.h>
21#include <linux/pm_runtime.h>
22#include <linux/module.h>
23#include <linux/usb/usb_phy_generic.h>
24#include <linux/platform_data/usb-omap.h>
25#include <linux/sizes.h>
26
27#include <linux/of.h>
28#include <linux/of_device.h>
29#include <linux/of_address.h>
30#include <linux/of_irq.h>
31#include <linux/usb/of.h>
32
33#include <linux/debugfs.h>
34
35#include "musb_core.h"
36
37static const struct of_device_id musb_dsps_of_match[];
38
39
40
41
42
43
44struct dsps_musb_wrapper {
45 u16 revision;
46 u16 control;
47 u16 status;
48 u16 epintr_set;
49 u16 epintr_clear;
50 u16 epintr_status;
51 u16 coreintr_set;
52 u16 coreintr_clear;
53 u16 coreintr_status;
54 u16 phy_utmi;
55 u16 mode;
56 u16 tx_mode;
57 u16 rx_mode;
58
59
60 unsigned reset:5;
61
62
63 unsigned usb_shift:5;
64 u32 usb_mask;
65 u32 usb_bitmap;
66 unsigned drvvbus:5;
67
68 unsigned txep_shift:5;
69 u32 txep_mask;
70 u32 txep_bitmap;
71
72 unsigned rxep_shift:5;
73 u32 rxep_mask;
74 u32 rxep_bitmap;
75
76
77 unsigned otg_disable:5;
78
79
80 unsigned iddig:5;
81 unsigned iddig_mux:5;
82
83 unsigned poll_timeout;
84};
85
86
87
88
89struct dsps_context {
90 u32 control;
91 u32 epintr;
92 u32 coreintr;
93 u32 phy_utmi;
94 u32 mode;
95 u32 tx_mode;
96 u32 rx_mode;
97};
98
99
100
101
102struct dsps_glue {
103 struct device *dev;
104 struct platform_device *musb;
105 const struct dsps_musb_wrapper *wrp;
106 int vbus_irq;
107 unsigned long last_timer;
108 bool sw_babble_enabled;
109 void __iomem *usbss_base;
110
111 struct dsps_context context;
112 struct debugfs_regset32 regset;
113 struct dentry *dbgfs_root;
114};
115
116static const struct debugfs_reg32 dsps_musb_regs[] = {
117 { "revision", 0x00 },
118 { "control", 0x14 },
119 { "status", 0x18 },
120 { "eoi", 0x24 },
121 { "intr0_stat", 0x30 },
122 { "intr1_stat", 0x34 },
123 { "intr0_set", 0x38 },
124 { "intr1_set", 0x3c },
125 { "txmode", 0x70 },
126 { "rxmode", 0x74 },
127 { "autoreq", 0xd0 },
128 { "srpfixtime", 0xd4 },
129 { "tdown", 0xd8 },
130 { "phy_utmi", 0xe0 },
131 { "mode", 0xe8 },
132};
133
134static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
135{
136 struct musb *musb = platform_get_drvdata(glue->musb);
137 int wait;
138
139 if (wait_ms < 0)
140 wait = msecs_to_jiffies(glue->wrp->poll_timeout);
141 else
142 wait = msecs_to_jiffies(wait_ms);
143
144 mod_timer(&musb->dev_timer, jiffies + wait);
145}
146
147
148
149
150static void dsps_mod_timer_optional(struct dsps_glue *glue)
151{
152 if (glue->vbus_irq)
153 return;
154
155 dsps_mod_timer(glue, -1);
156}
157
158
159#define USBSS_IRQ_STATUS 0x28
160#define USBSS_IRQ_ENABLER 0x2c
161#define USBSS_IRQ_CLEARR 0x30
162
163#define USBSS_IRQ_PD_COMP (1 << 2)
164
165
166
167
168static void dsps_musb_enable(struct musb *musb)
169{
170 struct device *dev = musb->controller;
171 struct platform_device *pdev = to_platform_device(dev->parent);
172 struct dsps_glue *glue = platform_get_drvdata(pdev);
173 const struct dsps_musb_wrapper *wrp = glue->wrp;
174 void __iomem *reg_base = musb->ctrl_base;
175 u32 epmask, coremask;
176
177
178 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
179 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
180 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
181
182 musb_writel(reg_base, wrp->epintr_set, epmask);
183 musb_writel(reg_base, wrp->coreintr_set, coremask);
184
185 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
186 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
187 dsps_mod_timer(glue, -1);
188}
189
190
191
192
193static void dsps_musb_disable(struct musb *musb)
194{
195 struct device *dev = musb->controller;
196 struct platform_device *pdev = to_platform_device(dev->parent);
197 struct dsps_glue *glue = platform_get_drvdata(pdev);
198 const struct dsps_musb_wrapper *wrp = glue->wrp;
199 void __iomem *reg_base = musb->ctrl_base;
200
201 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
202 musb_writel(reg_base, wrp->epintr_clear,
203 wrp->txep_bitmap | wrp->rxep_bitmap);
204 del_timer_sync(&musb->dev_timer);
205}
206
207
208static int dsps_check_status(struct musb *musb, void *unused)
209{
210 void __iomem *mregs = musb->mregs;
211 struct device *dev = musb->controller;
212 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
213 const struct dsps_musb_wrapper *wrp = glue->wrp;
214 u8 devctl;
215 int skip_session = 0;
216
217 if (glue->vbus_irq)
218 del_timer(&musb->dev_timer);
219
220
221
222
223
224 devctl = musb_readb(mregs, MUSB_DEVCTL);
225 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
226 usb_otg_state_string(musb->xceiv->otg->state));
227
228 switch (musb->xceiv->otg->state) {
229 case OTG_STATE_A_WAIT_VRISE:
230 dsps_mod_timer_optional(glue);
231 break;
232 case OTG_STATE_A_WAIT_BCON:
233
234 if (musb->port_mode == MUSB_PORT_MODE_HOST) {
235 dsps_mod_timer_optional(glue);
236 break;
237 }
238 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
239 skip_session = 1;
240
241
242 case OTG_STATE_A_IDLE:
243 case OTG_STATE_B_IDLE:
244 if (!glue->vbus_irq) {
245 if (devctl & MUSB_DEVCTL_BDEVICE) {
246 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
247 MUSB_DEV_MODE(musb);
248 } else {
249 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
250 MUSB_HST_MODE(musb);
251 }
252 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
253 musb_writeb(mregs, MUSB_DEVCTL,
254 MUSB_DEVCTL_SESSION);
255 }
256 dsps_mod_timer_optional(glue);
257 break;
258 case OTG_STATE_A_WAIT_VFALL:
259 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
260 musb_writel(musb->ctrl_base, wrp->coreintr_set,
261 MUSB_INTR_VBUSERROR << wrp->usb_shift);
262 break;
263 default:
264 break;
265 }
266
267 return 0;
268}
269
270static void otg_timer(struct timer_list *t)
271{
272 struct musb *musb = from_timer(musb, t, dev_timer);
273 struct device *dev = musb->controller;
274 unsigned long flags;
275 int err;
276
277 err = pm_runtime_get(dev);
278 if ((err != -EINPROGRESS) && err < 0) {
279 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
280 pm_runtime_put_noidle(dev);
281
282 return;
283 }
284
285 spin_lock_irqsave(&musb->lock, flags);
286 err = musb_queue_resume_work(musb, dsps_check_status, NULL);
287 if (err < 0)
288 dev_err(dev, "%s resume work: %i\n", __func__, err);
289 spin_unlock_irqrestore(&musb->lock, flags);
290 pm_runtime_mark_last_busy(dev);
291 pm_runtime_put_autosuspend(dev);
292}
293
294static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
295{
296 u32 epintr;
297 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
298 const struct dsps_musb_wrapper *wrp = glue->wrp;
299
300
301 epintr = (1 << epnum) << wrp->rxep_shift;
302 musb_writel(musb->ctrl_base, wrp->epintr_status, epintr);
303}
304
305static irqreturn_t dsps_interrupt(int irq, void *hci)
306{
307 struct musb *musb = hci;
308 void __iomem *reg_base = musb->ctrl_base;
309 struct device *dev = musb->controller;
310 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
311 const struct dsps_musb_wrapper *wrp = glue->wrp;
312 unsigned long flags;
313 irqreturn_t ret = IRQ_NONE;
314 u32 epintr, usbintr;
315
316 spin_lock_irqsave(&musb->lock, flags);
317
318
319 epintr = musb_readl(reg_base, wrp->epintr_status);
320 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
321 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
322
323 if (epintr)
324 musb_writel(reg_base, wrp->epintr_status, epintr);
325
326
327 usbintr = musb_readl(reg_base, wrp->coreintr_status);
328 if (!usbintr && !epintr)
329 goto out;
330
331 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
332 if (usbintr)
333 musb_writel(reg_base, wrp->coreintr_status, usbintr);
334
335 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
336 usbintr, epintr);
337
338 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
339 int drvvbus = musb_readl(reg_base, wrp->status);
340 void __iomem *mregs = musb->mregs;
341 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
342 int err;
343
344 err = musb->int_usb & MUSB_INTR_VBUSERROR;
345 if (err) {
346
347
348
349
350
351
352
353
354
355
356
357 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
358 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
359 dsps_mod_timer_optional(glue);
360 WARNING("VBUS error workaround (delay coming)\n");
361 } else if (drvvbus) {
362 MUSB_HST_MODE(musb);
363 musb->xceiv->otg->default_a = 1;
364 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
365 dsps_mod_timer_optional(glue);
366 } else {
367 musb->is_active = 0;
368 MUSB_DEV_MODE(musb);
369 musb->xceiv->otg->default_a = 0;
370 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
371 }
372
373
374 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
375 drvvbus ? "on" : "off",
376 usb_otg_state_string(musb->xceiv->otg->state),
377 err ? " ERROR" : "",
378 devctl);
379 ret = IRQ_HANDLED;
380 }
381
382 if (musb->int_tx || musb->int_rx || musb->int_usb)
383 ret |= musb_interrupt(musb);
384
385
386 switch (musb->xceiv->otg->state) {
387 case OTG_STATE_B_IDLE:
388 case OTG_STATE_A_WAIT_BCON:
389 dsps_mod_timer_optional(glue);
390 break;
391 default:
392 break;
393 }
394
395out:
396 spin_unlock_irqrestore(&musb->lock, flags);
397
398 return ret;
399}
400
401static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
402{
403 struct dentry *root;
404 struct dentry *file;
405 char buf[128];
406
407 sprintf(buf, "%s.dsps", dev_name(musb->controller));
408 root = debugfs_create_dir(buf, NULL);
409 if (!root)
410 return -ENOMEM;
411 glue->dbgfs_root = root;
412
413 glue->regset.regs = dsps_musb_regs;
414 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
415 glue->regset.base = musb->ctrl_base;
416
417 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
418 if (!file) {
419 debugfs_remove_recursive(root);
420 return -ENOMEM;
421 }
422 return 0;
423}
424
425static int dsps_musb_init(struct musb *musb)
426{
427 struct device *dev = musb->controller;
428 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
429 struct platform_device *parent = to_platform_device(dev->parent);
430 const struct dsps_musb_wrapper *wrp = glue->wrp;
431 void __iomem *reg_base;
432 struct resource *r;
433 u32 rev, val;
434 int ret;
435
436 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
437 reg_base = devm_ioremap_resource(dev, r);
438 if (IS_ERR(reg_base))
439 return PTR_ERR(reg_base);
440 musb->ctrl_base = reg_base;
441
442
443 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
444 if (IS_ERR(musb->xceiv))
445 return PTR_ERR(musb->xceiv);
446
447 musb->phy = devm_phy_get(dev->parent, "usb2-phy");
448
449
450 rev = musb_readl(reg_base, wrp->revision);
451 if (!rev)
452 return -ENODEV;
453
454 usb_phy_init(musb->xceiv);
455 if (IS_ERR(musb->phy)) {
456 musb->phy = NULL;
457 } else {
458 ret = phy_init(musb->phy);
459 if (ret < 0)
460 return ret;
461 ret = phy_power_on(musb->phy);
462 if (ret) {
463 phy_exit(musb->phy);
464 return ret;
465 }
466 }
467
468 timer_setup(&musb->dev_timer, otg_timer, 0);
469
470
471 musb_writel(reg_base, wrp->control, (1 << wrp->reset));
472
473 musb->isr = dsps_interrupt;
474
475
476 val = musb_readl(reg_base, wrp->phy_utmi);
477 val &= ~(1 << wrp->otg_disable);
478 musb_writel(musb->ctrl_base, wrp->phy_utmi, val);
479
480
481
482
483
484
485
486 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
487 if (val & MUSB_BABBLE_RCV_DISABLE) {
488 glue->sw_babble_enabled = true;
489 val |= MUSB_BABBLE_SW_SESSION_CTRL;
490 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
491 }
492
493 dsps_mod_timer(glue, -1);
494
495 return dsps_musb_dbg_init(musb, glue);
496}
497
498static int dsps_musb_exit(struct musb *musb)
499{
500 struct device *dev = musb->controller;
501 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
502
503 del_timer_sync(&musb->dev_timer);
504 usb_phy_shutdown(musb->xceiv);
505 phy_power_off(musb->phy);
506 phy_exit(musb->phy);
507 debugfs_remove_recursive(glue->dbgfs_root);
508
509 return 0;
510}
511
512static int dsps_musb_set_mode(struct musb *musb, u8 mode)
513{
514 struct device *dev = musb->controller;
515 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
516 const struct dsps_musb_wrapper *wrp = glue->wrp;
517 void __iomem *ctrl_base = musb->ctrl_base;
518 u32 reg;
519
520 reg = musb_readl(ctrl_base, wrp->mode);
521
522 switch (mode) {
523 case MUSB_HOST:
524 reg &= ~(1 << wrp->iddig);
525
526
527
528
529
530
531 reg |= (1 << wrp->iddig_mux);
532
533 musb_writel(ctrl_base, wrp->mode, reg);
534 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
535 break;
536 case MUSB_PERIPHERAL:
537 reg |= (1 << wrp->iddig);
538
539
540
541
542
543
544 reg |= (1 << wrp->iddig_mux);
545
546 musb_writel(ctrl_base, wrp->mode, reg);
547 break;
548 case MUSB_OTG:
549 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
550 break;
551 default:
552 dev_err(glue->dev, "unsupported mode %d\n", mode);
553 return -EINVAL;
554 }
555
556 return 0;
557}
558
559static bool dsps_sw_babble_control(struct musb *musb)
560{
561 u8 babble_ctl;
562 bool session_restart = false;
563
564 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
565 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
566 babble_ctl);
567
568
569
570
571 dev_dbg(musb->controller, "STUCK_J is %s\n",
572 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
573
574 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
575 int timeout = 10;
576
577
578
579
580
581 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
582 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
583 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
584
585
586 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
587 do {
588 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
589 udelay(1);
590 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
591
592
593 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
594
595
596
597
598
599 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
600 babble_ctl);
601 session_restart = true;
602 }
603 } else {
604 session_restart = true;
605 }
606
607 return session_restart;
608}
609
610static int dsps_musb_recover(struct musb *musb)
611{
612 struct device *dev = musb->controller;
613 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
614 int session_restart = 0;
615
616 if (glue->sw_babble_enabled)
617 session_restart = dsps_sw_babble_control(musb);
618 else
619 session_restart = 1;
620
621 return session_restart ? 0 : -EPIPE;
622}
623
624
625static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
626{
627 void __iomem *fifo = hw_ep->fifo;
628
629 if (len >= 4) {
630 ioread32_rep(fifo, dst, len >> 2);
631 dst += len & ~0x03;
632 len &= 0x03;
633 }
634
635
636 if (len > 0) {
637 u32 val = musb_readl(fifo, 0);
638 memcpy(dst, &val, len);
639 }
640}
641
642#ifdef CONFIG_USB_TI_CPPI41_DMA
643static void dsps_dma_controller_callback(struct dma_controller *c)
644{
645 struct musb *musb = c->musb;
646 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
647 void __iomem *usbss_base = glue->usbss_base;
648 u32 status;
649
650 status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
651 if (status & USBSS_IRQ_PD_COMP)
652 musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
653}
654
655static struct dma_controller *
656dsps_dma_controller_create(struct musb *musb, void __iomem *base)
657{
658 struct dma_controller *controller;
659 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
660 void __iomem *usbss_base = glue->usbss_base;
661
662 controller = cppi41_dma_controller_create(musb, base);
663 if (IS_ERR_OR_NULL(controller))
664 return controller;
665
666 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
667 controller->dma_callback = dsps_dma_controller_callback;
668
669 return controller;
670}
671
672static void dsps_dma_controller_destroy(struct dma_controller *c)
673{
674 struct musb *musb = c->musb;
675 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
676 void __iomem *usbss_base = glue->usbss_base;
677
678 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
679 cppi41_dma_controller_destroy(c);
680}
681
682#ifdef CONFIG_PM_SLEEP
683static void dsps_dma_controller_suspend(struct dsps_glue *glue)
684{
685 void __iomem *usbss_base = glue->usbss_base;
686
687 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
688}
689
690static void dsps_dma_controller_resume(struct dsps_glue *glue)
691{
692 void __iomem *usbss_base = glue->usbss_base;
693
694 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
695}
696#endif
697#else
698#ifdef CONFIG_PM_SLEEP
699static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
700static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
701#endif
702#endif
703
704static struct musb_platform_ops dsps_ops = {
705 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
706 .init = dsps_musb_init,
707 .exit = dsps_musb_exit,
708
709#ifdef CONFIG_USB_TI_CPPI41_DMA
710 .dma_init = dsps_dma_controller_create,
711 .dma_exit = dsps_dma_controller_destroy,
712#endif
713 .enable = dsps_musb_enable,
714 .disable = dsps_musb_disable,
715
716 .set_mode = dsps_musb_set_mode,
717 .recover = dsps_musb_recover,
718 .clear_ep_rxintr = dsps_musb_clear_ep_rxintr,
719};
720
721static u64 musb_dmamask = DMA_BIT_MASK(32);
722
723static int get_int_prop(struct device_node *dn, const char *s)
724{
725 int ret;
726 u32 val;
727
728 ret = of_property_read_u32(dn, s, &val);
729 if (ret)
730 return 0;
731 return val;
732}
733
734static int get_musb_port_mode(struct device *dev)
735{
736 enum usb_dr_mode mode;
737
738 mode = usb_get_dr_mode(dev);
739 switch (mode) {
740 case USB_DR_MODE_HOST:
741 return MUSB_PORT_MODE_HOST;
742
743 case USB_DR_MODE_PERIPHERAL:
744 return MUSB_PORT_MODE_GADGET;
745
746 case USB_DR_MODE_UNKNOWN:
747 case USB_DR_MODE_OTG:
748 default:
749 return MUSB_PORT_MODE_DUAL_ROLE;
750 }
751}
752
753static int dsps_create_musb_pdev(struct dsps_glue *glue,
754 struct platform_device *parent)
755{
756 struct musb_hdrc_platform_data pdata;
757 struct resource resources[2];
758 struct resource *res;
759 struct device *dev = &parent->dev;
760 struct musb_hdrc_config *config;
761 struct platform_device *musb;
762 struct device_node *dn = parent->dev.of_node;
763 int ret, val;
764
765 memset(resources, 0, sizeof(resources));
766 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
767 if (!res) {
768 dev_err(dev, "failed to get memory.\n");
769 return -EINVAL;
770 }
771 resources[0] = *res;
772
773 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
774 if (!res) {
775 dev_err(dev, "failed to get irq.\n");
776 return -EINVAL;
777 }
778 resources[1] = *res;
779
780
781 musb = platform_device_alloc("musb-hdrc",
782 (resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
783 if (!musb) {
784 dev_err(dev, "failed to allocate musb device\n");
785 return -ENOMEM;
786 }
787
788 musb->dev.parent = dev;
789 musb->dev.dma_mask = &musb_dmamask;
790 musb->dev.coherent_dma_mask = musb_dmamask;
791
792 glue->musb = musb;
793
794 ret = platform_device_add_resources(musb, resources,
795 ARRAY_SIZE(resources));
796 if (ret) {
797 dev_err(dev, "failed to add resources\n");
798 goto err;
799 }
800
801 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
802 if (!config) {
803 ret = -ENOMEM;
804 goto err;
805 }
806 pdata.config = config;
807 pdata.platform_ops = &dsps_ops;
808
809 config->num_eps = get_int_prop(dn, "mentor,num-eps");
810 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
811 config->host_port_deassert_reset_at_resume = 1;
812 pdata.mode = get_musb_port_mode(dev);
813
814 pdata.power = get_int_prop(dn, "mentor,power") / 2;
815
816 ret = of_property_read_u32(dn, "mentor,multipoint", &val);
817 if (!ret && val)
818 config->multipoint = true;
819
820 config->maximum_speed = usb_get_maximum_speed(&parent->dev);
821 switch (config->maximum_speed) {
822 case USB_SPEED_LOW:
823 case USB_SPEED_FULL:
824 break;
825 case USB_SPEED_SUPER:
826 dev_warn(dev, "ignore incorrect maximum_speed "
827 "(super-speed) setting in dts");
828
829 default:
830 config->maximum_speed = USB_SPEED_HIGH;
831 }
832
833 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
834 if (ret) {
835 dev_err(dev, "failed to add platform_data\n");
836 goto err;
837 }
838
839 ret = platform_device_add(musb);
840 if (ret) {
841 dev_err(dev, "failed to register musb device\n");
842 goto err;
843 }
844 return 0;
845
846err:
847 platform_device_put(musb);
848 return ret;
849}
850
851static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
852{
853 struct dsps_glue *glue = priv;
854 struct musb *musb = platform_get_drvdata(glue->musb);
855
856 if (!musb)
857 return IRQ_NONE;
858
859 dev_dbg(glue->dev, "VBUS interrupt\n");
860 dsps_mod_timer(glue, 0);
861
862 return IRQ_HANDLED;
863}
864
865static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
866 struct dsps_glue *glue)
867{
868 int error;
869
870 glue->vbus_irq = platform_get_irq_byname(pdev, "vbus");
871 if (glue->vbus_irq == -EPROBE_DEFER)
872 return -EPROBE_DEFER;
873
874 if (glue->vbus_irq <= 0) {
875 glue->vbus_irq = 0;
876 return 0;
877 }
878
879 error = devm_request_threaded_irq(glue->dev, glue->vbus_irq,
880 NULL, dsps_vbus_threaded_irq,
881 IRQF_ONESHOT,
882 "vbus", glue);
883 if (error) {
884 glue->vbus_irq = 0;
885 return error;
886 }
887 dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
888
889 return 0;
890}
891
892static int dsps_probe(struct platform_device *pdev)
893{
894 const struct of_device_id *match;
895 const struct dsps_musb_wrapper *wrp;
896 struct dsps_glue *glue;
897 int ret;
898
899 if (!strcmp(pdev->name, "musb-hdrc"))
900 return -ENODEV;
901
902 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
903 if (!match) {
904 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
905 return -EINVAL;
906 }
907 wrp = match->data;
908
909 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
910 dsps_ops.read_fifo = dsps_read_fifo32;
911
912
913 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
914 if (!glue)
915 return -ENOMEM;
916
917 glue->dev = &pdev->dev;
918 glue->wrp = wrp;
919 glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0);
920 if (!glue->usbss_base)
921 return -ENXIO;
922
923 if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
924 ret = dsps_setup_optional_vbus_irq(pdev, glue);
925 if (ret)
926 goto err_iounmap;
927 }
928
929 platform_set_drvdata(pdev, glue);
930 pm_runtime_enable(&pdev->dev);
931 ret = dsps_create_musb_pdev(glue, pdev);
932 if (ret)
933 goto err;
934
935 return 0;
936
937err:
938 pm_runtime_disable(&pdev->dev);
939err_iounmap:
940 iounmap(glue->usbss_base);
941 return ret;
942}
943
944static int dsps_remove(struct platform_device *pdev)
945{
946 struct dsps_glue *glue = platform_get_drvdata(pdev);
947
948 platform_device_unregister(glue->musb);
949
950 pm_runtime_disable(&pdev->dev);
951 iounmap(glue->usbss_base);
952
953 return 0;
954}
955
956static const struct dsps_musb_wrapper am33xx_driver_data = {
957 .revision = 0x00,
958 .control = 0x14,
959 .status = 0x18,
960 .epintr_set = 0x38,
961 .epintr_clear = 0x40,
962 .epintr_status = 0x30,
963 .coreintr_set = 0x3c,
964 .coreintr_clear = 0x44,
965 .coreintr_status = 0x34,
966 .phy_utmi = 0xe0,
967 .mode = 0xe8,
968 .tx_mode = 0x70,
969 .rx_mode = 0x74,
970 .reset = 0,
971 .otg_disable = 21,
972 .iddig = 8,
973 .iddig_mux = 7,
974 .usb_shift = 0,
975 .usb_mask = 0x1ff,
976 .usb_bitmap = (0x1ff << 0),
977 .drvvbus = 8,
978 .txep_shift = 0,
979 .txep_mask = 0xffff,
980 .txep_bitmap = (0xffff << 0),
981 .rxep_shift = 16,
982 .rxep_mask = 0xfffe,
983 .rxep_bitmap = (0xfffe << 16),
984 .poll_timeout = 2000,
985};
986
987static const struct of_device_id musb_dsps_of_match[] = {
988 { .compatible = "ti,musb-am33xx",
989 .data = &am33xx_driver_data, },
990 { .compatible = "ti,musb-dm816",
991 .data = &am33xx_driver_data, },
992 { },
993};
994MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
995
996#ifdef CONFIG_PM_SLEEP
997static int dsps_suspend(struct device *dev)
998{
999 struct dsps_glue *glue = dev_get_drvdata(dev);
1000 const struct dsps_musb_wrapper *wrp = glue->wrp;
1001 struct musb *musb = platform_get_drvdata(glue->musb);
1002 void __iomem *mbase;
1003 int ret;
1004
1005 if (!musb)
1006
1007 return 0;
1008
1009 ret = pm_runtime_get_sync(dev);
1010 if (ret < 0) {
1011 pm_runtime_put_noidle(dev);
1012 return ret;
1013 }
1014
1015 del_timer_sync(&musb->dev_timer);
1016
1017 mbase = musb->ctrl_base;
1018 glue->context.control = musb_readl(mbase, wrp->control);
1019 glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
1020 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
1021 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
1022 glue->context.mode = musb_readl(mbase, wrp->mode);
1023 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
1024 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
1025
1026 dsps_dma_controller_suspend(glue);
1027
1028 return 0;
1029}
1030
1031static int dsps_resume(struct device *dev)
1032{
1033 struct dsps_glue *glue = dev_get_drvdata(dev);
1034 const struct dsps_musb_wrapper *wrp = glue->wrp;
1035 struct musb *musb = platform_get_drvdata(glue->musb);
1036 void __iomem *mbase;
1037
1038 if (!musb)
1039 return 0;
1040
1041 dsps_dma_controller_resume(glue);
1042
1043 mbase = musb->ctrl_base;
1044 musb_writel(mbase, wrp->control, glue->context.control);
1045 musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
1046 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
1047 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
1048 musb_writel(mbase, wrp->mode, glue->context.mode);
1049 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
1050 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
1051 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
1052 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
1053 dsps_mod_timer(glue, -1);
1054
1055 pm_runtime_put(dev);
1056
1057 return 0;
1058}
1059#endif
1060
1061static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
1062
1063static struct platform_driver dsps_usbss_driver = {
1064 .probe = dsps_probe,
1065 .remove = dsps_remove,
1066 .driver = {
1067 .name = "musb-dsps",
1068 .pm = &dsps_pm_ops,
1069 .of_match_table = musb_dsps_of_match,
1070 },
1071};
1072
1073MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
1074MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
1075MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
1076MODULE_LICENSE("GPL v2");
1077
1078module_platform_driver(dsps_usbss_driver);
1079