1
2
3
4
5
6
7
8
9
10
11
12
13
14
15#ifndef __SOUND_HDA_CONTROLLER_H
16#define __SOUND_HDA_CONTROLLER_H
17
18#include <linux/timecounter.h>
19#include <linux/interrupt.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/initval.h>
23#include "hda_codec.h"
24#include <sound/hda_register.h>
25
26#define AZX_MAX_CODECS HDA_MAX_CODECS
27#define AZX_DEFAULT_CODECS 4
28
29
30
31#define AZX_DCAPS_NO_TCSEL (1 << 8)
32#define AZX_DCAPS_NO_MSI (1 << 9)
33#define AZX_DCAPS_SNOOP_MASK (3 << 10)
34#define AZX_DCAPS_SNOOP_OFF (1 << 12)
35#ifdef CONFIG_SND_HDA_I915
36#define AZX_DCAPS_I915_COMPONENT (1 << 13)
37#else
38#define AZX_DCAPS_I915_COMPONENT 0
39#endif
40
41#define AZX_DCAPS_CTX_WORKAROUND (1 << 15)
42#define AZX_DCAPS_POSFIX_LPIB (1 << 16)
43
44#define AZX_DCAPS_NO_64BIT (1 << 18)
45#define AZX_DCAPS_SYNC_WRITE (1 << 19)
46#define AZX_DCAPS_OLD_SSYNC (1 << 20)
47#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21)
48
49#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23)
50
51#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25)
52#define AZX_DCAPS_PM_RUNTIME (1 << 26)
53#ifdef CONFIG_SND_HDA_I915
54#define AZX_DCAPS_I915_POWERWELL (1 << 27)
55#else
56#define AZX_DCAPS_I915_POWERWELL 0
57#endif
58#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28)
59#define AZX_DCAPS_NO_MSI64 (1 << 29)
60#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30)
61
62enum {
63 AZX_SNOOP_TYPE_NONE,
64 AZX_SNOOP_TYPE_SCH,
65 AZX_SNOOP_TYPE_ATI,
66 AZX_SNOOP_TYPE_NVIDIA,
67};
68
69struct azx_dev {
70 struct hdac_stream core;
71
72 unsigned int irq_pending:1;
73
74
75
76
77
78 unsigned int insufficient:1;
79 unsigned int wc_marked:1;
80};
81
82#define azx_stream(dev) (&(dev)->core)
83#define stream_to_azx_dev(s) container_of(s, struct azx_dev, core)
84
85struct azx;
86
87
88struct hda_controller_ops {
89
90 int (*disable_msi_reset_irq)(struct azx *);
91 int (*substream_alloc_pages)(struct azx *chip,
92 struct snd_pcm_substream *substream,
93 size_t size);
94 int (*substream_free_pages)(struct azx *chip,
95 struct snd_pcm_substream *substream);
96 void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
97 struct vm_area_struct *area);
98
99 int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
100
101 int (*link_power)(struct azx *chip, bool enable);
102};
103
104struct azx_pcm {
105 struct azx *chip;
106 struct snd_pcm *pcm;
107 struct hda_codec *codec;
108 struct hda_pcm *info;
109 struct list_head list;
110};
111
112typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
113typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
114
115struct azx {
116 struct hda_bus bus;
117
118 struct snd_card *card;
119 struct pci_dev *pci;
120 int dev_index;
121
122
123 int driver_type;
124 unsigned int driver_caps;
125 int playback_streams;
126 int playback_index_offset;
127 int capture_streams;
128 int capture_index_offset;
129 int num_streams;
130 const int *jackpoll_ms;
131
132
133 const struct hda_controller_ops *ops;
134
135
136 azx_get_pos_callback_t get_position[2];
137 azx_get_delay_callback_t get_delay[2];
138
139
140 struct mutex open_mutex;
141
142
143 struct list_head pcm_list;
144
145
146 int codec_probe_mask;
147 unsigned int beep_mode;
148
149#ifdef CONFIG_SND_HDA_PATCH_LOADER
150 const struct firmware *fw;
151#endif
152
153
154 int bdl_pos_adj;
155 int poll_count;
156 unsigned int running:1;
157 unsigned int fallback_to_single_cmd:1;
158 unsigned int single_cmd:1;
159 unsigned int polling_mode:1;
160 unsigned int msi:1;
161 unsigned int probing:1;
162 unsigned int snoop:1;
163 unsigned int align_buffer_size:1;
164 unsigned int region_requested:1;
165 unsigned int disabled:1;
166
167
168 unsigned int gts_present:1;
169
170#ifdef CONFIG_SND_HDA_DSP_LOADER
171 struct azx_dev saved_azx_dev;
172#endif
173};
174
175#define azx_bus(chip) (&(chip)->bus.core)
176#define bus_to_azx(_bus) container_of(_bus, struct azx, bus.core)
177
178#ifdef CONFIG_X86
179#define azx_snoop(chip) ((chip)->snoop)
180#else
181#define azx_snoop(chip) true
182#endif
183
184
185
186
187
188#define azx_writel(chip, reg, value) \
189 snd_hdac_chip_writel(azx_bus(chip), reg, value)
190#define azx_readl(chip, reg) \
191 snd_hdac_chip_readl(azx_bus(chip), reg)
192#define azx_writew(chip, reg, value) \
193 snd_hdac_chip_writew(azx_bus(chip), reg, value)
194#define azx_readw(chip, reg) \
195 snd_hdac_chip_readw(azx_bus(chip), reg)
196#define azx_writeb(chip, reg, value) \
197 snd_hdac_chip_writeb(azx_bus(chip), reg, value)
198#define azx_readb(chip, reg) \
199 snd_hdac_chip_readb(azx_bus(chip), reg)
200
201#define azx_has_pm_runtime(chip) \
202 ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)
203
204
205static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
206{
207 return substream->runtime->private_data;
208}
209unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev);
210unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev);
211unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev);
212
213
214void azx_stop_all_streams(struct azx *chip);
215
216
217#define azx_alloc_stream_pages(chip) \
218 snd_hdac_bus_alloc_stream_pages(azx_bus(chip))
219#define azx_free_stream_pages(chip) \
220 snd_hdac_bus_free_stream_pages(azx_bus(chip))
221
222
223void azx_init_chip(struct azx *chip, bool full_reset);
224void azx_stop_chip(struct azx *chip);
225#define azx_enter_link_reset(chip) \
226 snd_hdac_bus_enter_link_reset(azx_bus(chip))
227irqreturn_t azx_interrupt(int irq, void *dev_id);
228
229
230int azx_bus_init(struct azx *chip, const char *model,
231 const struct hdac_io_ops *io_ops);
232int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
233int azx_codec_configure(struct azx *chip);
234int azx_init_streams(struct azx *chip);
235void azx_free_streams(struct azx *chip);
236
237#endif
238