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10#ifndef __CPUPOWERUTILS_HELPERS__
11#define __CPUPOWERUTILS_HELPERS__
12
13#include <libintl.h>
14#include <locale.h>
15
16#include "helpers/bitmask.h"
17#include <cpupower.h>
18
19
20#ifdef NLS
21
22#define _(String) gettext(String)
23#ifndef gettext_noop
24#define gettext_noop(String) String
25#endif
26#define N_(String) gettext_noop(String)
27
28#else
29
30#define _(String) String
31#define N_(String) String
32
33#endif
34
35
36extern int run_as_root;
37extern int base_cpu;
38extern struct bitmask *cpus_chosen;
39
40
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43
44
45
46
47#ifdef DEBUG
48extern int be_verbose;
49
50#define dprint(fmt, ...) { \
51 if (be_verbose) { \
52 fprintf(stderr, "%s: " fmt, \
53 __func__, ##__VA_ARGS__); \
54 } \
55 }
56#else
57static inline void dprint(const char *fmt, ...) { }
58#endif
59extern int be_verbose;
60
61
62
63enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL,
64 X86_VENDOR_AMD, X86_VENDOR_MAX};
65
66#define CPUPOWER_CAP_INV_TSC 0x00000001
67#define CPUPOWER_CAP_APERF 0x00000002
68#define CPUPOWER_CAP_AMD_CBP 0x00000004
69#define CPUPOWER_CAP_PERF_BIAS 0x00000008
70#define CPUPOWER_CAP_HAS_TURBO_RATIO 0x00000010
71#define CPUPOWER_CAP_IS_SNB 0x00000020
72#define CPUPOWER_CAP_INTEL_IDA 0x00000040
73
74#define CPUPOWER_AMD_CPBDIS 0x02000000
75
76#define MAX_HW_PSTATES 10
77
78struct cpupower_cpu_info {
79 enum cpupower_cpu_vendor vendor;
80 unsigned int family;
81 unsigned int model;
82 unsigned int stepping;
83
84 unsigned long long caps;
85};
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93
94
95extern int get_cpu_info(struct cpupower_cpu_info *cpu_info);
96extern struct cpupower_cpu_info cpupower_cpu_info;
97
98
99
100#if defined(__i386__) || defined(__x86_64__)
101
102#include <pci/pci.h>
103
104
105extern int read_msr(int cpu, unsigned int idx, unsigned long long *val);
106extern int write_msr(int cpu, unsigned int idx, unsigned long long val);
107
108extern int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val);
109extern int msr_intel_get_perf_bias(unsigned int cpu);
110extern unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu);
111
112
113
114
115extern int amd_pci_get_num_boost_states(int *active, int *states);
116extern struct pci_dev *pci_acc_init(struct pci_access **pacc, int domain,
117 int bus, int slot, int func, int vendor,
118 int dev);
119extern struct pci_dev *pci_slot_func_init(struct pci_access **pacc,
120 int slot, int func);
121
122
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124
125
126extern int decode_pstates(unsigned int cpu, unsigned int cpu_family,
127 int boost_states, unsigned long *pstates, int *no);
128
129
130
131extern int cpufreq_has_boost_support(unsigned int cpu, int *support,
132 int *active, int * states);
133
134
135
136unsigned int cpuid_eax(unsigned int op);
137unsigned int cpuid_ebx(unsigned int op);
138unsigned int cpuid_ecx(unsigned int op);
139unsigned int cpuid_edx(unsigned int op);
140
141
142
143#else
144static inline int decode_pstates(unsigned int cpu, unsigned int cpu_family,
145 int boost_states, unsigned long *pstates,
146 int *no)
147{ return -1; };
148
149static inline int read_msr(int cpu, unsigned int idx, unsigned long long *val)
150{ return -1; };
151static inline int write_msr(int cpu, unsigned int idx, unsigned long long val)
152{ return -1; };
153static inline int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val)
154{ return -1; };
155static inline int msr_intel_get_perf_bias(unsigned int cpu)
156{ return -1; };
157static inline unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu)
158{ return 0; };
159
160
161
162static inline int cpufreq_has_boost_support(unsigned int cpu, int *support,
163 int *active, int * states)
164{ return -1; }
165
166
167
168static inline unsigned int cpuid_eax(unsigned int op) { return 0; };
169static inline unsigned int cpuid_ebx(unsigned int op) { return 0; };
170static inline unsigned int cpuid_ecx(unsigned int op) { return 0; };
171static inline unsigned int cpuid_edx(unsigned int op) { return 0; };
172#endif
173
174#endif
175