linux/arch/arm/mach-sa1100/assabet.c
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   1/*
   2 * linux/arch/arm/mach-sa1100/assabet.c
   3 *
   4 * Author: Nicolas Pitre
   5 *
   6 * This file contains all Assabet-specific tweaks.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12#include <linux/init.h>
  13#include <linux/kernel.h>
  14#include <linux/module.h>
  15#include <linux/errno.h>
  16#include <linux/gpio/gpio-reg.h>
  17#include <linux/ioport.h>
  18#include <linux/platform_data/sa11x0-serial.h>
  19#include <linux/serial_core.h>
  20#include <linux/platform_device.h>
  21#include <linux/mfd/ucb1x00.h>
  22#include <linux/mtd/mtd.h>
  23#include <linux/mtd/partitions.h>
  24#include <linux/delay.h>
  25#include <linux/mm.h>
  26#include <linux/leds.h>
  27#include <linux/slab.h>
  28
  29#include <video/sa1100fb.h>
  30
  31#include <mach/hardware.h>
  32#include <asm/mach-types.h>
  33#include <asm/setup.h>
  34#include <asm/page.h>
  35#include <asm/pgtable-hwdef.h>
  36#include <asm/pgtable.h>
  37#include <asm/tlbflush.h>
  38
  39#include <asm/mach/arch.h>
  40#include <asm/mach/flash.h>
  41#include <linux/platform_data/irda-sa11x0.h>
  42#include <asm/mach/map.h>
  43#include <mach/assabet.h>
  44#include <linux/platform_data/mfd-mcp-sa11x0.h>
  45#include <mach/irqs.h>
  46
  47#include "generic.h"
  48
  49#define ASSABET_BCR_DB1110 \
  50        (ASSABET_BCR_SPK_OFF    | \
  51         ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  52         ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  53         ASSABET_BCR_IRDA_MD0)
  54
  55#define ASSABET_BCR_DB1111 \
  56        (ASSABET_BCR_SPK_OFF    | \
  57         ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  58         ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  59         ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  60         ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
  61
  62unsigned long SCR_value = ASSABET_SCR_INIT;
  63EXPORT_SYMBOL(SCR_value);
  64
  65static struct gpio_chip *assabet_bcr_gc;
  66
  67static const char *assabet_names[] = {
  68        "cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel",
  69        "irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on",
  70        "audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on",
  71        "rs232_on", "nred_led", "ngreen_led", "vib_on",
  72        "com_dtr", "com_rts", "radio_wake_mod", "i2c_enab",
  73        "tvir_enab", "qmute", "radio_pwr_on", "spkr_off",
  74        "rs232_valid", "com_dcd", "com_cts", "com_dsr",
  75        "radio_cts", "radio_dsr", "radio_dcd", "radio_ri",
  76};
  77
  78/* The old deprecated interface */
  79void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  80{
  81        unsigned long m = mask, v = val;
  82
  83        assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v);
  84}
  85EXPORT_SYMBOL(ASSABET_BCR_frob);
  86
  87static int __init assabet_init_gpio(void __iomem *reg, u32 def_val)
  88{
  89        struct gpio_chip *gc;
  90
  91        writel_relaxed(def_val, reg);
  92
  93        gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val,
  94                           assabet_names, NULL, NULL);
  95
  96        if (IS_ERR(gc))
  97                return PTR_ERR(gc);
  98
  99        assabet_bcr_gc = gc;
 100
 101        return gc->base;
 102}
 103
 104/*
 105 * The codec reset goes to three devices, so we need to release
 106 * the rest when any one of these requests it.  However, that
 107 * causes the ADV7171 to consume around 100mA - more than half
 108 * the LCD-blanked power.
 109 *
 110 * With the ADV7171, LCD and backlight enabled, we go over
 111 * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
 112 * is connected, the Assabet crashes.
 113 */
 114#define RST_UCB1X00 (1 << 0)
 115#define RST_UDA1341 (1 << 1)
 116#define RST_ADV7171 (1 << 2)
 117
 118#define SDA GPIO_GPIO(15)
 119#define SCK GPIO_GPIO(18)
 120#define MOD GPIO_GPIO(17)
 121
 122static void adv7171_start(void)
 123{
 124        GPSR = SCK;
 125        udelay(1);
 126        GPSR = SDA;
 127        udelay(2);
 128        GPCR = SDA;
 129}
 130
 131static void adv7171_stop(void)
 132{
 133        GPSR = SCK;
 134        udelay(2);
 135        GPSR = SDA;
 136        udelay(1);
 137}
 138
 139static void adv7171_send(unsigned byte)
 140{
 141        unsigned i;
 142
 143        for (i = 0; i < 8; i++, byte <<= 1) {
 144                GPCR = SCK;
 145                udelay(1);
 146                if (byte & 0x80)
 147                        GPSR = SDA;
 148                else
 149                        GPCR = SDA;
 150                udelay(1);
 151                GPSR = SCK;
 152                udelay(1);
 153        }
 154        GPCR = SCK;
 155        udelay(1);
 156        GPSR = SDA;
 157        udelay(1);
 158        GPDR &= ~SDA;
 159        GPSR = SCK;
 160        udelay(1);
 161        if (GPLR & SDA)
 162                printk(KERN_WARNING "No ACK from ADV7171\n");
 163        udelay(1);
 164        GPCR = SCK | SDA;
 165        udelay(1);
 166        GPDR |= SDA;
 167        udelay(1);
 168}
 169
 170static void adv7171_write(unsigned reg, unsigned val)
 171{
 172        unsigned gpdr = GPDR;
 173        unsigned gplr = GPLR;
 174
 175        ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON);
 176        udelay(100);
 177
 178        GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
 179        GPDR = (GPDR | SCK | MOD) & ~SDA;
 180        udelay(10);
 181        if (!(GPLR & SDA))
 182                printk(KERN_WARNING "Something dragging SDA down?\n");
 183        GPDR |= SDA;
 184
 185        adv7171_start();
 186        adv7171_send(0x54);
 187        adv7171_send(reg);
 188        adv7171_send(val);
 189        adv7171_stop();
 190
 191        /* Restore GPIO state for L3 bus */
 192        GPSR = gplr & (SDA | SCK | MOD);
 193        GPCR = (~gplr) & (SDA | SCK | MOD);
 194        GPDR = gpdr;
 195}
 196
 197static void adv7171_sleep(void)
 198{
 199        /* Put the ADV7171 into sleep mode */
 200        adv7171_write(0x04, 0x40);
 201}
 202
 203static unsigned codec_nreset;
 204
 205static void assabet_codec_reset(unsigned mask, int set)
 206{
 207        unsigned long flags;
 208        bool old;
 209
 210        local_irq_save(flags);
 211        old = !codec_nreset;
 212        if (set)
 213                codec_nreset &= ~mask;
 214        else
 215                codec_nreset |= mask;
 216
 217        if (old != !codec_nreset) {
 218                if (codec_nreset) {
 219                        ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
 220                        adv7171_sleep();
 221                } else {
 222                        ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
 223                }
 224        }
 225        local_irq_restore(flags);
 226}
 227
 228static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
 229{
 230        int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
 231                state == UCB_RST_PROBE_FAIL;
 232        assabet_codec_reset(RST_UCB1X00, set);
 233}
 234
 235void assabet_uda1341_reset(int set)
 236{
 237        assabet_codec_reset(RST_UDA1341, set);
 238}
 239EXPORT_SYMBOL(assabet_uda1341_reset);
 240
 241
 242/*
 243 * Assabet flash support code.
 244 */
 245
 246#ifdef ASSABET_REV_4
 247/*
 248 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
 249 */
 250static struct mtd_partition assabet_partitions[] = {
 251        {
 252                .name           = "bootloader",
 253                .size           = 0x00020000,
 254                .offset         = 0,
 255                .mask_flags     = MTD_WRITEABLE,
 256        }, {
 257                .name           = "bootloader params",
 258                .size           = 0x00020000,
 259                .offset         = MTDPART_OFS_APPEND,
 260                .mask_flags     = MTD_WRITEABLE,
 261        }, {
 262                .name           = "jffs",
 263                .size           = MTDPART_SIZ_FULL,
 264                .offset         = MTDPART_OFS_APPEND,
 265        }
 266};
 267#else
 268/*
 269 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
 270 */
 271static struct mtd_partition assabet_partitions[] = {
 272        {
 273                .name           = "bootloader",
 274                .size           = 0x00040000,
 275                .offset         = 0,
 276                .mask_flags     = MTD_WRITEABLE,
 277        }, {
 278                .name           = "bootloader params",
 279                .size           = 0x00040000,
 280                .offset         = MTDPART_OFS_APPEND,
 281                .mask_flags     = MTD_WRITEABLE,
 282        }, {
 283                .name           = "jffs",
 284                .size           = MTDPART_SIZ_FULL,
 285                .offset         = MTDPART_OFS_APPEND,
 286        }
 287};
 288#endif
 289
 290static struct flash_platform_data assabet_flash_data = {
 291        .map_name       = "cfi_probe",
 292        .parts          = assabet_partitions,
 293        .nr_parts       = ARRAY_SIZE(assabet_partitions),
 294};
 295
 296static struct resource assabet_flash_resources[] = {
 297        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
 298        DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
 299};
 300
 301
 302/*
 303 * Assabet IrDA support code.
 304 */
 305
 306static int assabet_irda_set_power(struct device *dev, unsigned int state)
 307{
 308        static unsigned int bcr_state[4] = {
 309                ASSABET_BCR_IRDA_MD0,
 310                ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
 311                ASSABET_BCR_IRDA_MD1,
 312                0
 313        };
 314
 315        if (state < 4)
 316                ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
 317                                 bcr_state[state]);
 318        return 0;
 319}
 320
 321static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
 322{
 323        if (speed < 4000000)
 324                ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
 325        else
 326                ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
 327}
 328
 329static struct irda_platform_data assabet_irda_data = {
 330        .set_power      = assabet_irda_set_power,
 331        .set_speed      = assabet_irda_set_speed,
 332};
 333
 334static struct ucb1x00_plat_data assabet_ucb1x00_data = {
 335        .reset          = assabet_ucb1x00_reset,
 336        .gpio_base      = -1,
 337        .can_wakeup     = 1,
 338};
 339
 340static struct mcp_plat_data assabet_mcp_data = {
 341        .mccr0          = MCCR0_ADM,
 342        .sclk_rate      = 11981000,
 343        .codec_pdata    = &assabet_ucb1x00_data,
 344};
 345
 346static void assabet_lcd_set_visual(u32 visual)
 347{
 348        u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
 349
 350        if (machine_is_assabet()) {
 351#if 1           // phase 4 or newer Assabet's
 352                if (is_true_color)
 353                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
 354                else
 355                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
 356#else
 357                // older Assabet's
 358                if (is_true_color)
 359                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
 360                else
 361                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
 362#endif
 363        }
 364}
 365
 366#ifndef ASSABET_PAL_VIDEO
 367static void assabet_lcd_backlight_power(int on)
 368{
 369        if (on)
 370                ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
 371        else
 372                ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
 373}
 374
 375/*
 376 * Turn on/off the backlight.  When turning the backlight on, we wait
 377 * 500us after turning it on so we don't cause the supplies to droop
 378 * when we enable the LCD controller (and cause a hard reset.)
 379 */
 380static void assabet_lcd_power(int on)
 381{
 382        if (on) {
 383                ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
 384                udelay(500);
 385        } else
 386                ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 387}
 388
 389/*
 390 * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
 391 * takes an RGB666 signal, but we provide it with an RGB565 signal
 392 * instead (def_rgb_16).
 393 */
 394static struct sa1100fb_mach_info lq039q2ds54_info = {
 395        .pixclock       = 171521,       .bpp            = 16,
 396        .xres           = 320,          .yres           = 240,
 397
 398        .hsync_len      = 5,            .vsync_len      = 1,
 399        .left_margin    = 61,           .upper_margin   = 3,
 400        .right_margin   = 9,            .lower_margin   = 0,
 401
 402        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 403
 404        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
 405        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
 406
 407        .backlight_power = assabet_lcd_backlight_power,
 408        .lcd_power = assabet_lcd_power,
 409        .set_visual = assabet_lcd_set_visual,
 410};
 411#else
 412static void assabet_pal_backlight_power(int on)
 413{
 414        ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
 415}
 416
 417static void assabet_pal_power(int on)
 418{
 419        ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 420}
 421
 422static struct sa1100fb_mach_info pal_info = {
 423        .pixclock       = 67797,        .bpp            = 16,
 424        .xres           = 640,          .yres           = 512,
 425
 426        .hsync_len      = 64,           .vsync_len      = 6,
 427        .left_margin    = 125,          .upper_margin   = 70,
 428        .right_margin   = 115,          .lower_margin   = 36,
 429
 430        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
 431        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
 432
 433        .backlight_power = assabet_pal_backlight_power,
 434        .lcd_power = assabet_pal_power,
 435        .set_visual = assabet_lcd_set_visual,
 436};
 437#endif
 438
 439#ifdef CONFIG_ASSABET_NEPONSET
 440static struct resource neponset_resources[] = {
 441        DEFINE_RES_MEM(0x10000000, 0x08000000),
 442        DEFINE_RES_MEM(0x18000000, 0x04000000),
 443        DEFINE_RES_MEM(0x40000000, SZ_8K),
 444        DEFINE_RES_IRQ(IRQ_GPIO25),
 445};
 446#endif
 447
 448static void __init assabet_init(void)
 449{
 450        /*
 451         * Ensure that the power supply is in "high power" mode.
 452         */
 453        GPSR = GPIO_GPIO16;
 454        GPDR |= GPIO_GPIO16;
 455
 456        /*
 457         * Ensure that these pins are set as outputs and are driving
 458         * logic 0.  This ensures that we won't inadvertently toggle
 459         * the WS latch in the CPLD, and we don't float causing
 460         * excessive power drain.  --rmk
 461         */
 462        GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 463        GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 464
 465        /*
 466         * Also set GPIO27 as an output; this is used to clock UART3
 467         * via the FPGA and as otherwise has no pullups or pulldowns,
 468         * so stop it floating.
 469         */
 470        GPCR = GPIO_GPIO27;
 471        GPDR |= GPIO_GPIO27;
 472
 473        /*
 474         * Set up registers for sleep mode.
 475         */
 476        PWER = PWER_GPIO0;
 477        PGSR = 0;
 478        PCFR = 0;
 479        PSDR = 0;
 480        PPDR |= PPC_TXD3 | PPC_TXD1;
 481        PPSR |= PPC_TXD3 | PPC_TXD1;
 482
 483        sa11x0_ppc_configure_mcp();
 484
 485        if (machine_has_neponset()) {
 486#ifndef CONFIG_ASSABET_NEPONSET
 487                printk( "Warning: Neponset detected but full support "
 488                        "hasn't been configured in the kernel\n" );
 489#else
 490                platform_device_register_simple("neponset", 0,
 491                        neponset_resources, ARRAY_SIZE(neponset_resources));
 492#endif
 493        }
 494
 495#ifndef ASSABET_PAL_VIDEO
 496        sa11x0_register_lcd(&lq039q2ds54_info);
 497#else
 498        sa11x0_register_lcd(&pal_video);
 499#endif
 500        sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
 501                            ARRAY_SIZE(assabet_flash_resources));
 502        sa11x0_register_irda(&assabet_irda_data);
 503        sa11x0_register_mcp(&assabet_mcp_data);
 504}
 505
 506/*
 507 * On Assabet, we must probe for the Neponset board _before_
 508 * paging_init() has occurred to actually determine the amount
 509 * of RAM available.  To do so, we map the appropriate IO section
 510 * in the page table here in order to access GPIO registers.
 511 */
 512static void __init map_sa1100_gpio_regs( void )
 513{
 514        unsigned long phys = __PREG(GPLR) & PMD_MASK;
 515        unsigned long virt = (unsigned long)io_p2v(phys);
 516        int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
 517        pmd_t *pmd;
 518
 519        pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
 520        *pmd = __pmd(phys | prot);
 521        flush_pmd_entry(pmd);
 522}
 523
 524/*
 525 * Read System Configuration "Register"
 526 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
 527 * User's Guide", section 4.4.1)
 528 *
 529 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
 530 * to set up the serial port for decompression status messages. We
 531 * repeat it here because the kernel may not be loaded as a zImage, and
 532 * also because it's a hassle to communicate the SCR value to the kernel
 533 * from the decompressor.
 534 *
 535 * Note that IRQs are guaranteed to be disabled.
 536 */
 537static void __init get_assabet_scr(void)
 538{
 539        unsigned long uninitialized_var(scr), i;
 540
 541        GPDR |= 0x3fc;                  /* Configure GPIO 9:2 as outputs */
 542        GPSR = 0x3fc;                   /* Write 0xFF to GPIO 9:2 */
 543        GPDR &= ~(0x3fc);               /* Configure GPIO 9:2 as inputs */
 544        for(i = 100; i--; )             /* Read GPIO 9:2 */
 545                scr = GPLR;
 546        GPDR |= 0x3fc;                  /*  restore correct pin direction */
 547        scr &= 0x3fc;                   /* save as system configuration byte. */
 548        SCR_value = scr;
 549}
 550
 551static void __init
 552fixup_assabet(struct tag *tags, char **cmdline)
 553{
 554        /* This must be done before any call to machine_has_neponset() */
 555        map_sa1100_gpio_regs();
 556        get_assabet_scr();
 557
 558        if (machine_has_neponset())
 559                printk("Neponset expansion board detected\n");
 560}
 561
 562
 563static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
 564{
 565        if (port->mapbase == _Ser1UTCR0) {
 566                if (state)
 567                        ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
 568                                          ASSABET_BCR_COM_RTS |
 569                                          ASSABET_BCR_COM_DTR);
 570                else
 571                        ASSABET_BCR_set(ASSABET_BCR_RS232EN |
 572                                        ASSABET_BCR_COM_RTS |
 573                                        ASSABET_BCR_COM_DTR);
 574        }
 575}
 576
 577/*
 578 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
 579 * and UART3 (radio module).  We only handle them for UART1 here.
 580 */
 581static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
 582{
 583        if (port->mapbase == _Ser1UTCR0) {
 584                u_int set = 0, clear = 0;
 585
 586                if (mctrl & TIOCM_RTS)
 587                        clear |= ASSABET_BCR_COM_RTS;
 588                else
 589                        set |= ASSABET_BCR_COM_RTS;
 590
 591                if (mctrl & TIOCM_DTR)
 592                        clear |= ASSABET_BCR_COM_DTR;
 593                else
 594                        set |= ASSABET_BCR_COM_DTR;
 595
 596                ASSABET_BCR_clear(clear);
 597                ASSABET_BCR_set(set);
 598        }
 599}
 600
 601static u_int assabet_get_mctrl(struct uart_port *port)
 602{
 603        u_int ret = 0;
 604        u_int bsr = ASSABET_BSR;
 605
 606        /* need 2 reads to read current value */
 607        bsr = ASSABET_BSR;
 608
 609        if (port->mapbase == _Ser1UTCR0) {
 610                if (bsr & ASSABET_BSR_COM_DCD)
 611                        ret |= TIOCM_CD;
 612                if (bsr & ASSABET_BSR_COM_CTS)
 613                        ret |= TIOCM_CTS;
 614                if (bsr & ASSABET_BSR_COM_DSR)
 615                        ret |= TIOCM_DSR;
 616        } else if (port->mapbase == _Ser3UTCR0) {
 617                if (bsr & ASSABET_BSR_RAD_DCD)
 618                        ret |= TIOCM_CD;
 619                if (bsr & ASSABET_BSR_RAD_CTS)
 620                        ret |= TIOCM_CTS;
 621                if (bsr & ASSABET_BSR_RAD_DSR)
 622                        ret |= TIOCM_DSR;
 623                if (bsr & ASSABET_BSR_RAD_RI)
 624                        ret |= TIOCM_RI;
 625        } else {
 626                ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
 627        }
 628
 629        return ret;
 630}
 631
 632static struct sa1100_port_fns assabet_port_fns __initdata = {
 633        .set_mctrl      = assabet_set_mctrl,
 634        .get_mctrl      = assabet_get_mctrl,
 635        .pm             = assabet_uart_pm,
 636};
 637
 638static struct map_desc assabet_io_desc[] __initdata = {
 639        {       /* Board Control Register */
 640                .virtual        =  0xf1000000,
 641                .pfn            = __phys_to_pfn(0x12000000),
 642                .length         = 0x00100000,
 643                .type           = MT_DEVICE
 644        }, {    /* MQ200 */
 645                .virtual        =  0xf2800000,
 646                .pfn            = __phys_to_pfn(0x4b800000),
 647                .length         = 0x00800000,
 648                .type           = MT_DEVICE
 649        }
 650};
 651
 652static void __init assabet_map_io(void)
 653{
 654        sa1100_map_io();
 655        iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
 656
 657        /*
 658         * Set SUS bit in SDCR0 so serial port 1 functions.
 659         * Its called GPCLKR0 in my SA1110 manual.
 660         */
 661        Ser1SDCR0 |= SDCR0_SUS;
 662        MSC1 = (MSC1 & ~0xffff) |
 663                MSC_NonBrst | MSC_32BitStMem |
 664                MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
 665
 666        if (!machine_has_neponset())
 667                sa1100_register_uart_fns(&assabet_port_fns);
 668
 669        /*
 670         * When Neponset is attached, the first UART should be
 671         * UART3.  That's what Angel is doing and many documents
 672         * are stating this.
 673         *
 674         * We do the Neponset mapping even if Neponset support
 675         * isn't compiled in so the user will still get something on
 676         * the expected physical serial port.
 677         *
 678         * We no longer do this; not all boot loaders support it,
 679         * and UART3 appears to be somewhat unreliable with blob.
 680         */
 681        sa1100_register_uart(0, 1);
 682        sa1100_register_uart(2, 3);
 683}
 684
 685/* LEDs */
 686#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
 687struct assabet_led {
 688        struct led_classdev cdev;
 689        u32 mask;
 690};
 691
 692/*
 693 * The triggers lines up below will only be used if the
 694 * LED triggers are compiled in.
 695 */
 696static const struct {
 697        const char *name;
 698        const char *trigger;
 699} assabet_leds[] = {
 700        { "assabet:red", "cpu0",},
 701        { "assabet:green", "heartbeat", },
 702};
 703
 704/*
 705 * The LED control in Assabet is reversed:
 706 *  - setting bit means turn off LED
 707 *  - clearing bit means turn on LED
 708 */
 709static void assabet_led_set(struct led_classdev *cdev,
 710                enum led_brightness b)
 711{
 712        struct assabet_led *led = container_of(cdev,
 713                        struct assabet_led, cdev);
 714
 715        if (b != LED_OFF)
 716                ASSABET_BCR_clear(led->mask);
 717        else
 718                ASSABET_BCR_set(led->mask);
 719}
 720
 721static enum led_brightness assabet_led_get(struct led_classdev *cdev)
 722{
 723        struct assabet_led *led = container_of(cdev,
 724                        struct assabet_led, cdev);
 725
 726        return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
 727}
 728
 729static int __init assabet_leds_init(void)
 730{
 731        int i;
 732
 733        if (!machine_is_assabet())
 734                return -ENODEV;
 735
 736        for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
 737                struct assabet_led *led;
 738
 739                led = kzalloc(sizeof(*led), GFP_KERNEL);
 740                if (!led)
 741                        break;
 742
 743                led->cdev.name = assabet_leds[i].name;
 744                led->cdev.brightness_set = assabet_led_set;
 745                led->cdev.brightness_get = assabet_led_get;
 746                led->cdev.default_trigger = assabet_leds[i].trigger;
 747
 748                if (!i)
 749                        led->mask = ASSABET_BCR_LED_RED;
 750                else
 751                        led->mask = ASSABET_BCR_LED_GREEN;
 752
 753                if (led_classdev_register(NULL, &led->cdev) < 0) {
 754                        kfree(led);
 755                        break;
 756                }
 757        }
 758
 759        return 0;
 760}
 761
 762/*
 763 * Since we may have triggers on any subsystem, defer registration
 764 * until after subsystem_init.
 765 */
 766fs_initcall(assabet_leds_init);
 767#endif
 768
 769void __init assabet_init_irq(void)
 770{
 771        u32 def_val;
 772
 773        sa1100_init_irq();
 774
 775        if (machine_has_neponset())
 776                def_val = ASSABET_BCR_DB1111;
 777        else
 778                def_val = ASSABET_BCR_DB1110;
 779
 780        /*
 781         * Angel sets this, but other bootloaders may not.
 782         *
 783         * This must precede any driver calls to BCR_set() or BCR_clear().
 784         */
 785        assabet_init_gpio((void *)&ASSABET_BCR, def_val);
 786}
 787
 788MACHINE_START(ASSABET, "Intel-Assabet")
 789        .atag_offset    = 0x100,
 790        .fixup          = fixup_assabet,
 791        .map_io         = assabet_map_io,
 792        .nr_irqs        = SA1100_NR_IRQS,
 793        .init_irq       = assabet_init_irq,
 794        .init_time      = sa1100_timer_init,
 795        .init_machine   = assabet_init,
 796        .init_late      = sa11x0_init_late,
 797#ifdef CONFIG_SA1111
 798        .dma_zone_size  = SZ_1M,
 799#endif
 800        .restart        = sa11x0_restart,
 801MACHINE_END
 802