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11#include <linux/kernel.h>
12#include <linux/rwsem.h>
13#include <linux/smp.h>
14#include <linux/interrupt.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/pci.h>
18#include <linux/delay.h>
19#include <linux/types.h>
20#include <linux/irq.h>
21#include <asm/io.h>
22#include "pci-sh5.h"
23
24static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
25 int size, u32 *val)
26{
27 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
28
29 switch (size) {
30 case 1:
31 *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
32 break;
33 case 2:
34 *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
35 break;
36 case 4:
37 *val = SH5PCI_READ(PDR);
38 break;
39 }
40
41 return PCIBIOS_SUCCESSFUL;
42}
43
44static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
45 int size, u32 val)
46{
47 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
48
49 switch (size) {
50 case 1:
51 SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
52 break;
53 case 2:
54 SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
55 break;
56 case 4:
57 SH5PCI_WRITE(PDR, val);
58 break;
59 }
60
61 return PCIBIOS_SUCCESSFUL;
62}
63
64struct pci_ops sh5_pci_ops = {
65 .read = sh5pci_read,
66 .write = sh5pci_write,
67};
68