LXR linux/arch/sparc/include/asm/ide.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* ide.h: SPARC PCI specific IDE glue.
   3 *
   4 * Copyright (C) 1997  David S. Miller (davem@davemloft.net)
   5 * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
   6 * Adaptation from sparc64 version to sparc by Pete Zaitcev.
   7 */
   8
   9#ifndef _SPARC_IDE_H
  10#define _SPARC_IDE_H
  11
  12#ifdef __KERNEL__
  13
  14#include <asm/io.h>
  15#ifdef CONFIG_SPARC64
  16#include <asm/pgalloc.h>
  17#include <asm/spitfire.h>
  18#include <asm/cacheflush.h>
  19#include <asm/page.h>
  20#else
  21#include <asm/pgtable.h>
  22#include <asm/psr.h>
  23#endif
  24
  25#define __ide_insl(data_reg, buffer, wcount) \
  26        __ide_insw(data_reg, buffer, (wcount)<<1)
  27#define __ide_outsl(data_reg, buffer, wcount) \
  28        __ide_outsw(data_reg, buffer, (wcount)<<1)
  29
  30/* On sparc, I/O ports and MMIO registers are accessed identically.  */
  31#define __ide_mm_insw   __ide_insw
  32#define __ide_mm_insl   __ide_insl
  33#define __ide_mm_outsw  __ide_outsw
  34#define __ide_mm_outsl  __ide_outsl
  35
  36static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
  37{
  38#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
  39        unsigned long end = (unsigned long)dst + (count << 1);
  40#endif
  41        u16 *ps = dst;
  42        u32 *pi;
  43
  44        if(((unsigned long)ps) & 0x2) {
  45                *ps++ = __raw_readw(port);
  46                count--;
  47        }
  48        pi = (u32 *)ps;
  49        while(count >= 2) {
  50                u32 w;
  51
  52                w  = __raw_readw(port) << 16;
  53                w |= __raw_readw(port);
  54                *pi++ = w;
  55                count -= 2;
  56        }
  57        ps = (u16 *)pi;
  58        if(count)
  59                *ps++ = __raw_readw(port);
  60
  61#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
  62        __flush_dcache_range((unsigned long)dst, end);
  63#endif
  64}
  65
  66static inline void __ide_outsw(void __iomem *port, const void *src, u32 count)
  67{
  68#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
  69        unsigned long end = (unsigned long)src + (count << 1);
  70#endif
  71        const u16 *ps = src;
  72        const u32 *pi;
  73
  74        if(((unsigned long)src) & 0x2) {
  75                __raw_writew(*ps++, port);
  76                count--;
  77        }
  78        pi = (const u32 *)ps;
  79        while(count >= 2) {
  80                u32 w;
  81
  82                w = *pi++;
  83                __raw_writew((w >> 16), port);
  84                __raw_writew(w, port);
  85                count -= 2;
  86        }
  87        ps = (const u16 *)pi;
  88        if(count)
  89                __raw_writew(*ps, port);
  90
  91#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
  92        __flush_dcache_range((unsigned long)src, end);
  93#endif
  94}
  95
  96#endif /* __KERNEL__ */
  97
  98#endif /* _SPARC_IDE_H */
  99