LXR linux/arch/x86/include/asm/intel

   1#ifndef _ASM_INTEL_DS_H
   2#define _ASM_INTEL_DS_H
   3
   4#include <linux/percpu-defs.h>
   5
   6#define BTS_BUFFER_SIZE         (PAGE_SIZE << 4)
   7#define PEBS_BUFFER_SIZE        (PAGE_SIZE << 4)
   8
   9/* The maximal number of PEBS events: */
  10#define MAX_PEBS_EVENTS         8
  11
  12/*
  13 * A debug store configuration.
  14 *
  15 * We only support architectures that use 64bit fields.
  16 */
  17struct debug_store {
  18        u64     bts_buffer_base;
  19        u64     bts_index;
  20        u64     bts_absolute_maximum;
  21        u64     bts_interrupt_threshold;
  22        u64     pebs_buffer_base;
  23        u64     pebs_index;
  24        u64     pebs_absolute_maximum;
  25        u64     pebs_interrupt_threshold;
  26        u64     pebs_event_reset[MAX_PEBS_EVENTS];
  27} __aligned(PAGE_SIZE);
  28
  29DECLARE_PER_CPU_PAGE_ALIGNED(struct debug_store, cpu_debug_store);
  30
  31struct debug_store_buffers {
  32        char    bts_buffer[BTS_BUFFER_SIZE];
  33        char    pebs_buffer[PEBS_BUFFER_SIZE];
  34};
  35
  36#endif
  37