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26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/init.h>
29#include <linux/capability.h>
30#include <linux/interrupt.h>
31#include <linux/bitops.h>
32#include <linux/pci.h>
33#include <linux/module.h>
34#include <linux/atmdev.h>
35#include <linux/sonet.h>
36#include <linux/atm_suni.h>
37#include <linux/dma-mapping.h>
38#include <linux/delay.h>
39#include <linux/firmware.h>
40#include <asm/io.h>
41#include <asm/string.h>
42#include <asm/page.h>
43#include <asm/irq.h>
44#include <asm/dma.h>
45#include <asm/byteorder.h>
46#include <linux/uaccess.h>
47#include <linux/atomic.h>
48
49#ifdef CONFIG_SBUS
50#include <linux/of.h>
51#include <linux/of_device.h>
52#include <asm/idprom.h>
53#include <asm/openprom.h>
54#include <asm/oplib.h>
55#include <asm/pgtable.h>
56#endif
57
58#if defined(CONFIG_ATM_FORE200E_USE_TASKLET)
59#define FORE200E_USE_TASKLET
60#endif
61
62#if 0
63#define FORE200E_BSQ_DEBUG
64#endif
65
66#if 1
67#define FORE200E_52BYTE_AAL0_SDU
68#endif
69
70#include "fore200e.h"
71#include "suni.h"
72
73#define FORE200E_VERSION "0.3e"
74
75#define FORE200E "fore200e: "
76
77#if 0
78#define CONFIG_ATM_FORE200E_DEBUG 1
79#endif
80#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
81#define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
82 printk(FORE200E format, ##args); } while (0)
83#else
84#define DPRINTK(level, format, args...) do {} while (0)
85#endif
86
87
88#define FORE200E_ALIGN(addr, alignment) \
89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
90
91#define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
92
93#define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
94
95#define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
96
97#if 1
98#define ASSERT(expr) if (!(expr)) { \
99 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
100 __func__, __LINE__, #expr); \
101 panic(FORE200E "%s", __func__); \
102 }
103#else
104#define ASSERT(expr) do {} while (0)
105#endif
106
107
108static const struct atmdev_ops fore200e_ops;
109static const struct fore200e_bus fore200e_bus[];
110
111static LIST_HEAD(fore200e_boards);
112
113
114MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
115MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
116MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
117
118
119static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
120 { BUFFER_S1_NBR, BUFFER_L1_NBR },
121 { BUFFER_S2_NBR, BUFFER_L2_NBR }
122};
123
124static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
125 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
126 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
127};
128
129
130#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
131static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
132#endif
133
134
135#if 0
136static int
137fore200e_fore2atm_aal(enum fore200e_aal aal)
138{
139 switch(aal) {
140 case FORE200E_AAL0: return ATM_AAL0;
141 case FORE200E_AAL34: return ATM_AAL34;
142 case FORE200E_AAL5: return ATM_AAL5;
143 }
144
145 return -EINVAL;
146}
147#endif
148
149
150static enum fore200e_aal
151fore200e_atm2fore_aal(int aal)
152{
153 switch(aal) {
154 case ATM_AAL0: return FORE200E_AAL0;
155 case ATM_AAL34: return FORE200E_AAL34;
156 case ATM_AAL1:
157 case ATM_AAL2:
158 case ATM_AAL5: return FORE200E_AAL5;
159 }
160
161 return -EINVAL;
162}
163
164
165static char*
166fore200e_irq_itoa(int irq)
167{
168 static char str[8];
169 sprintf(str, "%d", irq);
170 return str;
171}
172
173
174
175
176
177static int
178fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
179{
180 unsigned long offset = 0;
181
182 if (alignment <= sizeof(int))
183 alignment = 0;
184
185 chunk->alloc_size = size + alignment;
186 chunk->align_size = size;
187 chunk->direction = direction;
188
189 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
190 if (chunk->alloc_addr == NULL)
191 return -ENOMEM;
192
193 if (alignment > 0)
194 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
195
196 chunk->align_addr = chunk->alloc_addr + offset;
197
198 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
199
200 return 0;
201}
202
203
204
205
206static void
207fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
208{
209 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
210
211 kfree(chunk->alloc_addr);
212}
213
214
215static void
216fore200e_spin(int msecs)
217{
218 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
219 while (time_before(jiffies, timeout));
220}
221
222
223static int
224fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
225{
226 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
227 int ok;
228
229 mb();
230 do {
231 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
232 break;
233
234 } while (time_before(jiffies, timeout));
235
236#if 1
237 if (!ok) {
238 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
239 *addr, val);
240 }
241#endif
242
243 return ok;
244}
245
246
247static int
248fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
249{
250 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
251 int ok;
252
253 do {
254 if ((ok = (fore200e->bus->read(addr) == val)))
255 break;
256
257 } while (time_before(jiffies, timeout));
258
259#if 1
260 if (!ok) {
261 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
262 fore200e->bus->read(addr), val);
263 }
264#endif
265
266 return ok;
267}
268
269
270static void
271fore200e_free_rx_buf(struct fore200e* fore200e)
272{
273 int scheme, magn, nbr;
274 struct buffer* buffer;
275
276 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
277 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
278
279 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
280
281 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
282
283 struct chunk* data = &buffer[ nbr ].data;
284
285 if (data->alloc_addr != NULL)
286 fore200e_chunk_free(fore200e, data);
287 }
288 }
289 }
290 }
291}
292
293
294static void
295fore200e_uninit_bs_queue(struct fore200e* fore200e)
296{
297 int scheme, magn;
298
299 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
300 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
301
302 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
303 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
304
305 if (status->alloc_addr)
306 fore200e->bus->dma_chunk_free(fore200e, status);
307
308 if (rbd_block->alloc_addr)
309 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
310 }
311 }
312}
313
314
315static int
316fore200e_reset(struct fore200e* fore200e, int diag)
317{
318 int ok;
319
320 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
321
322 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
323
324 fore200e->bus->reset(fore200e);
325
326 if (diag) {
327 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
328 if (ok == 0) {
329
330 printk(FORE200E "device %s self-test failed\n", fore200e->name);
331 return -ENODEV;
332 }
333
334 printk(FORE200E "device %s self-test passed\n", fore200e->name);
335
336 fore200e->state = FORE200E_STATE_RESET;
337 }
338
339 return 0;
340}
341
342
343static void
344fore200e_shutdown(struct fore200e* fore200e)
345{
346 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
347 fore200e->name, fore200e->phys_base,
348 fore200e_irq_itoa(fore200e->irq));
349
350 if (fore200e->state > FORE200E_STATE_RESET) {
351
352 fore200e_reset(fore200e, 0);
353 }
354
355
356 switch(fore200e->state) {
357
358 case FORE200E_STATE_COMPLETE:
359 kfree(fore200e->stats);
360
361
362 case FORE200E_STATE_IRQ:
363 free_irq(fore200e->irq, fore200e->atm_dev);
364
365
366 case FORE200E_STATE_ALLOC_BUF:
367 fore200e_free_rx_buf(fore200e);
368
369
370 case FORE200E_STATE_INIT_BSQ:
371 fore200e_uninit_bs_queue(fore200e);
372
373
374 case FORE200E_STATE_INIT_RXQ:
375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
376 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
377
378
379 case FORE200E_STATE_INIT_TXQ:
380 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
381 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
382
383
384 case FORE200E_STATE_INIT_CMDQ:
385 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
386
387
388 case FORE200E_STATE_INITIALIZE:
389
390
391 case FORE200E_STATE_START_FW:
392
393
394 case FORE200E_STATE_RESET:
395
396
397 case FORE200E_STATE_MAP:
398 fore200e->bus->unmap(fore200e);
399
400
401 case FORE200E_STATE_CONFIGURE:
402
403
404 case FORE200E_STATE_REGISTER:
405
406 atm_dev_deregister(fore200e->atm_dev);
407
408 case FORE200E_STATE_BLANK:
409
410 break;
411 }
412}
413
414
415#ifdef CONFIG_PCI
416
417static u32 fore200e_pca_read(volatile u32 __iomem *addr)
418{
419
420
421 return le32_to_cpu(readl(addr));
422}
423
424
425static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
426{
427
428
429 writel(cpu_to_le32(val), addr);
430}
431
432
433static u32
434fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
435{
436 u32 dma_addr = dma_map_single(&((struct pci_dev *) fore200e->bus_dev)->dev, virt_addr, size, direction);
437
438 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
439 virt_addr, size, direction, dma_addr);
440
441 return dma_addr;
442}
443
444
445static void
446fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
447{
448 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
449 dma_addr, size, direction);
450
451 dma_unmap_single(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction);
452}
453
454
455static void
456fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
457{
458 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
459
460 dma_sync_single_for_cpu(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction);
461}
462
463static void
464fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
465{
466 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
467
468 dma_sync_single_for_device(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction);
469}
470
471
472
473
474
475static int
476fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
477 int size, int nbr, int alignment)
478{
479
480 chunk->alloc_size = size * nbr;
481 chunk->alloc_addr = dma_alloc_coherent(&((struct pci_dev *) fore200e->bus_dev)->dev,
482 chunk->alloc_size,
483 &chunk->dma_addr,
484 GFP_KERNEL);
485
486 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
487 return -ENOMEM;
488
489 chunk->align_addr = chunk->alloc_addr;
490
491 return 0;
492}
493
494
495
496
497static void
498fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
499{
500 dma_free_coherent(&((struct pci_dev *) fore200e->bus_dev)->dev,
501 chunk->alloc_size,
502 chunk->alloc_addr,
503 chunk->dma_addr);
504}
505
506
507static int
508fore200e_pca_irq_check(struct fore200e* fore200e)
509{
510
511 int irq_posted = readl(fore200e->regs.pca.psr);
512
513#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
514 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
515 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
516 }
517#endif
518
519 return irq_posted;
520}
521
522
523static void
524fore200e_pca_irq_ack(struct fore200e* fore200e)
525{
526 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
527}
528
529
530static void
531fore200e_pca_reset(struct fore200e* fore200e)
532{
533 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
534 fore200e_spin(10);
535 writel(0, fore200e->regs.pca.hcr);
536}
537
538
539static int fore200e_pca_map(struct fore200e* fore200e)
540{
541 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
542
543 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
544
545 if (fore200e->virt_base == NULL) {
546 printk(FORE200E "can't map device %s\n", fore200e->name);
547 return -EFAULT;
548 }
549
550 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
551
552
553 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
554 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
555 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
556
557 fore200e->state = FORE200E_STATE_MAP;
558 return 0;
559}
560
561
562static void
563fore200e_pca_unmap(struct fore200e* fore200e)
564{
565 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
566
567 if (fore200e->virt_base != NULL)
568 iounmap(fore200e->virt_base);
569}
570
571
572static int fore200e_pca_configure(struct fore200e *fore200e)
573{
574 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
575 u8 master_ctrl, latency;
576
577 DPRINTK(2, "device %s being configured\n", fore200e->name);
578
579 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
580 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
581 return -EIO;
582 }
583
584 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
585
586 master_ctrl = master_ctrl
587#if defined(__BIG_ENDIAN)
588
589 | PCA200E_CTRL_CONVERT_ENDIAN
590#endif
591#if 0
592 | PCA200E_CTRL_DIS_CACHE_RD
593 | PCA200E_CTRL_DIS_WRT_INVAL
594 | PCA200E_CTRL_ENA_CONT_REQ_MODE
595 | PCA200E_CTRL_2_CACHE_WRT_INVAL
596#endif
597 | PCA200E_CTRL_LARGE_PCI_BURSTS;
598
599 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
600
601
602
603
604 latency = 192;
605 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
606
607 fore200e->state = FORE200E_STATE_CONFIGURE;
608 return 0;
609}
610
611
612static int __init
613fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
614{
615 struct host_cmdq* cmdq = &fore200e->host_cmdq;
616 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
617 struct prom_opcode opcode;
618 int ok;
619 u32 prom_dma;
620
621 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
622
623 opcode.opcode = OPCODE_GET_PROM;
624 opcode.pad = 0;
625
626 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
627
628 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
629
630 *entry->status = STATUS_PENDING;
631
632 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
633
634 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
635
636 *entry->status = STATUS_FREE;
637
638 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
639
640 if (ok == 0) {
641 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
642 return -EIO;
643 }
644
645#if defined(__BIG_ENDIAN)
646
647#define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
648
649
650 swap_here(&prom->mac_addr[0]);
651 swap_here(&prom->mac_addr[4]);
652#endif
653
654 return 0;
655}
656
657
658static int
659fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
660{
661 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
662
663 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
664 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
665}
666
667#endif
668
669
670#ifdef CONFIG_SBUS
671
672static u32 fore200e_sba_read(volatile u32 __iomem *addr)
673{
674 return sbus_readl(addr);
675}
676
677static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
678{
679 sbus_writel(val, addr);
680}
681
682static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
683{
684 struct platform_device *op = fore200e->bus_dev;
685 u32 dma_addr;
686
687 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
688
689 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
690 virt_addr, size, direction, dma_addr);
691
692 return dma_addr;
693}
694
695static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
696{
697 struct platform_device *op = fore200e->bus_dev;
698
699 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
700 dma_addr, size, direction);
701
702 dma_unmap_single(&op->dev, dma_addr, size, direction);
703}
704
705static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
706{
707 struct platform_device *op = fore200e->bus_dev;
708
709 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
710
711 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
712}
713
714static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
715{
716 struct platform_device *op = fore200e->bus_dev;
717
718 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
719
720 dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
721}
722
723
724
725
726static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
727 int size, int nbr, int alignment)
728{
729 struct platform_device *op = fore200e->bus_dev;
730
731 chunk->alloc_size = chunk->align_size = size * nbr;
732
733
734 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
735 &chunk->dma_addr, GFP_ATOMIC);
736
737 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
738 return -ENOMEM;
739
740 chunk->align_addr = chunk->alloc_addr;
741
742 return 0;
743}
744
745
746static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
747{
748 struct platform_device *op = fore200e->bus_dev;
749
750 dma_free_coherent(&op->dev, chunk->alloc_size,
751 chunk->alloc_addr, chunk->dma_addr);
752}
753
754static void fore200e_sba_irq_enable(struct fore200e *fore200e)
755{
756 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
757 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
758}
759
760static int fore200e_sba_irq_check(struct fore200e *fore200e)
761{
762 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
763}
764
765static void fore200e_sba_irq_ack(struct fore200e *fore200e)
766{
767 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
768 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
769}
770
771static void fore200e_sba_reset(struct fore200e *fore200e)
772{
773 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
774 fore200e_spin(10);
775 fore200e->bus->write(0, fore200e->regs.sba.hcr);
776}
777
778static int __init fore200e_sba_map(struct fore200e *fore200e)
779{
780 struct platform_device *op = fore200e->bus_dev;
781 unsigned int bursts;
782
783
784 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
785 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
786 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
787 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
788
789 if (!fore200e->virt_base) {
790 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
791 return -EFAULT;
792 }
793
794 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
795
796 fore200e->bus->write(0x02, fore200e->regs.sba.isr);
797
798
799 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
800
801 if (sbus_can_dma_64bit())
802 sbus_set_sbus64(&op->dev, bursts);
803
804 fore200e->state = FORE200E_STATE_MAP;
805 return 0;
806}
807
808static void fore200e_sba_unmap(struct fore200e *fore200e)
809{
810 struct platform_device *op = fore200e->bus_dev;
811
812 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
813 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
814 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
815 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
816}
817
818static int __init fore200e_sba_configure(struct fore200e *fore200e)
819{
820 fore200e->state = FORE200E_STATE_CONFIGURE;
821 return 0;
822}
823
824static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
825{
826 struct platform_device *op = fore200e->bus_dev;
827 const u8 *prop;
828 int len;
829
830 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
831 if (!prop)
832 return -ENODEV;
833 memcpy(&prom->mac_addr[4], prop, 4);
834
835 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
836 if (!prop)
837 return -ENODEV;
838 memcpy(&prom->mac_addr[2], prop, 4);
839
840 prom->serial_number = of_getintprop_default(op->dev.of_node,
841 "serialnumber", 0);
842 prom->hw_revision = of_getintprop_default(op->dev.of_node,
843 "promversion", 0);
844
845 return 0;
846}
847
848static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
849{
850 struct platform_device *op = fore200e->bus_dev;
851 const struct linux_prom_registers *regs;
852
853 regs = of_get_property(op->dev.of_node, "reg", NULL);
854
855 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
856 (regs ? regs->which_io : 0), op->dev.of_node->name);
857}
858#endif
859
860
861static void
862fore200e_tx_irq(struct fore200e* fore200e)
863{
864 struct host_txq* txq = &fore200e->host_txq;
865 struct host_txq_entry* entry;
866 struct atm_vcc* vcc;
867 struct fore200e_vc_map* vc_map;
868
869 if (fore200e->host_txq.txing == 0)
870 return;
871
872 for (;;) {
873
874 entry = &txq->host_entry[ txq->tail ];
875
876 if ((*entry->status & STATUS_COMPLETE) == 0) {
877 break;
878 }
879
880 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
881 entry, txq->tail, entry->vc_map, entry->skb);
882
883
884 kfree(entry->data);
885
886
887 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
888 DMA_TO_DEVICE);
889
890 vc_map = entry->vc_map;
891
892
893 if ((vc_map->vcc == NULL) ||
894 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
895
896 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
897 fore200e->atm_dev->number);
898
899 dev_kfree_skb_any(entry->skb);
900 }
901 else {
902 ASSERT(vc_map->vcc);
903
904
905 if (vc_map->incarn != entry->incarn) {
906
907
908
909
910
911
912
913
914
915
916
917
918
919 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
920 fore200e->atm_dev->number);
921
922 dev_kfree_skb_any(entry->skb);
923 }
924 else {
925 vcc = vc_map->vcc;
926 ASSERT(vcc);
927
928
929 if (vcc->pop) {
930 vcc->pop(vcc, entry->skb);
931 }
932 else {
933 dev_kfree_skb_any(entry->skb);
934 }
935
936
937 if (*entry->status & STATUS_ERROR)
938 atomic_inc(&vcc->stats->tx_err);
939 else
940 atomic_inc(&vcc->stats->tx);
941 }
942 }
943
944 *entry->status = STATUS_FREE;
945
946 fore200e->host_txq.txing--;
947
948 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
949 }
950}
951
952
953#ifdef FORE200E_BSQ_DEBUG
954int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
955{
956 struct buffer* buffer;
957 int count = 0;
958
959 buffer = bsq->freebuf;
960 while (buffer) {
961
962 if (buffer->supplied) {
963 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
964 where, scheme, magn, buffer->index);
965 }
966
967 if (buffer->magn != magn) {
968 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
969 where, scheme, magn, buffer->index, buffer->magn);
970 }
971
972 if (buffer->scheme != scheme) {
973 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
974 where, scheme, magn, buffer->index, buffer->scheme);
975 }
976
977 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
978 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
979 where, scheme, magn, buffer->index);
980 }
981
982 count++;
983 buffer = buffer->next;
984 }
985
986 if (count != bsq->freebuf_count) {
987 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
988 where, scheme, magn, count, bsq->freebuf_count);
989 }
990 return 0;
991}
992#endif
993
994
995static void
996fore200e_supply(struct fore200e* fore200e)
997{
998 int scheme, magn, i;
999
1000 struct host_bsq* bsq;
1001 struct host_bsq_entry* entry;
1002 struct buffer* buffer;
1003
1004 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1005 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1006
1007 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1008
1009#ifdef FORE200E_BSQ_DEBUG
1010 bsq_audit(1, bsq, scheme, magn);
1011#endif
1012 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1013
1014 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1015 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1016
1017 entry = &bsq->host_entry[ bsq->head ];
1018
1019 for (i = 0; i < RBD_BLK_SIZE; i++) {
1020
1021
1022 buffer = bsq->freebuf;
1023 if (!buffer) {
1024 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1025 scheme, magn, bsq->freebuf_count);
1026 return;
1027 }
1028 bsq->freebuf = buffer->next;
1029
1030#ifdef FORE200E_BSQ_DEBUG
1031 if (buffer->supplied)
1032 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1033 scheme, magn, buffer->index);
1034 buffer->supplied = 1;
1035#endif
1036 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1037 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1038 }
1039
1040 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1041
1042
1043 bsq->freebuf_count -= RBD_BLK_SIZE;
1044
1045 *entry->status = STATUS_PENDING;
1046 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1047 }
1048 }
1049 }
1050}
1051
1052
1053static int
1054fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1055{
1056 struct sk_buff* skb;
1057 struct buffer* buffer;
1058 struct fore200e_vcc* fore200e_vcc;
1059 int i, pdu_len = 0;
1060#ifdef FORE200E_52BYTE_AAL0_SDU
1061 u32 cell_header = 0;
1062#endif
1063
1064 ASSERT(vcc);
1065
1066 fore200e_vcc = FORE200E_VCC(vcc);
1067 ASSERT(fore200e_vcc);
1068
1069#ifdef FORE200E_52BYTE_AAL0_SDU
1070 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1071
1072 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1073 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1074 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1075 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1076 rpd->atm_header.clp;
1077 pdu_len = 4;
1078 }
1079#endif
1080
1081
1082 for (i = 0; i < rpd->nseg; i++)
1083 pdu_len += rpd->rsd[ i ].length;
1084
1085 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1086 if (skb == NULL) {
1087 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1088
1089 atomic_inc(&vcc->stats->rx_drop);
1090 return -ENOMEM;
1091 }
1092
1093 __net_timestamp(skb);
1094
1095#ifdef FORE200E_52BYTE_AAL0_SDU
1096 if (cell_header) {
1097 *((u32*)skb_put(skb, 4)) = cell_header;
1098 }
1099#endif
1100
1101
1102 for (i = 0; i < rpd->nseg; i++) {
1103
1104
1105 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1106
1107
1108 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1109
1110 skb_put_data(skb, buffer->data.align_addr, rpd->rsd[i].length);
1111
1112
1113 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1114 }
1115
1116 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1117
1118 if (pdu_len < fore200e_vcc->rx_min_pdu)
1119 fore200e_vcc->rx_min_pdu = pdu_len;
1120 if (pdu_len > fore200e_vcc->rx_max_pdu)
1121 fore200e_vcc->rx_max_pdu = pdu_len;
1122 fore200e_vcc->rx_pdu++;
1123
1124
1125 if (atm_charge(vcc, skb->truesize) == 0) {
1126
1127 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1128 vcc->itf, vcc->vpi, vcc->vci);
1129
1130 dev_kfree_skb_any(skb);
1131
1132 atomic_inc(&vcc->stats->rx_drop);
1133 return -ENOMEM;
1134 }
1135
1136 vcc->push(vcc, skb);
1137 atomic_inc(&vcc->stats->rx);
1138
1139 return 0;
1140}
1141
1142
1143static void
1144fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1145{
1146 struct host_bsq* bsq;
1147 struct buffer* buffer;
1148 int i;
1149
1150 for (i = 0; i < rpd->nseg; i++) {
1151
1152
1153 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1154
1155 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1156
1157#ifdef FORE200E_BSQ_DEBUG
1158 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1159
1160 if (buffer->supplied == 0)
1161 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1162 buffer->scheme, buffer->magn, buffer->index);
1163 buffer->supplied = 0;
1164#endif
1165
1166
1167 buffer->next = bsq->freebuf;
1168 bsq->freebuf = buffer;
1169
1170
1171 bsq->freebuf_count++;
1172 }
1173}
1174
1175
1176static void
1177fore200e_rx_irq(struct fore200e* fore200e)
1178{
1179 struct host_rxq* rxq = &fore200e->host_rxq;
1180 struct host_rxq_entry* entry;
1181 struct atm_vcc* vcc;
1182 struct fore200e_vc_map* vc_map;
1183
1184 for (;;) {
1185
1186 entry = &rxq->host_entry[ rxq->head ];
1187
1188
1189 if ((*entry->status & STATUS_COMPLETE) == 0)
1190 break;
1191
1192 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1193
1194 if ((vc_map->vcc == NULL) ||
1195 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1196
1197 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1198 fore200e->atm_dev->number,
1199 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1200 }
1201 else {
1202 vcc = vc_map->vcc;
1203 ASSERT(vcc);
1204
1205 if ((*entry->status & STATUS_ERROR) == 0) {
1206
1207 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1208 }
1209 else {
1210 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1211 fore200e->atm_dev->number,
1212 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1213 atomic_inc(&vcc->stats->rx_err);
1214 }
1215 }
1216
1217 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1218
1219 fore200e_collect_rpd(fore200e, entry->rpd);
1220
1221
1222 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1223 *entry->status = STATUS_FREE;
1224
1225 fore200e_supply(fore200e);
1226 }
1227}
1228
1229
1230#ifndef FORE200E_USE_TASKLET
1231static void
1232fore200e_irq(struct fore200e* fore200e)
1233{
1234 unsigned long flags;
1235
1236 spin_lock_irqsave(&fore200e->q_lock, flags);
1237 fore200e_rx_irq(fore200e);
1238 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1239
1240 spin_lock_irqsave(&fore200e->q_lock, flags);
1241 fore200e_tx_irq(fore200e);
1242 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1243}
1244#endif
1245
1246
1247static irqreturn_t
1248fore200e_interrupt(int irq, void* dev)
1249{
1250 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1251
1252 if (fore200e->bus->irq_check(fore200e) == 0) {
1253
1254 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1255 return IRQ_NONE;
1256 }
1257 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1258
1259#ifdef FORE200E_USE_TASKLET
1260 tasklet_schedule(&fore200e->tx_tasklet);
1261 tasklet_schedule(&fore200e->rx_tasklet);
1262#else
1263 fore200e_irq(fore200e);
1264#endif
1265
1266 fore200e->bus->irq_ack(fore200e);
1267 return IRQ_HANDLED;
1268}
1269
1270
1271#ifdef FORE200E_USE_TASKLET
1272static void
1273fore200e_tx_tasklet(unsigned long data)
1274{
1275 struct fore200e* fore200e = (struct fore200e*) data;
1276 unsigned long flags;
1277
1278 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1279
1280 spin_lock_irqsave(&fore200e->q_lock, flags);
1281 fore200e_tx_irq(fore200e);
1282 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1283}
1284
1285
1286static void
1287fore200e_rx_tasklet(unsigned long data)
1288{
1289 struct fore200e* fore200e = (struct fore200e*) data;
1290 unsigned long flags;
1291
1292 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1293
1294 spin_lock_irqsave(&fore200e->q_lock, flags);
1295 fore200e_rx_irq((struct fore200e*) data);
1296 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1297}
1298#endif
1299
1300
1301static int
1302fore200e_select_scheme(struct atm_vcc* vcc)
1303{
1304
1305 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1306
1307 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1308 vcc->itf, vcc->vpi, vcc->vci, scheme);
1309
1310 return scheme;
1311}
1312
1313
1314static int
1315fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1316{
1317 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1318 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1319 struct activate_opcode activ_opcode;
1320 struct deactivate_opcode deactiv_opcode;
1321 struct vpvc vpvc;
1322 int ok;
1323 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1324
1325 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1326
1327 if (activate) {
1328 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1329
1330 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1331 activ_opcode.aal = aal;
1332 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1333 activ_opcode.pad = 0;
1334 }
1335 else {
1336 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1337 deactiv_opcode.pad = 0;
1338 }
1339
1340 vpvc.vci = vcc->vci;
1341 vpvc.vpi = vcc->vpi;
1342
1343 *entry->status = STATUS_PENDING;
1344
1345 if (activate) {
1346
1347#ifdef FORE200E_52BYTE_AAL0_SDU
1348 mtu = 48;
1349#endif
1350
1351 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1352 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1353 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1354 }
1355 else {
1356 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1357 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1358 }
1359
1360 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1361
1362 *entry->status = STATUS_FREE;
1363
1364 if (ok == 0) {
1365 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1366 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1367 return -EIO;
1368 }
1369
1370 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1371 activate ? "open" : "clos");
1372
1373 return 0;
1374}
1375
1376
1377#define FORE200E_MAX_BACK2BACK_CELLS 255
1378
1379static void
1380fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1381{
1382 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1383
1384
1385 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1386 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1387 }
1388 else {
1389
1390 rate->data_cells = rate->idle_cells = 0;
1391 }
1392}
1393
1394
1395static int
1396fore200e_open(struct atm_vcc *vcc)
1397{
1398 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1399 struct fore200e_vcc* fore200e_vcc;
1400 struct fore200e_vc_map* vc_map;
1401 unsigned long flags;
1402 int vci = vcc->vci;
1403 short vpi = vcc->vpi;
1404
1405 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1406 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1407
1408 spin_lock_irqsave(&fore200e->q_lock, flags);
1409
1410 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1411 if (vc_map->vcc) {
1412
1413 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1414
1415 printk(FORE200E "VC %d.%d.%d already in use\n",
1416 fore200e->atm_dev->number, vpi, vci);
1417
1418 return -EINVAL;
1419 }
1420
1421 vc_map->vcc = vcc;
1422
1423 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1424
1425 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1426 if (fore200e_vcc == NULL) {
1427 vc_map->vcc = NULL;
1428 return -ENOMEM;
1429 }
1430
1431 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1432 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1433 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1434 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1435 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1436 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1437 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1438
1439
1440 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1441
1442 mutex_lock(&fore200e->rate_mtx);
1443 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1444 mutex_unlock(&fore200e->rate_mtx);
1445
1446 kfree(fore200e_vcc);
1447 vc_map->vcc = NULL;
1448 return -EAGAIN;
1449 }
1450
1451
1452 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1453 mutex_unlock(&fore200e->rate_mtx);
1454 }
1455
1456 vcc->itf = vcc->dev->number;
1457
1458 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1459 set_bit(ATM_VF_ADDR, &vcc->flags);
1460
1461 vcc->dev_data = fore200e_vcc;
1462
1463 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1464
1465 vc_map->vcc = NULL;
1466
1467 clear_bit(ATM_VF_ADDR, &vcc->flags);
1468 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1469
1470 vcc->dev_data = NULL;
1471
1472 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1473
1474 kfree(fore200e_vcc);
1475 return -EINVAL;
1476 }
1477
1478
1479 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1480
1481 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1482 set_bit(ATM_VF_HASQOS, &vcc->flags);
1483
1484 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1485 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1486 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1487 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1488 }
1489
1490 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1491 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1492 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1493
1494
1495 vc_map->incarn = ++fore200e->incarn_count;
1496
1497
1498 set_bit(ATM_VF_READY, &vcc->flags);
1499
1500 return 0;
1501}
1502
1503
1504static void
1505fore200e_close(struct atm_vcc* vcc)
1506{
1507 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1508 struct fore200e_vcc* fore200e_vcc;
1509 struct fore200e_vc_map* vc_map;
1510 unsigned long flags;
1511
1512 ASSERT(vcc);
1513 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1514 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1515
1516 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1517
1518 clear_bit(ATM_VF_READY, &vcc->flags);
1519
1520 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1521
1522 spin_lock_irqsave(&fore200e->q_lock, flags);
1523
1524 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1525
1526
1527 vc_map->vcc = NULL;
1528
1529 vcc->itf = vcc->vci = vcc->vpi = 0;
1530
1531 fore200e_vcc = FORE200E_VCC(vcc);
1532 vcc->dev_data = NULL;
1533
1534 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1535
1536
1537 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1538
1539 mutex_lock(&fore200e->rate_mtx);
1540 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1541 mutex_unlock(&fore200e->rate_mtx);
1542
1543 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1544 }
1545
1546 clear_bit(ATM_VF_ADDR, &vcc->flags);
1547 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1548
1549 ASSERT(fore200e_vcc);
1550 kfree(fore200e_vcc);
1551}
1552
1553
1554static int
1555fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1556{
1557 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1558 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1559 struct fore200e_vc_map* vc_map;
1560 struct host_txq* txq = &fore200e->host_txq;
1561 struct host_txq_entry* entry;
1562 struct tpd* tpd;
1563 struct tpd_haddr tpd_haddr;
1564 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1565 int tx_copy = 0;
1566 int tx_len = skb->len;
1567 u32* cell_header = NULL;
1568 unsigned char* skb_data;
1569 int skb_len;
1570 unsigned char* data;
1571 unsigned long flags;
1572
1573 ASSERT(vcc);
1574 ASSERT(fore200e);
1575 ASSERT(fore200e_vcc);
1576
1577 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1578 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1579 dev_kfree_skb_any(skb);
1580 return -EINVAL;
1581 }
1582
1583#ifdef FORE200E_52BYTE_AAL0_SDU
1584 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1585 cell_header = (u32*) skb->data;
1586 skb_data = skb->data + 4;
1587 skb_len = tx_len = skb->len - 4;
1588
1589 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1590 }
1591 else
1592#endif
1593 {
1594 skb_data = skb->data;
1595 skb_len = skb->len;
1596 }
1597
1598 if (((unsigned long)skb_data) & 0x3) {
1599
1600 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1601 tx_copy = 1;
1602 tx_len = skb_len;
1603 }
1604
1605 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1606
1607
1608 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1609 tx_copy = 1;
1610 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1611 }
1612
1613 if (tx_copy) {
1614 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1615 if (data == NULL) {
1616 if (vcc->pop) {
1617 vcc->pop(vcc, skb);
1618 }
1619 else {
1620 dev_kfree_skb_any(skb);
1621 }
1622 return -ENOMEM;
1623 }
1624
1625 memcpy(data, skb_data, skb_len);
1626 if (skb_len < tx_len)
1627 memset(data + skb_len, 0x00, tx_len - skb_len);
1628 }
1629 else {
1630 data = skb_data;
1631 }
1632
1633 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1634 ASSERT(vc_map->vcc == vcc);
1635
1636 retry_here:
1637
1638 spin_lock_irqsave(&fore200e->q_lock, flags);
1639
1640 entry = &txq->host_entry[ txq->head ];
1641
1642 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1643
1644
1645 fore200e_tx_irq(fore200e);
1646
1647 if (*entry->status != STATUS_FREE) {
1648
1649 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1650
1651
1652 if (--retry > 0) {
1653 udelay(50);
1654 goto retry_here;
1655 }
1656
1657 atomic_inc(&vcc->stats->tx_err);
1658
1659 fore200e->tx_sat++;
1660 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1661 fore200e->name, fore200e->cp_queues->heartbeat);
1662 if (vcc->pop) {
1663 vcc->pop(vcc, skb);
1664 }
1665 else {
1666 dev_kfree_skb_any(skb);
1667 }
1668
1669 if (tx_copy)
1670 kfree(data);
1671
1672 return -ENOBUFS;
1673 }
1674 }
1675
1676 entry->incarn = vc_map->incarn;
1677 entry->vc_map = vc_map;
1678 entry->skb = skb;
1679 entry->data = tx_copy ? data : NULL;
1680
1681 tpd = entry->tpd;
1682 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1683 tpd->tsd[ 0 ].length = tx_len;
1684
1685 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1686 txq->txing++;
1687
1688
1689
1690
1691
1692 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1693 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1694 tpd->tsd[0].length, skb_len);
1695
1696 if (skb_len < fore200e_vcc->tx_min_pdu)
1697 fore200e_vcc->tx_min_pdu = skb_len;
1698 if (skb_len > fore200e_vcc->tx_max_pdu)
1699 fore200e_vcc->tx_max_pdu = skb_len;
1700 fore200e_vcc->tx_pdu++;
1701
1702
1703 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1704 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1705
1706 if (cell_header) {
1707 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1708 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1709 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1710 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1711 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1712 }
1713 else {
1714
1715 tpd->atm_header.clp = 0;
1716 tpd->atm_header.plt = 0;
1717 tpd->atm_header.vci = vcc->vci;
1718 tpd->atm_header.vpi = vcc->vpi;
1719 tpd->atm_header.gfc = 0;
1720 }
1721
1722 tpd->spec.length = tx_len;
1723 tpd->spec.nseg = 1;
1724 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1725 tpd->spec.intr = 1;
1726
1727 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT);
1728 tpd_haddr.pad = 0;
1729 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT;
1730
1731 *entry->status = STATUS_PENDING;
1732 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1733
1734 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1735
1736 return 0;
1737}
1738
1739
1740static int
1741fore200e_getstats(struct fore200e* fore200e)
1742{
1743 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1744 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1745 struct stats_opcode opcode;
1746 int ok;
1747 u32 stats_dma_addr;
1748
1749 if (fore200e->stats == NULL) {
1750 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1751 if (fore200e->stats == NULL)
1752 return -ENOMEM;
1753 }
1754
1755 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1756 sizeof(struct stats), DMA_FROM_DEVICE);
1757
1758 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1759
1760 opcode.opcode = OPCODE_GET_STATS;
1761 opcode.pad = 0;
1762
1763 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1764
1765 *entry->status = STATUS_PENDING;
1766
1767 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1768
1769 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1770
1771 *entry->status = STATUS_FREE;
1772
1773 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1774
1775 if (ok == 0) {
1776 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1777 return -EIO;
1778 }
1779
1780 return 0;
1781}
1782
1783
1784static int
1785fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1786{
1787
1788
1789 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1790 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1791
1792 return -EINVAL;
1793}
1794
1795
1796static int
1797fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
1798{
1799
1800
1801 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1802 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1803
1804 return -EINVAL;
1805}
1806
1807
1808#if 0
1809static int
1810fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1811{
1812 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1813 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1814 struct oc3_opcode opcode;
1815 int ok;
1816 u32 oc3_regs_dma_addr;
1817
1818 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1819
1820 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1821
1822 opcode.opcode = OPCODE_GET_OC3;
1823 opcode.reg = 0;
1824 opcode.value = 0;
1825 opcode.mask = 0;
1826
1827 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1828
1829 *entry->status = STATUS_PENDING;
1830
1831 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1832
1833 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1834
1835 *entry->status = STATUS_FREE;
1836
1837 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1838
1839 if (ok == 0) {
1840 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1841 return -EIO;
1842 }
1843
1844 return 0;
1845}
1846#endif
1847
1848
1849static int
1850fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1851{
1852 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1853 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1854 struct oc3_opcode opcode;
1855 int ok;
1856
1857 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1858
1859 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1860
1861 opcode.opcode = OPCODE_SET_OC3;
1862 opcode.reg = reg;
1863 opcode.value = value;
1864 opcode.mask = mask;
1865
1866 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1867
1868 *entry->status = STATUS_PENDING;
1869
1870 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1871
1872 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1873
1874 *entry->status = STATUS_FREE;
1875
1876 if (ok == 0) {
1877 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1878 return -EIO;
1879 }
1880
1881 return 0;
1882}
1883
1884
1885static int
1886fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1887{
1888 u32 mct_value, mct_mask;
1889 int error;
1890
1891 if (!capable(CAP_NET_ADMIN))
1892 return -EPERM;
1893
1894 switch (loop_mode) {
1895
1896 case ATM_LM_NONE:
1897 mct_value = 0;
1898 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1899 break;
1900
1901 case ATM_LM_LOC_PHY:
1902 mct_value = mct_mask = SUNI_MCT_DLE;
1903 break;
1904
1905 case ATM_LM_RMT_PHY:
1906 mct_value = mct_mask = SUNI_MCT_LLE;
1907 break;
1908
1909 default:
1910 return -EINVAL;
1911 }
1912
1913 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1914 if (error == 0)
1915 fore200e->loop_mode = loop_mode;
1916
1917 return error;
1918}
1919
1920
1921static int
1922fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1923{
1924 struct sonet_stats tmp;
1925
1926 if (fore200e_getstats(fore200e) < 0)
1927 return -EIO;
1928
1929 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1930 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1931 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1932 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1933 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1934 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1935 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1936 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1937 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1938 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1939 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1940 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1941 be32_to_cpu(fore200e->stats->aal5.cells_received);
1942
1943 if (arg)
1944 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1945
1946 return 0;
1947}
1948
1949
1950static int
1951fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1952{
1953 struct fore200e* fore200e = FORE200E_DEV(dev);
1954
1955 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1956
1957 switch (cmd) {
1958
1959 case SONET_GETSTAT:
1960 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1961
1962 case SONET_GETDIAG:
1963 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1964
1965 case ATM_SETLOOP:
1966 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1967
1968 case ATM_GETLOOP:
1969 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1970
1971 case ATM_QUERYLOOP:
1972 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1973 }
1974
1975 return -ENOSYS;
1976}
1977
1978
1979static int
1980fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1981{
1982 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1983 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1984
1985 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1986 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1987 return -EINVAL;
1988 }
1989
1990 DPRINTK(2, "change_qos %d.%d.%d, "
1991 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1992 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1993 "available_cell_rate = %u",
1994 vcc->itf, vcc->vpi, vcc->vci,
1995 fore200e_traffic_class[ qos->txtp.traffic_class ],
1996 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1997 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1998 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1999 flags, fore200e->available_cell_rate);
2000
2001 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2002
2003 mutex_lock(&fore200e->rate_mtx);
2004 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2005 mutex_unlock(&fore200e->rate_mtx);
2006 return -EAGAIN;
2007 }
2008
2009 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2010 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2011
2012 mutex_unlock(&fore200e->rate_mtx);
2013
2014 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2015
2016
2017 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2018
2019 set_bit(ATM_VF_HASQOS, &vcc->flags);
2020
2021 return 0;
2022 }
2023
2024 return -EINVAL;
2025}
2026
2027
2028static int fore200e_irq_request(struct fore200e *fore200e)
2029{
2030 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
2031
2032 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2033 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2034 return -EBUSY;
2035 }
2036
2037 printk(FORE200E "IRQ %s reserved for device %s\n",
2038 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2039
2040#ifdef FORE200E_USE_TASKLET
2041 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2042 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2043#endif
2044
2045 fore200e->state = FORE200E_STATE_IRQ;
2046 return 0;
2047}
2048
2049
2050static int fore200e_get_esi(struct fore200e *fore200e)
2051{
2052 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2053 int ok, i;
2054
2055 if (!prom)
2056 return -ENOMEM;
2057
2058 ok = fore200e->bus->prom_read(fore200e, prom);
2059 if (ok < 0) {
2060 kfree(prom);
2061 return -EBUSY;
2062 }
2063
2064 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
2065 fore200e->name,
2066 (prom->hw_revision & 0xFF) + '@',
2067 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
2068
2069 for (i = 0; i < ESI_LEN; i++) {
2070 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2071 }
2072
2073 kfree(prom);
2074
2075 return 0;
2076}
2077
2078
2079static int fore200e_alloc_rx_buf(struct fore200e *fore200e)
2080{
2081 int scheme, magn, nbr, size, i;
2082
2083 struct host_bsq* bsq;
2084 struct buffer* buffer;
2085
2086 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2087 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2088
2089 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2090
2091 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2092 size = fore200e_rx_buf_size[ scheme ][ magn ];
2093
2094 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2095
2096
2097 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2098
2099 if (buffer == NULL)
2100 return -ENOMEM;
2101
2102 bsq->freebuf = NULL;
2103
2104 for (i = 0; i < nbr; i++) {
2105
2106 buffer[ i ].scheme = scheme;
2107 buffer[ i ].magn = magn;
2108#ifdef FORE200E_BSQ_DEBUG
2109 buffer[ i ].index = i;
2110 buffer[ i ].supplied = 0;
2111#endif
2112
2113
2114 if (fore200e_chunk_alloc(fore200e,
2115 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2116 DMA_FROM_DEVICE) < 0) {
2117
2118 while (i > 0)
2119 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2120 kfree(buffer);
2121
2122 return -ENOMEM;
2123 }
2124
2125
2126 buffer[ i ].next = bsq->freebuf;
2127 bsq->freebuf = &buffer[ i ];
2128 }
2129
2130 bsq->freebuf_count = nbr;
2131
2132#ifdef FORE200E_BSQ_DEBUG
2133 bsq_audit(3, bsq, scheme, magn);
2134#endif
2135 }
2136 }
2137
2138 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2139 return 0;
2140}
2141
2142
2143static int fore200e_init_bs_queue(struct fore200e *fore200e)
2144{
2145 int scheme, magn, i;
2146
2147 struct host_bsq* bsq;
2148 struct cp_bsq_entry __iomem * cp_entry;
2149
2150 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2151 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2152
2153 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2154
2155 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2156
2157
2158 if (fore200e->bus->dma_chunk_alloc(fore200e,
2159 &bsq->status,
2160 sizeof(enum status),
2161 QUEUE_SIZE_BS,
2162 fore200e->bus->status_alignment) < 0) {
2163 return -ENOMEM;
2164 }
2165
2166
2167 if (fore200e->bus->dma_chunk_alloc(fore200e,
2168 &bsq->rbd_block,
2169 sizeof(struct rbd_block),
2170 QUEUE_SIZE_BS,
2171 fore200e->bus->descr_alignment) < 0) {
2172
2173 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2174 return -ENOMEM;
2175 }
2176
2177
2178 cp_entry = fore200e->virt_base +
2179 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2180
2181
2182 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2183
2184 bsq->host_entry[ i ].status =
2185 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2186 bsq->host_entry[ i ].rbd_block =
2187 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2188 bsq->host_entry[ i ].rbd_block_dma =
2189 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2190 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2191
2192 *bsq->host_entry[ i ].status = STATUS_FREE;
2193
2194 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2195 &cp_entry[ i ].status_haddr);
2196 }
2197 }
2198 }
2199
2200 fore200e->state = FORE200E_STATE_INIT_BSQ;
2201 return 0;
2202}
2203
2204
2205static int fore200e_init_rx_queue(struct fore200e *fore200e)
2206{
2207 struct host_rxq* rxq = &fore200e->host_rxq;
2208 struct cp_rxq_entry __iomem * cp_entry;
2209 int i;
2210
2211 DPRINTK(2, "receive queue is being initialized\n");
2212
2213
2214 if (fore200e->bus->dma_chunk_alloc(fore200e,
2215 &rxq->status,
2216 sizeof(enum status),
2217 QUEUE_SIZE_RX,
2218 fore200e->bus->status_alignment) < 0) {
2219 return -ENOMEM;
2220 }
2221
2222
2223 if (fore200e->bus->dma_chunk_alloc(fore200e,
2224 &rxq->rpd,
2225 sizeof(struct rpd),
2226 QUEUE_SIZE_RX,
2227 fore200e->bus->descr_alignment) < 0) {
2228
2229 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2230 return -ENOMEM;
2231 }
2232
2233
2234 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2235
2236
2237 for (i=0; i < QUEUE_SIZE_RX; i++) {
2238
2239 rxq->host_entry[ i ].status =
2240 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2241 rxq->host_entry[ i ].rpd =
2242 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2243 rxq->host_entry[ i ].rpd_dma =
2244 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2245 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2246
2247 *rxq->host_entry[ i ].status = STATUS_FREE;
2248
2249 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2250 &cp_entry[ i ].status_haddr);
2251
2252 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2253 &cp_entry[ i ].rpd_haddr);
2254 }
2255
2256
2257 rxq->head = 0;
2258
2259 fore200e->state = FORE200E_STATE_INIT_RXQ;
2260 return 0;
2261}
2262
2263
2264static int fore200e_init_tx_queue(struct fore200e *fore200e)
2265{
2266 struct host_txq* txq = &fore200e->host_txq;
2267 struct cp_txq_entry __iomem * cp_entry;
2268 int i;
2269
2270 DPRINTK(2, "transmit queue is being initialized\n");
2271
2272
2273 if (fore200e->bus->dma_chunk_alloc(fore200e,
2274 &txq->status,
2275 sizeof(enum status),
2276 QUEUE_SIZE_TX,
2277 fore200e->bus->status_alignment) < 0) {
2278 return -ENOMEM;
2279 }
2280
2281
2282 if (fore200e->bus->dma_chunk_alloc(fore200e,
2283 &txq->tpd,
2284 sizeof(struct tpd),
2285 QUEUE_SIZE_TX,
2286 fore200e->bus->descr_alignment) < 0) {
2287
2288 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2289 return -ENOMEM;
2290 }
2291
2292
2293 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2294
2295
2296 for (i=0; i < QUEUE_SIZE_TX; i++) {
2297
2298 txq->host_entry[ i ].status =
2299 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2300 txq->host_entry[ i ].tpd =
2301 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2302 txq->host_entry[ i ].tpd_dma =
2303 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2304 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2305
2306 *txq->host_entry[ i ].status = STATUS_FREE;
2307
2308 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2309 &cp_entry[ i ].status_haddr);
2310
2311
2312
2313
2314
2315 }
2316
2317
2318 txq->head = 0;
2319 txq->tail = 0;
2320
2321 fore200e->state = FORE200E_STATE_INIT_TXQ;
2322 return 0;
2323}
2324
2325
2326static int fore200e_init_cmd_queue(struct fore200e *fore200e)
2327{
2328 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2329 struct cp_cmdq_entry __iomem * cp_entry;
2330 int i;
2331
2332 DPRINTK(2, "command queue is being initialized\n");
2333
2334
2335 if (fore200e->bus->dma_chunk_alloc(fore200e,
2336 &cmdq->status,
2337 sizeof(enum status),
2338 QUEUE_SIZE_CMD,
2339 fore200e->bus->status_alignment) < 0) {
2340 return -ENOMEM;
2341 }
2342
2343
2344 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2345
2346
2347 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2348
2349 cmdq->host_entry[ i ].status =
2350 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2351 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2352
2353 *cmdq->host_entry[ i ].status = STATUS_FREE;
2354
2355 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2356 &cp_entry[ i ].status_haddr);
2357 }
2358
2359
2360 cmdq->head = 0;
2361
2362 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2363 return 0;
2364}
2365
2366
2367static void fore200e_param_bs_queue(struct fore200e *fore200e,
2368 enum buffer_scheme scheme,
2369 enum buffer_magn magn, int queue_length,
2370 int pool_size, int supply_blksize)
2371{
2372 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2373
2374 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2375 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2376 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2377 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2378}
2379
2380
2381static int fore200e_initialize(struct fore200e *fore200e)
2382{
2383 struct cp_queues __iomem * cpq;
2384 int ok, scheme, magn;
2385
2386 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2387
2388 mutex_init(&fore200e->rate_mtx);
2389 spin_lock_init(&fore200e->q_lock);
2390
2391 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2392
2393
2394 fore200e->bus->write(1, &cpq->imask);
2395
2396 if (fore200e->bus->irq_enable)
2397 fore200e->bus->irq_enable(fore200e);
2398
2399 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2400
2401 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2402 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2403 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2404
2405 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2406 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2407
2408 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2409 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2410 fore200e_param_bs_queue(fore200e, scheme, magn,
2411 QUEUE_SIZE_BS,
2412 fore200e_rx_buf_nbr[ scheme ][ magn ],
2413 RBD_BLK_SIZE);
2414
2415
2416 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2417 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2418
2419 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2420 if (ok == 0) {
2421 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2422 return -ENODEV;
2423 }
2424
2425 printk(FORE200E "device %s initialized\n", fore200e->name);
2426
2427 fore200e->state = FORE200E_STATE_INITIALIZE;
2428 return 0;
2429}
2430
2431
2432static void fore200e_monitor_putc(struct fore200e *fore200e, char c)
2433{
2434 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2435
2436#if 0
2437 printk("%c", c);
2438#endif
2439 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2440}
2441
2442
2443static int fore200e_monitor_getc(struct fore200e *fore200e)
2444{
2445 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2446 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2447 int c;
2448
2449 while (time_before(jiffies, timeout)) {
2450
2451 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2452
2453 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2454
2455 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2456#if 0
2457 printk("%c", c & 0xFF);
2458#endif
2459 return c & 0xFF;
2460 }
2461 }
2462
2463 return -1;
2464}
2465
2466
2467static void fore200e_monitor_puts(struct fore200e *fore200e, char *str)
2468{
2469 while (*str) {
2470
2471
2472 while (fore200e_monitor_getc(fore200e) >= 0);
2473
2474 fore200e_monitor_putc(fore200e, *str++);
2475 }
2476
2477 while (fore200e_monitor_getc(fore200e) >= 0);
2478}
2479
2480#ifdef __LITTLE_ENDIAN
2481#define FW_EXT ".bin"
2482#else
2483#define FW_EXT "_ecd.bin2"
2484#endif
2485
2486static int fore200e_load_and_start_fw(struct fore200e *fore200e)
2487{
2488 const struct firmware *firmware;
2489 struct device *device;
2490 const struct fw_header *fw_header;
2491 const __le32 *fw_data;
2492 u32 fw_size;
2493 u32 __iomem *load_addr;
2494 char buf[48];
2495 int err = -ENODEV;
2496
2497 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
2498 device = &((struct pci_dev *) fore200e->bus_dev)->dev;
2499#ifdef CONFIG_SBUS
2500 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
2501 device = &((struct platform_device *) fore200e->bus_dev)->dev;
2502#endif
2503 else
2504 return err;
2505
2506 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2507 if ((err = request_firmware(&firmware, buf, device)) < 0) {
2508 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2509 return err;
2510 }
2511
2512 fw_data = (const __le32 *)firmware->data;
2513 fw_size = firmware->size / sizeof(u32);
2514 fw_header = (const struct fw_header *)firmware->data;
2515 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2516
2517 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2518 fore200e->name, load_addr, fw_size);
2519
2520 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2521 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2522 goto release;
2523 }
2524
2525 for (; fw_size--; fw_data++, load_addr++)
2526 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2527
2528 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2529
2530#if defined(__sparc_v9__)
2531
2532 fore200e_spin(100);
2533#endif
2534
2535 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2536 fore200e_monitor_puts(fore200e, buf);
2537
2538 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2539 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2540 goto release;
2541 }
2542
2543 printk(FORE200E "device %s firmware started\n", fore200e->name);
2544
2545 fore200e->state = FORE200E_STATE_START_FW;
2546 err = 0;
2547
2548release:
2549 release_firmware(firmware);
2550 return err;
2551}
2552
2553
2554static int fore200e_register(struct fore200e *fore200e, struct device *parent)
2555{
2556 struct atm_dev* atm_dev;
2557
2558 DPRINTK(2, "device %s being registered\n", fore200e->name);
2559
2560 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2561 -1, NULL);
2562 if (atm_dev == NULL) {
2563 printk(FORE200E "unable to register device %s\n", fore200e->name);
2564 return -ENODEV;
2565 }
2566
2567 atm_dev->dev_data = fore200e;
2568 fore200e->atm_dev = atm_dev;
2569
2570 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2571 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2572
2573 fore200e->available_cell_rate = ATM_OC3_PCR;
2574
2575 fore200e->state = FORE200E_STATE_REGISTER;
2576 return 0;
2577}
2578
2579
2580static int fore200e_init(struct fore200e *fore200e, struct device *parent)
2581{
2582 if (fore200e_register(fore200e, parent) < 0)
2583 return -ENODEV;
2584
2585 if (fore200e->bus->configure(fore200e) < 0)
2586 return -ENODEV;
2587
2588 if (fore200e->bus->map(fore200e) < 0)
2589 return -ENODEV;
2590
2591 if (fore200e_reset(fore200e, 1) < 0)
2592 return -ENODEV;
2593
2594 if (fore200e_load_and_start_fw(fore200e) < 0)
2595 return -ENODEV;
2596
2597 if (fore200e_initialize(fore200e) < 0)
2598 return -ENODEV;
2599
2600 if (fore200e_init_cmd_queue(fore200e) < 0)
2601 return -ENOMEM;
2602
2603 if (fore200e_init_tx_queue(fore200e) < 0)
2604 return -ENOMEM;
2605
2606 if (fore200e_init_rx_queue(fore200e) < 0)
2607 return -ENOMEM;
2608
2609 if (fore200e_init_bs_queue(fore200e) < 0)
2610 return -ENOMEM;
2611
2612 if (fore200e_alloc_rx_buf(fore200e) < 0)
2613 return -ENOMEM;
2614
2615 if (fore200e_get_esi(fore200e) < 0)
2616 return -EIO;
2617
2618 if (fore200e_irq_request(fore200e) < 0)
2619 return -EBUSY;
2620
2621 fore200e_supply(fore200e);
2622
2623
2624 fore200e->state = FORE200E_STATE_COMPLETE;
2625 return 0;
2626}
2627
2628#ifdef CONFIG_SBUS
2629static const struct of_device_id fore200e_sba_match[];
2630static int fore200e_sba_probe(struct platform_device *op)
2631{
2632 const struct of_device_id *match;
2633 const struct fore200e_bus *bus;
2634 struct fore200e *fore200e;
2635 static int index = 0;
2636 int err;
2637
2638 match = of_match_device(fore200e_sba_match, &op->dev);
2639 if (!match)
2640 return -EINVAL;
2641 bus = match->data;
2642
2643 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2644 if (!fore200e)
2645 return -ENOMEM;
2646
2647 fore200e->bus = bus;
2648 fore200e->bus_dev = op;
2649 fore200e->irq = op->archdata.irqs[0];
2650 fore200e->phys_base = op->resource[0].start;
2651
2652 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2653
2654 err = fore200e_init(fore200e, &op->dev);
2655 if (err < 0) {
2656 fore200e_shutdown(fore200e);
2657 kfree(fore200e);
2658 return err;
2659 }
2660
2661 index++;
2662 dev_set_drvdata(&op->dev, fore200e);
2663
2664 return 0;
2665}
2666
2667static int fore200e_sba_remove(struct platform_device *op)
2668{
2669 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2670
2671 fore200e_shutdown(fore200e);
2672 kfree(fore200e);
2673
2674 return 0;
2675}
2676
2677static const struct of_device_id fore200e_sba_match[] = {
2678 {
2679 .name = SBA200E_PROM_NAME,
2680 .data = (void *) &fore200e_bus[1],
2681 },
2682 {},
2683};
2684MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2685
2686static struct platform_driver fore200e_sba_driver = {
2687 .driver = {
2688 .name = "fore_200e",
2689 .of_match_table = fore200e_sba_match,
2690 },
2691 .probe = fore200e_sba_probe,
2692 .remove = fore200e_sba_remove,
2693};
2694#endif
2695
2696#ifdef CONFIG_PCI
2697static int fore200e_pca_detect(struct pci_dev *pci_dev,
2698 const struct pci_device_id *pci_ent)
2699{
2700 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2701 struct fore200e* fore200e;
2702 int err = 0;
2703 static int index = 0;
2704
2705 if (pci_enable_device(pci_dev)) {
2706 err = -EINVAL;
2707 goto out;
2708 }
2709
2710 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) {
2711 err = -EINVAL;
2712 goto out;
2713 }
2714
2715 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2716 if (fore200e == NULL) {
2717 err = -ENOMEM;
2718 goto out_disable;
2719 }
2720
2721 fore200e->bus = bus;
2722 fore200e->bus_dev = pci_dev;
2723 fore200e->irq = pci_dev->irq;
2724 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2725
2726 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2727
2728 pci_set_master(pci_dev);
2729
2730 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2731 fore200e->bus->model_name,
2732 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2733
2734 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2735
2736 err = fore200e_init(fore200e, &pci_dev->dev);
2737 if (err < 0) {
2738 fore200e_shutdown(fore200e);
2739 goto out_free;
2740 }
2741
2742 ++index;
2743 pci_set_drvdata(pci_dev, fore200e);
2744
2745out:
2746 return err;
2747
2748out_free:
2749 kfree(fore200e);
2750out_disable:
2751 pci_disable_device(pci_dev);
2752 goto out;
2753}
2754
2755
2756static void fore200e_pca_remove_one(struct pci_dev *pci_dev)
2757{
2758 struct fore200e *fore200e;
2759
2760 fore200e = pci_get_drvdata(pci_dev);
2761
2762 fore200e_shutdown(fore200e);
2763 kfree(fore200e);
2764 pci_disable_device(pci_dev);
2765}
2766
2767
2768static const struct pci_device_id fore200e_pca_tbl[] = {
2769 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2770 0, 0, (unsigned long) &fore200e_bus[0] },
2771 { 0, }
2772};
2773
2774MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2775
2776static struct pci_driver fore200e_pca_driver = {
2777 .name = "fore_200e",
2778 .probe = fore200e_pca_detect,
2779 .remove = fore200e_pca_remove_one,
2780 .id_table = fore200e_pca_tbl,
2781};
2782#endif
2783
2784static int __init fore200e_module_init(void)
2785{
2786 int err = 0;
2787
2788 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2789
2790#ifdef CONFIG_SBUS
2791 err = platform_driver_register(&fore200e_sba_driver);
2792 if (err)
2793 return err;
2794#endif
2795
2796#ifdef CONFIG_PCI
2797 err = pci_register_driver(&fore200e_pca_driver);
2798#endif
2799
2800#ifdef CONFIG_SBUS
2801 if (err)
2802 platform_driver_unregister(&fore200e_sba_driver);
2803#endif
2804
2805 return err;
2806}
2807
2808static void __exit fore200e_module_cleanup(void)
2809{
2810#ifdef CONFIG_PCI
2811 pci_unregister_driver(&fore200e_pca_driver);
2812#endif
2813#ifdef CONFIG_SBUS
2814 platform_driver_unregister(&fore200e_sba_driver);
2815#endif
2816}
2817
2818static int
2819fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2820{
2821 struct fore200e* fore200e = FORE200E_DEV(dev);
2822 struct fore200e_vcc* fore200e_vcc;
2823 struct atm_vcc* vcc;
2824 int i, len, left = *pos;
2825 unsigned long flags;
2826
2827 if (!left--) {
2828
2829 if (fore200e_getstats(fore200e) < 0)
2830 return -EIO;
2831
2832 len = sprintf(page,"\n"
2833 " device:\n"
2834 " internal name:\t\t%s\n", fore200e->name);
2835
2836
2837 if (fore200e->bus->proc_read)
2838 len += fore200e->bus->proc_read(fore200e, page + len);
2839
2840 len += sprintf(page + len,
2841 " interrupt line:\t\t%s\n"
2842 " physical base address:\t0x%p\n"
2843 " virtual base address:\t0x%p\n"
2844 " factory address (ESI):\t%pM\n"
2845 " board serial number:\t\t%d\n\n",
2846 fore200e_irq_itoa(fore200e->irq),
2847 (void*)fore200e->phys_base,
2848 fore200e->virt_base,
2849 fore200e->esi,
2850 fore200e->esi[4] * 256 + fore200e->esi[5]);
2851
2852 return len;
2853 }
2854
2855 if (!left--)
2856 return sprintf(page,
2857 " free small bufs, scheme 1:\t%d\n"
2858 " free large bufs, scheme 1:\t%d\n"
2859 " free small bufs, scheme 2:\t%d\n"
2860 " free large bufs, scheme 2:\t%d\n",
2861 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2862 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2863 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2864 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2865
2866 if (!left--) {
2867 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2868
2869 len = sprintf(page,"\n\n"
2870 " cell processor:\n"
2871 " heartbeat state:\t\t");
2872
2873 if (hb >> 16 != 0xDEAD)
2874 len += sprintf(page + len, "0x%08x\n", hb);
2875 else
2876 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2877
2878 return len;
2879 }
2880
2881 if (!left--) {
2882 static const char* media_name[] = {
2883 "unshielded twisted pair",
2884 "multimode optical fiber ST",
2885 "multimode optical fiber SC",
2886 "single-mode optical fiber ST",
2887 "single-mode optical fiber SC",
2888 "unknown"
2889 };
2890
2891 static const char* oc3_mode[] = {
2892 "normal operation",
2893 "diagnostic loopback",
2894 "line loopback",
2895 "unknown"
2896 };
2897
2898 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2899 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2900 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2901 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2902 u32 oc3_index;
2903
2904 if (media_index > 4)
2905 media_index = 5;
2906
2907 switch (fore200e->loop_mode) {
2908 case ATM_LM_NONE: oc3_index = 0;
2909 break;
2910 case ATM_LM_LOC_PHY: oc3_index = 1;
2911 break;
2912 case ATM_LM_RMT_PHY: oc3_index = 2;
2913 break;
2914 default: oc3_index = 3;
2915 }
2916
2917 return sprintf(page,
2918 " firmware release:\t\t%d.%d.%d\n"
2919 " monitor release:\t\t%d.%d\n"
2920 " media type:\t\t\t%s\n"
2921 " OC-3 revision:\t\t0x%x\n"
2922 " OC-3 mode:\t\t\t%s",
2923 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2924 mon960_release >> 16, mon960_release << 16 >> 16,
2925 media_name[ media_index ],
2926 oc3_revision,
2927 oc3_mode[ oc3_index ]);
2928 }
2929
2930 if (!left--) {
2931 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2932
2933 return sprintf(page,
2934 "\n\n"
2935 " monitor:\n"
2936 " version number:\t\t%d\n"
2937 " boot status word:\t\t0x%08x\n",
2938 fore200e->bus->read(&cp_monitor->mon_version),
2939 fore200e->bus->read(&cp_monitor->bstat));
2940 }
2941
2942 if (!left--)
2943 return sprintf(page,
2944 "\n"
2945 " device statistics:\n"
2946 " 4b5b:\n"
2947 " crc_header_errors:\t\t%10u\n"
2948 " framing_errors:\t\t%10u\n",
2949 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2950 be32_to_cpu(fore200e->stats->phy.framing_errors));
2951
2952 if (!left--)
2953 return sprintf(page, "\n"
2954 " OC-3:\n"
2955 " section_bip8_errors:\t%10u\n"
2956 " path_bip8_errors:\t\t%10u\n"
2957 " line_bip24_errors:\t\t%10u\n"
2958 " line_febe_errors:\t\t%10u\n"
2959 " path_febe_errors:\t\t%10u\n"
2960 " corr_hcs_errors:\t\t%10u\n"
2961 " ucorr_hcs_errors:\t\t%10u\n",
2962 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2963 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2964 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2965 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2966 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2967 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2968 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2969
2970 if (!left--)
2971 return sprintf(page,"\n"
2972 " ATM:\t\t\t\t cells\n"
2973 " TX:\t\t\t%10u\n"
2974 " RX:\t\t\t%10u\n"
2975 " vpi out of range:\t\t%10u\n"
2976 " vpi no conn:\t\t%10u\n"
2977 " vci out of range:\t\t%10u\n"
2978 " vci no conn:\t\t%10u\n",
2979 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2980 be32_to_cpu(fore200e->stats->atm.cells_received),
2981 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2982 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2983 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2984 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2985
2986 if (!left--)
2987 return sprintf(page,"\n"
2988 " AAL0:\t\t\t cells\n"
2989 " TX:\t\t\t%10u\n"
2990 " RX:\t\t\t%10u\n"
2991 " dropped:\t\t\t%10u\n",
2992 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
2993 be32_to_cpu(fore200e->stats->aal0.cells_received),
2994 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
2995
2996 if (!left--)
2997 return sprintf(page,"\n"
2998 " AAL3/4:\n"
2999 " SAR sublayer:\t\t cells\n"
3000 " TX:\t\t\t%10u\n"
3001 " RX:\t\t\t%10u\n"
3002 " dropped:\t\t\t%10u\n"
3003 " CRC errors:\t\t%10u\n"
3004 " protocol errors:\t\t%10u\n\n"
3005 " CS sublayer:\t\t PDUs\n"
3006 " TX:\t\t\t%10u\n"
3007 " RX:\t\t\t%10u\n"
3008 " dropped:\t\t\t%10u\n"
3009 " protocol errors:\t\t%10u\n",
3010 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
3011 be32_to_cpu(fore200e->stats->aal34.cells_received),
3012 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
3013 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
3014 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
3015 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
3016 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
3017 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
3018 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
3019
3020 if (!left--)
3021 return sprintf(page,"\n"
3022 " AAL5:\n"
3023 " SAR sublayer:\t\t cells\n"
3024 " TX:\t\t\t%10u\n"
3025 " RX:\t\t\t%10u\n"
3026 " dropped:\t\t\t%10u\n"
3027 " congestions:\t\t%10u\n\n"
3028 " CS sublayer:\t\t PDUs\n"
3029 " TX:\t\t\t%10u\n"
3030 " RX:\t\t\t%10u\n"
3031 " dropped:\t\t\t%10u\n"
3032 " CRC errors:\t\t%10u\n"
3033 " protocol errors:\t\t%10u\n",
3034 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
3035 be32_to_cpu(fore200e->stats->aal5.cells_received),
3036 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
3037 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
3038 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
3039 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
3040 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
3041 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
3042 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
3043
3044 if (!left--)
3045 return sprintf(page,"\n"
3046 " AUX:\t\t allocation failures\n"
3047 " small b1:\t\t\t%10u\n"
3048 " large b1:\t\t\t%10u\n"
3049 " small b2:\t\t\t%10u\n"
3050 " large b2:\t\t\t%10u\n"
3051 " RX PDUs:\t\t\t%10u\n"
3052 " TX PDUs:\t\t\t%10lu\n",
3053 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
3054 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
3055 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
3056 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
3057 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
3058 fore200e->tx_sat);
3059
3060 if (!left--)
3061 return sprintf(page,"\n"
3062 " receive carrier:\t\t\t%s\n",
3063 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3064
3065 if (!left--) {
3066 return sprintf(page,"\n"
3067 " VCCs:\n address VPI VCI AAL "
3068 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3069 }
3070
3071 for (i = 0; i < NBR_CONNECT; i++) {
3072
3073 vcc = fore200e->vc_map[i].vcc;
3074
3075 if (vcc == NULL)
3076 continue;
3077
3078 spin_lock_irqsave(&fore200e->q_lock, flags);
3079
3080 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3081
3082 fore200e_vcc = FORE200E_VCC(vcc);
3083 ASSERT(fore200e_vcc);
3084
3085 len = sprintf(page,
3086 " %pK %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3087 vcc,
3088 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3089 fore200e_vcc->tx_pdu,
3090 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3091 fore200e_vcc->tx_max_pdu,
3092 fore200e_vcc->rx_pdu,
3093 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3094 fore200e_vcc->rx_max_pdu);
3095
3096 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3097 return len;
3098 }
3099
3100 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3101 }
3102
3103 return 0;
3104}
3105
3106module_init(fore200e_module_init);
3107module_exit(fore200e_module_cleanup);
3108
3109
3110static const struct atmdev_ops fore200e_ops =
3111{
3112 .open = fore200e_open,
3113 .close = fore200e_close,
3114 .ioctl = fore200e_ioctl,
3115 .getsockopt = fore200e_getsockopt,
3116 .setsockopt = fore200e_setsockopt,
3117 .send = fore200e_send,
3118 .change_qos = fore200e_change_qos,
3119 .proc_read = fore200e_proc_read,
3120 .owner = THIS_MODULE
3121};
3122
3123
3124static const struct fore200e_bus fore200e_bus[] = {
3125#ifdef CONFIG_PCI
3126 { "PCA-200E", "pca200e", 32, 4, 32,
3127 fore200e_pca_read,
3128 fore200e_pca_write,
3129 fore200e_pca_dma_map,
3130 fore200e_pca_dma_unmap,
3131 fore200e_pca_dma_sync_for_cpu,
3132 fore200e_pca_dma_sync_for_device,
3133 fore200e_pca_dma_chunk_alloc,
3134 fore200e_pca_dma_chunk_free,
3135 fore200e_pca_configure,
3136 fore200e_pca_map,
3137 fore200e_pca_reset,
3138 fore200e_pca_prom_read,
3139 fore200e_pca_unmap,
3140 NULL,
3141 fore200e_pca_irq_check,
3142 fore200e_pca_irq_ack,
3143 fore200e_pca_proc_read,
3144 },
3145#endif
3146#ifdef CONFIG_SBUS
3147 { "SBA-200E", "sba200e", 32, 64, 32,
3148 fore200e_sba_read,
3149 fore200e_sba_write,
3150 fore200e_sba_dma_map,
3151 fore200e_sba_dma_unmap,
3152 fore200e_sba_dma_sync_for_cpu,
3153 fore200e_sba_dma_sync_for_device,
3154 fore200e_sba_dma_chunk_alloc,
3155 fore200e_sba_dma_chunk_free,
3156 fore200e_sba_configure,
3157 fore200e_sba_map,
3158 fore200e_sba_reset,
3159 fore200e_sba_prom_read,
3160 fore200e_sba_unmap,
3161 fore200e_sba_irq_enable,
3162 fore200e_sba_irq_check,
3163 fore200e_sba_irq_ack,
3164 fore200e_sba_proc_read,
3165 },
3166#endif
3167 {}
3168};
3169
3170MODULE_LICENSE("GPL");
3171#ifdef CONFIG_PCI
3172#ifdef __LITTLE_ENDIAN__
3173MODULE_FIRMWARE("pca200e.bin");
3174#else
3175MODULE_FIRMWARE("pca200e_ecd.bin2");
3176#endif
3177#endif
3178#ifdef CONFIG_SBUS
3179MODULE_FIRMWARE("sba200e_ecd.bin2");
3180#endif
3181