linux/drivers/crypto/amcc/crypto4xx_core.h
<<
>>
Prefs
   1/**
   2 * AMCC SoC PPC4xx Crypto Driver
   3 *
   4 * Copyright (c) 2008 Applied Micro Circuits Corporation.
   5 * All rights reserved. James Hsiao <jhsiao@amcc.com>
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * This is the header file for AMCC Crypto offload Linux device driver for
  18 * use with Linux CryptoAPI.
  19
  20 */
  21
  22#ifndef __CRYPTO4XX_CORE_H__
  23#define __CRYPTO4XX_CORE_H__
  24
  25#include <linux/ratelimit.h>
  26#include <crypto/internal/hash.h>
  27#include <crypto/internal/aead.h>
  28#include "crypto4xx_reg_def.h"
  29#include "crypto4xx_sa.h"
  30
  31#define PPC460SX_SDR0_SRST                      0x201
  32#define PPC405EX_SDR0_SRST                      0x200
  33#define PPC460EX_SDR0_SRST                      0x201
  34#define PPC460EX_CE_RESET                       0x08000000
  35#define PPC460SX_CE_RESET                       0x20000000
  36#define PPC405EX_CE_RESET                       0x00000008
  37
  38#define CRYPTO4XX_CRYPTO_PRIORITY               300
  39#define PPC4XX_NUM_PD                           256
  40#define PPC4XX_LAST_PD                          (PPC4XX_NUM_PD - 1)
  41#define PPC4XX_NUM_GD                           1024
  42#define PPC4XX_LAST_GD                          (PPC4XX_NUM_GD - 1)
  43#define PPC4XX_NUM_SD                           256
  44#define PPC4XX_LAST_SD                          (PPC4XX_NUM_SD - 1)
  45#define PPC4XX_SD_BUFFER_SIZE                   2048
  46
  47#define PD_ENTRY_BUSY                           BIT(1)
  48#define PD_ENTRY_INUSE                          BIT(0)
  49#define PD_ENTRY_FREE                           0
  50#define ERING_WAS_FULL                          0xffffffff
  51
  52struct crypto4xx_device;
  53
  54union shadow_sa_buf {
  55        struct dynamic_sa_ctl sa;
  56
  57        /* alloc 256 bytes which is enough for any kind of dynamic sa */
  58        u8 buf[256];
  59} __packed;
  60
  61struct pd_uinfo {
  62        struct crypto4xx_device *dev;
  63        u32   state;
  64        u32 using_sd;
  65        u32 first_gd;           /* first gather discriptor
  66                                used by this packet */
  67        u32 num_gd;             /* number of gather discriptor
  68                                used by this packet */
  69        u32 first_sd;           /* first scatter discriptor
  70                                used by this packet */
  71        u32 num_sd;             /* number of scatter discriptors
  72                                used by this packet */
  73        struct dynamic_sa_ctl *sa_va;   /* shadow sa */
  74        struct sa_state_record *sr_va;  /* state record for shadow sa */
  75        u32 sr_pa;
  76        struct scatterlist *dest_va;
  77        struct crypto_async_request *async_req;         /* base crypto request
  78                                                        for this packet */
  79};
  80
  81struct crypto4xx_device {
  82        struct crypto4xx_core_device *core_dev;
  83        void __iomem *ce_base;
  84        void __iomem *trng_base;
  85
  86        struct ce_pd *pdr;      /* base address of packet descriptor ring */
  87        dma_addr_t pdr_pa;      /* physical address of pdr_base_register */
  88        struct ce_gd *gdr;      /* gather descriptor ring */
  89        dma_addr_t gdr_pa;      /* physical address of gdr_base_register */
  90        struct ce_sd *sdr;      /* scatter descriptor ring */
  91        dma_addr_t sdr_pa;      /* physical address of sdr_base_register */
  92        void *scatter_buffer_va;
  93        dma_addr_t scatter_buffer_pa;
  94
  95        union shadow_sa_buf *shadow_sa_pool;
  96        dma_addr_t shadow_sa_pool_pa;
  97        struct sa_state_record *shadow_sr_pool;
  98        dma_addr_t shadow_sr_pool_pa;
  99        u32 pdr_tail;
 100        u32 pdr_head;
 101        u32 gdr_tail;
 102        u32 gdr_head;
 103        u32 sdr_tail;
 104        u32 sdr_head;
 105        struct pd_uinfo *pdr_uinfo;
 106        struct list_head alg_list;      /* List of algorithm supported
 107                                        by this device */
 108        struct ratelimit_state aead_ratelimit;
 109        bool is_revb;
 110};
 111
 112struct crypto4xx_core_device {
 113        struct device *device;
 114        struct platform_device *ofdev;
 115        struct crypto4xx_device *dev;
 116        struct hwrng *trng;
 117        u32 int_status;
 118        u32 irq;
 119        struct tasklet_struct tasklet;
 120        spinlock_t lock;
 121};
 122
 123struct crypto4xx_ctx {
 124        struct crypto4xx_device *dev;
 125        struct dynamic_sa_ctl *sa_in;
 126        struct dynamic_sa_ctl *sa_out;
 127        __le32 iv_nonce;
 128        u32 sa_len;
 129        union {
 130                struct crypto_aead *aead;
 131        } sw_cipher;
 132};
 133
 134struct crypto4xx_alg_common {
 135        u32 type;
 136        union {
 137                struct crypto_alg cipher;
 138                struct ahash_alg hash;
 139                struct aead_alg aead;
 140        } u;
 141};
 142
 143struct crypto4xx_alg {
 144        struct list_head  entry;
 145        struct crypto4xx_alg_common alg;
 146        struct crypto4xx_device *dev;
 147};
 148
 149int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
 150void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
 151void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
 152int crypto4xx_build_pd(struct crypto_async_request *req,
 153                       struct crypto4xx_ctx *ctx,
 154                       struct scatterlist *src,
 155                       struct scatterlist *dst,
 156                       const unsigned int datalen,
 157                       const __le32 *iv, const u32 iv_len,
 158                       const struct dynamic_sa_ctl *sa,
 159                       const unsigned int sa_len,
 160                       const unsigned int assoclen);
 161int crypto4xx_setkey_aes_cbc(struct crypto_ablkcipher *cipher,
 162                             const u8 *key, unsigned int keylen);
 163int crypto4xx_setkey_aes_cfb(struct crypto_ablkcipher *cipher,
 164                             const u8 *key, unsigned int keylen);
 165int crypto4xx_setkey_aes_ecb(struct crypto_ablkcipher *cipher,
 166                             const u8 *key, unsigned int keylen);
 167int crypto4xx_setkey_aes_ofb(struct crypto_ablkcipher *cipher,
 168                             const u8 *key, unsigned int keylen);
 169int crypto4xx_setkey_rfc3686(struct crypto_ablkcipher *cipher,
 170                             const u8 *key, unsigned int keylen);
 171int crypto4xx_encrypt(struct ablkcipher_request *req);
 172int crypto4xx_decrypt(struct ablkcipher_request *req);
 173int crypto4xx_rfc3686_encrypt(struct ablkcipher_request *req);
 174int crypto4xx_rfc3686_decrypt(struct ablkcipher_request *req);
 175int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);
 176int crypto4xx_hash_digest(struct ahash_request *req);
 177int crypto4xx_hash_final(struct ahash_request *req);
 178int crypto4xx_hash_update(struct ahash_request *req);
 179int crypto4xx_hash_init(struct ahash_request *req);
 180
 181/**
 182 * Note: Only use this function to copy items that is word aligned.
 183 */
 184static inline void crypto4xx_memcpy_swab32(u32 *dst, const void *buf,
 185                                           size_t len)
 186{
 187        for (; len >= 4; buf += 4, len -= 4)
 188                *dst++ = __swab32p((u32 *) buf);
 189
 190        if (len) {
 191                const u8 *tmp = (u8 *)buf;
 192
 193                switch (len) {
 194                case 3:
 195                        *dst = (tmp[2] << 16) |
 196                               (tmp[1] << 8) |
 197                               tmp[0];
 198                        break;
 199                case 2:
 200                        *dst = (tmp[1] << 8) |
 201                               tmp[0];
 202                        break;
 203                case 1:
 204                        *dst = tmp[0];
 205                        break;
 206                default:
 207                        break;
 208                }
 209        }
 210}
 211
 212static inline void crypto4xx_memcpy_from_le32(u32 *dst, const void *buf,
 213                                              size_t len)
 214{
 215        crypto4xx_memcpy_swab32(dst, buf, len);
 216}
 217
 218static inline void crypto4xx_memcpy_to_le32(__le32 *dst, const void *buf,
 219                                            size_t len)
 220{
 221        crypto4xx_memcpy_swab32((u32 *)dst, buf, len);
 222}
 223
 224int crypto4xx_setauthsize_aead(struct crypto_aead *ciper,
 225                               unsigned int authsize);
 226int crypto4xx_setkey_aes_ccm(struct crypto_aead *cipher,
 227                             const u8 *key, unsigned int keylen);
 228int crypto4xx_encrypt_aes_ccm(struct aead_request *req);
 229int crypto4xx_decrypt_aes_ccm(struct aead_request *req);
 230int crypto4xx_setkey_aes_gcm(struct crypto_aead *cipher,
 231                             const u8 *key, unsigned int keylen);
 232int crypto4xx_encrypt_aes_gcm(struct aead_request *req);
 233int crypto4xx_decrypt_aes_gcm(struct aead_request *req);
 234
 235#endif
 236