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18#include <drm/drm_print.h>
19
20#include "msm_drv.h"
21#include "mdp4_kms.h"
22
23void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
24 uint32_t old_irqmask)
25{
26 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_CLEAR,
27 irqmask ^ (irqmask & old_irqmask));
28 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_ENABLE, irqmask);
29}
30
31static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
32{
33 struct mdp4_kms *mdp4_kms = container_of(irq, struct mdp4_kms, error_handler);
34 static DEFINE_RATELIMIT_STATE(rs, 5*HZ, 1);
35 extern bool dumpstate;
36
37 DRM_ERROR_RATELIMITED("errors: %08x\n", irqstatus);
38
39 if (dumpstate && __ratelimit(&rs)) {
40 struct drm_printer p = drm_info_printer(mdp4_kms->dev->dev);
41 drm_state_dump(mdp4_kms->dev, &p);
42 }
43}
44
45void mdp4_irq_preinstall(struct msm_kms *kms)
46{
47 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
48 mdp4_enable(mdp4_kms);
49 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff);
50 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
51 mdp4_disable(mdp4_kms);
52}
53
54int mdp4_irq_postinstall(struct msm_kms *kms)
55{
56 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
57 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
58 struct mdp_irq *error_handler = &mdp4_kms->error_handler;
59
60 error_handler->irq = mdp4_irq_error_handler;
61 error_handler->irqmask = MDP4_IRQ_PRIMARY_INTF_UDERRUN |
62 MDP4_IRQ_EXTERNAL_INTF_UDERRUN;
63
64 mdp_irq_register(mdp_kms, error_handler);
65
66 return 0;
67}
68
69void mdp4_irq_uninstall(struct msm_kms *kms)
70{
71 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
72 mdp4_enable(mdp4_kms);
73 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
74 mdp4_disable(mdp4_kms);
75}
76
77irqreturn_t mdp4_irq(struct msm_kms *kms)
78{
79 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
80 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
81 struct drm_device *dev = mdp4_kms->dev;
82 struct msm_drm_private *priv = dev->dev_private;
83 unsigned int id;
84 uint32_t status, enable;
85
86 enable = mdp4_read(mdp4_kms, REG_MDP4_INTR_ENABLE);
87 status = mdp4_read(mdp4_kms, REG_MDP4_INTR_STATUS) & enable;
88 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, status);
89
90 VERB("status=%08x", status);
91
92 mdp_dispatch_irqs(mdp_kms, status);
93
94 for (id = 0; id < priv->num_crtcs; id++)
95 if (status & mdp4_crtc_vblank(priv->crtcs[id]))
96 drm_handle_vblank(dev, id);
97
98 return IRQ_HANDLED;
99}
100
101int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
102{
103 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
104
105 mdp4_enable(mdp4_kms);
106 mdp_update_vblank_mask(to_mdp_kms(kms),
107 mdp4_crtc_vblank(crtc), true);
108 mdp4_disable(mdp4_kms);
109
110 return 0;
111}
112
113void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
114{
115 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
116
117 mdp4_enable(mdp4_kms);
118 mdp_update_vblank_mask(to_mdp_kms(kms),
119 mdp4_crtc_vblank(crtc), false);
120 mdp4_disable(mdp4_kms);
121}
122