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16#ifndef _ISHTP_DEV_H_
17#define _ISHTP_DEV_H_
18
19#include <linux/types.h>
20#include <linux/spinlock.h>
21#include "bus.h"
22#include "hbm.h"
23
24#define IPC_PAYLOAD_SIZE 128
25#define ISHTP_RD_MSG_BUF_SIZE IPC_PAYLOAD_SIZE
26#define IPC_FULL_MSG_SIZE 132
27
28
29#define RD_INT_FIFO_SIZE 64
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34
35#define IPC_TX_FIFO_SIZE 512
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39
40#define ISHTP_CLIENTS_MAX 256
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48
49#define ISHTP_MAX_OPEN_HANDLE_COUNT (ISHTP_CLIENTS_MAX - 1)
50
51
52#define ISHTP_HOST_CLIENT_ID_ANY (-1)
53#define ISHTP_HBM_HOST_CLIENT_ID 0
54
55#define MAX_DMA_DELAY 20
56
57
58enum ishtp_dev_state {
59 ISHTP_DEV_INITIALIZING = 0,
60 ISHTP_DEV_INIT_CLIENTS,
61 ISHTP_DEV_ENABLED,
62 ISHTP_DEV_RESETTING,
63 ISHTP_DEV_DISABLED,
64 ISHTP_DEV_POWER_DOWN,
65 ISHTP_DEV_POWER_UP
66};
67const char *ishtp_dev_state_str(int state);
68
69struct ishtp_cl;
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76
77struct ishtp_fw_client {
78 struct ishtp_client_properties props;
79 uint8_t client_id;
80};
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86
87struct ishtp_msg_data {
88 uint32_t size;
89 unsigned char *data;
90};
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99
100struct ishtp_cl_rb {
101 struct list_head list;
102 struct ishtp_cl *cl;
103 struct ishtp_msg_data buffer;
104 unsigned long buf_idx;
105 unsigned long read_time;
106};
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127
128struct wr_msg_ctl_info {
129
130 void (*ipc_send_compl)(void *);
131
132 void *ipc_send_compl_prm;
133 size_t length;
134 struct list_head link;
135 unsigned char inline_data[IPC_FULL_MSG_SIZE];
136};
137
138
139
140
141
142struct ishtp_hw_ops {
143 int (*hw_reset)(struct ishtp_device *dev);
144 int (*ipc_reset)(struct ishtp_device *dev);
145 uint32_t (*ipc_get_header)(struct ishtp_device *dev, int length,
146 int busy);
147 int (*write)(struct ishtp_device *dev,
148 void (*ipc_send_compl)(void *), void *ipc_send_compl_prm,
149 unsigned char *msg, int length);
150 uint32_t (*ishtp_read_hdr)(const struct ishtp_device *dev);
151 int (*ishtp_read)(struct ishtp_device *dev, unsigned char *buffer,
152 unsigned long buffer_length);
153 uint32_t (*get_fw_status)(struct ishtp_device *dev);
154 void (*sync_fw_clock)(struct ishtp_device *dev);
155};
156
157
158
159
160struct ishtp_device {
161 struct device *devc;
162 struct pci_dev *pdev;
163
164
165 wait_queue_head_t suspend_wait;
166 bool suspend_flag;
167
168
169 wait_queue_head_t resume_wait;
170 bool resume_flag;
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176 spinlock_t device_lock;
177
178 bool recvd_hw_ready;
179 struct hbm_version version;
180 int transfer_path;
181
182
183 enum ishtp_dev_state dev_state;
184 enum ishtp_hbm_state hbm_state;
185
186
187 struct ishtp_cl_rb read_list;
188 spinlock_t read_list_spinlock;
189
190
191 struct list_head cl_list;
192 spinlock_t cl_list_lock;
193 long open_handle_count;
194
195
196 struct list_head device_list;
197 spinlock_t device_list_lock;
198
199
200 wait_queue_head_t wait_hw_ready;
201 wait_queue_head_t wait_hbm_recvd_msg;
202
203
204 unsigned char rd_msg_fifo[RD_INT_FIFO_SIZE * IPC_PAYLOAD_SIZE];
205 unsigned int rd_msg_fifo_head, rd_msg_fifo_tail;
206 spinlock_t rd_msg_spinlock;
207 struct work_struct bh_hbm_work;
208
209
210 struct wr_msg_ctl_info wr_processing_list_head, wr_free_list_head;
211
212 spinlock_t wr_processing_spinlock;
213
214 spinlock_t out_ipc_spinlock;
215
216 struct ishtp_fw_client *fw_clients;
217 DECLARE_BITMAP(fw_clients_map, ISHTP_CLIENTS_MAX);
218 DECLARE_BITMAP(host_clients_map, ISHTP_CLIENTS_MAX);
219 uint8_t fw_clients_num;
220 uint8_t fw_client_presentation_num;
221 uint8_t fw_client_index;
222 spinlock_t fw_clients_lock;
223
224
225 int ishtp_host_dma_enabled;
226 void *ishtp_host_dma_tx_buf;
227 unsigned int ishtp_host_dma_tx_buf_size;
228 uint64_t ishtp_host_dma_tx_buf_phys;
229 int ishtp_dma_num_slots;
230
231
232 uint8_t *ishtp_dma_tx_map;
233 spinlock_t ishtp_dma_tx_lock;
234
235
236 void *ishtp_host_dma_rx_buf;
237 unsigned int ishtp_host_dma_rx_buf_size;
238 uint64_t ishtp_host_dma_rx_buf_phys;
239
240
241 __printf(2, 3) void (*print_log)(struct ishtp_device *dev,
242 const char *format, ...);
243
244
245 unsigned int ipc_rx_cnt;
246 unsigned long long ipc_rx_bytes_cnt;
247 unsigned int ipc_tx_cnt;
248 unsigned long long ipc_tx_bytes_cnt;
249
250 const struct ishtp_hw_ops *ops;
251 size_t mtu;
252 uint32_t ishtp_msg_hdr;
253 char hw[0] __aligned(sizeof(void *));
254};
255
256static inline unsigned long ishtp_secs_to_jiffies(unsigned long sec)
257{
258 return msecs_to_jiffies(sec * MSEC_PER_SEC);
259}
260
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264static inline int ish_ipc_reset(struct ishtp_device *dev)
265{
266 return dev->ops->ipc_reset(dev);
267}
268
269static inline int ish_hw_reset(struct ishtp_device *dev)
270{
271 return dev->ops->hw_reset(dev);
272}
273
274
275void ishtp_device_init(struct ishtp_device *dev);
276int ishtp_start(struct ishtp_device *dev);
277
278#endif
279