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21#include <linux/module.h>
22#include <linux/types.h>
23#include <linux/kernel.h>
24#include <linux/errno.h>
25#include <linux/rational.h>
26#include <linux/videodev2.h>
27#include <linux/v4l2-dv-timings.h>
28#include <media/v4l2-dv-timings.h>
29#include <linux/math64.h>
30
31MODULE_AUTHOR("Hans Verkuil");
32MODULE_DESCRIPTION("V4L2 DV Timings Helper Functions");
33MODULE_LICENSE("GPL");
34
35const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
36 V4L2_DV_BT_CEA_640X480P59_94,
37 V4L2_DV_BT_CEA_720X480I59_94,
38 V4L2_DV_BT_CEA_720X480P59_94,
39 V4L2_DV_BT_CEA_720X576I50,
40 V4L2_DV_BT_CEA_720X576P50,
41 V4L2_DV_BT_CEA_1280X720P24,
42 V4L2_DV_BT_CEA_1280X720P25,
43 V4L2_DV_BT_CEA_1280X720P30,
44 V4L2_DV_BT_CEA_1280X720P50,
45 V4L2_DV_BT_CEA_1280X720P60,
46 V4L2_DV_BT_CEA_1920X1080P24,
47 V4L2_DV_BT_CEA_1920X1080P25,
48 V4L2_DV_BT_CEA_1920X1080P30,
49 V4L2_DV_BT_CEA_1920X1080I50,
50 V4L2_DV_BT_CEA_1920X1080P50,
51 V4L2_DV_BT_CEA_1920X1080I60,
52 V4L2_DV_BT_CEA_1920X1080P60,
53 V4L2_DV_BT_DMT_640X350P85,
54 V4L2_DV_BT_DMT_640X400P85,
55 V4L2_DV_BT_DMT_720X400P85,
56 V4L2_DV_BT_DMT_640X480P72,
57 V4L2_DV_BT_DMT_640X480P75,
58 V4L2_DV_BT_DMT_640X480P85,
59 V4L2_DV_BT_DMT_800X600P56,
60 V4L2_DV_BT_DMT_800X600P60,
61 V4L2_DV_BT_DMT_800X600P72,
62 V4L2_DV_BT_DMT_800X600P75,
63 V4L2_DV_BT_DMT_800X600P85,
64 V4L2_DV_BT_DMT_800X600P120_RB,
65 V4L2_DV_BT_DMT_848X480P60,
66 V4L2_DV_BT_DMT_1024X768I43,
67 V4L2_DV_BT_DMT_1024X768P60,
68 V4L2_DV_BT_DMT_1024X768P70,
69 V4L2_DV_BT_DMT_1024X768P75,
70 V4L2_DV_BT_DMT_1024X768P85,
71 V4L2_DV_BT_DMT_1024X768P120_RB,
72 V4L2_DV_BT_DMT_1152X864P75,
73 V4L2_DV_BT_DMT_1280X768P60_RB,
74 V4L2_DV_BT_DMT_1280X768P60,
75 V4L2_DV_BT_DMT_1280X768P75,
76 V4L2_DV_BT_DMT_1280X768P85,
77 V4L2_DV_BT_DMT_1280X768P120_RB,
78 V4L2_DV_BT_DMT_1280X800P60_RB,
79 V4L2_DV_BT_DMT_1280X800P60,
80 V4L2_DV_BT_DMT_1280X800P75,
81 V4L2_DV_BT_DMT_1280X800P85,
82 V4L2_DV_BT_DMT_1280X800P120_RB,
83 V4L2_DV_BT_DMT_1280X960P60,
84 V4L2_DV_BT_DMT_1280X960P85,
85 V4L2_DV_BT_DMT_1280X960P120_RB,
86 V4L2_DV_BT_DMT_1280X1024P60,
87 V4L2_DV_BT_DMT_1280X1024P75,
88 V4L2_DV_BT_DMT_1280X1024P85,
89 V4L2_DV_BT_DMT_1280X1024P120_RB,
90 V4L2_DV_BT_DMT_1360X768P60,
91 V4L2_DV_BT_DMT_1360X768P120_RB,
92 V4L2_DV_BT_DMT_1366X768P60,
93 V4L2_DV_BT_DMT_1366X768P60_RB,
94 V4L2_DV_BT_DMT_1400X1050P60_RB,
95 V4L2_DV_BT_DMT_1400X1050P60,
96 V4L2_DV_BT_DMT_1400X1050P75,
97 V4L2_DV_BT_DMT_1400X1050P85,
98 V4L2_DV_BT_DMT_1400X1050P120_RB,
99 V4L2_DV_BT_DMT_1440X900P60_RB,
100 V4L2_DV_BT_DMT_1440X900P60,
101 V4L2_DV_BT_DMT_1440X900P75,
102 V4L2_DV_BT_DMT_1440X900P85,
103 V4L2_DV_BT_DMT_1440X900P120_RB,
104 V4L2_DV_BT_DMT_1600X900P60_RB,
105 V4L2_DV_BT_DMT_1600X1200P60,
106 V4L2_DV_BT_DMT_1600X1200P65,
107 V4L2_DV_BT_DMT_1600X1200P70,
108 V4L2_DV_BT_DMT_1600X1200P75,
109 V4L2_DV_BT_DMT_1600X1200P85,
110 V4L2_DV_BT_DMT_1600X1200P120_RB,
111 V4L2_DV_BT_DMT_1680X1050P60_RB,
112 V4L2_DV_BT_DMT_1680X1050P60,
113 V4L2_DV_BT_DMT_1680X1050P75,
114 V4L2_DV_BT_DMT_1680X1050P85,
115 V4L2_DV_BT_DMT_1680X1050P120_RB,
116 V4L2_DV_BT_DMT_1792X1344P60,
117 V4L2_DV_BT_DMT_1792X1344P75,
118 V4L2_DV_BT_DMT_1792X1344P120_RB,
119 V4L2_DV_BT_DMT_1856X1392P60,
120 V4L2_DV_BT_DMT_1856X1392P75,
121 V4L2_DV_BT_DMT_1856X1392P120_RB,
122 V4L2_DV_BT_DMT_1920X1200P60_RB,
123 V4L2_DV_BT_DMT_1920X1200P60,
124 V4L2_DV_BT_DMT_1920X1200P75,
125 V4L2_DV_BT_DMT_1920X1200P85,
126 V4L2_DV_BT_DMT_1920X1200P120_RB,
127 V4L2_DV_BT_DMT_1920X1440P60,
128 V4L2_DV_BT_DMT_1920X1440P75,
129 V4L2_DV_BT_DMT_1920X1440P120_RB,
130 V4L2_DV_BT_DMT_2048X1152P60_RB,
131 V4L2_DV_BT_DMT_2560X1600P60_RB,
132 V4L2_DV_BT_DMT_2560X1600P60,
133 V4L2_DV_BT_DMT_2560X1600P75,
134 V4L2_DV_BT_DMT_2560X1600P85,
135 V4L2_DV_BT_DMT_2560X1600P120_RB,
136 V4L2_DV_BT_CEA_3840X2160P24,
137 V4L2_DV_BT_CEA_3840X2160P25,
138 V4L2_DV_BT_CEA_3840X2160P30,
139 V4L2_DV_BT_CEA_3840X2160P50,
140 V4L2_DV_BT_CEA_3840X2160P60,
141 V4L2_DV_BT_CEA_4096X2160P24,
142 V4L2_DV_BT_CEA_4096X2160P25,
143 V4L2_DV_BT_CEA_4096X2160P30,
144 V4L2_DV_BT_CEA_4096X2160P50,
145 V4L2_DV_BT_DMT_4096X2160P59_94_RB,
146 V4L2_DV_BT_CEA_4096X2160P60,
147 { }
148};
149EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
150
151bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
152 const struct v4l2_dv_timings_cap *dvcap,
153 v4l2_check_dv_timings_fnc fnc,
154 void *fnc_handle)
155{
156 const struct v4l2_bt_timings *bt = &t->bt;
157 const struct v4l2_bt_timings_cap *cap = &dvcap->bt;
158 u32 caps = cap->capabilities;
159
160 if (t->type != V4L2_DV_BT_656_1120)
161 return false;
162 if (t->type != dvcap->type ||
163 bt->height < cap->min_height ||
164 bt->height > cap->max_height ||
165 bt->width < cap->min_width ||
166 bt->width > cap->max_width ||
167 bt->pixelclock < cap->min_pixelclock ||
168 bt->pixelclock > cap->max_pixelclock ||
169 (!(caps & V4L2_DV_BT_CAP_CUSTOM) &&
170 cap->standards && bt->standards &&
171 !(bt->standards & cap->standards)) ||
172 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
173 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
174 return false;
175 return fnc == NULL || fnc(t, fnc_handle);
176}
177EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings);
178
179int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
180 const struct v4l2_dv_timings_cap *cap,
181 v4l2_check_dv_timings_fnc fnc,
182 void *fnc_handle)
183{
184 u32 i, idx;
185
186 memset(t->reserved, 0, sizeof(t->reserved));
187 for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
188 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
189 fnc, fnc_handle) &&
190 idx++ == t->index) {
191 t->timings = v4l2_dv_timings_presets[i];
192 return 0;
193 }
194 }
195 return -EINVAL;
196}
197EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap);
198
199bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
200 const struct v4l2_dv_timings_cap *cap,
201 unsigned pclock_delta,
202 v4l2_check_dv_timings_fnc fnc,
203 void *fnc_handle)
204{
205 int i;
206
207 if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle))
208 return false;
209
210 for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
211 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
212 fnc, fnc_handle) &&
213 v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i,
214 pclock_delta, false)) {
215 u32 flags = t->bt.flags & V4L2_DV_FL_REDUCED_FPS;
216
217 *t = v4l2_dv_timings_presets[i];
218 if (can_reduce_fps(&t->bt))
219 t->bt.flags |= flags;
220
221 return true;
222 }
223 }
224 return false;
225}
226EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap);
227
228bool v4l2_find_dv_timings_cea861_vic(struct v4l2_dv_timings *t, u8 vic)
229{
230 unsigned int i;
231
232 for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
233 const struct v4l2_bt_timings *bt =
234 &v4l2_dv_timings_presets[i].bt;
235
236 if ((bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) &&
237 bt->cea861_vic == vic) {
238 *t = v4l2_dv_timings_presets[i];
239 return true;
240 }
241 }
242 return false;
243}
244EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cea861_vic);
245
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254
255
256bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1,
257 const struct v4l2_dv_timings *t2,
258 unsigned pclock_delta, bool match_reduced_fps)
259{
260 if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
261 return false;
262 if (t1->bt.width == t2->bt.width &&
263 t1->bt.height == t2->bt.height &&
264 t1->bt.interlaced == t2->bt.interlaced &&
265 t1->bt.polarities == t2->bt.polarities &&
266 t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
267 t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
268 t1->bt.hfrontporch == t2->bt.hfrontporch &&
269 t1->bt.hsync == t2->bt.hsync &&
270 t1->bt.hbackporch == t2->bt.hbackporch &&
271 t1->bt.vfrontporch == t2->bt.vfrontporch &&
272 t1->bt.vsync == t2->bt.vsync &&
273 t1->bt.vbackporch == t2->bt.vbackporch &&
274 (!match_reduced_fps ||
275 (t1->bt.flags & V4L2_DV_FL_REDUCED_FPS) ==
276 (t2->bt.flags & V4L2_DV_FL_REDUCED_FPS)) &&
277 (!t1->bt.interlaced ||
278 (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
279 t1->bt.il_vsync == t2->bt.il_vsync &&
280 t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
281 return true;
282 return false;
283}
284EXPORT_SYMBOL_GPL(v4l2_match_dv_timings);
285
286void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix,
287 const struct v4l2_dv_timings *t, bool detailed)
288{
289 const struct v4l2_bt_timings *bt = &t->bt;
290 u32 htot, vtot;
291 u32 fps;
292
293 if (t->type != V4L2_DV_BT_656_1120)
294 return;
295
296 htot = V4L2_DV_BT_FRAME_WIDTH(bt);
297 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt);
298 if (bt->interlaced)
299 vtot /= 2;
300
301 fps = (htot * vtot) > 0 ? div_u64((100 * (u64)bt->pixelclock),
302 (htot * vtot)) : 0;
303
304 if (prefix == NULL)
305 prefix = "";
306
307 pr_info("%s: %s%ux%u%s%u.%u (%ux%u)\n", dev_prefix, prefix,
308 bt->width, bt->height, bt->interlaced ? "i" : "p",
309 fps / 100, fps % 100, htot, vtot);
310
311 if (!detailed)
312 return;
313
314 pr_info("%s: horizontal: fp = %u, %ssync = %u, bp = %u\n",
315 dev_prefix, bt->hfrontporch,
316 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
317 bt->hsync, bt->hbackporch);
318 pr_info("%s: vertical: fp = %u, %ssync = %u, bp = %u\n",
319 dev_prefix, bt->vfrontporch,
320 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
321 bt->vsync, bt->vbackporch);
322 if (bt->interlaced)
323 pr_info("%s: vertical bottom field: fp = %u, %ssync = %u, bp = %u\n",
324 dev_prefix, bt->il_vfrontporch,
325 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
326 bt->il_vsync, bt->il_vbackporch);
327 pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock);
328 pr_info("%s: flags (0x%x):%s%s%s%s%s%s%s%s%s%s\n",
329 dev_prefix, bt->flags,
330 (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?
331 " REDUCED_BLANKING" : "",
332 ((bt->flags & V4L2_DV_FL_REDUCED_BLANKING) &&
333 bt->vsync == 8) ? " (V2)" : "",
334 (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?
335 " CAN_REDUCE_FPS" : "",
336 (bt->flags & V4L2_DV_FL_REDUCED_FPS) ?
337 " REDUCED_FPS" : "",
338 (bt->flags & V4L2_DV_FL_HALF_LINE) ?
339 " HALF_LINE" : "",
340 (bt->flags & V4L2_DV_FL_IS_CE_VIDEO) ?
341 " CE_VIDEO" : "",
342 (bt->flags & V4L2_DV_FL_FIRST_FIELD_EXTRA_LINE) ?
343 " FIRST_FIELD_EXTRA_LINE" : "",
344 (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT) ?
345 " HAS_PICTURE_ASPECT" : "",
346 (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) ?
347 " HAS_CEA861_VIC" : "",
348 (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC) ?
349 " HAS_HDMI_VIC" : "");
350 pr_info("%s: standards (0x%x):%s%s%s%s%s\n", dev_prefix, bt->standards,
351 (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA" : "",
352 (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT" : "",
353 (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "",
354 (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "",
355 (bt->standards & V4L2_DV_BT_STD_SDI) ? " SDI" : "");
356 if (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT)
357 pr_info("%s: picture aspect (hor:vert): %u:%u\n", dev_prefix,
358 bt->picture_aspect.numerator,
359 bt->picture_aspect.denominator);
360 if (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC)
361 pr_info("%s: CEA-861 VIC: %u\n", dev_prefix, bt->cea861_vic);
362 if (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC)
363 pr_info("%s: HDMI VIC: %u\n", dev_prefix, bt->hdmi_vic);
364}
365EXPORT_SYMBOL_GPL(v4l2_print_dv_timings);
366
367struct v4l2_fract v4l2_dv_timings_aspect_ratio(const struct v4l2_dv_timings *t)
368{
369 struct v4l2_fract ratio = { 1, 1 };
370 unsigned long n, d;
371
372 if (t->type != V4L2_DV_BT_656_1120)
373 return ratio;
374 if (!(t->bt.flags & V4L2_DV_FL_HAS_PICTURE_ASPECT))
375 return ratio;
376
377 ratio.numerator = t->bt.width * t->bt.picture_aspect.denominator;
378 ratio.denominator = t->bt.height * t->bt.picture_aspect.numerator;
379
380 rational_best_approximation(ratio.numerator, ratio.denominator,
381 ratio.numerator, ratio.denominator, &n, &d);
382 ratio.numerator = n;
383 ratio.denominator = d;
384 return ratio;
385}
386EXPORT_SYMBOL_GPL(v4l2_dv_timings_aspect_ratio);
387
388
389
390
391
392
393
394#define CVT_PXL_CLK_GRAN 250000
395#define CVT_PXL_CLK_GRAN_RB_V2 1000
396
397
398#define CVT_MIN_V_BPORCH 7
399#define CVT_MIN_V_PORCH_RND 3
400#define CVT_MIN_VSYNC_BP 550
401#define CVT_HSYNC_PERCENT 8
402
403
404#define CVT_CELL_GRAN 8
405#define CVT_M 600
406#define CVT_C 40
407#define CVT_K 128
408#define CVT_J 20
409#define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
410#define CVT_M_PRIME (CVT_K * CVT_M / 256)
411
412
413#define CVT_RB_MIN_V_BPORCH 7
414#define CVT_RB_V_FPORCH 3
415#define CVT_RB_MIN_V_BLANK 460
416#define CVT_RB_H_SYNC 32
417#define CVT_RB_H_BLANK 160
418
419#define CVT_RB_V2_H_BLANK 80
420#define CVT_RB_MIN_V_FPORCH 3
421#define CVT_RB_V2_MIN_V_FPORCH 1
422#define CVT_RB_V_BPORCH 6
423
424
425
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427
428
429
430
431
432
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434
435
436
437
438
439
440bool v4l2_detect_cvt(unsigned frame_height,
441 unsigned hfreq,
442 unsigned vsync,
443 unsigned active_width,
444 u32 polarities,
445 bool interlaced,
446 struct v4l2_dv_timings *fmt)
447{
448 int v_fp, v_bp, h_fp, h_bp, hsync;
449 int frame_width, image_height, image_width;
450 bool reduced_blanking;
451 bool rb_v2 = false;
452 unsigned pix_clk;
453
454 if (vsync < 4 || vsync > 8)
455 return false;
456
457 if (polarities == V4L2_DV_VSYNC_POS_POL)
458 reduced_blanking = false;
459 else if (polarities == V4L2_DV_HSYNC_POS_POL)
460 reduced_blanking = true;
461 else
462 return false;
463
464 if (reduced_blanking && vsync == 8)
465 rb_v2 = true;
466
467 if (rb_v2 && active_width == 0)
468 return false;
469
470 if (!rb_v2 && vsync > 7)
471 return false;
472
473 if (hfreq == 0)
474 return false;
475
476
477 if (reduced_blanking) {
478 if (rb_v2) {
479 v_bp = CVT_RB_V_BPORCH;
480 v_fp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1;
481 v_fp -= vsync + v_bp;
482
483 if (v_fp < CVT_RB_V2_MIN_V_FPORCH)
484 v_fp = CVT_RB_V2_MIN_V_FPORCH;
485 } else {
486 v_fp = CVT_RB_V_FPORCH;
487 v_bp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1;
488 v_bp -= vsync + v_fp;
489
490 if (v_bp < CVT_RB_MIN_V_BPORCH)
491 v_bp = CVT_RB_MIN_V_BPORCH;
492 }
493 } else {
494 v_fp = CVT_MIN_V_PORCH_RND;
495 v_bp = (CVT_MIN_VSYNC_BP * hfreq) / 1000000 + 1 - vsync;
496
497 if (v_bp < CVT_MIN_V_BPORCH)
498 v_bp = CVT_MIN_V_BPORCH;
499 }
500
501 if (interlaced)
502 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1;
503 else
504 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
505
506 if (image_height < 0)
507 return false;
508
509
510 switch (vsync) {
511 case 4:
512 image_width = (image_height * 4) / 3;
513 break;
514 case 5:
515 image_width = (image_height * 16) / 9;
516 break;
517 case 6:
518 image_width = (image_height * 16) / 10;
519 break;
520 case 7:
521
522 if (image_height == 1024)
523 image_width = (image_height * 5) / 4;
524 else if (image_height == 768)
525 image_width = (image_height * 15) / 9;
526 else
527 return false;
528 break;
529 case 8:
530 image_width = active_width;
531 break;
532 default:
533 return false;
534 }
535
536 if (!rb_v2)
537 image_width = image_width & ~7;
538
539
540 if (reduced_blanking) {
541 int h_blank;
542 int clk_gran;
543
544 h_blank = rb_v2 ? CVT_RB_V2_H_BLANK : CVT_RB_H_BLANK;
545 clk_gran = rb_v2 ? CVT_PXL_CLK_GRAN_RB_V2 : CVT_PXL_CLK_GRAN;
546
547 pix_clk = (image_width + h_blank) * hfreq;
548 pix_clk = (pix_clk / clk_gran) * clk_gran;
549
550 h_bp = h_blank / 2;
551 hsync = CVT_RB_H_SYNC;
552 h_fp = h_blank - h_bp - hsync;
553
554 frame_width = image_width + h_blank;
555 } else {
556 unsigned ideal_duty_cycle_per_myriad =
557 100 * CVT_C_PRIME - (CVT_M_PRIME * 100000) / hfreq;
558 int h_blank;
559
560 if (ideal_duty_cycle_per_myriad < 2000)
561 ideal_duty_cycle_per_myriad = 2000;
562
563 h_blank = image_width * ideal_duty_cycle_per_myriad /
564 (10000 - ideal_duty_cycle_per_myriad);
565 h_blank = (h_blank / (2 * CVT_CELL_GRAN)) * 2 * CVT_CELL_GRAN;
566
567 pix_clk = (image_width + h_blank) * hfreq;
568 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
569
570 h_bp = h_blank / 2;
571 frame_width = image_width + h_blank;
572
573 hsync = frame_width * CVT_HSYNC_PERCENT / 100;
574 hsync = (hsync / CVT_CELL_GRAN) * CVT_CELL_GRAN;
575 h_fp = h_blank - hsync - h_bp;
576 }
577
578 fmt->type = V4L2_DV_BT_656_1120;
579 fmt->bt.polarities = polarities;
580 fmt->bt.width = image_width;
581 fmt->bt.height = image_height;
582 fmt->bt.hfrontporch = h_fp;
583 fmt->bt.vfrontporch = v_fp;
584 fmt->bt.hsync = hsync;
585 fmt->bt.vsync = vsync;
586 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
587
588 if (!interlaced) {
589 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
590 fmt->bt.interlaced = V4L2_DV_PROGRESSIVE;
591 } else {
592 fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp -
593 2 * vsync) / 2;
594 fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp -
595 2 * vsync - fmt->bt.vbackporch;
596 fmt->bt.il_vfrontporch = v_fp;
597 fmt->bt.il_vsync = vsync;
598 fmt->bt.flags |= V4L2_DV_FL_HALF_LINE;
599 fmt->bt.interlaced = V4L2_DV_INTERLACED;
600 }
601
602 fmt->bt.pixelclock = pix_clk;
603 fmt->bt.standards = V4L2_DV_BT_STD_CVT;
604
605 if (reduced_blanking)
606 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
607
608 return true;
609}
610EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
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617
618#define GTF_PXL_CLK_GRAN 250000
619
620#define GTF_MIN_VSYNC_BP 550
621#define GTF_V_FP 1
622#define GTF_CELL_GRAN 8
623
624
625#define GTF_D_M 600
626#define GTF_D_C 40
627#define GTF_D_K 128
628#define GTF_D_J 20
629#define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
630#define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
631
632
633#define GTF_S_M 3600
634#define GTF_S_C 40
635#define GTF_S_K 128
636#define GTF_S_J 35
637#define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
638#define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
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657
658bool v4l2_detect_gtf(unsigned frame_height,
659 unsigned hfreq,
660 unsigned vsync,
661 u32 polarities,
662 bool interlaced,
663 struct v4l2_fract aspect,
664 struct v4l2_dv_timings *fmt)
665{
666 int pix_clk;
667 int v_fp, v_bp, h_fp, hsync;
668 int frame_width, image_height, image_width;
669 bool default_gtf;
670 int h_blank;
671
672 if (vsync != 3)
673 return false;
674
675 if (polarities == V4L2_DV_VSYNC_POS_POL)
676 default_gtf = true;
677 else if (polarities == V4L2_DV_HSYNC_POS_POL)
678 default_gtf = false;
679 else
680 return false;
681
682 if (hfreq == 0)
683 return false;
684
685
686 v_fp = GTF_V_FP;
687 v_bp = (GTF_MIN_VSYNC_BP * hfreq + 500000) / 1000000 - vsync;
688 if (interlaced)
689 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1;
690 else
691 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
692
693 if (image_height < 0)
694 return false;
695
696 if (aspect.numerator == 0 || aspect.denominator == 0) {
697 aspect.numerator = 16;
698 aspect.denominator = 9;
699 }
700 image_width = ((image_height * aspect.numerator) / aspect.denominator);
701 image_width = (image_width + GTF_CELL_GRAN/2) & ~(GTF_CELL_GRAN - 1);
702
703
704 if (default_gtf) {
705 u64 num;
706 u32 den;
707
708 num = ((image_width * GTF_D_C_PRIME * (u64)hfreq) -
709 ((u64)image_width * GTF_D_M_PRIME * 1000));
710 den = (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) *
711 (2 * GTF_CELL_GRAN);
712 h_blank = div_u64((num + (den >> 1)), den);
713 h_blank *= (2 * GTF_CELL_GRAN);
714 } else {
715 u64 num;
716 u32 den;
717
718 num = ((image_width * GTF_S_C_PRIME * (u64)hfreq) -
719 ((u64)image_width * GTF_S_M_PRIME * 1000));
720 den = (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) *
721 (2 * GTF_CELL_GRAN);
722 h_blank = div_u64((num + (den >> 1)), den);
723 h_blank *= (2 * GTF_CELL_GRAN);
724 }
725
726 frame_width = image_width + h_blank;
727
728 pix_clk = (image_width + h_blank) * hfreq;
729 pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
730
731 hsync = (frame_width * 8 + 50) / 100;
732 hsync = ((hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN) * GTF_CELL_GRAN;
733
734 h_fp = h_blank / 2 - hsync;
735
736 fmt->type = V4L2_DV_BT_656_1120;
737 fmt->bt.polarities = polarities;
738 fmt->bt.width = image_width;
739 fmt->bt.height = image_height;
740 fmt->bt.hfrontporch = h_fp;
741 fmt->bt.vfrontporch = v_fp;
742 fmt->bt.hsync = hsync;
743 fmt->bt.vsync = vsync;
744 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
745
746 if (!interlaced) {
747 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
748 fmt->bt.interlaced = V4L2_DV_PROGRESSIVE;
749 } else {
750 fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp -
751 2 * vsync) / 2;
752 fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp -
753 2 * vsync - fmt->bt.vbackporch;
754 fmt->bt.il_vfrontporch = v_fp;
755 fmt->bt.il_vsync = vsync;
756 fmt->bt.flags |= V4L2_DV_FL_HALF_LINE;
757 fmt->bt.interlaced = V4L2_DV_INTERLACED;
758 }
759
760 fmt->bt.pixelclock = pix_clk;
761 fmt->bt.standards = V4L2_DV_BT_STD_GTF;
762
763 if (!default_gtf)
764 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
765
766 return true;
767}
768EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
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777
778
779struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
780{
781 struct v4l2_fract aspect = { 16, 9 };
782 u8 ratio;
783
784
785 if (!hor_landscape && !vert_portrait)
786 return aspect;
787
788 if (hor_landscape && vert_portrait) {
789 aspect.numerator = hor_landscape;
790 aspect.denominator = vert_portrait;
791 return aspect;
792 }
793
794
795 ratio = hor_landscape | vert_portrait;
796
797 if (ratio == 79) {
798 aspect.numerator = 16;
799 aspect.denominator = 9;
800 } else if (ratio == 34) {
801 aspect.numerator = 4;
802 aspect.denominator = 3;
803 } else if (ratio == 68) {
804 aspect.numerator = 15;
805 aspect.denominator = 9;
806 } else {
807 aspect.numerator = hor_landscape + 99;
808 aspect.denominator = 100;
809 }
810 if (hor_landscape)
811 return aspect;
812
813 swap(aspect.denominator, aspect.numerator);
814 return aspect;
815}
816EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);
817
