LXR linux/drivers/mmc/host/tmio

   1/*
   2 * Driver for the MMC / SD / SDIO cell found in:
   3 *
   4 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
   5 *
   6 * Copyright (C) 2015-17 Renesas Electronics Corporation
   7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
   8 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
   9 * Copyright (C) 2007 Ian Molton
  10 * Copyright (C) 2004 Ian Molton
  11 *
  12 * This program is free software; you can redistribute it and/or modify
  13 * it under the terms of the GNU General Public License version 2 as
  14 * published by the Free Software Foundation.
  15 *
  16 */
  17
  18#ifndef TMIO_MMC_H
  19#define TMIO_MMC_H
  20
  21#include <linux/dmaengine.h>
  22#include <linux/highmem.h>
  23#include <linux/mutex.h>
  24#include <linux/pagemap.h>
  25#include <linux/scatterlist.h>
  26#include <linux/spinlock.h>
  27#include <linux/interrupt.h>
  28
  29#define CTL_SD_CMD 0x00
  30#define CTL_ARG_REG 0x04
  31#define CTL_STOP_INTERNAL_ACTION 0x08
  32#define CTL_XFER_BLK_COUNT 0xa
  33#define CTL_RESPONSE 0x0c
  34/* driver merges STATUS and following STATUS2 */
  35#define CTL_STATUS 0x1c
  36/* driver merges IRQ_MASK and following IRQ_MASK2 */
  37#define CTL_IRQ_MASK 0x20
  38#define CTL_SD_CARD_CLK_CTL 0x24
  39#define CTL_SD_XFER_LEN 0x26
  40#define CTL_SD_MEM_CARD_OPT 0x28
  41#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
  42#define CTL_SD_DATA_PORT 0x30
  43#define CTL_TRANSACTION_CTL 0x34
  44#define CTL_SDIO_STATUS 0x36
  45#define CTL_SDIO_IRQ_MASK 0x38
  46#define CTL_DMA_ENABLE 0xd8
  47#define CTL_RESET_SD 0xe0
  48#define CTL_VERSION 0xe2
  49#define CTL_SDIO_REGS 0x100
  50#define CTL_CLK_AND_WAIT_CTL 0x138
  51#define CTL_RESET_SDIO 0x1e0
  52
  53/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
  54#define TMIO_STOP_STP           BIT(0)
  55#define TMIO_STOP_SEC           BIT(8)
  56
  57/* Definitions for values the CTL_STATUS register can take */
  58#define TMIO_STAT_CMDRESPEND    BIT(0)
  59#define TMIO_STAT_DATAEND       BIT(2)
  60#define TMIO_STAT_CARD_REMOVE   BIT(3)
  61#define TMIO_STAT_CARD_INSERT   BIT(4)
  62#define TMIO_STAT_SIGSTATE      BIT(5)
  63#define TMIO_STAT_WRPROTECT     BIT(7)
  64#define TMIO_STAT_CARD_REMOVE_A BIT(8)
  65#define TMIO_STAT_CARD_INSERT_A BIT(9)
  66#define TMIO_STAT_SIGSTATE_A    BIT(10)
  67
  68/* These belong technically to CTL_STATUS2, but the driver merges them */
  69#define TMIO_STAT_CMD_IDX_ERR   BIT(16)
  70#define TMIO_STAT_CRCFAIL       BIT(17)
  71#define TMIO_STAT_STOPBIT_ERR   BIT(18)
  72#define TMIO_STAT_DATATIMEOUT   BIT(19)
  73#define TMIO_STAT_RXOVERFLOW    BIT(20)
  74#define TMIO_STAT_TXUNDERRUN    BIT(21)
  75#define TMIO_STAT_CMDTIMEOUT    BIT(22)
  76#define TMIO_STAT_DAT0          BIT(23) /* only known on R-Car so far */
  77#define TMIO_STAT_RXRDY         BIT(24)
  78#define TMIO_STAT_TXRQ          BIT(25)
  79#define TMIO_STAT_ILL_FUNC      BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
  80#define TMIO_STAT_SCLKDIVEN     BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
  81#define TMIO_STAT_CMD_BUSY      BIT(30)
  82#define TMIO_STAT_ILL_ACCESS    BIT(31)
  83
  84/* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */
  85#define CLK_CTL_DIV_MASK        0xff
  86#define CLK_CTL_SCLKEN          BIT(8)
  87
  88/* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
  89#define CARD_OPT_WIDTH8         BIT(13)
  90#define CARD_OPT_WIDTH          BIT(15)
  91
  92/* Definitions for values the CTL_SDIO_STATUS register can take */
  93#define TMIO_SDIO_STAT_IOIRQ    0x0001
  94#define TMIO_SDIO_STAT_EXPUB52  0x4000
  95#define TMIO_SDIO_STAT_EXWT     0x8000
  96#define TMIO_SDIO_MASK_ALL      0xc007
  97
  98#define TMIO_SDIO_SETBITS_MASK  0x0006
  99
 100/* Definitions for values the CTL_DMA_ENABLE register can take */
 101#define DMA_ENABLE_DMASDRW      BIT(1)
 102
 103/* Define some IRQ masks */
 104/* This is the mask used at reset by the chip */
 105#define TMIO_MASK_ALL           0x837f031d
 106#define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
 107#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
 108#define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
 109                TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
 110#define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
 111
 112struct tmio_mmc_data;
 113struct tmio_mmc_host;
 114
 115struct tmio_mmc_dma_ops {
 116        void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
 117        void (*enable)(struct tmio_mmc_host *host, bool enable);
 118        void (*request)(struct tmio_mmc_host *host,
 119                        struct tmio_mmc_data *pdata);
 120        void (*release)(struct tmio_mmc_host *host);
 121        void (*abort)(struct tmio_mmc_host *host);
 122        void (*dataend)(struct tmio_mmc_host *host);
 123};
 124
 125struct tmio_mmc_host {
 126        void __iomem *ctl;
 127        struct mmc_command      *cmd;
 128        struct mmc_request      *mrq;
 129        struct mmc_data         *data;
 130        struct mmc_host         *mmc;
 131        struct mmc_host_ops     ops;
 132
 133        /* Callbacks for clock / power control */
 134        void (*set_pwr)(struct platform_device *host, int state);
 135        void (*set_clk_div)(struct platform_device *host, int state);
 136
 137        /* pio related stuff */
 138        struct scatterlist      *sg_ptr;
 139        struct scatterlist      *sg_orig;
 140        unsigned int            sg_len;
 141        unsigned int            sg_off;
 142        unsigned int            bus_shift;
 143
 144        struct platform_device *pdev;
 145        struct tmio_mmc_data *pdata;
 146
 147        /* DMA support */
 148        bool                    force_pio;
 149        struct dma_chan         *chan_rx;
 150        struct dma_chan         *chan_tx;
 151        struct tasklet_struct   dma_issue;
 152        struct scatterlist      bounce_sg;
 153        u8                      *bounce_buf;
 154
 155        /* Track lost interrupts */
 156        struct delayed_work     delayed_reset_work;
 157        struct work_struct      done;
 158
 159        /* Cache */
 160        u32                     sdcard_irq_mask;
 161        u32                     sdio_irq_mask;
 162        unsigned int            clk_cache;
 163
 164        spinlock_t              lock;           /* protect host private data */
 165        unsigned long           last_req_ts;
 166        struct mutex            ios_lock;       /* protect set_ios() context */
 167        bool                    native_hotplug;
 168        bool                    sdio_irq_enabled;
 169
 170        /* Mandatory callback */
 171        int (*clk_enable)(struct tmio_mmc_host *host);
 172
 173        /* Optional callbacks */
 174        unsigned int (*clk_update)(struct tmio_mmc_host *host,
 175                                   unsigned int new_clock);
 176        void (*clk_disable)(struct tmio_mmc_host *host);
 177        int (*multi_io_quirk)(struct mmc_card *card,
 178                              unsigned int direction, int blk_size);
 179        int (*write16_hook)(struct tmio_mmc_host *host, int addr);
 180        void (*hw_reset)(struct tmio_mmc_host *host);
 181        void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
 182        bool (*check_scc_error)(struct tmio_mmc_host *host);
 183
 184        /*
 185         * Mandatory callback for tuning to occur which is optional for SDR50
 186         * and mandatory for SDR104.
 187         */
 188        unsigned int (*init_tuning)(struct tmio_mmc_host *host);
 189        int (*select_tuning)(struct tmio_mmc_host *host);
 190
 191        /* Tuning values: 1 for success, 0 for failure */
 192        DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
 193        unsigned int tap_num;
 194
 195        const struct tmio_mmc_dma_ops *dma_ops;
 196};
 197
 198struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
 199                                          struct tmio_mmc_data *pdata);
 200void tmio_mmc_host_free(struct tmio_mmc_host *host);
 201int tmio_mmc_host_probe(struct tmio_mmc_host *host);
 202void tmio_mmc_host_remove(struct tmio_mmc_host *host);
 203void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
 204
 205void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
 206void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
 207irqreturn_t tmio_mmc_irq(int irq, void *devid);
 208
 209static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
 210                                         unsigned long *flags)
 211{
 212        local_irq_save(*flags);
 213        return kmap_atomic(sg_page(sg)) + sg->offset;
 214}
 215
 216static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
 217                                          unsigned long *flags, void *virt)
 218{
 219        kunmap_atomic(virt - sg->offset);
 220        local_irq_restore(*flags);
 221}
 222
 223#ifdef CONFIG_PM
 224int tmio_mmc_host_runtime_suspend(struct device *dev);
 225int tmio_mmc_host_runtime_resume(struct device *dev);
 226#endif
 227
 228static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
 229{
 230        return ioread16(host->ctl + (addr << host->bus_shift));
 231}
 232
 233static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
 234                                      u16 *buf, int count)
 235{
 236        ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
 237}
 238
 239static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
 240                                              int addr)
 241{
 242        return ioread16(host->ctl + (addr << host->bus_shift)) |
 243               ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
 244}
 245
 246static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
 247                                      u32 *buf, int count)
 248{
 249        ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
 250}
 251
 252static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
 253                                   u16 val)
 254{
 255        /* If there is a hook and it returns non-zero then there
 256         * is an error and the write should be skipped
 257         */
 258        if (host->write16_hook && host->write16_hook(host, addr))
 259                return;
 260        iowrite16(val, host->ctl + (addr << host->bus_shift));
 261}
 262
 263static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
 264                                       u16 *buf, int count)
 265{
 266        iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
 267}
 268
 269static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
 270                                                int addr, u32 val)
 271{
 272        iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
 273        iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
 274}
 275
 276static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
 277                                       const u32 *buf, int count)
 278{
 279        iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
 280}
 281
 282#endif
 283