LXR linux/drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c

   1/*
   2 * Driver for (BCM4706)? GBit MAC core on BCMA bus.
   3 *
   4 * Copyright (C) 2012 Rafał Miłecki <zajec5@gmail.com>
   5 *
   6 * Licensed under the GNU/GPL. See COPYING for details.
   7 */
   8
   9#define pr_fmt(fmt)             KBUILD_MODNAME ": " fmt
  10
  11#include <linux/bcma/bcma.h>
  12#include <linux/brcmphy.h>
  13#include "bgmac.h"
  14
  15static bool bcma_mdio_wait_value(struct bcma_device *core, u16 reg, u32 mask,
  16                                 u32 value, int timeout)
  17{
  18        u32 val;
  19        int i;
  20
  21        for (i = 0; i < timeout / 10; i++) {
  22                val = bcma_read32(core, reg);
  23                if ((val & mask) == value)
  24                        return true;
  25                udelay(10);
  26        }
  27        dev_err(&core->dev, "Timeout waiting for reg 0x%X\n", reg);
  28        return false;
  29}
  30
  31/**************************************************
  32 * PHY ops
  33 **************************************************/
  34
  35static u16 bcma_mdio_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg)
  36{
  37        struct bcma_device *core;
  38        u16 phy_access_addr;
  39        u16 phy_ctl_addr;
  40        u32 tmp;
  41
  42        BUILD_BUG_ON(BGMAC_PA_DATA_MASK != BCMA_GMAC_CMN_PA_DATA_MASK);
  43        BUILD_BUG_ON(BGMAC_PA_ADDR_MASK != BCMA_GMAC_CMN_PA_ADDR_MASK);
  44        BUILD_BUG_ON(BGMAC_PA_ADDR_SHIFT != BCMA_GMAC_CMN_PA_ADDR_SHIFT);
  45        BUILD_BUG_ON(BGMAC_PA_REG_MASK != BCMA_GMAC_CMN_PA_REG_MASK);
  46        BUILD_BUG_ON(BGMAC_PA_REG_SHIFT != BCMA_GMAC_CMN_PA_REG_SHIFT);
  47        BUILD_BUG_ON(BGMAC_PA_WRITE != BCMA_GMAC_CMN_PA_WRITE);
  48        BUILD_BUG_ON(BGMAC_PA_START != BCMA_GMAC_CMN_PA_START);
  49        BUILD_BUG_ON(BGMAC_PC_EPA_MASK != BCMA_GMAC_CMN_PC_EPA_MASK);
  50        BUILD_BUG_ON(BGMAC_PC_MCT_MASK != BCMA_GMAC_CMN_PC_MCT_MASK);
  51        BUILD_BUG_ON(BGMAC_PC_MCT_SHIFT != BCMA_GMAC_CMN_PC_MCT_SHIFT);
  52        BUILD_BUG_ON(BGMAC_PC_MTE != BCMA_GMAC_CMN_PC_MTE);
  53
  54        if (bgmac->bcma.core->id.id == BCMA_CORE_4706_MAC_GBIT) {
  55                core = bgmac->bcma.core->bus->drv_gmac_cmn.core;
  56                phy_access_addr = BCMA_GMAC_CMN_PHY_ACCESS;
  57                phy_ctl_addr = BCMA_GMAC_CMN_PHY_CTL;
  58        } else {
  59                core = bgmac->bcma.core;
  60                phy_access_addr = BGMAC_PHY_ACCESS;
  61                phy_ctl_addr = BGMAC_PHY_CNTL;
  62        }
  63
  64        tmp = bcma_read32(core, phy_ctl_addr);
  65        tmp &= ~BGMAC_PC_EPA_MASK;
  66        tmp |= phyaddr;
  67        bcma_write32(core, phy_ctl_addr, tmp);
  68
  69        tmp = BGMAC_PA_START;
  70        tmp |= phyaddr << BGMAC_PA_ADDR_SHIFT;
  71        tmp |= reg << BGMAC_PA_REG_SHIFT;
  72        bcma_write32(core, phy_access_addr, tmp);
  73
  74        if (!bcma_mdio_wait_value(core, phy_access_addr, BGMAC_PA_START, 0,
  75                                  1000)) {
  76                dev_err(&core->dev, "Reading PHY %d register 0x%X failed\n",
  77                        phyaddr, reg);
  78                return 0xffff;
  79        }
  80
  81        return bcma_read32(core, phy_access_addr) & BGMAC_PA_DATA_MASK;
  82}
  83
  84/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphywr */
  85static int bcma_mdio_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg,
  86                               u16 value)
  87{
  88        struct bcma_device *core;
  89        u16 phy_access_addr;
  90        u16 phy_ctl_addr;
  91        u32 tmp;
  92
  93        if (bgmac->bcma.core->id.id == BCMA_CORE_4706_MAC_GBIT) {
  94                core = bgmac->bcma.core->bus->drv_gmac_cmn.core;
  95                phy_access_addr = BCMA_GMAC_CMN_PHY_ACCESS;
  96                phy_ctl_addr = BCMA_GMAC_CMN_PHY_CTL;
  97        } else {
  98                core = bgmac->bcma.core;
  99                phy_access_addr = BGMAC_PHY_ACCESS;
 100                phy_ctl_addr = BGMAC_PHY_CNTL;
 101        }
 102
 103        tmp = bcma_read32(core, phy_ctl_addr);
 104        tmp &= ~BGMAC_PC_EPA_MASK;
 105        tmp |= phyaddr;
 106        bcma_write32(core, phy_ctl_addr, tmp);
 107
 108        bcma_write32(bgmac->bcma.core, BGMAC_INT_STATUS, BGMAC_IS_MDIO);
 109        if (bcma_read32(bgmac->bcma.core, BGMAC_INT_STATUS) & BGMAC_IS_MDIO)
 110                dev_warn(&core->dev, "Error setting MDIO int\n");
 111
 112        tmp = BGMAC_PA_START;
 113        tmp |= BGMAC_PA_WRITE;
 114        tmp |= phyaddr << BGMAC_PA_ADDR_SHIFT;
 115        tmp |= reg << BGMAC_PA_REG_SHIFT;
 116        tmp |= value;
 117        bcma_write32(core, phy_access_addr, tmp);
 118
 119        if (!bcma_mdio_wait_value(core, phy_access_addr, BGMAC_PA_START, 0,
 120                                  1000)) {
 121                dev_err(&core->dev, "Writing to PHY %d register 0x%X failed\n",
 122                        phyaddr, reg);
 123                return -ETIMEDOUT;
 124        }
 125
 126        return 0;
 127}
 128
 129/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyinit */
 130static void bcma_mdio_phy_init(struct bgmac *bgmac)
 131{
 132        struct bcma_chipinfo *ci = &bgmac->bcma.core->bus->chipinfo;
 133        u8 i;
 134
 135        /* For some legacy hardware we do chipset-based PHY initialization here
 136         * without even detecting PHY ID. It's hacky and should be cleaned as
 137         * soon as someone can test it.
 138         */
 139        if (ci->id == BCMA_CHIP_ID_BCM5356) {
 140                for (i = 0; i < 5; i++) {
 141                        bcma_mdio_phy_write(bgmac, i, 0x1f, 0x008b);
 142                        bcma_mdio_phy_write(bgmac, i, 0x15, 0x0100);
 143                        bcma_mdio_phy_write(bgmac, i, 0x1f, 0x000f);
 144                        bcma_mdio_phy_write(bgmac, i, 0x12, 0x2aaa);
 145                        bcma_mdio_phy_write(bgmac, i, 0x1f, 0x000b);
 146                }
 147                return;
 148        }
 149        if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg != 10) ||
 150            (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg != 10) ||
 151            (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg != 9)) {
 152                struct bcma_drv_cc *cc = &bgmac->bcma.core->bus->drv_cc;
 153
 154                bcma_chipco_chipctl_maskset(cc, 2, ~0xc0000000, 0);
 155                bcma_chipco_chipctl_maskset(cc, 4, ~0x80000000, 0);
 156                for (i = 0; i < 5; i++) {
 157                        bcma_mdio_phy_write(bgmac, i, 0x1f, 0x000f);
 158                        bcma_mdio_phy_write(bgmac, i, 0x16, 0x5284);
 159                        bcma_mdio_phy_write(bgmac, i, 0x1f, 0x000b);
 160                        bcma_mdio_phy_write(bgmac, i, 0x17, 0x0010);
 161                        bcma_mdio_phy_write(bgmac, i, 0x1f, 0x000f);
 162                        bcma_mdio_phy_write(bgmac, i, 0x16, 0x5296);
 163                        bcma_mdio_phy_write(bgmac, i, 0x17, 0x1073);
 164                        bcma_mdio_phy_write(bgmac, i, 0x17, 0x9073);
 165                        bcma_mdio_phy_write(bgmac, i, 0x16, 0x52b6);
 166                        bcma_mdio_phy_write(bgmac, i, 0x17, 0x9273);
 167                        bcma_mdio_phy_write(bgmac, i, 0x1f, 0x000b);
 168                }
 169                return;
 170        }
 171
 172        /* For all other hw do initialization using PHY subsystem. */
 173        if (bgmac->net_dev && bgmac->net_dev->phydev)
 174                phy_init_hw(bgmac->net_dev->phydev);
 175}
 176
 177/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyreset */
 178static int bcma_mdio_phy_reset(struct mii_bus *bus)
 179{
 180        struct bgmac *bgmac = bus->priv;
 181        u8 phyaddr = bgmac->phyaddr;
 182
 183        if (phyaddr == BGMAC_PHY_NOREGS)
 184                return 0;
 185
 186        bcma_mdio_phy_write(bgmac, phyaddr, MII_BMCR, BMCR_RESET);
 187        udelay(100);
 188        if (bcma_mdio_phy_read(bgmac, phyaddr, MII_BMCR) & BMCR_RESET)
 189                dev_err(bgmac->dev, "PHY reset failed\n");
 190        bcma_mdio_phy_init(bgmac);
 191
 192        return 0;
 193}
 194
 195/**************************************************
 196 * MII
 197 **************************************************/
 198
 199static int bcma_mdio_mii_read(struct mii_bus *bus, int mii_id, int regnum)
 200{
 201        return bcma_mdio_phy_read(bus->priv, mii_id, regnum);
 202}
 203
 204static int bcma_mdio_mii_write(struct mii_bus *bus, int mii_id, int regnum,
 205                               u16 value)
 206{
 207        return bcma_mdio_phy_write(bus->priv, mii_id, regnum, value);
 208}
 209
 210struct mii_bus *bcma_mdio_mii_register(struct bgmac *bgmac)
 211{
 212        struct bcma_device *core = bgmac->bcma.core;
 213        struct mii_bus *mii_bus;
 214        int err;
 215
 216        mii_bus = mdiobus_alloc();
 217        if (!mii_bus) {
 218                err = -ENOMEM;
 219                goto err;
 220        }
 221
 222        mii_bus->name = "bcma_mdio mii bus";
 223        sprintf(mii_bus->id, "%s-%d-%d", "bcma_mdio", core->bus->num,
 224                core->core_unit);
 225        mii_bus->priv = bgmac;
 226        mii_bus->read = bcma_mdio_mii_read;
 227        mii_bus->write = bcma_mdio_mii_write;
 228        mii_bus->reset = bcma_mdio_phy_reset;
 229        mii_bus->parent = &core->dev;
 230        mii_bus->phy_mask = ~(1 << bgmac->phyaddr);
 231
 232        err = mdiobus_register(mii_bus);
 233        if (err) {
 234                dev_err(&core->dev, "Registration of mii bus failed\n");
 235                goto err_free_bus;
 236        }
 237
 238        return mii_bus;
 239
 240err_free_bus:
 241        mdiobus_free(mii_bus);
 242err:
 243        return ERR_PTR(err);
 244}
 245EXPORT_SYMBOL_GPL(bcma_mdio_mii_register);
 246
 247void bcma_mdio_mii_unregister(struct mii_bus *mii_bus)
 248{
 249        if (!mii_bus)
 250                return;
 251
 252        mdiobus_unregister(mii_bus);
 253        mdiobus_free(mii_bus);
 254}
 255EXPORT_SYMBOL_GPL(bcma_mdio_mii_unregister);
 256
 257MODULE_AUTHOR("Rafał Miłecki");
 258MODULE_LICENSE("GPL");
 259