1/* Copyright 2008 - 2016 Freescale Semiconductor Inc. 2 * 3 * Redistribution and use in source and binary forms, with or without 4 * modification, are permitted provided that the following conditions are met: 5 * * Redistributions of source code must retain the above copyright 6 * notice, this list of conditions and the following disclaimer. 7 * * Redistributions in binary form must reproduce the above copyright 8 * notice, this list of conditions and the following disclaimer in the 9 * documentation and/or other materials provided with the distribution. 10 * * Neither the name of Freescale Semiconductor nor the 11 * names of its contributors may be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * ALTERNATIVELY, this software may be distributed under the terms of the 15 * GNU General Public License ("GPL") as published by the Free Software 16 * Foundation, either version 2 of that License or (at your option) any 17 * later version. 18 * 19 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#ifndef __DPAA_H 32#define __DPAA_H 33 34#include <linux/netdevice.h> 35#include <soc/fsl/qman.h> 36#include <soc/fsl/bman.h> 37 38#include "fman.h" 39#include "mac.h" 40#include "dpaa_eth_trace.h" 41 42/* Number of prioritised traffic classes */ 43#define DPAA_TC_NUM 4 44/* Number of Tx queues per traffic class */ 45#define DPAA_TC_TXQ_NUM NR_CPUS 46/* Total number of Tx queues */ 47#define DPAA_ETH_TXQ_NUM (DPAA_TC_NUM * DPAA_TC_TXQ_NUM) 48 49#define DPAA_BPS_NUM 3 /* number of bpools per interface */ 50 51/* More detailed FQ types - used for fine-grained WQ assignments */ 52enum dpaa_fq_type { 53 FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */ 54 FQ_TYPE_RX_ERROR, /* Rx Error FQs */ 55 FQ_TYPE_RX_PCD, /* Rx Parse Classify Distribute FQs */ 56 FQ_TYPE_TX, /* "Real" Tx FQs */ 57 FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */ 58 FQ_TYPE_TX_CONF_MQ, /* Tx conf FQs (one for each Tx FQ) */ 59 FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */ 60}; 61 62struct dpaa_fq { 63 struct qman_fq fq_base; 64 struct list_head list; 65 struct net_device *net_dev; 66 bool init; 67 u32 fqid; 68 u32 flags; 69 u16 channel; 70 u8 wq; 71 enum dpaa_fq_type fq_type; 72}; 73 74struct dpaa_fq_cbs { 75 struct qman_fq rx_defq; 76 struct qman_fq tx_defq; 77 struct qman_fq rx_errq; 78 struct qman_fq tx_errq; 79 struct qman_fq egress_ern; 80}; 81 82struct dpaa_bp { 83 /* device used in the DMA mapping operations */ 84 struct device *dev; 85 /* current number of buffers in the buffer pool alloted to each CPU */ 86 int __percpu *percpu_count; 87 /* all buffers allocated for this pool have this raw size */ 88 size_t raw_size; 89 /* all buffers in this pool have this same usable size */ 90 size_t size; 91 /* the buffer pools are initialized with config_count buffers for each 92 * CPU; at runtime the number of buffers per CPU is constantly brought 93 * back to this level 94 */ 95 u16 config_count; 96 u8 bpid; 97 struct bman_pool *pool; 98 /* bpool can be seeded before use by this cb */ 99 int (*seed_cb)(struct dpaa_bp *); 100 /* bpool can be emptied before freeing by this cb */ 101 void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *); 102 atomic_t refs; 103}; 104 105struct dpaa_rx_errors { 106 u64 dme; /* DMA Error */ 107 u64 fpe; /* Frame Physical Error */ 108 u64 fse; /* Frame Size Error */ 109 u64 phe; /* Header Error */ 110}; 111 112/* Counters for QMan ERN frames - one counter per rejection code */ 113struct dpaa_ern_cnt { 114 u64 cg_tdrop; /* Congestion group taildrop */ 115 u64 wred; /* WRED congestion */ 116 u64 err_cond; /* Error condition */ 117 u64 early_window; /* Order restoration, frame too early */ 118 u64 late_window; /* Order restoration, frame too late */ 119 u64 fq_tdrop; /* FQ taildrop */ 120 u64 fq_retired; /* FQ is retired */ 121 u64 orp_zero; /* ORP disabled */ 122}; 123 124struct dpaa_napi_portal { 125 struct napi_struct napi; 126 struct qman_portal *p; 127 bool down; 128}; 129 130struct dpaa_percpu_priv { 131 struct net_device *net_dev; 132 struct dpaa_napi_portal np; 133 u64 in_interrupt; 134 u64 tx_confirm; 135 /* fragmented (non-linear) skbuffs received from the stack */ 136 u64 tx_frag_skbuffs; 137 struct rtnl_link_stats64 stats; 138 struct dpaa_rx_errors rx_errors; 139 struct dpaa_ern_cnt ern_cnt; 140}; 141 142struct dpaa_buffer_layout { 143 u16 priv_data_size; 144}; 145 146struct dpaa_priv { 147 struct dpaa_percpu_priv __percpu *percpu_priv; 148 struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM]; 149 /* Store here the needed Tx headroom for convenience and speed 150 * (even though it can be computed based on the fields of buf_layout) 151 */ 152 u16 tx_headroom; 153 struct net_device *net_dev; 154 struct mac_device *mac_dev; 155 struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM]; 156 struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM]; 157 158 u16 channel; 159 struct list_head dpaa_fq_list; 160 161 u8 num_tc; 162 bool keygen_in_use; 163 u32 msg_enable; /* net_device message level */ 164 165 struct { 166 /* All egress queues to a given net device belong to one 167 * (and the same) congestion group. 168 */ 169 struct qman_cgr cgr; 170 /* If congested, when it began. Used for performance stats. */ 171 u32 congestion_start_jiffies; 172 /* Number of jiffies the Tx port was congested. */ 173 u32 congested_jiffies; 174 /* Counter for the number of times the CGR 175 * entered congestion state 176 */ 177 u32 cgr_congested_count; 178 } cgr_data; 179 /* Use a per-port CGR for ingress traffic. */ 180 bool use_ingress_cgr; 181 struct qman_cgr ingress_cgr; 182 183 struct dpaa_buffer_layout buf_layout[2]; 184 u16 rx_headroom; 185}; 186 187/* from dpaa_ethtool.c */ 188extern const struct ethtool_ops dpaa_ethtool_ops; 189 190/* from dpaa_eth_sysfs.c */ 191void dpaa_eth_sysfs_remove(struct device *dev); 192void dpaa_eth_sysfs_init(struct device *dev); 193#endif /* __DPAA_H */ 194