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15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/slab.h>
19#include <linux/workqueue.h>
20#include <linux/interrupt.h>
21#include <linux/delay.h>
22#include <linux/wait.h>
23#include <linux/pci.h>
24#include <linux/pci_hotplug.h>
25#include <linux/kthread.h>
26#include "cpqphp.h"
27
28static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
29 u8 behind_bridge, struct resource_lists *resources);
30static int configure_new_function(struct controller *ctrl, struct pci_func *func,
31 u8 behind_bridge, struct resource_lists *resources);
32static void interrupt_event_handler(struct controller *ctrl);
33
34
35static struct task_struct *cpqhp_event_thread;
36static struct timer_list *pushbutton_pending;
37
38
39static void long_delay(int delay)
40{
41
42
43
44
45
46
47 msleep_interruptible(jiffies_to_msecs(delay));
48}
49
50
51
52#define WRONG_BUS_FREQUENCY 0x07
53static u8 handle_switch_change(u8 change, struct controller *ctrl)
54{
55 int hp_slot;
56 u8 rc = 0;
57 u16 temp_word;
58 struct pci_func *func;
59 struct event_info *taskInfo;
60
61 if (!change)
62 return 0;
63
64
65 dbg("cpqsbd: Switch interrupt received.\n");
66
67 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
68 if (change & (0x1L << hp_slot)) {
69
70
71
72 func = cpqhp_slot_find(ctrl->bus,
73 (hp_slot + ctrl->slot_device_offset), 0);
74
75
76
77
78 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
79 ctrl->next_event = (ctrl->next_event + 1) % 10;
80 taskInfo->hp_slot = hp_slot;
81
82 rc++;
83
84 temp_word = ctrl->ctrl_int_comp >> 16;
85 func->presence_save = (temp_word >> hp_slot) & 0x01;
86 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
87
88 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
89
90
91
92
93 func->switch_save = 0;
94
95 taskInfo->event_type = INT_SWITCH_OPEN;
96 } else {
97
98
99
100
101 func->switch_save = 0x10;
102
103 taskInfo->event_type = INT_SWITCH_CLOSE;
104 }
105 }
106 }
107
108 return rc;
109}
110
111
112
113
114
115
116static struct slot *cpqhp_find_slot(struct controller *ctrl, u8 device)
117{
118 struct slot *slot = ctrl->slot;
119
120 while (slot && (slot->device != device))
121 slot = slot->next;
122
123 return slot;
124}
125
126
127static u8 handle_presence_change(u16 change, struct controller *ctrl)
128{
129 int hp_slot;
130 u8 rc = 0;
131 u8 temp_byte;
132 u16 temp_word;
133 struct pci_func *func;
134 struct event_info *taskInfo;
135 struct slot *p_slot;
136
137 if (!change)
138 return 0;
139
140
141
142
143 dbg("cpqsbd: Presence/Notify input change.\n");
144 dbg(" Changed bits are 0x%4.4x\n", change);
145
146 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
147 if (change & (0x0101 << hp_slot)) {
148
149
150
151 func = cpqhp_slot_find(ctrl->bus,
152 (hp_slot + ctrl->slot_device_offset), 0);
153
154 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
155 ctrl->next_event = (ctrl->next_event + 1) % 10;
156 taskInfo->hp_slot = hp_slot;
157
158 rc++;
159
160 p_slot = cpqhp_find_slot(ctrl, hp_slot + (readb(ctrl->hpc_reg + SLOT_MASK) >> 4));
161 if (!p_slot)
162 return 0;
163
164
165
166
167 if (func->switch_save && (ctrl->push_button == 1)) {
168 temp_word = ctrl->ctrl_int_comp >> 16;
169 temp_byte = (temp_word >> hp_slot) & 0x01;
170 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
171
172 if (temp_byte != func->presence_save) {
173
174
175
176 dbg("hp_slot %d button pressed\n", hp_slot);
177 taskInfo->event_type = INT_BUTTON_PRESS;
178 } else {
179
180
181
182 dbg("hp_slot %d button released\n", hp_slot);
183 taskInfo->event_type = INT_BUTTON_RELEASE;
184
185
186 if ((p_slot->state == BLINKINGON_STATE)
187 || (p_slot->state == BLINKINGOFF_STATE)) {
188 taskInfo->event_type = INT_BUTTON_CANCEL;
189 dbg("hp_slot %d button cancel\n", hp_slot);
190 } else if ((p_slot->state == POWERON_STATE)
191 || (p_slot->state == POWEROFF_STATE)) {
192
193 taskInfo->event_type = INT_BUTTON_IGNORE;
194 dbg("hp_slot %d button ignore\n", hp_slot);
195 }
196 }
197 } else {
198
199
200
201 temp_word = ctrl->ctrl_int_comp >> 16;
202 func->presence_save = (temp_word >> hp_slot) & 0x01;
203 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
204
205 if ((!(ctrl->ctrl_int_comp & (0x010000 << hp_slot))) ||
206 (!(ctrl->ctrl_int_comp & (0x01000000 << hp_slot)))) {
207
208 taskInfo->event_type = INT_PRESENCE_ON;
209 } else {
210
211 taskInfo->event_type = INT_PRESENCE_OFF;
212 }
213 }
214 }
215 }
216
217 return rc;
218}
219
220
221static u8 handle_power_fault(u8 change, struct controller *ctrl)
222{
223 int hp_slot;
224 u8 rc = 0;
225 struct pci_func *func;
226 struct event_info *taskInfo;
227
228 if (!change)
229 return 0;
230
231
232
233
234
235 info("power fault interrupt\n");
236
237 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
238 if (change & (0x01 << hp_slot)) {
239
240
241
242 func = cpqhp_slot_find(ctrl->bus,
243 (hp_slot + ctrl->slot_device_offset), 0);
244
245 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
246 ctrl->next_event = (ctrl->next_event + 1) % 10;
247 taskInfo->hp_slot = hp_slot;
248
249 rc++;
250
251 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) {
252
253
254
255 func->status = 0x00;
256
257 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
258 } else {
259
260
261
262 taskInfo->event_type = INT_POWER_FAULT;
263
264 if (ctrl->rev < 4) {
265 amber_LED_on(ctrl, hp_slot);
266 green_LED_off(ctrl, hp_slot);
267 set_SOGO(ctrl);
268
269
270
271
272
273
274
275
276
277
278
279
280
281 } else {
282
283 func->status = 0xFF;
284 info("power fault bit %x set\n", hp_slot);
285 }
286 }
287 }
288 }
289
290 return rc;
291}
292
293
294
295
296
297
298static int sort_by_size(struct pci_resource **head)
299{
300 struct pci_resource *current_res;
301 struct pci_resource *next_res;
302 int out_of_order = 1;
303
304 if (!(*head))
305 return 1;
306
307 if (!((*head)->next))
308 return 0;
309
310 while (out_of_order) {
311 out_of_order = 0;
312
313
314 if (((*head)->next) &&
315 ((*head)->length > (*head)->next->length)) {
316 out_of_order++;
317 current_res = *head;
318 *head = (*head)->next;
319 current_res->next = (*head)->next;
320 (*head)->next = current_res;
321 }
322
323 current_res = *head;
324
325 while (current_res->next && current_res->next->next) {
326 if (current_res->next->length > current_res->next->next->length) {
327 out_of_order++;
328 next_res = current_res->next;
329 current_res->next = current_res->next->next;
330 current_res = current_res->next;
331 next_res->next = current_res->next;
332 current_res->next = next_res;
333 } else
334 current_res = current_res->next;
335 }
336 }
337
338 return 0;
339}
340
341
342
343
344
345
346static int sort_by_max_size(struct pci_resource **head)
347{
348 struct pci_resource *current_res;
349 struct pci_resource *next_res;
350 int out_of_order = 1;
351
352 if (!(*head))
353 return 1;
354
355 if (!((*head)->next))
356 return 0;
357
358 while (out_of_order) {
359 out_of_order = 0;
360
361
362 if (((*head)->next) &&
363 ((*head)->length < (*head)->next->length)) {
364 out_of_order++;
365 current_res = *head;
366 *head = (*head)->next;
367 current_res->next = (*head)->next;
368 (*head)->next = current_res;
369 }
370
371 current_res = *head;
372
373 while (current_res->next && current_res->next->next) {
374 if (current_res->next->length < current_res->next->next->length) {
375 out_of_order++;
376 next_res = current_res->next;
377 current_res->next = current_res->next->next;
378 current_res = current_res->next;
379 next_res->next = current_res->next;
380 current_res->next = next_res;
381 } else
382 current_res = current_res->next;
383 }
384 }
385
386 return 0;
387}
388
389
390
391
392
393
394
395
396static struct pci_resource *do_pre_bridge_resource_split(struct pci_resource **head,
397 struct pci_resource **orig_head, u32 alignment)
398{
399 struct pci_resource *prevnode = NULL;
400 struct pci_resource *node;
401 struct pci_resource *split_node;
402 u32 rc;
403 u32 temp_dword;
404 dbg("do_pre_bridge_resource_split\n");
405
406 if (!(*head) || !(*orig_head))
407 return NULL;
408
409 rc = cpqhp_resource_sort_and_combine(head);
410
411 if (rc)
412 return NULL;
413
414 if ((*head)->base != (*orig_head)->base)
415 return NULL;
416
417 if ((*head)->length == (*orig_head)->length)
418 return NULL;
419
420
421
422
423
424
425 node = *head;
426
427 if (node->length & (alignment - 1)) {
428
429
430
431 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
432
433 if (!split_node)
434 return NULL;
435
436 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
437
438 split_node->base = node->base;
439 split_node->length = temp_dword;
440
441 node->length -= temp_dword;
442 node->base += split_node->length;
443
444
445 *head = split_node;
446 split_node->next = node;
447 }
448
449 if (node->length < alignment)
450 return NULL;
451
452
453 if (*head == node) {
454 *head = node->next;
455 } else {
456 prevnode = *head;
457 while (prevnode->next != node)
458 prevnode = prevnode->next;
459
460 prevnode->next = node->next;
461 }
462 node->next = NULL;
463
464 return node;
465}
466
467
468
469
470
471
472
473static struct pci_resource *do_bridge_resource_split(struct pci_resource **head, u32 alignment)
474{
475 struct pci_resource *prevnode = NULL;
476 struct pci_resource *node;
477 u32 rc;
478 u32 temp_dword;
479
480 rc = cpqhp_resource_sort_and_combine(head);
481
482 if (rc)
483 return NULL;
484
485 node = *head;
486
487 while (node->next) {
488 prevnode = node;
489 node = node->next;
490 kfree(prevnode);
491 }
492
493 if (node->length < alignment)
494 goto error;
495
496 if (node->base & (alignment - 1)) {
497
498 temp_dword = (node->base | (alignment-1)) + 1;
499 if ((node->length - (temp_dword - node->base)) < alignment)
500 goto error;
501
502 node->length -= (temp_dword - node->base);
503 node->base = temp_dword;
504 }
505
506 if (node->length & (alignment - 1))
507
508 goto error;
509
510 return node;
511error:
512 kfree(node);
513 return NULL;
514}
515
516
517
518
519
520
521
522
523
524
525
526static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
527{
528 struct pci_resource *prevnode;
529 struct pci_resource *node;
530 struct pci_resource *split_node;
531 u32 temp_dword;
532
533 if (!(*head))
534 return NULL;
535
536 if (cpqhp_resource_sort_and_combine(head))
537 return NULL;
538
539 if (sort_by_size(head))
540 return NULL;
541
542 for (node = *head; node; node = node->next) {
543 if (node->length < size)
544 continue;
545
546 if (node->base & (size - 1)) {
547
548
549
550 temp_dword = (node->base | (size-1)) + 1;
551
552
553 if ((node->length - (temp_dword - node->base)) < size)
554 continue;
555
556 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
557
558 if (!split_node)
559 return NULL;
560
561 split_node->base = node->base;
562 split_node->length = temp_dword - node->base;
563 node->base = temp_dword;
564 node->length -= split_node->length;
565
566
567 split_node->next = node->next;
568 node->next = split_node;
569 }
570
571
572 if (node->length > size) {
573
574
575
576 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
577
578 if (!split_node)
579 return NULL;
580
581 split_node->base = node->base + size;
582 split_node->length = node->length - size;
583 node->length = size;
584
585
586 split_node->next = node->next;
587 node->next = split_node;
588 }
589
590
591 if (node->base & 0x300L)
592 continue;
593
594
595
596
597 if (*head == node) {
598 *head = node->next;
599 } else {
600 prevnode = *head;
601 while (prevnode->next != node)
602 prevnode = prevnode->next;
603
604 prevnode->next = node->next;
605 }
606 node->next = NULL;
607 break;
608 }
609
610 return node;
611}
612
613
614
615
616
617
618
619
620
621
622
623static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
624{
625 struct pci_resource *max;
626 struct pci_resource *temp;
627 struct pci_resource *split_node;
628 u32 temp_dword;
629
630 if (cpqhp_resource_sort_and_combine(head))
631 return NULL;
632
633 if (sort_by_max_size(head))
634 return NULL;
635
636 for (max = *head; max; max = max->next) {
637
638
639
640 if (max->length < size)
641 continue;
642
643 if (max->base & (size - 1)) {
644
645
646
647 temp_dword = (max->base | (size-1)) + 1;
648
649
650 if ((max->length - (temp_dword - max->base)) < size)
651 continue;
652
653 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
654
655 if (!split_node)
656 return NULL;
657
658 split_node->base = max->base;
659 split_node->length = temp_dword - max->base;
660 max->base = temp_dword;
661 max->length -= split_node->length;
662
663 split_node->next = max->next;
664 max->next = split_node;
665 }
666
667 if ((max->base + max->length) & (size - 1)) {
668
669
670
671 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
672
673 if (!split_node)
674 return NULL;
675 temp_dword = ((max->base + max->length) & ~(size - 1));
676 split_node->base = temp_dword;
677 split_node->length = max->length + max->base
678 - split_node->base;
679 max->length -= split_node->length;
680
681 split_node->next = max->next;
682 max->next = split_node;
683 }
684
685
686 if (max->length < size)
687 continue;
688
689
690 temp = *head;
691 if (temp == max) {
692 *head = max->next;
693 } else {
694 while (temp && temp->next != max)
695 temp = temp->next;
696
697 if (temp)
698 temp->next = max->next;
699 }
700
701 max->next = NULL;
702 break;
703 }
704
705 return max;
706}
707
708
709
710
711
712
713
714
715
716
717
718
719
720static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
721{
722 struct pci_resource *prevnode;
723 struct pci_resource *node;
724 struct pci_resource *split_node;
725 u32 temp_dword;
726
727 if (cpqhp_resource_sort_and_combine(head))
728 return NULL;
729
730 if (sort_by_size(head))
731 return NULL;
732
733 for (node = *head; node; node = node->next) {
734 dbg("%s: req_size =%x node=%p, base=%x, length=%x\n",
735 __func__, size, node, node->base, node->length);
736 if (node->length < size)
737 continue;
738
739 if (node->base & (size - 1)) {
740 dbg("%s: not aligned\n", __func__);
741
742
743
744 temp_dword = (node->base | (size-1)) + 1;
745
746
747 if ((node->length - (temp_dword - node->base)) < size)
748 continue;
749
750 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
751
752 if (!split_node)
753 return NULL;
754
755 split_node->base = node->base;
756 split_node->length = temp_dword - node->base;
757 node->base = temp_dword;
758 node->length -= split_node->length;
759
760 split_node->next = node->next;
761 node->next = split_node;
762 }
763
764
765 if (node->length > size) {
766 dbg("%s: too big\n", __func__);
767
768
769
770 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
771
772 if (!split_node)
773 return NULL;
774
775 split_node->base = node->base + size;
776 split_node->length = node->length - size;
777 node->length = size;
778
779
780 split_node->next = node->next;
781 node->next = split_node;
782 }
783
784 dbg("%s: got one!!!\n", __func__);
785
786
787 if (*head == node) {
788 *head = node->next;
789 } else {
790 prevnode = *head;
791 while (prevnode->next != node)
792 prevnode = prevnode->next;
793
794 prevnode->next = node->next;
795 }
796 node->next = NULL;
797 break;
798 }
799 return node;
800}
801
802
803
804
805
806
807
808
809
810
811
812
813int cpqhp_resource_sort_and_combine(struct pci_resource **head)
814{
815 struct pci_resource *node1;
816 struct pci_resource *node2;
817 int out_of_order = 1;
818
819 dbg("%s: head = %p, *head = %p\n", __func__, head, *head);
820
821 if (!(*head))
822 return 1;
823
824 dbg("*head->next = %p\n", (*head)->next);
825
826 if (!(*head)->next)
827 return 0;
828
829 dbg("*head->base = 0x%x\n", (*head)->base);
830 dbg("*head->next->base = 0x%x\n", (*head)->next->base);
831 while (out_of_order) {
832 out_of_order = 0;
833
834
835 if (((*head)->next) &&
836 ((*head)->base > (*head)->next->base)) {
837 node1 = *head;
838 (*head) = (*head)->next;
839 node1->next = (*head)->next;
840 (*head)->next = node1;
841 out_of_order++;
842 }
843
844 node1 = (*head);
845
846 while (node1->next && node1->next->next) {
847 if (node1->next->base > node1->next->next->base) {
848 out_of_order++;
849 node2 = node1->next;
850 node1->next = node1->next->next;
851 node1 = node1->next;
852 node2->next = node1->next;
853 node1->next = node2;
854 } else
855 node1 = node1->next;
856 }
857 }
858
859 node1 = *head;
860
861 while (node1 && node1->next) {
862 if ((node1->base + node1->length) == node1->next->base) {
863
864 dbg("8..\n");
865 node1->length += node1->next->length;
866 node2 = node1->next;
867 node1->next = node1->next->next;
868 kfree(node2);
869 } else
870 node1 = node1->next;
871 }
872
873 return 0;
874}
875
876
877irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
878{
879 struct controller *ctrl = data;
880 u8 schedule_flag = 0;
881 u8 reset;
882 u16 misc;
883 u32 Diff;
884 u32 temp_dword;
885
886
887 misc = readw(ctrl->hpc_reg + MISC);
888
889
890
891 if (!(misc & 0x000C))
892 return IRQ_NONE;
893
894 if (misc & 0x0004) {
895
896
897
898
899
900 misc |= 0x0004;
901 writew(misc, ctrl->hpc_reg + MISC);
902
903
904 misc = readw(ctrl->hpc_reg + MISC);
905
906 dbg("%s - waking up\n", __func__);
907 wake_up_interruptible(&ctrl->queue);
908 }
909
910 if (misc & 0x0008) {
911
912 Diff = readl(ctrl->hpc_reg + INT_INPUT_CLEAR) ^ ctrl->ctrl_int_comp;
913
914 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
915
916
917 writel(Diff, ctrl->hpc_reg + INT_INPUT_CLEAR);
918
919
920 temp_dword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
921
922 if (!Diff)
923
924 writel(0xFFFFFFFF, ctrl->hpc_reg + INT_INPUT_CLEAR);
925
926 schedule_flag += handle_switch_change((u8)(Diff & 0xFFL), ctrl);
927 schedule_flag += handle_presence_change((u16)((Diff & 0xFFFF0000L) >> 16), ctrl);
928 schedule_flag += handle_power_fault((u8)((Diff & 0xFF00L) >> 8), ctrl);
929 }
930
931 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
932 if (reset & 0x40) {
933
934 reset &= 0xCF;
935 writeb(reset, ctrl->hpc_reg + RESET_FREQ_MODE);
936 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
937 wake_up_interruptible(&ctrl->queue);
938 }
939
940 if (schedule_flag) {
941 wake_up_process(cpqhp_event_thread);
942 dbg("Waking even thread");
943 }
944 return IRQ_HANDLED;
945}
946
947
948
949
950
951
952
953
954struct pci_func *cpqhp_slot_create(u8 busnumber)
955{
956 struct pci_func *new_slot;
957 struct pci_func *next;
958
959 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
960 if (new_slot == NULL)
961 return new_slot;
962
963 new_slot->next = NULL;
964 new_slot->configured = 1;
965
966 if (cpqhp_slot_list[busnumber] == NULL) {
967 cpqhp_slot_list[busnumber] = new_slot;
968 } else {
969 next = cpqhp_slot_list[busnumber];
970 while (next->next != NULL)
971 next = next->next;
972 next->next = new_slot;
973 }
974 return new_slot;
975}
976
977
978
979
980
981
982
983
984static int slot_remove(struct pci_func *old_slot)
985{
986 struct pci_func *next;
987
988 if (old_slot == NULL)
989 return 1;
990
991 next = cpqhp_slot_list[old_slot->bus];
992 if (next == NULL)
993 return 1;
994
995 if (next == old_slot) {
996 cpqhp_slot_list[old_slot->bus] = old_slot->next;
997 cpqhp_destroy_board_resources(old_slot);
998 kfree(old_slot);
999 return 0;
1000 }
1001
1002 while ((next->next != old_slot) && (next->next != NULL))
1003 next = next->next;
1004
1005 if (next->next == old_slot) {
1006 next->next = old_slot->next;
1007 cpqhp_destroy_board_resources(old_slot);
1008 kfree(old_slot);
1009 return 0;
1010 } else
1011 return 2;
1012}
1013
1014
1015
1016
1017
1018
1019
1020
1021static int bridge_slot_remove(struct pci_func *bridge)
1022{
1023 u8 subordinateBus, secondaryBus;
1024 u8 tempBus;
1025 struct pci_func *next;
1026
1027 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
1028 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
1029
1030 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
1031 next = cpqhp_slot_list[tempBus];
1032
1033 while (!slot_remove(next))
1034 next = cpqhp_slot_list[tempBus];
1035 }
1036
1037 next = cpqhp_slot_list[bridge->bus];
1038
1039 if (next == NULL)
1040 return 1;
1041
1042 if (next == bridge) {
1043 cpqhp_slot_list[bridge->bus] = bridge->next;
1044 goto out;
1045 }
1046
1047 while ((next->next != bridge) && (next->next != NULL))
1048 next = next->next;
1049
1050 if (next->next != bridge)
1051 return 2;
1052 next->next = bridge->next;
1053out:
1054 kfree(bridge);
1055 return 0;
1056}
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067struct pci_func *cpqhp_slot_find(u8 bus, u8 device, u8 index)
1068{
1069 int found = -1;
1070 struct pci_func *func;
1071
1072 func = cpqhp_slot_list[bus];
1073
1074 if ((func == NULL) || ((func->device == device) && (index == 0)))
1075 return func;
1076
1077 if (func->device == device)
1078 found++;
1079
1080 while (func->next != NULL) {
1081 func = func->next;
1082
1083 if (func->device == device)
1084 found++;
1085
1086 if (found == index)
1087 return func;
1088 }
1089
1090 return NULL;
1091}
1092
1093
1094
1095
1096static int is_bridge(struct pci_func *func)
1097{
1098
1099 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1100 return 1;
1101 else
1102 return 0;
1103}
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
1116{
1117 struct slot *slot;
1118 struct pci_bus *bus = ctrl->pci_bus;
1119 u8 reg;
1120 u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
1121 u16 reg16;
1122 u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
1123
1124 if (bus->cur_bus_speed == adapter_speed)
1125 return 0;
1126
1127
1128
1129
1130 for (slot = ctrl->slot; slot; slot = slot->next) {
1131 if (slot->device == (hp_slot + ctrl->slot_device_offset))
1132 continue;
1133 if (!slot->hotplug_slot || !slot->hotplug_slot->info)
1134 continue;
1135 if (slot->hotplug_slot->info->adapter_status == 0)
1136 continue;
1137
1138
1139
1140
1141 if (bus->cur_bus_speed < adapter_speed)
1142 return 0;
1143
1144 return 1;
1145 }
1146
1147
1148
1149
1150 if ((bus->cur_bus_speed > adapter_speed) && (!ctrl->pcix_speed_capability))
1151 return 1;
1152
1153
1154 if ((bus->cur_bus_speed < adapter_speed) && (!ctrl->pcix_speed_capability))
1155 return 0;
1156
1157
1158
1159
1160 if (bus->max_bus_speed < adapter_speed) {
1161 if (bus->cur_bus_speed == bus->max_bus_speed)
1162 return 0;
1163 adapter_speed = bus->max_bus_speed;
1164 }
1165
1166 writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
1167 writeb(0x00, ctrl->hpc_reg + SLOT_ENABLE);
1168
1169 set_SOGO(ctrl);
1170 wait_for_ctrl_irq(ctrl);
1171
1172 if (adapter_speed != PCI_SPEED_133MHz_PCIX)
1173 reg = 0xF5;
1174 else
1175 reg = 0xF4;
1176 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1177
1178 reg16 = readw(ctrl->hpc_reg + NEXT_CURR_FREQ);
1179 reg16 &= ~0x000F;
1180 switch (adapter_speed) {
1181 case(PCI_SPEED_133MHz_PCIX):
1182 reg = 0x75;
1183 reg16 |= 0xB;
1184 break;
1185 case(PCI_SPEED_100MHz_PCIX):
1186 reg = 0x74;
1187 reg16 |= 0xA;
1188 break;
1189 case(PCI_SPEED_66MHz_PCIX):
1190 reg = 0x73;
1191 reg16 |= 0x9;
1192 break;
1193 case(PCI_SPEED_66MHz):
1194 reg = 0x73;
1195 reg16 |= 0x1;
1196 break;
1197 default:
1198 reg = 0x71;
1199 break;
1200
1201 }
1202 reg16 |= 0xB << 12;
1203 writew(reg16, ctrl->hpc_reg + NEXT_CURR_FREQ);
1204
1205 mdelay(5);
1206
1207
1208 writel(0, ctrl->hpc_reg + INT_MASK);
1209
1210 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1211
1212
1213 reg = ~0xF;
1214 pci_read_config_byte(ctrl->pci_dev, 0x43, ®);
1215 pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
1216
1217
1218 if (((bus->cur_bus_speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
1219 ((bus->cur_bus_speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz)))
1220 set_SOGO(ctrl);
1221
1222 wait_for_ctrl_irq(ctrl);
1223 mdelay(1100);
1224
1225
1226 writel(leds, ctrl->hpc_reg + LED_CONTROL);
1227 writeb(slot_power, ctrl->hpc_reg + SLOT_ENABLE);
1228
1229 set_SOGO(ctrl);
1230 wait_for_ctrl_irq(ctrl);
1231
1232 bus->cur_bus_speed = adapter_speed;
1233 slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1234
1235 info("Successfully changed frequency/mode for adapter in slot %d\n",
1236 slot->number);
1237 return 0;
1238}
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1257{
1258 struct pci_bus *bus = ctrl->pci_bus;
1259 u8 hp_slot;
1260 u8 temp_byte;
1261 u8 adapter_speed;
1262 u32 rc = 0;
1263
1264 hp_slot = func->device - ctrl->slot_device_offset;
1265
1266
1267
1268
1269 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot))
1270 rc = INTERLOCK_OPEN;
1271
1272
1273
1274 else if (is_slot_enabled(ctrl, hp_slot))
1275 rc = CARD_FUNCTIONING;
1276 else {
1277 mutex_lock(&ctrl->crit_sect);
1278
1279
1280 enable_slot_power(ctrl, hp_slot);
1281
1282 set_SOGO(ctrl);
1283
1284
1285 wait_for_ctrl_irq(ctrl);
1286
1287
1288
1289 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1290 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1291 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1292
1293 set_SOGO(ctrl);
1294
1295
1296 wait_for_ctrl_irq(ctrl);
1297
1298 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1299 if (bus->cur_bus_speed != adapter_speed)
1300 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1301 rc = WRONG_BUS_FREQUENCY;
1302
1303
1304 disable_slot_power(ctrl, hp_slot);
1305
1306 set_SOGO(ctrl);
1307
1308
1309 wait_for_ctrl_irq(ctrl);
1310
1311 mutex_unlock(&ctrl->crit_sect);
1312
1313 if (rc)
1314 return rc;
1315
1316 mutex_lock(&ctrl->crit_sect);
1317
1318 slot_enable(ctrl, hp_slot);
1319 green_LED_blink(ctrl, hp_slot);
1320
1321 amber_LED_off(ctrl, hp_slot);
1322
1323 set_SOGO(ctrl);
1324
1325
1326 wait_for_ctrl_irq(ctrl);
1327
1328 mutex_unlock(&ctrl->crit_sect);
1329
1330
1331 long_delay(1*HZ);
1332
1333
1334 if (func->status == 0xFF) {
1335
1336 rc = POWER_FAILURE;
1337 func->status = 0;
1338 } else
1339 rc = cpqhp_valid_replace(ctrl, func);
1340
1341 if (!rc) {
1342
1343
1344 rc = cpqhp_configure_board(ctrl, func);
1345
1346
1347
1348
1349
1350
1351
1352
1353 mutex_lock(&ctrl->crit_sect);
1354
1355 amber_LED_on(ctrl, hp_slot);
1356 green_LED_off(ctrl, hp_slot);
1357 slot_disable(ctrl, hp_slot);
1358
1359 set_SOGO(ctrl);
1360
1361
1362 wait_for_ctrl_irq(ctrl);
1363
1364 mutex_unlock(&ctrl->crit_sect);
1365
1366 if (rc)
1367 return rc;
1368 else
1369 return 1;
1370
1371 } else {
1372
1373
1374
1375
1376
1377
1378
1379 mutex_lock(&ctrl->crit_sect);
1380
1381 amber_LED_on(ctrl, hp_slot);
1382 green_LED_off(ctrl, hp_slot);
1383 slot_disable(ctrl, hp_slot);
1384
1385 set_SOGO(ctrl);
1386
1387
1388 wait_for_ctrl_irq(ctrl);
1389
1390 mutex_unlock(&ctrl->crit_sect);
1391 }
1392
1393 }
1394 return rc;
1395
1396}
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407static u32 board_added(struct pci_func *func, struct controller *ctrl)
1408{
1409 u8 hp_slot;
1410 u8 temp_byte;
1411 u8 adapter_speed;
1412 int index;
1413 u32 temp_register = 0xFFFFFFFF;
1414 u32 rc = 0;
1415 struct pci_func *new_slot = NULL;
1416 struct pci_bus *bus = ctrl->pci_bus;
1417 struct slot *p_slot;
1418 struct resource_lists res_lists;
1419
1420 hp_slot = func->device - ctrl->slot_device_offset;
1421 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n",
1422 __func__, func->device, ctrl->slot_device_offset, hp_slot);
1423
1424 mutex_lock(&ctrl->crit_sect);
1425
1426
1427 enable_slot_power(ctrl, hp_slot);
1428
1429 set_SOGO(ctrl);
1430
1431
1432 wait_for_ctrl_irq(ctrl);
1433
1434
1435
1436
1437 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1438 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1439 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1440
1441 set_SOGO(ctrl);
1442
1443
1444 wait_for_ctrl_irq(ctrl);
1445
1446 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1447 if (bus->cur_bus_speed != adapter_speed)
1448 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1449 rc = WRONG_BUS_FREQUENCY;
1450
1451
1452 disable_slot_power(ctrl, hp_slot);
1453
1454 set_SOGO(ctrl);
1455
1456
1457 wait_for_ctrl_irq(ctrl);
1458
1459 mutex_unlock(&ctrl->crit_sect);
1460
1461 if (rc)
1462 return rc;
1463
1464 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1465
1466
1467
1468 dbg("%s: before down\n", __func__);
1469 mutex_lock(&ctrl->crit_sect);
1470 dbg("%s: after down\n", __func__);
1471
1472 dbg("%s: before slot_enable\n", __func__);
1473 slot_enable(ctrl, hp_slot);
1474
1475 dbg("%s: before green_LED_blink\n", __func__);
1476 green_LED_blink(ctrl, hp_slot);
1477
1478 dbg("%s: before amber_LED_blink\n", __func__);
1479 amber_LED_off(ctrl, hp_slot);
1480
1481 dbg("%s: before set_SOGO\n", __func__);
1482 set_SOGO(ctrl);
1483
1484
1485 dbg("%s: before wait_for_ctrl_irq\n", __func__);
1486 wait_for_ctrl_irq(ctrl);
1487 dbg("%s: after wait_for_ctrl_irq\n", __func__);
1488
1489 dbg("%s: before up\n", __func__);
1490 mutex_unlock(&ctrl->crit_sect);
1491 dbg("%s: after up\n", __func__);
1492
1493
1494 dbg("%s: before long_delay\n", __func__);
1495 long_delay(1*HZ);
1496 dbg("%s: after long_delay\n", __func__);
1497
1498 dbg("%s: func status = %x\n", __func__, func->status);
1499
1500 if (func->status == 0xFF) {
1501
1502 temp_register = 0xFFFFFFFF;
1503 dbg("%s: temp register set to %x by power fault\n", __func__, temp_register);
1504 rc = POWER_FAILURE;
1505 func->status = 0;
1506 } else {
1507
1508 ctrl->pci_bus->number = func->bus;
1509 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), PCI_VENDOR_ID, &temp_register);
1510 dbg("%s: pci_read_config_dword returns %d\n", __func__, rc);
1511 dbg("%s: temp_register is %x\n", __func__, temp_register);
1512
1513 if (rc != 0) {
1514
1515 temp_register = 0xFFFFFFFF;
1516 dbg("%s: temp register set to %x by error\n", __func__, temp_register);
1517 }
1518
1519 rc = NO_ADAPTER_PRESENT;
1520 }
1521
1522
1523 if (temp_register != 0xFFFFFFFF) {
1524 res_lists.io_head = ctrl->io_head;
1525 res_lists.mem_head = ctrl->mem_head;
1526 res_lists.p_mem_head = ctrl->p_mem_head;
1527 res_lists.bus_head = ctrl->bus_head;
1528 res_lists.irqs = NULL;
1529
1530 rc = configure_new_device(ctrl, func, 0, &res_lists);
1531
1532 dbg("%s: back from configure_new_device\n", __func__);
1533 ctrl->io_head = res_lists.io_head;
1534 ctrl->mem_head = res_lists.mem_head;
1535 ctrl->p_mem_head = res_lists.p_mem_head;
1536 ctrl->bus_head = res_lists.bus_head;
1537
1538 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1539 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1540 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1541 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1542
1543 if (rc) {
1544 mutex_lock(&ctrl->crit_sect);
1545
1546 amber_LED_on(ctrl, hp_slot);
1547 green_LED_off(ctrl, hp_slot);
1548 slot_disable(ctrl, hp_slot);
1549
1550 set_SOGO(ctrl);
1551
1552
1553 wait_for_ctrl_irq(ctrl);
1554
1555 mutex_unlock(&ctrl->crit_sect);
1556 return rc;
1557 } else {
1558 cpqhp_save_slot_config(ctrl, func);
1559 }
1560
1561
1562 func->status = 0;
1563 func->switch_save = 0x10;
1564 func->is_a_board = 0x01;
1565
1566
1567
1568 dbg("%s: configure linux pci_dev structure\n", __func__);
1569 index = 0;
1570 do {
1571 new_slot = cpqhp_slot_find(ctrl->bus, func->device, index++);
1572 if (new_slot && !new_slot->pci_dev)
1573 cpqhp_configure_device(ctrl, new_slot);
1574 } while (new_slot);
1575
1576 mutex_lock(&ctrl->crit_sect);
1577
1578 green_LED_on(ctrl, hp_slot);
1579
1580 set_SOGO(ctrl);
1581
1582
1583 wait_for_ctrl_irq(ctrl);
1584
1585 mutex_unlock(&ctrl->crit_sect);
1586 } else {
1587 mutex_lock(&ctrl->crit_sect);
1588
1589 amber_LED_on(ctrl, hp_slot);
1590 green_LED_off(ctrl, hp_slot);
1591 slot_disable(ctrl, hp_slot);
1592
1593 set_SOGO(ctrl);
1594
1595
1596 wait_for_ctrl_irq(ctrl);
1597
1598 mutex_unlock(&ctrl->crit_sect);
1599
1600 return rc;
1601 }
1602 return 0;
1603}
1604
1605
1606
1607
1608
1609
1610
1611
1612static u32 remove_board(struct pci_func *func, u32 replace_flag, struct controller *ctrl)
1613{
1614 int index;
1615 u8 skip = 0;
1616 u8 device;
1617 u8 hp_slot;
1618 u8 temp_byte;
1619 u32 rc;
1620 struct resource_lists res_lists;
1621 struct pci_func *temp_func;
1622
1623 if (cpqhp_unconfigure_device(func))
1624 return 1;
1625
1626 device = func->device;
1627
1628 hp_slot = func->device - ctrl->slot_device_offset;
1629 dbg("In %s, hp_slot = %d\n", __func__, hp_slot);
1630
1631
1632
1633 if (replace_flag || !ctrl->add_support)
1634 rc = cpqhp_save_base_addr_length(ctrl, func);
1635 else if (!func->bus_head && !func->mem_head &&
1636 !func->p_mem_head && !func->io_head) {
1637
1638
1639
1640 index = 0;
1641 temp_func = cpqhp_slot_find(func->bus, func->device, index++);
1642 while (temp_func) {
1643 if (temp_func->bus_head || temp_func->mem_head
1644 || temp_func->p_mem_head || temp_func->io_head) {
1645 skip = 1;
1646 break;
1647 }
1648 temp_func = cpqhp_slot_find(temp_func->bus, temp_func->device, index++);
1649 }
1650
1651 if (!skip)
1652 rc = cpqhp_save_used_resources(ctrl, func);
1653 }
1654
1655 if (func->is_a_board)
1656 func->status = 0x01;
1657 func->configured = 0;
1658
1659 mutex_lock(&ctrl->crit_sect);
1660
1661 green_LED_off(ctrl, hp_slot);
1662 slot_disable(ctrl, hp_slot);
1663
1664 set_SOGO(ctrl);
1665
1666
1667 temp_byte = readb(ctrl->hpc_reg + SLOT_SERR);
1668 temp_byte &= ~(0x01 << hp_slot);
1669 writeb(temp_byte, ctrl->hpc_reg + SLOT_SERR);
1670
1671
1672 wait_for_ctrl_irq(ctrl);
1673
1674 mutex_unlock(&ctrl->crit_sect);
1675
1676 if (!replace_flag && ctrl->add_support) {
1677 while (func) {
1678 res_lists.io_head = ctrl->io_head;
1679 res_lists.mem_head = ctrl->mem_head;
1680 res_lists.p_mem_head = ctrl->p_mem_head;
1681 res_lists.bus_head = ctrl->bus_head;
1682
1683 cpqhp_return_board_resources(func, &res_lists);
1684
1685 ctrl->io_head = res_lists.io_head;
1686 ctrl->mem_head = res_lists.mem_head;
1687 ctrl->p_mem_head = res_lists.p_mem_head;
1688 ctrl->bus_head = res_lists.bus_head;
1689
1690 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1691 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1692 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1693 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1694
1695 if (is_bridge(func)) {
1696 bridge_slot_remove(func);
1697 } else
1698 slot_remove(func);
1699
1700 func = cpqhp_slot_find(ctrl->bus, device, 0);
1701 }
1702
1703
1704 func = cpqhp_slot_create(ctrl->bus);
1705
1706 if (func == NULL)
1707 return 1;
1708
1709 func->bus = ctrl->bus;
1710 func->device = device;
1711 func->function = 0;
1712 func->configured = 0;
1713 func->switch_save = 0x10;
1714 func->is_a_board = 0;
1715 func->p_task_event = NULL;
1716 }
1717
1718 return 0;
1719}
1720
1721static void pushbutton_helper_thread(struct timer_list *t)
1722{
1723 pushbutton_pending = t;
1724
1725 wake_up_process(cpqhp_event_thread);
1726}
1727
1728
1729
1730static int event_thread(void *data)
1731{
1732 struct controller *ctrl;
1733
1734 while (1) {
1735 dbg("!!!!event_thread sleeping\n");
1736 set_current_state(TASK_INTERRUPTIBLE);
1737 schedule();
1738
1739 if (kthread_should_stop())
1740 break;
1741
1742 if (pushbutton_pending)
1743 cpqhp_pushbutton_thread(pushbutton_pending);
1744 else
1745 for (ctrl = cpqhp_ctrl_list; ctrl; ctrl = ctrl->next)
1746 interrupt_event_handler(ctrl);
1747 }
1748 dbg("event_thread signals exit\n");
1749 return 0;
1750}
1751
1752int cpqhp_event_start_thread(void)
1753{
1754 cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event");
1755 if (IS_ERR(cpqhp_event_thread)) {
1756 err("Can't start up our event thread\n");
1757 return PTR_ERR(cpqhp_event_thread);
1758 }
1759
1760 return 0;
1761}
1762
1763
1764void cpqhp_event_stop_thread(void)
1765{
1766 kthread_stop(cpqhp_event_thread);
1767}
1768
1769
1770static int update_slot_info(struct controller *ctrl, struct slot *slot)
1771{
1772 struct hotplug_slot_info *info;
1773 int result;
1774
1775 info = kmalloc(sizeof(*info), GFP_KERNEL);
1776 if (!info)
1777 return -ENOMEM;
1778
1779 info->power_status = get_slot_enabled(ctrl, slot);
1780 info->attention_status = cpq_get_attention_status(ctrl, slot);
1781 info->latch_status = cpq_get_latch_status(ctrl, slot);
1782 info->adapter_status = get_presence_status(ctrl, slot);
1783 result = pci_hp_change_slot_info(slot->hotplug_slot, info);
1784 kfree(info);
1785 return result;
1786}
1787
1788static void interrupt_event_handler(struct controller *ctrl)
1789{
1790 int loop = 0;
1791 int change = 1;
1792 struct pci_func *func;
1793 u8 hp_slot;
1794 struct slot *p_slot;
1795
1796 while (change) {
1797 change = 0;
1798
1799 for (loop = 0; loop < 10; loop++) {
1800
1801 if (ctrl->event_queue[loop].event_type != 0) {
1802 hp_slot = ctrl->event_queue[loop].hp_slot;
1803
1804 func = cpqhp_slot_find(ctrl->bus, (hp_slot + ctrl->slot_device_offset), 0);
1805 if (!func)
1806 return;
1807
1808 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1809 if (!p_slot)
1810 return;
1811
1812 dbg("hp_slot %d, func %p, p_slot %p\n",
1813 hp_slot, func, p_slot);
1814
1815 if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1816 dbg("button pressed\n");
1817 } else if (ctrl->event_queue[loop].event_type ==
1818 INT_BUTTON_CANCEL) {
1819 dbg("button cancel\n");
1820 del_timer(&p_slot->task_event);
1821
1822 mutex_lock(&ctrl->crit_sect);
1823
1824 if (p_slot->state == BLINKINGOFF_STATE) {
1825
1826 dbg("turn on green LED\n");
1827 green_LED_on(ctrl, hp_slot);
1828 } else if (p_slot->state == BLINKINGON_STATE) {
1829
1830 dbg("turn off green LED\n");
1831 green_LED_off(ctrl, hp_slot);
1832 }
1833
1834 info(msg_button_cancel, p_slot->number);
1835
1836 p_slot->state = STATIC_STATE;
1837
1838 amber_LED_off(ctrl, hp_slot);
1839
1840 set_SOGO(ctrl);
1841
1842
1843 wait_for_ctrl_irq(ctrl);
1844
1845 mutex_unlock(&ctrl->crit_sect);
1846 }
1847
1848 else if (ctrl->event_queue[loop].event_type == INT_BUTTON_RELEASE) {
1849 dbg("button release\n");
1850
1851 if (is_slot_enabled(ctrl, hp_slot)) {
1852 dbg("slot is on\n");
1853 p_slot->state = BLINKINGOFF_STATE;
1854 info(msg_button_off, p_slot->number);
1855 } else {
1856 dbg("slot is off\n");
1857 p_slot->state = BLINKINGON_STATE;
1858 info(msg_button_on, p_slot->number);
1859 }
1860 mutex_lock(&ctrl->crit_sect);
1861
1862 dbg("blink green LED and turn off amber\n");
1863
1864 amber_LED_off(ctrl, hp_slot);
1865 green_LED_blink(ctrl, hp_slot);
1866
1867 set_SOGO(ctrl);
1868
1869
1870 wait_for_ctrl_irq(ctrl);
1871
1872 mutex_unlock(&ctrl->crit_sect);
1873 timer_setup(&p_slot->task_event,
1874 pushbutton_helper_thread,
1875 0);
1876 p_slot->hp_slot = hp_slot;
1877 p_slot->ctrl = ctrl;
1878
1879 p_slot->task_event.expires = jiffies + 5 * HZ;
1880
1881 dbg("add_timer p_slot = %p\n", p_slot);
1882 add_timer(&p_slot->task_event);
1883 }
1884
1885 else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1886 dbg("power fault\n");
1887 } else {
1888
1889 update_slot_info(ctrl, p_slot);
1890 }
1891
1892 ctrl->event_queue[loop].event_type = 0;
1893
1894 change = 1;
1895 }
1896 }
1897 }
1898
1899 return;
1900}
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910void cpqhp_pushbutton_thread(struct timer_list *t)
1911{
1912 u8 hp_slot;
1913 u8 device;
1914 struct pci_func *func;
1915 struct slot *p_slot = from_timer(p_slot, t, task_event);
1916 struct controller *ctrl = (struct controller *) p_slot->ctrl;
1917
1918 pushbutton_pending = NULL;
1919 hp_slot = p_slot->hp_slot;
1920
1921 device = p_slot->device;
1922
1923 if (is_slot_enabled(ctrl, hp_slot)) {
1924 p_slot->state = POWEROFF_STATE;
1925
1926 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1927 dbg("In power_down_board, func = %p, ctrl = %p\n", func, ctrl);
1928 if (!func) {
1929 dbg("Error! func NULL in %s\n", __func__);
1930 return;
1931 }
1932
1933 if (cpqhp_process_SS(ctrl, func) != 0) {
1934 amber_LED_on(ctrl, hp_slot);
1935 green_LED_on(ctrl, hp_slot);
1936
1937 set_SOGO(ctrl);
1938
1939
1940 wait_for_ctrl_irq(ctrl);
1941 }
1942
1943 p_slot->state = STATIC_STATE;
1944 } else {
1945 p_slot->state = POWERON_STATE;
1946
1947
1948 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1949 dbg("In add_board, func = %p, ctrl = %p\n", func, ctrl);
1950 if (!func) {
1951 dbg("Error! func NULL in %s\n", __func__);
1952 return;
1953 }
1954
1955 if (ctrl != NULL) {
1956 if (cpqhp_process_SI(ctrl, func) != 0) {
1957 amber_LED_on(ctrl, hp_slot);
1958 green_LED_off(ctrl, hp_slot);
1959
1960 set_SOGO(ctrl);
1961
1962
1963 wait_for_ctrl_irq(ctrl);
1964 }
1965 }
1966
1967 p_slot->state = STATIC_STATE;
1968 }
1969
1970 return;
1971}
1972
1973
1974int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func)
1975{
1976 u8 device, hp_slot;
1977 u16 temp_word;
1978 u32 tempdword;
1979 int rc;
1980 struct slot *p_slot;
1981 int physical_slot = 0;
1982
1983 tempdword = 0;
1984
1985 device = func->device;
1986 hp_slot = device - ctrl->slot_device_offset;
1987 p_slot = cpqhp_find_slot(ctrl, device);
1988 if (p_slot)
1989 physical_slot = p_slot->number;
1990
1991
1992 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1993
1994 if (tempdword & (0x01 << hp_slot))
1995 return 1;
1996
1997 if (func->is_a_board) {
1998 rc = board_replaced(func, ctrl);
1999 } else {
2000
2001 slot_remove(func);
2002
2003 func = cpqhp_slot_create(ctrl->bus);
2004 if (func == NULL)
2005 return 1;
2006
2007 func->bus = ctrl->bus;
2008 func->device = device;
2009 func->function = 0;
2010 func->configured = 0;
2011 func->is_a_board = 1;
2012
2013
2014 temp_word = ctrl->ctrl_int_comp >> 16;
2015 func->presence_save = (temp_word >> hp_slot) & 0x01;
2016 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
2017
2018 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2019 func->switch_save = 0;
2020 } else {
2021 func->switch_save = 0x10;
2022 }
2023
2024 rc = board_added(func, ctrl);
2025 if (rc) {
2026 if (is_bridge(func)) {
2027 bridge_slot_remove(func);
2028 } else
2029 slot_remove(func);
2030
2031
2032 func = cpqhp_slot_create(ctrl->bus);
2033
2034 if (func == NULL)
2035 return 1;
2036
2037 func->bus = ctrl->bus;
2038 func->device = device;
2039 func->function = 0;
2040 func->configured = 0;
2041 func->is_a_board = 0;
2042
2043
2044 temp_word = ctrl->ctrl_int_comp >> 16;
2045 func->presence_save = (temp_word >> hp_slot) & 0x01;
2046 func->presence_save |=
2047 (temp_word >> (hp_slot + 7)) & 0x02;
2048
2049 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2050 func->switch_save = 0;
2051 } else {
2052 func->switch_save = 0x10;
2053 }
2054 }
2055 }
2056
2057 if (rc)
2058 dbg("%s: rc = %d\n", __func__, rc);
2059
2060 if (p_slot)
2061 update_slot_info(ctrl, p_slot);
2062
2063 return rc;
2064}
2065
2066
2067int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
2068{
2069 u8 device, class_code, header_type, BCR;
2070 u8 index = 0;
2071 u8 replace_flag;
2072 u32 rc = 0;
2073 unsigned int devfn;
2074 struct slot *p_slot;
2075 struct pci_bus *pci_bus = ctrl->pci_bus;
2076 int physical_slot = 0;
2077
2078 device = func->device;
2079 func = cpqhp_slot_find(ctrl->bus, device, index++);
2080 p_slot = cpqhp_find_slot(ctrl, device);
2081 if (p_slot)
2082 physical_slot = p_slot->number;
2083
2084
2085 while (func && !rc) {
2086 pci_bus->number = func->bus;
2087 devfn = PCI_DEVFN(func->device, func->function);
2088
2089
2090 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2091 if (rc)
2092 return rc;
2093
2094 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2095
2096 rc = REMOVE_NOT_SUPPORTED;
2097 } else {
2098
2099 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2100 if (rc)
2101 return rc;
2102
2103
2104 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2105 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2106 if (rc)
2107 return rc;
2108
2109
2110
2111 if (BCR & PCI_BRIDGE_CTL_VGA)
2112 rc = REMOVE_NOT_SUPPORTED;
2113 }
2114 }
2115
2116 func = cpqhp_slot_find(ctrl->bus, device, index++);
2117 }
2118
2119 func = cpqhp_slot_find(ctrl->bus, device, 0);
2120 if ((func != NULL) && !rc) {
2121
2122 replace_flag = !(ctrl->add_support);
2123 rc = remove_board(func, replace_flag, ctrl);
2124 } else if (!rc) {
2125 rc = 1;
2126 }
2127
2128 if (p_slot)
2129 update_slot_info(ctrl, p_slot);
2130
2131 return rc;
2132}
2133
2134
2135
2136
2137
2138
2139
2140
2141static void switch_leds(struct controller *ctrl, const int num_of_slots,
2142 u32 *work_LED, const int direction)
2143{
2144 int loop;
2145
2146 for (loop = 0; loop < num_of_slots; loop++) {
2147 if (direction)
2148 *work_LED = *work_LED >> 1;
2149 else
2150 *work_LED = *work_LED << 1;
2151 writel(*work_LED, ctrl->hpc_reg + LED_CONTROL);
2152
2153 set_SOGO(ctrl);
2154
2155
2156 wait_for_ctrl_irq(ctrl);
2157
2158
2159 long_delay((2*HZ)/10);
2160 }
2161}
2162
2163
2164
2165
2166
2167
2168
2169
2170int cpqhp_hardware_test(struct controller *ctrl, int test_num)
2171{
2172 u32 save_LED;
2173 u32 work_LED;
2174 int loop;
2175 int num_of_slots;
2176
2177 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0f;
2178
2179 switch (test_num) {
2180 case 1:
2181
2182
2183
2184
2185 save_LED = readl(ctrl->hpc_reg + LED_CONTROL);
2186 work_LED = 0x01010101;
2187 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2188 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2189 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2190 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2191
2192 work_LED = 0x01010000;
2193 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2194 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2195 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2196 work_LED = 0x00000101;
2197 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2198 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2199 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2200
2201 work_LED = 0x01010000;
2202 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2203 for (loop = 0; loop < num_of_slots; loop++) {
2204 set_SOGO(ctrl);
2205
2206
2207 wait_for_ctrl_irq(ctrl);
2208
2209
2210 long_delay((3*HZ)/10);
2211 work_LED = work_LED >> 16;
2212 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2213
2214 set_SOGO(ctrl);
2215
2216
2217 wait_for_ctrl_irq(ctrl);
2218
2219
2220 long_delay((3*HZ)/10);
2221 work_LED = work_LED << 16;
2222 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2223 work_LED = work_LED << 1;
2224 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2225 }
2226
2227
2228 writel(save_LED, ctrl->hpc_reg + LED_CONTROL);
2229
2230 set_SOGO(ctrl);
2231
2232
2233 wait_for_ctrl_irq(ctrl);
2234 break;
2235 case 2:
2236
2237 break;
2238 case 3:
2239
2240 break;
2241 }
2242 return 0;
2243}
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
2256 u8 behind_bridge, struct resource_lists *resources)
2257{
2258 u8 temp_byte, function, max_functions, stop_it;
2259 int rc;
2260 u32 ID;
2261 struct pci_func *new_slot;
2262 int index;
2263
2264 new_slot = func;
2265
2266 dbg("%s\n", __func__);
2267
2268 ctrl->pci_bus->number = func->bus;
2269 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2270 if (rc) {
2271 dbg("%s: rc = %d\n", __func__, rc);
2272 return rc;
2273 }
2274
2275 if (temp_byte & 0x80)
2276 max_functions = 8;
2277 else
2278 max_functions = 1;
2279
2280 function = 0;
2281
2282 do {
2283 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources);
2284
2285 if (rc) {
2286 dbg("configure_new_function failed %d\n", rc);
2287 index = 0;
2288
2289 while (new_slot) {
2290 new_slot = cpqhp_slot_find(new_slot->bus, new_slot->device, index++);
2291
2292 if (new_slot)
2293 cpqhp_return_board_resources(new_slot, resources);
2294 }
2295
2296 return rc;
2297 }
2298
2299 function++;
2300
2301 stop_it = 0;
2302
2303
2304
2305
2306 while ((function < max_functions) && (!stop_it)) {
2307 pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2308
2309 if (ID == 0xFFFFFFFF) {
2310 function++;
2311 } else {
2312
2313 new_slot = cpqhp_slot_create(func->bus);
2314
2315 if (new_slot == NULL)
2316 return 1;
2317
2318 new_slot->bus = func->bus;
2319 new_slot->device = func->device;
2320 new_slot->function = function;
2321 new_slot->is_a_board = 1;
2322 new_slot->status = 0;
2323
2324 stop_it++;
2325 }
2326 }
2327
2328 } while (function < max_functions);
2329 dbg("returning from configure_new_device\n");
2330
2331 return 0;
2332}
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351static int configure_new_function(struct controller *ctrl, struct pci_func *func,
2352 u8 behind_bridge,
2353 struct resource_lists *resources)
2354{
2355 int cloop;
2356 u8 IRQ = 0;
2357 u8 temp_byte;
2358 u8 device;
2359 u8 class_code;
2360 u16 command;
2361 u16 temp_word;
2362 u32 temp_dword;
2363 u32 rc;
2364 u32 temp_register;
2365 u32 base;
2366 u32 ID;
2367 unsigned int devfn;
2368 struct pci_resource *mem_node;
2369 struct pci_resource *p_mem_node;
2370 struct pci_resource *io_node;
2371 struct pci_resource *bus_node;
2372 struct pci_resource *hold_mem_node;
2373 struct pci_resource *hold_p_mem_node;
2374 struct pci_resource *hold_IO_node;
2375 struct pci_resource *hold_bus_node;
2376 struct irq_mapping irqs;
2377 struct pci_func *new_slot;
2378 struct pci_bus *pci_bus;
2379 struct resource_lists temp_resources;
2380
2381 pci_bus = ctrl->pci_bus;
2382 pci_bus->number = func->bus;
2383 devfn = PCI_DEVFN(func->device, func->function);
2384
2385
2386 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2387 if (rc)
2388 return rc;
2389
2390 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2391
2392 dbg("set Primary bus = %d\n", func->bus);
2393 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2394 if (rc)
2395 return rc;
2396
2397
2398 dbg("find ranges of buses to use\n");
2399 bus_node = get_max_resource(&(resources->bus_head), 1);
2400
2401
2402 if (!bus_node)
2403 return -ENOMEM;
2404
2405
2406 temp_byte = bus_node->base;
2407 dbg("set Secondary bus = %d\n", bus_node->base);
2408 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2409 if (rc)
2410 return rc;
2411
2412
2413 temp_byte = bus_node->base + bus_node->length - 1;
2414 dbg("set subordinate bus = %d\n", bus_node->base + bus_node->length - 1);
2415 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2416 if (rc)
2417 return rc;
2418
2419
2420 temp_byte = 0x40;
2421 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
2422 if (rc)
2423 return rc;
2424 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
2425 if (rc)
2426 return rc;
2427
2428
2429 temp_byte = 0x08;
2430 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
2431 if (rc)
2432 return rc;
2433
2434
2435 io_node = get_max_resource(&(resources->io_head), 0x1000);
2436 if (!io_node)
2437 return -ENOMEM;
2438 mem_node = get_max_resource(&(resources->mem_head), 0x100000);
2439 if (!mem_node)
2440 return -ENOMEM;
2441 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000);
2442 if (!p_mem_node)
2443 return -ENOMEM;
2444 dbg("Setup the IO, memory, and prefetchable windows\n");
2445 dbg("io_node\n");
2446 dbg("(base, len, next) (%x, %x, %p)\n", io_node->base,
2447 io_node->length, io_node->next);
2448 dbg("mem_node\n");
2449 dbg("(base, len, next) (%x, %x, %p)\n", mem_node->base,
2450 mem_node->length, mem_node->next);
2451 dbg("p_mem_node\n");
2452 dbg("(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2453 p_mem_node->length, p_mem_node->next);
2454
2455
2456 if (!resources->irqs) {
2457 irqs.barber_pole = 0;
2458 irqs.interrupt[0] = 0;
2459 irqs.interrupt[1] = 0;
2460 irqs.interrupt[2] = 0;
2461 irqs.interrupt[3] = 0;
2462 irqs.valid_INT = 0;
2463 } else {
2464 irqs.barber_pole = resources->irqs->barber_pole;
2465 irqs.interrupt[0] = resources->irqs->interrupt[0];
2466 irqs.interrupt[1] = resources->irqs->interrupt[1];
2467 irqs.interrupt[2] = resources->irqs->interrupt[2];
2468 irqs.interrupt[3] = resources->irqs->interrupt[3];
2469 irqs.valid_INT = resources->irqs->valid_INT;
2470 }
2471
2472
2473
2474 temp_resources.bus_head = bus_node;
2475 temp_resources.io_head = io_node;
2476 temp_resources.mem_head = mem_node;
2477 temp_resources.p_mem_head = p_mem_node;
2478 temp_resources.irqs = &irqs;
2479
2480
2481
2482
2483 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2484 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2485 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2486 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2487
2488 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2489 kfree(hold_bus_node);
2490 kfree(hold_IO_node);
2491 kfree(hold_mem_node);
2492 kfree(hold_p_mem_node);
2493
2494 return 1;
2495 }
2496
2497 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2498
2499 bus_node->base += 1;
2500 bus_node->length -= 1;
2501 bus_node->next = NULL;
2502
2503
2504
2505 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2506 io_node->next = NULL;
2507
2508
2509 temp_byte = io_node->base >> 8;
2510 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2511
2512 temp_byte = (io_node->base + io_node->length - 1) >> 8;
2513 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2514
2515
2516
2517
2518 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2519 mem_node->next = NULL;
2520
2521
2522 temp_word = mem_node->base >> 16;
2523 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2524
2525 temp_word = (mem_node->base + mem_node->length - 1) >> 16;
2526 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2527
2528 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2529 p_mem_node->next = NULL;
2530
2531
2532 temp_word = p_mem_node->base >> 16;
2533 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2534
2535 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16;
2536 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2537
2538
2539
2540 irqs.barber_pole--;
2541
2542 rc = 0;
2543
2544
2545 for (device = 0; (device <= 0x1F) && !rc; device++) {
2546 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2547
2548 ID = 0xFFFFFFFF;
2549 pci_bus->number = hold_bus_node->base;
2550 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0), 0x00, &ID);
2551 pci_bus->number = func->bus;
2552
2553 if (ID != 0xFFFFFFFF) {
2554
2555 new_slot = cpqhp_slot_create(hold_bus_node->base);
2556
2557 if (new_slot == NULL) {
2558 rc = -ENOMEM;
2559 continue;
2560 }
2561
2562 new_slot->bus = hold_bus_node->base;
2563 new_slot->device = device;
2564 new_slot->function = 0;
2565 new_slot->is_a_board = 1;
2566 new_slot->status = 0;
2567
2568 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources);
2569 dbg("configure_new_device rc=0x%x\n", rc);
2570 }
2571 }
2572
2573 if (rc)
2574 goto free_and_out;
2575
2576 if (resources->irqs) {
2577 resources->irqs->interrupt[0] = irqs.interrupt[0];
2578 resources->irqs->interrupt[1] = irqs.interrupt[1];
2579 resources->irqs->interrupt[2] = irqs.interrupt[2];
2580 resources->irqs->interrupt[3] = irqs.interrupt[3];
2581 resources->irqs->valid_INT = irqs.valid_INT;
2582 } else if (!behind_bridge) {
2583
2584 for (cloop = 0; cloop < 4; cloop++) {
2585 if (irqs.valid_INT & (0x01 << cloop)) {
2586 rc = cpqhp_set_irq(func->bus, func->device,
2587 cloop + 1, irqs.interrupt[cloop]);
2588 if (rc)
2589 goto free_and_out;
2590 }
2591 }
2592 }
2593
2594
2595
2596 if (bus_node && temp_resources.bus_head) {
2597 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2598
2599 hold_bus_node->next = func->bus_head;
2600 func->bus_head = hold_bus_node;
2601
2602 temp_byte = temp_resources.bus_head->base - 1;
2603
2604
2605 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2606
2607 if (temp_resources.bus_head->length == 0) {
2608 kfree(temp_resources.bus_head);
2609 temp_resources.bus_head = NULL;
2610 } else {
2611 return_resource(&(resources->bus_head), temp_resources.bus_head);
2612 }
2613 }
2614
2615
2616
2617 if (hold_IO_node && temp_resources.io_head) {
2618 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2619 &hold_IO_node, 0x1000);
2620
2621
2622 if (io_node) {
2623 hold_IO_node->base = io_node->base + io_node->length;
2624
2625 temp_byte = (hold_IO_node->base) >> 8;
2626 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2627
2628 return_resource(&(resources->io_head), io_node);
2629 }
2630
2631 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2632
2633
2634 if (io_node) {
2635
2636
2637 hold_IO_node->length = io_node->base - hold_IO_node->base;
2638
2639
2640 if (hold_IO_node->length) {
2641 hold_IO_node->next = func->io_head;
2642 func->io_head = hold_IO_node;
2643
2644 temp_byte = (io_node->base - 1) >> 8;
2645 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2646
2647 return_resource(&(resources->io_head), io_node);
2648 } else {
2649
2650 temp_word = 0x0000;
2651 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_LIMIT, temp_word);
2652
2653 return_resource(&(resources->io_head), io_node);
2654 kfree(hold_IO_node);
2655 }
2656 } else {
2657
2658 hold_IO_node->next = func->io_head;
2659 func->io_head = hold_IO_node;
2660 }
2661 } else if (hold_IO_node) {
2662
2663 hold_IO_node->next = func->io_head;
2664 func->io_head = hold_IO_node;
2665 }
2666
2667
2668 if (hold_mem_node && temp_resources.mem_head) {
2669 mem_node = do_pre_bridge_resource_split(&(temp_resources. mem_head),
2670 &hold_mem_node, 0x100000);
2671
2672
2673 if (mem_node) {
2674 hold_mem_node->base = mem_node->base + mem_node->length;
2675
2676 temp_word = (hold_mem_node->base) >> 16;
2677 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2678
2679 return_resource(&(resources->mem_head), mem_node);
2680 }
2681
2682 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000);
2683
2684
2685 if (mem_node) {
2686
2687
2688 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2689
2690 if (hold_mem_node->length) {
2691 hold_mem_node->next = func->mem_head;
2692 func->mem_head = hold_mem_node;
2693
2694
2695 temp_word = (mem_node->base - 1) >> 16;
2696 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2697
2698
2699 return_resource(&(resources->mem_head), mem_node);
2700 } else {
2701
2702 temp_word = 0x0000;
2703 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2704
2705 return_resource(&(resources->mem_head), mem_node);
2706 kfree(hold_mem_node);
2707 }
2708 } else {
2709
2710 hold_mem_node->next = func->mem_head;
2711 func->mem_head = hold_mem_node;
2712 }
2713 } else if (hold_mem_node) {
2714
2715 hold_mem_node->next = func->mem_head;
2716 func->mem_head = hold_mem_node;
2717 }
2718
2719
2720 if (temp_resources.p_mem_head) {
2721 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2722 &hold_p_mem_node, 0x100000);
2723
2724
2725 if (p_mem_node) {
2726 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2727
2728 temp_word = (hold_p_mem_node->base) >> 16;
2729 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2730
2731 return_resource(&(resources->p_mem_head), p_mem_node);
2732 }
2733
2734 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000);
2735
2736
2737 if (p_mem_node) {
2738
2739
2740 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2741
2742
2743 if (hold_p_mem_node->length) {
2744 hold_p_mem_node->next = func->p_mem_head;
2745 func->p_mem_head = hold_p_mem_node;
2746
2747 temp_word = (p_mem_node->base - 1) >> 16;
2748 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2749
2750 return_resource(&(resources->p_mem_head), p_mem_node);
2751 } else {
2752
2753 temp_word = 0x0000;
2754 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2755
2756 return_resource(&(resources->p_mem_head), p_mem_node);
2757 kfree(hold_p_mem_node);
2758 }
2759 } else {
2760
2761 hold_p_mem_node->next = func->p_mem_head;
2762 func->p_mem_head = hold_p_mem_node;
2763 }
2764 } else if (hold_p_mem_node) {
2765
2766 hold_p_mem_node->next = func->p_mem_head;
2767 func->p_mem_head = hold_p_mem_node;
2768 }
2769
2770
2771
2772
2773
2774 command = 0x0157;
2775
2776
2777
2778
2779
2780 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
2781
2782
2783 command = 0x07;
2784
2785
2786 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
2787 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2788
2789 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2790
2791 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2792
2793 return DEVICE_TYPE_NOT_SUPPORTED;
2794 }
2795
2796 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
2797 temp_register = 0xFFFFFFFF;
2798
2799 dbg("CND: bus=%d, devfn=%d, offset=%d\n", pci_bus->number, devfn, cloop);
2800 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
2801
2802 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2803 dbg("CND: base = 0x%x\n", temp_register);
2804
2805 if (temp_register) {
2806 if ((temp_register & 0x03L) == 0x01) {
2807
2808
2809
2810 base = temp_register & 0xFFFFFFFC;
2811 base = ~base + 1;
2812
2813 dbg("CND: length = 0x%x\n", base);
2814 io_node = get_io_resource(&(resources->io_head), base);
2815 dbg("Got io_node start = %8.8x, length = %8.8x next (%p)\n",
2816 io_node->base, io_node->length, io_node->next);
2817 dbg("func (%p) io_head (%p)\n", func, func->io_head);
2818
2819
2820 if (io_node) {
2821 base = io_node->base;
2822
2823 io_node->next = func->io_head;
2824 func->io_head = io_node;
2825 } else
2826 return -ENOMEM;
2827 } else if ((temp_register & 0x0BL) == 0x08) {
2828
2829 base = temp_register & 0xFFFFFFF0;
2830 base = ~base + 1;
2831
2832 dbg("CND: length = 0x%x\n", base);
2833 p_mem_node = get_resource(&(resources->p_mem_head), base);
2834
2835
2836 if (p_mem_node) {
2837 base = p_mem_node->base;
2838
2839 p_mem_node->next = func->p_mem_head;
2840 func->p_mem_head = p_mem_node;
2841 } else
2842 return -ENOMEM;
2843 } else if ((temp_register & 0x0BL) == 0x00) {
2844
2845 base = temp_register & 0xFFFFFFF0;
2846 base = ~base + 1;
2847
2848 dbg("CND: length = 0x%x\n", base);
2849 mem_node = get_resource(&(resources->mem_head), base);
2850
2851
2852 if (mem_node) {
2853 base = mem_node->base;
2854
2855 mem_node->next = func->mem_head;
2856 func->mem_head = mem_node;
2857 } else
2858 return -ENOMEM;
2859 } else {
2860
2861 return NOT_ENOUGH_RESOURCES;
2862 }
2863
2864 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2865
2866
2867 if ((temp_register & 0x07L) == 0x04) {
2868 cloop += 4;
2869
2870
2871
2872
2873
2874 base = 0;
2875 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2876 }
2877 }
2878 }
2879 if (cpqhp_legacy_mode) {
2880
2881 rc = pci_bus_read_config_byte(pci_bus, devfn,
2882 PCI_INTERRUPT_PIN, &temp_byte);
2883
2884
2885
2886
2887 if (temp_byte && resources->irqs &&
2888 (resources->irqs->valid_INT &
2889 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2890
2891 IRQ = resources->irqs->interrupt[(temp_byte +
2892 resources->irqs->barber_pole - 1) & 0x03];
2893 } else {
2894
2895 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2896
2897 if (class_code == PCI_BASE_CLASS_STORAGE)
2898 IRQ = cpqhp_disk_irq;
2899 else
2900 IRQ = cpqhp_nic_irq;
2901 }
2902
2903
2904 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2905 }
2906
2907 if (!behind_bridge) {
2908 rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
2909 if (rc)
2910 return 1;
2911 } else {
2912
2913
2914 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2915 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2916 }
2917
2918
2919 temp_byte = 0x40;
2920 rc = pci_bus_write_config_byte(pci_bus, devfn,
2921 PCI_LATENCY_TIMER, temp_byte);
2922
2923
2924 temp_byte = 0x08;
2925 rc = pci_bus_write_config_byte(pci_bus, devfn,
2926 PCI_CACHE_LINE_SIZE, temp_byte);
2927
2928
2929 temp_dword = 0x00L;
2930 rc = pci_bus_write_config_word(pci_bus, devfn,
2931 PCI_ROM_ADDRESS, temp_dword);
2932
2933
2934 temp_word = 0x0157;
2935
2936
2937
2938
2939
2940 rc = pci_bus_write_config_word(pci_bus, devfn,
2941 PCI_COMMAND, temp_word);
2942 } else {
2943
2944 return DEVICE_TYPE_NOT_SUPPORTED;
2945 }
2946
2947 func->configured = 1;
2948
2949 return 0;
2950free_and_out:
2951 cpqhp_destroy_resource_list(&temp_resources);
2952
2953 return_resource(&(resources->bus_head), hold_bus_node);
2954 return_resource(&(resources->io_head), hold_IO_node);
2955 return_resource(&(resources->mem_head), hold_mem_node);
2956 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2957 return rc;
2958}
2959