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15#include <linux/err.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/mfd/syscon.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_address.h>
22#include <linux/pinctrl/machine.h>
23#include <linux/pinctrl/pinconf.h>
24#include <linux/pinctrl/pinctrl.h>
25#include <linux/pinctrl/pinmux.h>
26#include <linux/slab.h>
27#include <linux/regmap.h>
28
29#include "../core.h"
30#include "../pinconf.h"
31#include "../pinmux.h"
32#include "pinctrl-imx.h"
33
34
35#define IMX_NO_PAD_CTL 0x80000000
36#define IMX_PAD_SION 0x40000000
37
38static inline const struct group_desc *imx_pinctrl_find_group_by_name(
39 struct pinctrl_dev *pctldev,
40 const char *name)
41{
42 const struct group_desc *grp = NULL;
43 int i;
44
45 for (i = 0; i < pctldev->num_groups; i++) {
46 grp = pinctrl_generic_get_group(pctldev, i);
47 if (grp && !strcmp(grp->name, name))
48 break;
49 }
50
51 return grp;
52}
53
54static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
55 unsigned offset)
56{
57 seq_printf(s, "%s", dev_name(pctldev->dev));
58}
59
60static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
61 struct device_node *np,
62 struct pinctrl_map **map, unsigned *num_maps)
63{
64 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
65 const struct group_desc *grp;
66 struct pinctrl_map *new_map;
67 struct device_node *parent;
68 int map_num = 1;
69 int i, j;
70
71
72
73
74
75 grp = imx_pinctrl_find_group_by_name(pctldev, np->name);
76 if (!grp) {
77 dev_err(ipctl->dev, "unable to find group for node %s\n",
78 np->name);
79 return -EINVAL;
80 }
81
82 for (i = 0; i < grp->num_pins; i++) {
83 struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i];
84
85 if (!(pin->config & IMX_NO_PAD_CTL))
86 map_num++;
87 }
88
89 new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
90 if (!new_map)
91 return -ENOMEM;
92
93 *map = new_map;
94 *num_maps = map_num;
95
96
97 parent = of_get_parent(np);
98 if (!parent) {
99 kfree(new_map);
100 return -EINVAL;
101 }
102 new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
103 new_map[0].data.mux.function = parent->name;
104 new_map[0].data.mux.group = np->name;
105 of_node_put(parent);
106
107
108 new_map++;
109 for (i = j = 0; i < grp->num_pins; i++) {
110 struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i];
111
112 if (!(pin->config & IMX_NO_PAD_CTL)) {
113 new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
114 new_map[j].data.configs.group_or_pin =
115 pin_get_name(pctldev, pin->pin);
116 new_map[j].data.configs.configs = &pin->config;
117 new_map[j].data.configs.num_configs = 1;
118 j++;
119 }
120 }
121
122 dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
123 (*map)->data.mux.function, (*map)->data.mux.group, map_num);
124
125 return 0;
126}
127
128static void imx_dt_free_map(struct pinctrl_dev *pctldev,
129 struct pinctrl_map *map, unsigned num_maps)
130{
131 kfree(map);
132}
133
134static const struct pinctrl_ops imx_pctrl_ops = {
135 .get_groups_count = pinctrl_generic_get_group_count,
136 .get_group_name = pinctrl_generic_get_group_name,
137 .get_group_pins = pinctrl_generic_get_group_pins,
138 .pin_dbg_show = imx_pin_dbg_show,
139 .dt_node_to_map = imx_dt_node_to_map,
140 .dt_free_map = imx_dt_free_map,
141
142};
143
144static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
145 unsigned group)
146{
147 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
148 const struct imx_pinctrl_soc_info *info = ipctl->info;
149 const struct imx_pin_reg *pin_reg;
150 unsigned int npins, pin_id;
151 int i;
152 struct group_desc *grp = NULL;
153 struct function_desc *func = NULL;
154
155
156
157
158
159 grp = pinctrl_generic_get_group(pctldev, group);
160 if (!grp)
161 return -EINVAL;
162
163 func = pinmux_generic_get_function(pctldev, selector);
164 if (!func)
165 return -EINVAL;
166
167 npins = grp->num_pins;
168
169 dev_dbg(ipctl->dev, "enable function %s group %s\n",
170 func->name, grp->name);
171
172 for (i = 0; i < npins; i++) {
173 struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i];
174
175 pin_id = pin->pin;
176 pin_reg = &ipctl->pin_regs[pin_id];
177
178 if (pin_reg->mux_reg == -1) {
179 dev_dbg(ipctl->dev, "Pin(%s) does not support mux function\n",
180 info->pins[pin_id].name);
181 continue;
182 }
183
184 if (info->flags & SHARE_MUX_CONF_REG) {
185 u32 reg;
186 reg = readl(ipctl->base + pin_reg->mux_reg);
187 reg &= ~info->mux_mask;
188 reg |= (pin->mux_mode << info->mux_shift);
189 writel(reg, ipctl->base + pin_reg->mux_reg);
190 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
191 pin_reg->mux_reg, reg);
192 } else {
193 writel(pin->mux_mode, ipctl->base + pin_reg->mux_reg);
194 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
195 pin_reg->mux_reg, pin->mux_mode);
196 }
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211 if (pin->input_val >> 24 == 0xff) {
212 u32 val = pin->input_val;
213 u8 select = val & 0xff;
214 u8 width = (val >> 8) & 0xff;
215 u8 shift = (val >> 16) & 0xff;
216 u32 mask = ((1 << width) - 1) << shift;
217
218
219
220
221 val = readl(ipctl->base + pin->input_reg);
222 val &= ~mask;
223 val |= select << shift;
224 writel(val, ipctl->base + pin->input_reg);
225 } else if (pin->input_reg) {
226
227
228
229
230 if (ipctl->input_sel_base)
231 writel(pin->input_val, ipctl->input_sel_base +
232 pin->input_reg);
233 else
234 writel(pin->input_val, ipctl->base +
235 pin->input_reg);
236 dev_dbg(ipctl->dev,
237 "==>select_input: offset 0x%x val 0x%x\n",
238 pin->input_reg, pin->input_val);
239 }
240 }
241
242 return 0;
243}
244
245struct pinmux_ops imx_pmx_ops = {
246 .get_functions_count = pinmux_generic_get_function_count,
247 .get_function_name = pinmux_generic_get_function_name,
248 .get_function_groups = pinmux_generic_get_function_groups,
249 .set_mux = imx_pmx_set,
250};
251
252
253static u32 imx_pinconf_decode_generic_config(struct imx_pinctrl *ipctl,
254 unsigned long *configs,
255 unsigned int num_configs)
256{
257 const struct imx_pinctrl_soc_info *info = ipctl->info;
258 const struct imx_cfg_params_decode *decode;
259 enum pin_config_param param;
260 u32 raw_config = 0;
261 u32 param_val;
262 int i, j;
263
264 WARN_ON(num_configs > info->num_decodes);
265
266 for (i = 0; i < num_configs; i++) {
267 param = pinconf_to_config_param(configs[i]);
268 param_val = pinconf_to_config_argument(configs[i]);
269 decode = info->decodes;
270 for (j = 0; j < info->num_decodes; j++) {
271 if (param == decode->param) {
272 if (decode->invert)
273 param_val = !param_val;
274 raw_config |= (param_val << decode->shift)
275 & decode->mask;
276 break;
277 }
278 decode++;
279 }
280 }
281
282 if (info->fixup)
283 info->fixup(configs, num_configs, &raw_config);
284
285 return raw_config;
286}
287
288static u32 imx_pinconf_parse_generic_config(struct device_node *np,
289 struct imx_pinctrl *ipctl)
290{
291 const struct imx_pinctrl_soc_info *info = ipctl->info;
292 struct pinctrl_dev *pctl = ipctl->pctl;
293 unsigned int num_configs;
294 unsigned long *configs;
295 int ret;
296
297 if (!info->generic_pinconf)
298 return 0;
299
300 ret = pinconf_generic_parse_dt_config(np, pctl, &configs,
301 &num_configs);
302 if (ret)
303 return 0;
304
305 return imx_pinconf_decode_generic_config(ipctl, configs, num_configs);
306}
307
308static int imx_pinconf_get(struct pinctrl_dev *pctldev,
309 unsigned pin_id, unsigned long *config)
310{
311 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
312 const struct imx_pinctrl_soc_info *info = ipctl->info;
313 const struct imx_pin_reg *pin_reg = &ipctl->pin_regs[pin_id];
314
315 if (pin_reg->conf_reg == -1) {
316 dev_err(ipctl->dev, "Pin(%s) does not support config function\n",
317 info->pins[pin_id].name);
318 return -EINVAL;
319 }
320
321 *config = readl(ipctl->base + pin_reg->conf_reg);
322
323 if (info->flags & SHARE_MUX_CONF_REG)
324 *config &= ~info->mux_mask;
325
326 return 0;
327}
328
329static int imx_pinconf_set(struct pinctrl_dev *pctldev,
330 unsigned pin_id, unsigned long *configs,
331 unsigned num_configs)
332{
333 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
334 const struct imx_pinctrl_soc_info *info = ipctl->info;
335 const struct imx_pin_reg *pin_reg = &ipctl->pin_regs[pin_id];
336 int i;
337
338 if (pin_reg->conf_reg == -1) {
339 dev_err(ipctl->dev, "Pin(%s) does not support config function\n",
340 info->pins[pin_id].name);
341 return -EINVAL;
342 }
343
344 dev_dbg(ipctl->dev, "pinconf set pin %s\n",
345 info->pins[pin_id].name);
346
347 for (i = 0; i < num_configs; i++) {
348 if (info->flags & SHARE_MUX_CONF_REG) {
349 u32 reg;
350 reg = readl(ipctl->base + pin_reg->conf_reg);
351 reg &= info->mux_mask;
352 reg |= configs[i];
353 writel(reg, ipctl->base + pin_reg->conf_reg);
354 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
355 pin_reg->conf_reg, reg);
356 } else {
357 writel(configs[i], ipctl->base + pin_reg->conf_reg);
358 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
359 pin_reg->conf_reg, configs[i]);
360 }
361 }
362
363 return 0;
364}
365
366static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
367 struct seq_file *s, unsigned pin_id)
368{
369 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
370 const struct imx_pin_reg *pin_reg = &ipctl->pin_regs[pin_id];
371 unsigned long config;
372
373 if (!pin_reg || pin_reg->conf_reg == -1) {
374 seq_printf(s, "N/A");
375 return;
376 }
377
378 config = readl(ipctl->base + pin_reg->conf_reg);
379 seq_printf(s, "0x%lx", config);
380}
381
382static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
383 struct seq_file *s, unsigned group)
384{
385 struct group_desc *grp;
386 unsigned long config;
387 const char *name;
388 int i, ret;
389
390 if (group > pctldev->num_groups)
391 return;
392
393 seq_printf(s, "\n");
394 grp = pinctrl_generic_get_group(pctldev, group);
395 if (!grp)
396 return;
397
398 for (i = 0; i < grp->num_pins; i++) {
399 struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i];
400
401 name = pin_get_name(pctldev, pin->pin);
402 ret = imx_pinconf_get(pctldev, pin->pin, &config);
403 if (ret)
404 return;
405 seq_printf(s, " %s: 0x%lx\n", name, config);
406 }
407}
408
409static const struct pinconf_ops imx_pinconf_ops = {
410 .pin_config_get = imx_pinconf_get,
411 .pin_config_set = imx_pinconf_set,
412 .pin_config_dbg_show = imx_pinconf_dbg_show,
413 .pin_config_group_dbg_show = imx_pinconf_group_dbg_show,
414};
415
416
417
418
419
420#define FSL_PIN_SIZE 24
421#define SHARE_FSL_PIN_SIZE 20
422
423static int imx_pinctrl_parse_groups(struct device_node *np,
424 struct group_desc *grp,
425 struct imx_pinctrl *ipctl,
426 u32 index)
427{
428 const struct imx_pinctrl_soc_info *info = ipctl->info;
429 int size, pin_size;
430 const __be32 *list;
431 int i;
432 u32 config;
433
434 dev_dbg(ipctl->dev, "group(%d): %s\n", index, np->name);
435
436 if (info->flags & SHARE_MUX_CONF_REG)
437 pin_size = SHARE_FSL_PIN_SIZE;
438 else
439 pin_size = FSL_PIN_SIZE;
440
441 if (info->generic_pinconf)
442 pin_size -= 4;
443
444
445 grp->name = np->name;
446
447
448
449
450
451
452
453
454
455
456
457 list = of_get_property(np, "fsl,pins", &size);
458 if (!list) {
459 list = of_get_property(np, "pinmux", &size);
460 if (!list) {
461 dev_err(ipctl->dev,
462 "no fsl,pins and pins property in node %pOF\n", np);
463 return -EINVAL;
464 }
465 }
466
467
468 if (!size || size % pin_size) {
469 dev_err(ipctl->dev, "Invalid fsl,pins or pins property in node %pOF\n", np);
470 return -EINVAL;
471 }
472
473
474 config = imx_pinconf_parse_generic_config(np, ipctl);
475
476 grp->num_pins = size / pin_size;
477 grp->data = devm_kzalloc(ipctl->dev, grp->num_pins *
478 sizeof(struct imx_pin), GFP_KERNEL);
479 grp->pins = devm_kzalloc(ipctl->dev, grp->num_pins *
480 sizeof(unsigned int), GFP_KERNEL);
481 if (!grp->pins || !grp->data)
482 return -ENOMEM;
483
484 for (i = 0; i < grp->num_pins; i++) {
485 u32 mux_reg = be32_to_cpu(*list++);
486 u32 conf_reg;
487 unsigned int pin_id;
488 struct imx_pin_reg *pin_reg;
489 struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i];
490
491 if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
492 mux_reg = -1;
493
494 if (info->flags & SHARE_MUX_CONF_REG) {
495 conf_reg = mux_reg;
496 } else {
497 conf_reg = be32_to_cpu(*list++);
498 if (!conf_reg)
499 conf_reg = -1;
500 }
501
502 pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
503 pin_reg = &ipctl->pin_regs[pin_id];
504 pin->pin = pin_id;
505 grp->pins[i] = pin_id;
506 pin_reg->mux_reg = mux_reg;
507 pin_reg->conf_reg = conf_reg;
508 pin->input_reg = be32_to_cpu(*list++);
509 pin->mux_mode = be32_to_cpu(*list++);
510 pin->input_val = be32_to_cpu(*list++);
511
512 if (info->generic_pinconf) {
513
514 pin->config = config;
515 } else {
516
517 config = be32_to_cpu(*list++);
518
519
520 if (config & IMX_PAD_SION)
521 pin->mux_mode |= IOMUXC_CONFIG_SION;
522 pin->config = config & ~IMX_PAD_SION;
523 }
524
525 dev_dbg(ipctl->dev, "%s: 0x%x 0x%08lx", info->pins[pin_id].name,
526 pin->mux_mode, pin->config);
527 }
528
529 return 0;
530}
531
532static int imx_pinctrl_parse_functions(struct device_node *np,
533 struct imx_pinctrl *ipctl,
534 u32 index)
535{
536 struct pinctrl_dev *pctl = ipctl->pctl;
537 struct device_node *child;
538 struct function_desc *func;
539 struct group_desc *grp;
540 u32 i = 0;
541
542 dev_dbg(pctl->dev, "parse function(%d): %s\n", index, np->name);
543
544 func = pinmux_generic_get_function(pctl, index);
545 if (!func)
546 return -EINVAL;
547
548
549 func->name = np->name;
550 func->num_group_names = of_get_child_count(np);
551 if (func->num_group_names == 0) {
552 dev_err(ipctl->dev, "no groups defined in %pOF\n", np);
553 return -EINVAL;
554 }
555 func->group_names = devm_kcalloc(ipctl->dev, func->num_group_names,
556 sizeof(char *), GFP_KERNEL);
557 if (!func->group_names)
558 return -ENOMEM;
559
560 for_each_child_of_node(np, child) {
561 func->group_names[i] = child->name;
562
563 grp = devm_kzalloc(ipctl->dev, sizeof(struct group_desc),
564 GFP_KERNEL);
565 if (!grp)
566 return -ENOMEM;
567
568 mutex_lock(&ipctl->mutex);
569 radix_tree_insert(&pctl->pin_group_tree,
570 ipctl->group_index++, grp);
571 mutex_unlock(&ipctl->mutex);
572
573 imx_pinctrl_parse_groups(child, grp, ipctl, i++);
574 }
575
576 return 0;
577}
578
579
580
581
582
583
584static bool imx_pinctrl_dt_is_flat_functions(struct device_node *np)
585{
586 struct device_node *function_np;
587 struct device_node *pinctrl_np;
588
589 for_each_child_of_node(np, function_np) {
590 if (of_property_read_bool(function_np, "fsl,pins"))
591 return true;
592
593 for_each_child_of_node(function_np, pinctrl_np) {
594 if (of_property_read_bool(pinctrl_np, "fsl,pins"))
595 return false;
596 }
597 }
598
599 return true;
600}
601
602static int imx_pinctrl_probe_dt(struct platform_device *pdev,
603 struct imx_pinctrl *ipctl)
604{
605 struct device_node *np = pdev->dev.of_node;
606 struct device_node *child;
607 struct pinctrl_dev *pctl = ipctl->pctl;
608 u32 nfuncs = 0;
609 u32 i = 0;
610 bool flat_funcs;
611
612 if (!np)
613 return -ENODEV;
614
615 flat_funcs = imx_pinctrl_dt_is_flat_functions(np);
616 if (flat_funcs) {
617 nfuncs = 1;
618 } else {
619 nfuncs = of_get_child_count(np);
620 if (nfuncs <= 0) {
621 dev_err(&pdev->dev, "no functions defined\n");
622 return -EINVAL;
623 }
624 }
625
626 for (i = 0; i < nfuncs; i++) {
627 struct function_desc *function;
628
629 function = devm_kzalloc(&pdev->dev, sizeof(*function),
630 GFP_KERNEL);
631 if (!function)
632 return -ENOMEM;
633
634 mutex_lock(&ipctl->mutex);
635 radix_tree_insert(&pctl->pin_function_tree, i, function);
636 mutex_unlock(&ipctl->mutex);
637 }
638 pctl->num_functions = nfuncs;
639
640 ipctl->group_index = 0;
641 if (flat_funcs) {
642 pctl->num_groups = of_get_child_count(np);
643 } else {
644 pctl->num_groups = 0;
645 for_each_child_of_node(np, child)
646 pctl->num_groups += of_get_child_count(child);
647 }
648
649 if (flat_funcs) {
650 imx_pinctrl_parse_functions(np, ipctl, 0);
651 } else {
652 i = 0;
653 for_each_child_of_node(np, child)
654 imx_pinctrl_parse_functions(child, ipctl, i++);
655 }
656
657 return 0;
658}
659
660
661
662
663
664static void imx_free_resources(struct imx_pinctrl *ipctl)
665{
666 if (ipctl->pctl)
667 pinctrl_unregister(ipctl->pctl);
668}
669
670int imx_pinctrl_probe(struct platform_device *pdev,
671 const struct imx_pinctrl_soc_info *info)
672{
673 struct regmap_config config = { .name = "gpr" };
674 struct device_node *dev_np = pdev->dev.of_node;
675 struct pinctrl_desc *imx_pinctrl_desc;
676 struct device_node *np;
677 struct imx_pinctrl *ipctl;
678 struct resource *res;
679 struct regmap *gpr;
680 int ret, i;
681
682 if (!info || !info->pins || !info->npins) {
683 dev_err(&pdev->dev, "wrong pinctrl info\n");
684 return -EINVAL;
685 }
686
687 if (info->gpr_compatible) {
688 gpr = syscon_regmap_lookup_by_compatible(info->gpr_compatible);
689 if (!IS_ERR(gpr))
690 regmap_attach_dev(&pdev->dev, gpr, &config);
691 }
692
693
694 ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
695 if (!ipctl)
696 return -ENOMEM;
697
698 ipctl->pin_regs = devm_kmalloc(&pdev->dev, sizeof(*ipctl->pin_regs) *
699 info->npins, GFP_KERNEL);
700 if (!ipctl->pin_regs)
701 return -ENOMEM;
702
703 for (i = 0; i < info->npins; i++) {
704 ipctl->pin_regs[i].mux_reg = -1;
705 ipctl->pin_regs[i].conf_reg = -1;
706 }
707
708 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
709 ipctl->base = devm_ioremap_resource(&pdev->dev, res);
710 if (IS_ERR(ipctl->base))
711 return PTR_ERR(ipctl->base);
712
713 if (of_property_read_bool(dev_np, "fsl,input-sel")) {
714 np = of_parse_phandle(dev_np, "fsl,input-sel", 0);
715 if (!np) {
716 dev_err(&pdev->dev, "iomuxc fsl,input-sel property not found\n");
717 return -EINVAL;
718 }
719
720 ipctl->input_sel_base = of_iomap(np, 0);
721 of_node_put(np);
722 if (!ipctl->input_sel_base) {
723 dev_err(&pdev->dev,
724 "iomuxc input select base address not found\n");
725 return -ENOMEM;
726 }
727 }
728
729 imx_pinctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*imx_pinctrl_desc),
730 GFP_KERNEL);
731 if (!imx_pinctrl_desc)
732 return -ENOMEM;
733
734 imx_pinctrl_desc->name = dev_name(&pdev->dev);
735 imx_pinctrl_desc->pins = info->pins;
736 imx_pinctrl_desc->npins = info->npins;
737 imx_pinctrl_desc->pctlops = &imx_pctrl_ops;
738 imx_pinctrl_desc->pmxops = &imx_pmx_ops;
739 imx_pinctrl_desc->confops = &imx_pinconf_ops;
740 imx_pinctrl_desc->owner = THIS_MODULE;
741
742
743 imx_pinctrl_desc->custom_params = info->custom_params;
744 imx_pinctrl_desc->num_custom_params = info->num_custom_params;
745
746
747 imx_pmx_ops.gpio_set_direction = info->gpio_set_direction;
748
749 mutex_init(&ipctl->mutex);
750
751 ipctl->info = info;
752 ipctl->dev = &pdev->dev;
753 platform_set_drvdata(pdev, ipctl);
754 ret = devm_pinctrl_register_and_init(&pdev->dev,
755 imx_pinctrl_desc, ipctl,
756 &ipctl->pctl);
757 if (ret) {
758 dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
759 goto free;
760 }
761
762 ret = imx_pinctrl_probe_dt(pdev, ipctl);
763 if (ret) {
764 dev_err(&pdev->dev, "fail to probe dt properties\n");
765 goto free;
766 }
767
768 dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");
769
770 return pinctrl_enable(ipctl->pctl);
771
772free:
773 imx_free_resources(ipctl);
774
775 return ret;
776}
777