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10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/string.h>
16#include <linux/errno.h>
17#include <linux/kernel.h>
18#include <linux/ip.h>
19#include <linux/tcp.h>
20#include <linux/mii.h>
21#include <linux/kthread.h>
22#include <linux/slab.h>
23#include <linux/if_vlan.h>
24#include <linux/netdevice.h>
25#include <linux/netdev_features.h>
26#include <linux/skbuff.h>
27
28#include <net/iucv/af_iucv.h>
29#include <net/dsfield.h>
30
31#include <asm/ebcdic.h>
32#include <asm/chpid.h>
33#include <asm/io.h>
34#include <asm/sysinfo.h>
35#include <asm/compat.h>
36#include <asm/diag.h>
37#include <asm/cio.h>
38#include <asm/ccwdev.h>
39#include <asm/cpcmd.h>
40
41#include "qeth_core.h"
42
43struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
44
45
46 [QETH_DBF_SETUP] = {"qeth_setup",
47 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
48 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
49 &debug_sprintf_view, NULL},
50 [QETH_DBF_CTRL] = {"qeth_control",
51 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
52};
53EXPORT_SYMBOL_GPL(qeth_dbf);
54
55struct qeth_card_list_struct qeth_core_card_list;
56EXPORT_SYMBOL_GPL(qeth_core_card_list);
57struct kmem_cache *qeth_core_header_cache;
58EXPORT_SYMBOL_GPL(qeth_core_header_cache);
59static struct kmem_cache *qeth_qdio_outbuf_cache;
60
61static struct device *qeth_core_root_dev;
62static struct lock_class_key qdio_out_skb_queue_key;
63static struct mutex qeth_mod_mutex;
64
65static void qeth_send_control_data_cb(struct qeth_channel *,
66 struct qeth_cmd_buffer *);
67static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
68static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
69static void qeth_free_buffer_pool(struct qeth_card *);
70static int qeth_qdio_establish(struct qeth_card *);
71static void qeth_free_qdio_buffers(struct qeth_card *);
72static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
73 struct qeth_qdio_out_buffer *buf,
74 enum iucv_tx_notify notification);
75static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
76static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
77 struct qeth_qdio_out_buffer *buf,
78 enum qeth_qdio_buffer_states newbufstate);
79static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
80
81struct workqueue_struct *qeth_wq;
82EXPORT_SYMBOL_GPL(qeth_wq);
83
84int qeth_card_hw_is_reachable(struct qeth_card *card)
85{
86 return (card->state == CARD_STATE_SOFTSETUP) ||
87 (card->state == CARD_STATE_UP);
88}
89EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
90
91static void qeth_close_dev_handler(struct work_struct *work)
92{
93 struct qeth_card *card;
94
95 card = container_of(work, struct qeth_card, close_dev_work);
96 QETH_CARD_TEXT(card, 2, "cldevhdl");
97 rtnl_lock();
98 dev_close(card->dev);
99 rtnl_unlock();
100 ccwgroup_set_offline(card->gdev);
101}
102
103void qeth_close_dev(struct qeth_card *card)
104{
105 QETH_CARD_TEXT(card, 2, "cldevsubm");
106 queue_work(qeth_wq, &card->close_dev_work);
107}
108EXPORT_SYMBOL_GPL(qeth_close_dev);
109
110static const char *qeth_get_cardname(struct qeth_card *card)
111{
112 if (card->info.guestlan) {
113 switch (card->info.type) {
114 case QETH_CARD_TYPE_OSD:
115 return " Virtual NIC QDIO";
116 case QETH_CARD_TYPE_IQD:
117 return " Virtual NIC Hiper";
118 case QETH_CARD_TYPE_OSM:
119 return " Virtual NIC QDIO - OSM";
120 case QETH_CARD_TYPE_OSX:
121 return " Virtual NIC QDIO - OSX";
122 default:
123 return " unknown";
124 }
125 } else {
126 switch (card->info.type) {
127 case QETH_CARD_TYPE_OSD:
128 return " OSD Express";
129 case QETH_CARD_TYPE_IQD:
130 return " HiperSockets";
131 case QETH_CARD_TYPE_OSN:
132 return " OSN QDIO";
133 case QETH_CARD_TYPE_OSM:
134 return " OSM QDIO";
135 case QETH_CARD_TYPE_OSX:
136 return " OSX QDIO";
137 default:
138 return " unknown";
139 }
140 }
141 return " n/a";
142}
143
144
145const char *qeth_get_cardname_short(struct qeth_card *card)
146{
147 if (card->info.guestlan) {
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSD:
150 return "Virt.NIC QDIO";
151 case QETH_CARD_TYPE_IQD:
152 return "Virt.NIC Hiper";
153 case QETH_CARD_TYPE_OSM:
154 return "Virt.NIC OSM";
155 case QETH_CARD_TYPE_OSX:
156 return "Virt.NIC OSX";
157 default:
158 return "unknown";
159 }
160 } else {
161 switch (card->info.type) {
162 case QETH_CARD_TYPE_OSD:
163 switch (card->info.link_type) {
164 case QETH_LINK_TYPE_FAST_ETH:
165 return "OSD_100";
166 case QETH_LINK_TYPE_HSTR:
167 return "HSTR";
168 case QETH_LINK_TYPE_GBIT_ETH:
169 return "OSD_1000";
170 case QETH_LINK_TYPE_10GBIT_ETH:
171 return "OSD_10GIG";
172 case QETH_LINK_TYPE_LANE_ETH100:
173 return "OSD_FE_LANE";
174 case QETH_LINK_TYPE_LANE_TR:
175 return "OSD_TR_LANE";
176 case QETH_LINK_TYPE_LANE_ETH1000:
177 return "OSD_GbE_LANE";
178 case QETH_LINK_TYPE_LANE:
179 return "OSD_ATM_LANE";
180 default:
181 return "OSD_Express";
182 }
183 case QETH_CARD_TYPE_IQD:
184 return "HiperSockets";
185 case QETH_CARD_TYPE_OSN:
186 return "OSN";
187 case QETH_CARD_TYPE_OSM:
188 return "OSM_1000";
189 case QETH_CARD_TYPE_OSX:
190 return "OSX_10GIG";
191 default:
192 return "unknown";
193 }
194 }
195 return "n/a";
196}
197
198void qeth_set_recovery_task(struct qeth_card *card)
199{
200 card->recovery_task = current;
201}
202EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
203
204void qeth_clear_recovery_task(struct qeth_card *card)
205{
206 card->recovery_task = NULL;
207}
208EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
209
210static bool qeth_is_recovery_task(const struct qeth_card *card)
211{
212 return card->recovery_task == current;
213}
214
215void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
216 int clear_start_mask)
217{
218 unsigned long flags;
219
220 spin_lock_irqsave(&card->thread_mask_lock, flags);
221 card->thread_allowed_mask = threads;
222 if (clear_start_mask)
223 card->thread_start_mask &= threads;
224 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
225 wake_up(&card->wait_q);
226}
227EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
228
229int qeth_threads_running(struct qeth_card *card, unsigned long threads)
230{
231 unsigned long flags;
232 int rc = 0;
233
234 spin_lock_irqsave(&card->thread_mask_lock, flags);
235 rc = (card->thread_running_mask & threads);
236 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
237 return rc;
238}
239EXPORT_SYMBOL_GPL(qeth_threads_running);
240
241int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
242{
243 if (qeth_is_recovery_task(card))
244 return 0;
245 return wait_event_interruptible(card->wait_q,
246 qeth_threads_running(card, threads) == 0);
247}
248EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
249
250void qeth_clear_working_pool_list(struct qeth_card *card)
251{
252 struct qeth_buffer_pool_entry *pool_entry, *tmp;
253
254 QETH_CARD_TEXT(card, 5, "clwrklst");
255 list_for_each_entry_safe(pool_entry, tmp,
256 &card->qdio.in_buf_pool.entry_list, list){
257 list_del(&pool_entry->list);
258 }
259}
260EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
261
262static int qeth_alloc_buffer_pool(struct qeth_card *card)
263{
264 struct qeth_buffer_pool_entry *pool_entry;
265 void *ptr;
266 int i, j;
267
268 QETH_CARD_TEXT(card, 5, "alocpool");
269 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
270 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
271 if (!pool_entry) {
272 qeth_free_buffer_pool(card);
273 return -ENOMEM;
274 }
275 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
276 ptr = (void *) __get_free_page(GFP_KERNEL);
277 if (!ptr) {
278 while (j > 0)
279 free_page((unsigned long)
280 pool_entry->elements[--j]);
281 kfree(pool_entry);
282 qeth_free_buffer_pool(card);
283 return -ENOMEM;
284 }
285 pool_entry->elements[j] = ptr;
286 }
287 list_add(&pool_entry->init_list,
288 &card->qdio.init_pool.entry_list);
289 }
290 return 0;
291}
292
293int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
294{
295 QETH_CARD_TEXT(card, 2, "realcbp");
296
297 if ((card->state != CARD_STATE_DOWN) &&
298 (card->state != CARD_STATE_RECOVER))
299 return -EPERM;
300
301
302 qeth_clear_working_pool_list(card);
303 qeth_free_buffer_pool(card);
304 card->qdio.in_buf_pool.buf_count = bufcnt;
305 card->qdio.init_pool.buf_count = bufcnt;
306 return qeth_alloc_buffer_pool(card);
307}
308EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
309
310static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
311{
312 if (!q)
313 return;
314
315 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
316 kfree(q);
317}
318
319static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
320{
321 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
322 int i;
323
324 if (!q)
325 return NULL;
326
327 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
328 kfree(q);
329 return NULL;
330 }
331
332 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
333 q->bufs[i].buffer = q->qdio_bufs[i];
334
335 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
336 return q;
337}
338
339static int qeth_cq_init(struct qeth_card *card)
340{
341 int rc;
342
343 if (card->options.cq == QETH_CQ_ENABLED) {
344 QETH_DBF_TEXT(SETUP, 2, "cqinit");
345 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
346 QDIO_MAX_BUFFERS_PER_Q);
347 card->qdio.c_q->next_buf_to_init = 127;
348 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
349 card->qdio.no_in_queues - 1, 0,
350 127);
351 if (rc) {
352 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
353 goto out;
354 }
355 }
356 rc = 0;
357out:
358 return rc;
359}
360
361static int qeth_alloc_cq(struct qeth_card *card)
362{
363 int rc;
364
365 if (card->options.cq == QETH_CQ_ENABLED) {
366 int i;
367 struct qdio_outbuf_state *outbuf_states;
368
369 QETH_DBF_TEXT(SETUP, 2, "cqon");
370 card->qdio.c_q = qeth_alloc_qdio_queue();
371 if (!card->qdio.c_q) {
372 rc = -1;
373 goto kmsg_out;
374 }
375 card->qdio.no_in_queues = 2;
376 card->qdio.out_bufstates =
377 kzalloc(card->qdio.no_out_queues *
378 QDIO_MAX_BUFFERS_PER_Q *
379 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
380 outbuf_states = card->qdio.out_bufstates;
381 if (outbuf_states == NULL) {
382 rc = -1;
383 goto free_cq_out;
384 }
385 for (i = 0; i < card->qdio.no_out_queues; ++i) {
386 card->qdio.out_qs[i]->bufstates = outbuf_states;
387 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
388 }
389 } else {
390 QETH_DBF_TEXT(SETUP, 2, "nocq");
391 card->qdio.c_q = NULL;
392 card->qdio.no_in_queues = 1;
393 }
394 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
395 rc = 0;
396out:
397 return rc;
398free_cq_out:
399 qeth_free_qdio_queue(card->qdio.c_q);
400 card->qdio.c_q = NULL;
401kmsg_out:
402 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
403 goto out;
404}
405
406static void qeth_free_cq(struct qeth_card *card)
407{
408 if (card->qdio.c_q) {
409 --card->qdio.no_in_queues;
410 qeth_free_qdio_queue(card->qdio.c_q);
411 card->qdio.c_q = NULL;
412 }
413 kfree(card->qdio.out_bufstates);
414 card->qdio.out_bufstates = NULL;
415}
416
417static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
418 int delayed)
419{
420 enum iucv_tx_notify n;
421
422 switch (sbalf15) {
423 case 0:
424 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
425 break;
426 case 4:
427 case 16:
428 case 17:
429 case 18:
430 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
431 TX_NOTIFY_UNREACHABLE;
432 break;
433 default:
434 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
435 TX_NOTIFY_GENERALERROR;
436 break;
437 }
438
439 return n;
440}
441
442static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
443 int forced_cleanup)
444{
445 if (q->card->options.cq != QETH_CQ_ENABLED)
446 return;
447
448 if (q->bufs[bidx]->next_pending != NULL) {
449 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
450 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
451
452 while (c) {
453 if (forced_cleanup ||
454 atomic_read(&c->state) ==
455 QETH_QDIO_BUF_HANDLED_DELAYED) {
456 struct qeth_qdio_out_buffer *f = c;
457 QETH_CARD_TEXT(f->q->card, 5, "fp");
458 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
459
460
461
462 qeth_release_skbs(c);
463
464 c = f->next_pending;
465 WARN_ON_ONCE(head->next_pending != f);
466 head->next_pending = c;
467 kmem_cache_free(qeth_qdio_outbuf_cache, f);
468 } else {
469 head = c;
470 c = c->next_pending;
471 }
472
473 }
474 }
475 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
476 QETH_QDIO_BUF_HANDLED_DELAYED)) {
477
478 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
479 qeth_init_qdio_out_buf(q, bidx);
480 QETH_CARD_TEXT(q->card, 2, "clprecov");
481 }
482}
483
484
485static void qeth_qdio_handle_aob(struct qeth_card *card,
486 unsigned long phys_aob_addr)
487{
488 struct qaob *aob;
489 struct qeth_qdio_out_buffer *buffer;
490 enum iucv_tx_notify notification;
491
492 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
493 QETH_CARD_TEXT(card, 5, "haob");
494 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
495 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
496 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
497
498 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
499 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
500 notification = TX_NOTIFY_OK;
501 } else {
502 WARN_ON_ONCE(atomic_read(&buffer->state) !=
503 QETH_QDIO_BUF_PENDING);
504 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
505 notification = TX_NOTIFY_DELAYED_OK;
506 }
507
508 if (aob->aorc != 0) {
509 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
510 notification = qeth_compute_cq_notification(aob->aorc, 1);
511 }
512 qeth_notify_skbs(buffer->q, buffer, notification);
513
514 buffer->aob = NULL;
515 qeth_clear_output_buffer(buffer->q, buffer,
516 QETH_QDIO_BUF_HANDLED_DELAYED);
517
518
519 qdio_release_aob(aob);
520}
521
522static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
523{
524 return card->options.cq == QETH_CQ_ENABLED &&
525 card->qdio.c_q != NULL &&
526 queue != 0 &&
527 queue == card->qdio.no_in_queues - 1;
528}
529
530static int __qeth_issue_next_read(struct qeth_card *card)
531{
532 int rc;
533 struct qeth_cmd_buffer *iob;
534
535 QETH_CARD_TEXT(card, 5, "issnxrd");
536 if (card->read.state != CH_STATE_UP)
537 return -EIO;
538 iob = qeth_get_buffer(&card->read);
539 if (!iob) {
540 dev_warn(&card->gdev->dev, "The qeth device driver "
541 "failed to recover an error on the device\n");
542 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
543 "available\n", dev_name(&card->gdev->dev));
544 return -ENOMEM;
545 }
546 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
547 QETH_CARD_TEXT(card, 6, "noirqpnd");
548 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
549 (addr_t) iob, 0, 0);
550 if (rc) {
551 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
552 "rc=%i\n", dev_name(&card->gdev->dev), rc);
553 atomic_set(&card->read.irq_pending, 0);
554 card->read_or_write_problem = 1;
555 qeth_schedule_recovery(card);
556 wake_up(&card->wait_q);
557 }
558 return rc;
559}
560
561static int qeth_issue_next_read(struct qeth_card *card)
562{
563 int ret;
564
565 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
566 ret = __qeth_issue_next_read(card);
567 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
568
569 return ret;
570}
571
572static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
573{
574 struct qeth_reply *reply;
575
576 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
577 if (reply) {
578 refcount_set(&reply->refcnt, 1);
579 atomic_set(&reply->received, 0);
580 reply->card = card;
581 }
582 return reply;
583}
584
585static void qeth_get_reply(struct qeth_reply *reply)
586{
587 refcount_inc(&reply->refcnt);
588}
589
590static void qeth_put_reply(struct qeth_reply *reply)
591{
592 if (refcount_dec_and_test(&reply->refcnt))
593 kfree(reply);
594}
595
596static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
597 struct qeth_card *card)
598{
599 char *ipa_name;
600 int com = cmd->hdr.command;
601 ipa_name = qeth_get_ipa_cmd_name(com);
602 if (rc)
603 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
604 "x%X \"%s\"\n",
605 ipa_name, com, dev_name(&card->gdev->dev),
606 QETH_CARD_IFNAME(card), rc,
607 qeth_get_ipa_msg(rc));
608 else
609 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
610 ipa_name, com, dev_name(&card->gdev->dev),
611 QETH_CARD_IFNAME(card));
612}
613
614static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
615 struct qeth_cmd_buffer *iob)
616{
617 struct qeth_ipa_cmd *cmd = NULL;
618
619 QETH_CARD_TEXT(card, 5, "chkipad");
620 if (IS_IPA(iob->data)) {
621 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
622 if (IS_IPA_REPLY(cmd)) {
623 if (cmd->hdr.command != IPA_CMD_SETCCID &&
624 cmd->hdr.command != IPA_CMD_DELCCID &&
625 cmd->hdr.command != IPA_CMD_MODCCID &&
626 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
627 qeth_issue_ipa_msg(cmd,
628 cmd->hdr.return_code, card);
629 return cmd;
630 } else {
631 switch (cmd->hdr.command) {
632 case IPA_CMD_STOPLAN:
633 if (cmd->hdr.return_code ==
634 IPA_RC_VEPA_TO_VEB_TRANSITION) {
635 dev_err(&card->gdev->dev,
636 "Interface %s is down because the "
637 "adjacent port is no longer in "
638 "reflective relay mode\n",
639 QETH_CARD_IFNAME(card));
640 qeth_close_dev(card);
641 } else {
642 dev_warn(&card->gdev->dev,
643 "The link for interface %s on CHPID"
644 " 0x%X failed\n",
645 QETH_CARD_IFNAME(card),
646 card->info.chpid);
647 qeth_issue_ipa_msg(cmd,
648 cmd->hdr.return_code, card);
649 }
650 card->lan_online = 0;
651 if (card->dev && netif_carrier_ok(card->dev))
652 netif_carrier_off(card->dev);
653 return NULL;
654 case IPA_CMD_STARTLAN:
655 dev_info(&card->gdev->dev,
656 "The link for %s on CHPID 0x%X has"
657 " been restored\n",
658 QETH_CARD_IFNAME(card),
659 card->info.chpid);
660 netif_carrier_on(card->dev);
661 card->lan_online = 1;
662 if (card->info.hwtrap)
663 card->info.hwtrap = 2;
664 qeth_schedule_recovery(card);
665 return NULL;
666 case IPA_CMD_SETBRIDGEPORT_IQD:
667 case IPA_CMD_SETBRIDGEPORT_OSA:
668 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
669 if (card->discipline->control_event_handler
670 (card, cmd))
671 return cmd;
672 else
673 return NULL;
674 case IPA_CMD_MODCCID:
675 return cmd;
676 case IPA_CMD_REGISTER_LOCAL_ADDR:
677 QETH_CARD_TEXT(card, 3, "irla");
678 break;
679 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
680 QETH_CARD_TEXT(card, 3, "urla");
681 break;
682 default:
683 QETH_DBF_MESSAGE(2, "Received data is IPA "
684 "but not a reply!\n");
685 break;
686 }
687 }
688 }
689 return cmd;
690}
691
692void qeth_clear_ipacmd_list(struct qeth_card *card)
693{
694 struct qeth_reply *reply, *r;
695 unsigned long flags;
696
697 QETH_CARD_TEXT(card, 4, "clipalst");
698
699 spin_lock_irqsave(&card->lock, flags);
700 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
701 qeth_get_reply(reply);
702 reply->rc = -EIO;
703 atomic_inc(&reply->received);
704 list_del_init(&reply->list);
705 wake_up(&reply->wait_q);
706 qeth_put_reply(reply);
707 }
708 spin_unlock_irqrestore(&card->lock, flags);
709 atomic_set(&card->write.irq_pending, 0);
710}
711EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
712
713static int qeth_check_idx_response(struct qeth_card *card,
714 unsigned char *buffer)
715{
716 if (!buffer)
717 return 0;
718
719 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
720 if ((buffer[2] & 0xc0) == 0xc0) {
721 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
722 "with cause code 0x%02x%s\n",
723 buffer[4],
724 ((buffer[4] == 0x22) ?
725 " -- try another portname" : ""));
726 QETH_CARD_TEXT(card, 2, "ckidxres");
727 QETH_CARD_TEXT(card, 2, " idxterm");
728 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
729 if (buffer[4] == 0xf6) {
730 dev_err(&card->gdev->dev,
731 "The qeth device is not configured "
732 "for the OSI layer required by z/VM\n");
733 return -EPERM;
734 }
735 return -EIO;
736 }
737 return 0;
738}
739
740static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
741{
742 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
743 dev_get_drvdata(&cdev->dev))->dev);
744 return card;
745}
746
747static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
748 __u32 len)
749{
750 struct qeth_card *card;
751
752 card = CARD_FROM_CDEV(channel->ccwdev);
753 QETH_CARD_TEXT(card, 4, "setupccw");
754 if (channel == &card->read)
755 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
756 else
757 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
758 channel->ccw.count = len;
759 channel->ccw.cda = (__u32) __pa(iob);
760}
761
762static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
763{
764 __u8 index;
765
766 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
767 index = channel->io_buf_no;
768 do {
769 if (channel->iob[index].state == BUF_STATE_FREE) {
770 channel->iob[index].state = BUF_STATE_LOCKED;
771 channel->io_buf_no = (channel->io_buf_no + 1) %
772 QETH_CMD_BUFFER_NO;
773 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
774 return channel->iob + index;
775 }
776 index = (index + 1) % QETH_CMD_BUFFER_NO;
777 } while (index != channel->io_buf_no);
778
779 return NULL;
780}
781
782void qeth_release_buffer(struct qeth_channel *channel,
783 struct qeth_cmd_buffer *iob)
784{
785 unsigned long flags;
786
787 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
788 spin_lock_irqsave(&channel->iob_lock, flags);
789 memset(iob->data, 0, QETH_BUFSIZE);
790 iob->state = BUF_STATE_FREE;
791 iob->callback = qeth_send_control_data_cb;
792 iob->rc = 0;
793 spin_unlock_irqrestore(&channel->iob_lock, flags);
794 wake_up(&channel->wait_q);
795}
796EXPORT_SYMBOL_GPL(qeth_release_buffer);
797
798static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
799{
800 struct qeth_cmd_buffer *buffer = NULL;
801 unsigned long flags;
802
803 spin_lock_irqsave(&channel->iob_lock, flags);
804 buffer = __qeth_get_buffer(channel);
805 spin_unlock_irqrestore(&channel->iob_lock, flags);
806 return buffer;
807}
808
809struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
810{
811 struct qeth_cmd_buffer *buffer;
812 wait_event(channel->wait_q,
813 ((buffer = qeth_get_buffer(channel)) != NULL));
814 return buffer;
815}
816EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
817
818void qeth_clear_cmd_buffers(struct qeth_channel *channel)
819{
820 int cnt;
821
822 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
823 qeth_release_buffer(channel, &channel->iob[cnt]);
824 channel->buf_no = 0;
825 channel->io_buf_no = 0;
826}
827EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
828
829static void qeth_send_control_data_cb(struct qeth_channel *channel,
830 struct qeth_cmd_buffer *iob)
831{
832 struct qeth_card *card;
833 struct qeth_reply *reply, *r;
834 struct qeth_ipa_cmd *cmd;
835 unsigned long flags;
836 int keep_reply;
837 int rc = 0;
838
839 card = CARD_FROM_CDEV(channel->ccwdev);
840 QETH_CARD_TEXT(card, 4, "sndctlcb");
841 rc = qeth_check_idx_response(card, iob->data);
842 switch (rc) {
843 case 0:
844 break;
845 case -EIO:
846 qeth_clear_ipacmd_list(card);
847 qeth_schedule_recovery(card);
848
849 default:
850 goto out;
851 }
852
853 cmd = qeth_check_ipa_data(card, iob);
854 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
855 goto out;
856
857 if (card->info.type == QETH_CARD_TYPE_OSN &&
858 cmd &&
859 cmd->hdr.command != IPA_CMD_STARTLAN &&
860 card->osn_info.assist_cb != NULL) {
861 card->osn_info.assist_cb(card->dev, cmd);
862 goto out;
863 }
864
865 spin_lock_irqsave(&card->lock, flags);
866 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
867 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
868 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
869 qeth_get_reply(reply);
870 list_del_init(&reply->list);
871 spin_unlock_irqrestore(&card->lock, flags);
872 keep_reply = 0;
873 if (reply->callback != NULL) {
874 if (cmd) {
875 reply->offset = (__u16)((char *)cmd -
876 (char *)iob->data);
877 keep_reply = reply->callback(card,
878 reply,
879 (unsigned long)cmd);
880 } else
881 keep_reply = reply->callback(card,
882 reply,
883 (unsigned long)iob);
884 }
885 if (cmd)
886 reply->rc = (u16) cmd->hdr.return_code;
887 else if (iob->rc)
888 reply->rc = iob->rc;
889 if (keep_reply) {
890 spin_lock_irqsave(&card->lock, flags);
891 list_add_tail(&reply->list,
892 &card->cmd_waiter_list);
893 spin_unlock_irqrestore(&card->lock, flags);
894 } else {
895 atomic_inc(&reply->received);
896 wake_up(&reply->wait_q);
897 }
898 qeth_put_reply(reply);
899 goto out;
900 }
901 }
902 spin_unlock_irqrestore(&card->lock, flags);
903out:
904 memcpy(&card->seqno.pdu_hdr_ack,
905 QETH_PDU_HEADER_SEQ_NO(iob->data),
906 QETH_SEQ_NO_LENGTH);
907 qeth_release_buffer(channel, iob);
908}
909
910static int qeth_setup_channel(struct qeth_channel *channel)
911{
912 int cnt;
913
914 QETH_DBF_TEXT(SETUP, 2, "setupch");
915 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
916 channel->iob[cnt].data =
917 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
918 if (channel->iob[cnt].data == NULL)
919 break;
920 channel->iob[cnt].state = BUF_STATE_FREE;
921 channel->iob[cnt].channel = channel;
922 channel->iob[cnt].callback = qeth_send_control_data_cb;
923 channel->iob[cnt].rc = 0;
924 }
925 if (cnt < QETH_CMD_BUFFER_NO) {
926 while (cnt-- > 0)
927 kfree(channel->iob[cnt].data);
928 return -ENOMEM;
929 }
930 channel->buf_no = 0;
931 channel->io_buf_no = 0;
932 atomic_set(&channel->irq_pending, 0);
933 spin_lock_init(&channel->iob_lock);
934
935 init_waitqueue_head(&channel->wait_q);
936 return 0;
937}
938
939static int qeth_set_thread_start_bit(struct qeth_card *card,
940 unsigned long thread)
941{
942 unsigned long flags;
943
944 spin_lock_irqsave(&card->thread_mask_lock, flags);
945 if (!(card->thread_allowed_mask & thread) ||
946 (card->thread_start_mask & thread)) {
947 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
948 return -EPERM;
949 }
950 card->thread_start_mask |= thread;
951 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
952 return 0;
953}
954
955void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
956{
957 unsigned long flags;
958
959 spin_lock_irqsave(&card->thread_mask_lock, flags);
960 card->thread_start_mask &= ~thread;
961 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
962 wake_up(&card->wait_q);
963}
964EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
965
966void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
967{
968 unsigned long flags;
969
970 spin_lock_irqsave(&card->thread_mask_lock, flags);
971 card->thread_running_mask &= ~thread;
972 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
973 wake_up_all(&card->wait_q);
974}
975EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
976
977static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
978{
979 unsigned long flags;
980 int rc = 0;
981
982 spin_lock_irqsave(&card->thread_mask_lock, flags);
983 if (card->thread_start_mask & thread) {
984 if ((card->thread_allowed_mask & thread) &&
985 !(card->thread_running_mask & thread)) {
986 rc = 1;
987 card->thread_start_mask &= ~thread;
988 card->thread_running_mask |= thread;
989 } else
990 rc = -EPERM;
991 }
992 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
993 return rc;
994}
995
996int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
997{
998 int rc = 0;
999
1000 wait_event(card->wait_q,
1001 (rc = __qeth_do_run_thread(card, thread)) >= 0);
1002 return rc;
1003}
1004EXPORT_SYMBOL_GPL(qeth_do_run_thread);
1005
1006void qeth_schedule_recovery(struct qeth_card *card)
1007{
1008 QETH_CARD_TEXT(card, 2, "startrec");
1009 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
1010 schedule_work(&card->kernel_thread_starter);
1011}
1012EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
1013
1014static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
1015{
1016 int dstat, cstat;
1017 char *sense;
1018 struct qeth_card *card;
1019
1020 sense = (char *) irb->ecw;
1021 cstat = irb->scsw.cmd.cstat;
1022 dstat = irb->scsw.cmd.dstat;
1023 card = CARD_FROM_CDEV(cdev);
1024
1025 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1026 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1027 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
1028 QETH_CARD_TEXT(card, 2, "CGENCHK");
1029 dev_warn(&cdev->dev, "The qeth device driver "
1030 "failed to recover an error on the device\n");
1031 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
1032 dev_name(&cdev->dev), dstat, cstat);
1033 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1034 16, 1, irb, 64, 1);
1035 return 1;
1036 }
1037
1038 if (dstat & DEV_STAT_UNIT_CHECK) {
1039 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1040 SENSE_RESETTING_EVENT_FLAG) {
1041 QETH_CARD_TEXT(card, 2, "REVIND");
1042 return 1;
1043 }
1044 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1045 SENSE_COMMAND_REJECT_FLAG) {
1046 QETH_CARD_TEXT(card, 2, "CMDREJi");
1047 return 1;
1048 }
1049 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
1050 QETH_CARD_TEXT(card, 2, "AFFE");
1051 return 1;
1052 }
1053 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
1054 QETH_CARD_TEXT(card, 2, "ZEROSEN");
1055 return 0;
1056 }
1057 QETH_CARD_TEXT(card, 2, "DGENCHK");
1058 return 1;
1059 }
1060 return 0;
1061}
1062
1063static long __qeth_check_irb_error(struct ccw_device *cdev,
1064 unsigned long intparm, struct irb *irb)
1065{
1066 struct qeth_card *card;
1067
1068 card = CARD_FROM_CDEV(cdev);
1069
1070 if (!card || !IS_ERR(irb))
1071 return 0;
1072
1073 switch (PTR_ERR(irb)) {
1074 case -EIO:
1075 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1076 dev_name(&cdev->dev));
1077 QETH_CARD_TEXT(card, 2, "ckirberr");
1078 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
1079 break;
1080 case -ETIMEDOUT:
1081 dev_warn(&cdev->dev, "A hardware operation timed out"
1082 " on the device\n");
1083 QETH_CARD_TEXT(card, 2, "ckirberr");
1084 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
1085 if (intparm == QETH_RCD_PARM) {
1086 if (card->data.ccwdev == cdev) {
1087 card->data.state = CH_STATE_DOWN;
1088 wake_up(&card->wait_q);
1089 }
1090 }
1091 break;
1092 default:
1093 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1094 dev_name(&cdev->dev), PTR_ERR(irb));
1095 QETH_CARD_TEXT(card, 2, "ckirberr");
1096 QETH_CARD_TEXT(card, 2, " rc???");
1097 }
1098 return PTR_ERR(irb);
1099}
1100
1101static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1102 struct irb *irb)
1103{
1104 int rc;
1105 int cstat, dstat;
1106 struct qeth_cmd_buffer *buffer;
1107 struct qeth_channel *channel;
1108 struct qeth_card *card;
1109 struct qeth_cmd_buffer *iob;
1110 __u8 index;
1111
1112 if (__qeth_check_irb_error(cdev, intparm, irb))
1113 return;
1114 cstat = irb->scsw.cmd.cstat;
1115 dstat = irb->scsw.cmd.dstat;
1116
1117 card = CARD_FROM_CDEV(cdev);
1118 if (!card)
1119 return;
1120
1121 QETH_CARD_TEXT(card, 5, "irq");
1122
1123 if (card->read.ccwdev == cdev) {
1124 channel = &card->read;
1125 QETH_CARD_TEXT(card, 5, "read");
1126 } else if (card->write.ccwdev == cdev) {
1127 channel = &card->write;
1128 QETH_CARD_TEXT(card, 5, "write");
1129 } else {
1130 channel = &card->data;
1131 QETH_CARD_TEXT(card, 5, "data");
1132 }
1133 atomic_set(&channel->irq_pending, 0);
1134
1135 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1136 channel->state = CH_STATE_STOPPED;
1137
1138 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1139 channel->state = CH_STATE_HALTED;
1140
1141
1142 if ((channel == &card->data) && (intparm != 0) &&
1143 (intparm != QETH_RCD_PARM))
1144 goto out;
1145
1146 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1147 QETH_CARD_TEXT(card, 6, "clrchpar");
1148
1149 intparm = 0;
1150 }
1151 if (intparm == QETH_HALT_CHANNEL_PARM) {
1152 QETH_CARD_TEXT(card, 6, "hltchpar");
1153
1154 intparm = 0;
1155 }
1156 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1157 (dstat & DEV_STAT_UNIT_CHECK) ||
1158 (cstat)) {
1159 if (irb->esw.esw0.erw.cons) {
1160 dev_warn(&channel->ccwdev->dev,
1161 "The qeth device driver failed to recover "
1162 "an error on the device\n");
1163 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1164 "0x%X dstat 0x%X\n",
1165 dev_name(&channel->ccwdev->dev), cstat, dstat);
1166 print_hex_dump(KERN_WARNING, "qeth: irb ",
1167 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1168 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1169 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1170 }
1171 if (intparm == QETH_RCD_PARM) {
1172 channel->state = CH_STATE_DOWN;
1173 goto out;
1174 }
1175 rc = qeth_get_problem(cdev, irb);
1176 if (rc) {
1177 card->read_or_write_problem = 1;
1178 qeth_clear_ipacmd_list(card);
1179 qeth_schedule_recovery(card);
1180 goto out;
1181 }
1182 }
1183
1184 if (intparm == QETH_RCD_PARM) {
1185 channel->state = CH_STATE_RCD_DONE;
1186 goto out;
1187 }
1188 if (intparm) {
1189 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1190 buffer->state = BUF_STATE_PROCESSED;
1191 }
1192 if (channel == &card->data)
1193 return;
1194 if (channel == &card->read &&
1195 channel->state == CH_STATE_UP)
1196 __qeth_issue_next_read(card);
1197
1198 iob = channel->iob;
1199 index = channel->buf_no;
1200 while (iob[index].state == BUF_STATE_PROCESSED) {
1201 if (iob[index].callback != NULL)
1202 iob[index].callback(channel, iob + index);
1203
1204 index = (index + 1) % QETH_CMD_BUFFER_NO;
1205 }
1206 channel->buf_no = index;
1207out:
1208 wake_up(&card->wait_q);
1209 return;
1210}
1211
1212static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1213 struct qeth_qdio_out_buffer *buf,
1214 enum iucv_tx_notify notification)
1215{
1216 struct sk_buff *skb;
1217
1218 if (skb_queue_empty(&buf->skb_list))
1219 goto out;
1220 skb = skb_peek(&buf->skb_list);
1221 while (skb) {
1222 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1223 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1224 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
1225 if (skb->sk) {
1226 struct iucv_sock *iucv = iucv_sk(skb->sk);
1227 iucv->sk_txnotify(skb, notification);
1228 }
1229 }
1230 if (skb_queue_is_last(&buf->skb_list, skb))
1231 skb = NULL;
1232 else
1233 skb = skb_queue_next(&buf->skb_list, skb);
1234 }
1235out:
1236 return;
1237}
1238
1239static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1240{
1241 struct sk_buff *skb;
1242 struct iucv_sock *iucv;
1243 int notify_general_error = 0;
1244
1245 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1246 notify_general_error = 1;
1247
1248
1249 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1250
1251 skb = skb_dequeue(&buf->skb_list);
1252 while (skb) {
1253 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1254 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1255 if (notify_general_error &&
1256 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
1257 if (skb->sk) {
1258 iucv = iucv_sk(skb->sk);
1259 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1260 }
1261 }
1262 refcount_dec(&skb->users);
1263 dev_kfree_skb_any(skb);
1264 skb = skb_dequeue(&buf->skb_list);
1265 }
1266}
1267
1268static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1269 struct qeth_qdio_out_buffer *buf,
1270 enum qeth_qdio_buffer_states newbufstate)
1271{
1272 int i;
1273
1274
1275 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1276 atomic_dec(&queue->set_pci_flags_count);
1277
1278 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1279 qeth_release_skbs(buf);
1280 }
1281 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1282 if (buf->buffer->element[i].addr && buf->is_header[i])
1283 kmem_cache_free(qeth_core_header_cache,
1284 buf->buffer->element[i].addr);
1285 buf->is_header[i] = 0;
1286 buf->buffer->element[i].length = 0;
1287 buf->buffer->element[i].addr = NULL;
1288 buf->buffer->element[i].eflags = 0;
1289 buf->buffer->element[i].sflags = 0;
1290 }
1291 buf->buffer->element[15].eflags = 0;
1292 buf->buffer->element[15].sflags = 0;
1293 buf->next_element_to_fill = 0;
1294 atomic_set(&buf->state, newbufstate);
1295}
1296
1297static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1298{
1299 int j;
1300
1301 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1302 if (!q->bufs[j])
1303 continue;
1304 qeth_cleanup_handled_pending(q, j, 1);
1305 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1306 if (free) {
1307 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1308 q->bufs[j] = NULL;
1309 }
1310 }
1311}
1312
1313void qeth_clear_qdio_buffers(struct qeth_card *card)
1314{
1315 int i;
1316
1317 QETH_CARD_TEXT(card, 2, "clearqdbf");
1318
1319 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1320 if (card->qdio.out_qs[i]) {
1321 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1322 }
1323 }
1324}
1325EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1326
1327static void qeth_free_buffer_pool(struct qeth_card *card)
1328{
1329 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1330 int i = 0;
1331 list_for_each_entry_safe(pool_entry, tmp,
1332 &card->qdio.init_pool.entry_list, init_list){
1333 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1334 free_page((unsigned long)pool_entry->elements[i]);
1335 list_del(&pool_entry->init_list);
1336 kfree(pool_entry);
1337 }
1338}
1339
1340static void qeth_clean_channel(struct qeth_channel *channel)
1341{
1342 int cnt;
1343
1344 QETH_DBF_TEXT(SETUP, 2, "freech");
1345 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1346 kfree(channel->iob[cnt].data);
1347}
1348
1349static void qeth_set_single_write_queues(struct qeth_card *card)
1350{
1351 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1352 (card->qdio.no_out_queues == 4))
1353 qeth_free_qdio_buffers(card);
1354
1355 card->qdio.no_out_queues = 1;
1356 if (card->qdio.default_out_queue != 0)
1357 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1358
1359 card->qdio.default_out_queue = 0;
1360}
1361
1362static void qeth_set_multiple_write_queues(struct qeth_card *card)
1363{
1364 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1365 (card->qdio.no_out_queues == 1)) {
1366 qeth_free_qdio_buffers(card);
1367 card->qdio.default_out_queue = 2;
1368 }
1369 card->qdio.no_out_queues = 4;
1370}
1371
1372static void qeth_update_from_chp_desc(struct qeth_card *card)
1373{
1374 struct ccw_device *ccwdev;
1375 struct channel_path_desc *chp_dsc;
1376
1377 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1378
1379 ccwdev = card->data.ccwdev;
1380 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1381 if (!chp_dsc)
1382 goto out;
1383
1384 card->info.func_level = 0x4100 + chp_dsc->desc;
1385 if (card->info.type == QETH_CARD_TYPE_IQD)
1386 goto out;
1387
1388
1389 if ((chp_dsc->chpp & 0x02) == 0x02)
1390 qeth_set_single_write_queues(card);
1391 else
1392 qeth_set_multiple_write_queues(card);
1393out:
1394 kfree(chp_dsc);
1395 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1396 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1397}
1398
1399static void qeth_init_qdio_info(struct qeth_card *card)
1400{
1401 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1402 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1403
1404 card->qdio.no_in_queues = 1;
1405 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1406 if (card->info.type == QETH_CARD_TYPE_IQD)
1407 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1408 else
1409 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1410 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1411 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1412 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1413}
1414
1415static void qeth_set_intial_options(struct qeth_card *card)
1416{
1417 card->options.route4.type = NO_ROUTER;
1418 card->options.route6.type = NO_ROUTER;
1419 card->options.fake_broadcast = 0;
1420 card->options.performance_stats = 0;
1421 card->options.rx_sg_cb = QETH_RX_SG_CB;
1422 card->options.isolation = ISOLATION_MODE_NONE;
1423 card->options.cq = QETH_CQ_DISABLED;
1424}
1425
1426static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1427{
1428 unsigned long flags;
1429 int rc = 0;
1430
1431 spin_lock_irqsave(&card->thread_mask_lock, flags);
1432 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1433 (u8) card->thread_start_mask,
1434 (u8) card->thread_allowed_mask,
1435 (u8) card->thread_running_mask);
1436 rc = (card->thread_start_mask & thread);
1437 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1438 return rc;
1439}
1440
1441static void qeth_start_kernel_thread(struct work_struct *work)
1442{
1443 struct task_struct *ts;
1444 struct qeth_card *card = container_of(work, struct qeth_card,
1445 kernel_thread_starter);
1446 QETH_CARD_TEXT(card , 2, "strthrd");
1447
1448 if (card->read.state != CH_STATE_UP &&
1449 card->write.state != CH_STATE_UP)
1450 return;
1451 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1452 ts = kthread_run(card->discipline->recover, (void *)card,
1453 "qeth_recover");
1454 if (IS_ERR(ts)) {
1455 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1456 qeth_clear_thread_running_bit(card,
1457 QETH_RECOVER_THREAD);
1458 }
1459 }
1460}
1461
1462static void qeth_buffer_reclaim_work(struct work_struct *);
1463static int qeth_setup_card(struct qeth_card *card)
1464{
1465
1466 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1467 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1468
1469 card->read.state = CH_STATE_DOWN;
1470 card->write.state = CH_STATE_DOWN;
1471 card->data.state = CH_STATE_DOWN;
1472 card->state = CARD_STATE_DOWN;
1473 card->lan_online = 0;
1474 card->read_or_write_problem = 0;
1475 card->dev = NULL;
1476 spin_lock_init(&card->vlanlock);
1477 spin_lock_init(&card->mclock);
1478 spin_lock_init(&card->lock);
1479 spin_lock_init(&card->ip_lock);
1480 spin_lock_init(&card->thread_mask_lock);
1481 mutex_init(&card->conf_mutex);
1482 mutex_init(&card->discipline_mutex);
1483 card->thread_start_mask = 0;
1484 card->thread_allowed_mask = 0;
1485 card->thread_running_mask = 0;
1486 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1487 INIT_LIST_HEAD(&card->cmd_waiter_list);
1488 init_waitqueue_head(&card->wait_q);
1489
1490 qeth_set_intial_options(card);
1491
1492 INIT_LIST_HEAD(&card->ipato.entries);
1493 card->ipato.enabled = false;
1494 card->ipato.invert4 = false;
1495 card->ipato.invert6 = false;
1496
1497 qeth_init_qdio_info(card);
1498 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1499 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
1500 return 0;
1501}
1502
1503static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1504{
1505 struct qeth_card *card = container_of(slr, struct qeth_card,
1506 qeth_service_level);
1507 if (card->info.mcl_level[0])
1508 seq_printf(m, "qeth: %s firmware level %s\n",
1509 CARD_BUS_ID(card), card->info.mcl_level);
1510}
1511
1512static struct qeth_card *qeth_alloc_card(void)
1513{
1514 struct qeth_card *card;
1515
1516 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1517 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1518 if (!card)
1519 goto out;
1520 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1521 if (qeth_setup_channel(&card->read))
1522 goto out_ip;
1523 if (qeth_setup_channel(&card->write))
1524 goto out_channel;
1525 card->options.layer2 = -1;
1526 card->qeth_service_level.seq_print = qeth_core_sl_print;
1527 register_service_level(&card->qeth_service_level);
1528 return card;
1529
1530out_channel:
1531 qeth_clean_channel(&card->read);
1532out_ip:
1533 kfree(card);
1534out:
1535 return NULL;
1536}
1537
1538static void qeth_determine_card_type(struct qeth_card *card)
1539{
1540 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1541
1542 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1543 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1544 card->info.type = CARD_RDEV(card)->id.driver_info;
1545 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1546 if (card->info.type == QETH_CARD_TYPE_IQD)
1547 card->info.is_multicast_different = 0x0103;
1548 qeth_update_from_chp_desc(card);
1549}
1550
1551static int qeth_clear_channel(struct qeth_channel *channel)
1552{
1553 unsigned long flags;
1554 struct qeth_card *card;
1555 int rc;
1556
1557 card = CARD_FROM_CDEV(channel->ccwdev);
1558 QETH_CARD_TEXT(card, 3, "clearch");
1559 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1560 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1561 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1562
1563 if (rc)
1564 return rc;
1565 rc = wait_event_interruptible_timeout(card->wait_q,
1566 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1567 if (rc == -ERESTARTSYS)
1568 return rc;
1569 if (channel->state != CH_STATE_STOPPED)
1570 return -ETIME;
1571 channel->state = CH_STATE_DOWN;
1572 return 0;
1573}
1574
1575static int qeth_halt_channel(struct qeth_channel *channel)
1576{
1577 unsigned long flags;
1578 struct qeth_card *card;
1579 int rc;
1580
1581 card = CARD_FROM_CDEV(channel->ccwdev);
1582 QETH_CARD_TEXT(card, 3, "haltch");
1583 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1584 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1585 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1586
1587 if (rc)
1588 return rc;
1589 rc = wait_event_interruptible_timeout(card->wait_q,
1590 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1591 if (rc == -ERESTARTSYS)
1592 return rc;
1593 if (channel->state != CH_STATE_HALTED)
1594 return -ETIME;
1595 return 0;
1596}
1597
1598static int qeth_halt_channels(struct qeth_card *card)
1599{
1600 int rc1 = 0, rc2 = 0, rc3 = 0;
1601
1602 QETH_CARD_TEXT(card, 3, "haltchs");
1603 rc1 = qeth_halt_channel(&card->read);
1604 rc2 = qeth_halt_channel(&card->write);
1605 rc3 = qeth_halt_channel(&card->data);
1606 if (rc1)
1607 return rc1;
1608 if (rc2)
1609 return rc2;
1610 return rc3;
1611}
1612
1613static int qeth_clear_channels(struct qeth_card *card)
1614{
1615 int rc1 = 0, rc2 = 0, rc3 = 0;
1616
1617 QETH_CARD_TEXT(card, 3, "clearchs");
1618 rc1 = qeth_clear_channel(&card->read);
1619 rc2 = qeth_clear_channel(&card->write);
1620 rc3 = qeth_clear_channel(&card->data);
1621 if (rc1)
1622 return rc1;
1623 if (rc2)
1624 return rc2;
1625 return rc3;
1626}
1627
1628static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1629{
1630 int rc = 0;
1631
1632 QETH_CARD_TEXT(card, 3, "clhacrd");
1633
1634 if (halt)
1635 rc = qeth_halt_channels(card);
1636 if (rc)
1637 return rc;
1638 return qeth_clear_channels(card);
1639}
1640
1641int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1642{
1643 int rc = 0;
1644
1645 QETH_CARD_TEXT(card, 3, "qdioclr");
1646 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1647 QETH_QDIO_CLEANING)) {
1648 case QETH_QDIO_ESTABLISHED:
1649 if (card->info.type == QETH_CARD_TYPE_IQD)
1650 rc = qdio_shutdown(CARD_DDEV(card),
1651 QDIO_FLAG_CLEANUP_USING_HALT);
1652 else
1653 rc = qdio_shutdown(CARD_DDEV(card),
1654 QDIO_FLAG_CLEANUP_USING_CLEAR);
1655 if (rc)
1656 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1657 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1658 break;
1659 case QETH_QDIO_CLEANING:
1660 return rc;
1661 default:
1662 break;
1663 }
1664 rc = qeth_clear_halt_card(card, use_halt);
1665 if (rc)
1666 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1667 card->state = CARD_STATE_DOWN;
1668 return rc;
1669}
1670EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1671
1672static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1673 int *length)
1674{
1675 struct ciw *ciw;
1676 char *rcd_buf;
1677 int ret;
1678 struct qeth_channel *channel = &card->data;
1679 unsigned long flags;
1680
1681
1682
1683
1684 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1685 if (!ciw || ciw->cmd == 0)
1686 return -EOPNOTSUPP;
1687 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1688 if (!rcd_buf)
1689 return -ENOMEM;
1690
1691 channel->ccw.cmd_code = ciw->cmd;
1692 channel->ccw.cda = (__u32) __pa(rcd_buf);
1693 channel->ccw.count = ciw->count;
1694 channel->ccw.flags = CCW_FLAG_SLI;
1695 channel->state = CH_STATE_RCD;
1696 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1697 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1698 QETH_RCD_PARM, LPM_ANYPATH, 0,
1699 QETH_RCD_TIMEOUT);
1700 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1701 if (!ret)
1702 wait_event(card->wait_q,
1703 (channel->state == CH_STATE_RCD_DONE ||
1704 channel->state == CH_STATE_DOWN));
1705 if (channel->state == CH_STATE_DOWN)
1706 ret = -EIO;
1707 else
1708 channel->state = CH_STATE_DOWN;
1709 if (ret) {
1710 kfree(rcd_buf);
1711 *buffer = NULL;
1712 *length = 0;
1713 } else {
1714 *length = ciw->count;
1715 *buffer = rcd_buf;
1716 }
1717 return ret;
1718}
1719
1720static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1721{
1722 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1723 card->info.chpid = prcd[30];
1724 card->info.unit_addr2 = prcd[31];
1725 card->info.cula = prcd[63];
1726 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1727 (prcd[0x11] == _ascebc['M']));
1728}
1729
1730static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1731{
1732 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1733 struct diag26c_vnic_resp *response = NULL;
1734 struct diag26c_vnic_req *request = NULL;
1735 struct ccw_dev_id id;
1736 char userid[80];
1737 int rc = 0;
1738
1739 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1740
1741 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1742 if (rc)
1743 goto out;
1744
1745 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1746 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1747 if (!request || !response) {
1748 rc = -ENOMEM;
1749 goto out;
1750 }
1751
1752 ccw_device_get_id(CARD_RDEV(card), &id);
1753 request->resp_buf_len = sizeof(*response);
1754 request->resp_version = DIAG26C_VERSION6_VM65918;
1755 request->req_format = DIAG26C_VNIC_INFO;
1756 ASCEBC(userid, 8);
1757 memcpy(&request->sys_name, userid, 8);
1758 request->devno = id.devno;
1759
1760 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1761 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1762 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1763 if (rc)
1764 goto out;
1765 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1766
1767 if (request->resp_buf_len < sizeof(*response) ||
1768 response->version != request->resp_version) {
1769 rc = -EIO;
1770 goto out;
1771 }
1772
1773 if (response->protocol == VNIC_INFO_PROT_L2)
1774 disc = QETH_DISCIPLINE_LAYER2;
1775 else if (response->protocol == VNIC_INFO_PROT_L3)
1776 disc = QETH_DISCIPLINE_LAYER3;
1777
1778out:
1779 kfree(response);
1780 kfree(request);
1781 if (rc)
1782 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1783 return disc;
1784}
1785
1786
1787static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1788{
1789 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1790
1791 if (card->info.type == QETH_CARD_TYPE_OSM ||
1792 card->info.type == QETH_CARD_TYPE_OSN)
1793 disc = QETH_DISCIPLINE_LAYER2;
1794 else if (card->info.guestlan)
1795 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1796 QETH_DISCIPLINE_LAYER3 :
1797 qeth_vm_detect_layer(card);
1798
1799 switch (disc) {
1800 case QETH_DISCIPLINE_LAYER2:
1801 QETH_DBF_TEXT(SETUP, 3, "force l2");
1802 break;
1803 case QETH_DISCIPLINE_LAYER3:
1804 QETH_DBF_TEXT(SETUP, 3, "force l3");
1805 break;
1806 default:
1807 QETH_DBF_TEXT(SETUP, 3, "force no");
1808 }
1809
1810 return disc;
1811}
1812
1813static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1814{
1815 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1816
1817 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1818 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
1819 card->info.blkt.time_total = 0;
1820 card->info.blkt.inter_packet = 0;
1821 card->info.blkt.inter_packet_jumbo = 0;
1822 } else {
1823 card->info.blkt.time_total = 250;
1824 card->info.blkt.inter_packet = 5;
1825 card->info.blkt.inter_packet_jumbo = 15;
1826 }
1827}
1828
1829static void qeth_init_tokens(struct qeth_card *card)
1830{
1831 card->token.issuer_rm_w = 0x00010103UL;
1832 card->token.cm_filter_w = 0x00010108UL;
1833 card->token.cm_connection_w = 0x0001010aUL;
1834 card->token.ulp_filter_w = 0x0001010bUL;
1835 card->token.ulp_connection_w = 0x0001010dUL;
1836}
1837
1838static void qeth_init_func_level(struct qeth_card *card)
1839{
1840 switch (card->info.type) {
1841 case QETH_CARD_TYPE_IQD:
1842 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1843 break;
1844 case QETH_CARD_TYPE_OSD:
1845 case QETH_CARD_TYPE_OSN:
1846 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1847 break;
1848 default:
1849 break;
1850 }
1851}
1852
1853static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1854 void (*idx_reply_cb)(struct qeth_channel *,
1855 struct qeth_cmd_buffer *))
1856{
1857 struct qeth_cmd_buffer *iob;
1858 unsigned long flags;
1859 int rc;
1860 struct qeth_card *card;
1861
1862 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1863 card = CARD_FROM_CDEV(channel->ccwdev);
1864 iob = qeth_get_buffer(channel);
1865 if (!iob)
1866 return -ENOMEM;
1867 iob->callback = idx_reply_cb;
1868 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1869 channel->ccw.count = QETH_BUFSIZE;
1870 channel->ccw.cda = (__u32) __pa(iob->data);
1871
1872 wait_event(card->wait_q,
1873 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1874 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1875 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1876 rc = ccw_device_start(channel->ccwdev,
1877 &channel->ccw, (addr_t) iob, 0, 0);
1878 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1879
1880 if (rc) {
1881 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1882 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1883 atomic_set(&channel->irq_pending, 0);
1884 wake_up(&card->wait_q);
1885 return rc;
1886 }
1887 rc = wait_event_interruptible_timeout(card->wait_q,
1888 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1889 if (rc == -ERESTARTSYS)
1890 return rc;
1891 if (channel->state != CH_STATE_UP) {
1892 rc = -ETIME;
1893 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1894 qeth_clear_cmd_buffers(channel);
1895 } else
1896 rc = 0;
1897 return rc;
1898}
1899
1900static int qeth_idx_activate_channel(struct qeth_channel *channel,
1901 void (*idx_reply_cb)(struct qeth_channel *,
1902 struct qeth_cmd_buffer *))
1903{
1904 struct qeth_card *card;
1905 struct qeth_cmd_buffer *iob;
1906 unsigned long flags;
1907 __u16 temp;
1908 __u8 tmp;
1909 int rc;
1910 struct ccw_dev_id temp_devid;
1911
1912 card = CARD_FROM_CDEV(channel->ccwdev);
1913
1914 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1915
1916 iob = qeth_get_buffer(channel);
1917 if (!iob)
1918 return -ENOMEM;
1919 iob->callback = idx_reply_cb;
1920 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1921 channel->ccw.count = IDX_ACTIVATE_SIZE;
1922 channel->ccw.cda = (__u32) __pa(iob->data);
1923 if (channel == &card->write) {
1924 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1925 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1926 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1927 card->seqno.trans_hdr++;
1928 } else {
1929 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1930 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1931 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1932 }
1933 tmp = ((__u8)card->info.portno) | 0x80;
1934 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1935 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1936 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1937 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1938 &card->info.func_level, sizeof(__u16));
1939 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1940 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1941 temp = (card->info.cula << 8) + card->info.unit_addr2;
1942 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1943
1944 wait_event(card->wait_q,
1945 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1946 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1947 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1948 rc = ccw_device_start(channel->ccwdev,
1949 &channel->ccw, (addr_t) iob, 0, 0);
1950 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1951
1952 if (rc) {
1953 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1954 rc);
1955 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1956 atomic_set(&channel->irq_pending, 0);
1957 wake_up(&card->wait_q);
1958 return rc;
1959 }
1960 rc = wait_event_interruptible_timeout(card->wait_q,
1961 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1962 if (rc == -ERESTARTSYS)
1963 return rc;
1964 if (channel->state != CH_STATE_ACTIVATING) {
1965 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1966 " failed to recover an error on the device\n");
1967 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1968 dev_name(&channel->ccwdev->dev));
1969 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1970 qeth_clear_cmd_buffers(channel);
1971 return -ETIME;
1972 }
1973 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1974}
1975
1976static int qeth_peer_func_level(int level)
1977{
1978 if ((level & 0xff) == 8)
1979 return (level & 0xff) + 0x400;
1980 if (((level >> 8) & 3) == 1)
1981 return (level & 0xff) + 0x200;
1982 return level;
1983}
1984
1985static void qeth_idx_write_cb(struct qeth_channel *channel,
1986 struct qeth_cmd_buffer *iob)
1987{
1988 struct qeth_card *card;
1989 __u16 temp;
1990
1991 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1992
1993 if (channel->state == CH_STATE_DOWN) {
1994 channel->state = CH_STATE_ACTIVATING;
1995 goto out;
1996 }
1997 card = CARD_FROM_CDEV(channel->ccwdev);
1998
1999 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
2000 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
2001 dev_err(&card->write.ccwdev->dev,
2002 "The adapter is used exclusively by another "
2003 "host\n");
2004 else
2005 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
2006 " negative reply\n",
2007 dev_name(&card->write.ccwdev->dev));
2008 goto out;
2009 }
2010 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2011 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
2012 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
2013 "function level mismatch (sent: 0x%x, received: "
2014 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
2015 card->info.func_level, temp);
2016 goto out;
2017 }
2018 channel->state = CH_STATE_UP;
2019out:
2020 qeth_release_buffer(channel, iob);
2021}
2022
2023static void qeth_idx_read_cb(struct qeth_channel *channel,
2024 struct qeth_cmd_buffer *iob)
2025{
2026 struct qeth_card *card;
2027 __u16 temp;
2028
2029 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
2030 if (channel->state == CH_STATE_DOWN) {
2031 channel->state = CH_STATE_ACTIVATING;
2032 goto out;
2033 }
2034
2035 card = CARD_FROM_CDEV(channel->ccwdev);
2036 if (qeth_check_idx_response(card, iob->data))
2037 goto out;
2038
2039 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
2040 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
2041 case QETH_IDX_ACT_ERR_EXCL:
2042 dev_err(&card->write.ccwdev->dev,
2043 "The adapter is used exclusively by another "
2044 "host\n");
2045 break;
2046 case QETH_IDX_ACT_ERR_AUTH:
2047 case QETH_IDX_ACT_ERR_AUTH_USER:
2048 dev_err(&card->read.ccwdev->dev,
2049 "Setting the device online failed because of "
2050 "insufficient authorization\n");
2051 break;
2052 default:
2053 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
2054 " negative reply\n",
2055 dev_name(&card->read.ccwdev->dev));
2056 }
2057 QETH_CARD_TEXT_(card, 2, "idxread%c",
2058 QETH_IDX_ACT_CAUSE_CODE(iob->data));
2059 goto out;
2060 }
2061
2062 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2063 if (temp != qeth_peer_func_level(card->info.func_level)) {
2064 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
2065 "level mismatch (sent: 0x%x, received: 0x%x)\n",
2066 dev_name(&card->read.ccwdev->dev),
2067 card->info.func_level, temp);
2068 goto out;
2069 }
2070 memcpy(&card->token.issuer_rm_r,
2071 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2072 QETH_MPC_TOKEN_LENGTH);
2073 memcpy(&card->info.mcl_level[0],
2074 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2075 channel->state = CH_STATE_UP;
2076out:
2077 qeth_release_buffer(channel, iob);
2078}
2079
2080void qeth_prepare_control_data(struct qeth_card *card, int len,
2081 struct qeth_cmd_buffer *iob)
2082{
2083 qeth_setup_ccw(&card->write, iob->data, len);
2084 iob->callback = qeth_release_buffer;
2085
2086 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2087 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2088 card->seqno.trans_hdr++;
2089 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2090 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2091 card->seqno.pdu_hdr++;
2092 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2093 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
2094 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2095}
2096EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123int qeth_send_control_data(struct qeth_card *card, int len,
2124 struct qeth_cmd_buffer *iob,
2125 int (*reply_cb)(struct qeth_card *cb_card,
2126 struct qeth_reply *cb_reply,
2127 unsigned long cb_cmd),
2128 void *reply_param)
2129{
2130 int rc;
2131 unsigned long flags;
2132 struct qeth_reply *reply = NULL;
2133 unsigned long timeout, event_timeout;
2134 struct qeth_ipa_cmd *cmd = NULL;
2135
2136 QETH_CARD_TEXT(card, 2, "sendctl");
2137
2138 if (card->read_or_write_problem) {
2139 qeth_release_buffer(iob->channel, iob);
2140 return -EIO;
2141 }
2142 reply = qeth_alloc_reply(card);
2143 if (!reply) {
2144 return -ENOMEM;
2145 }
2146 reply->callback = reply_cb;
2147 reply->param = reply_param;
2148
2149 init_waitqueue_head(&reply->wait_q);
2150
2151 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2152
2153 if (IS_IPA(iob->data)) {
2154 cmd = __ipa_cmd(iob);
2155 cmd->hdr.seqno = card->seqno.ipa++;
2156 reply->seqno = cmd->hdr.seqno;
2157 event_timeout = QETH_IPA_TIMEOUT;
2158 } else {
2159 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2160 event_timeout = QETH_TIMEOUT;
2161 }
2162 qeth_prepare_control_data(card, len, iob);
2163
2164 spin_lock_irqsave(&card->lock, flags);
2165 list_add_tail(&reply->list, &card->cmd_waiter_list);
2166 spin_unlock_irqrestore(&card->lock, flags);
2167
2168 timeout = jiffies + event_timeout;
2169
2170 QETH_CARD_TEXT(card, 6, "noirqpnd");
2171 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2172 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2173 (addr_t) iob, 0, 0);
2174 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2175 if (rc) {
2176 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2177 "ccw_device_start rc = %i\n",
2178 dev_name(&card->write.ccwdev->dev), rc);
2179 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2180 spin_lock_irqsave(&card->lock, flags);
2181 list_del_init(&reply->list);
2182 qeth_put_reply(reply);
2183 spin_unlock_irqrestore(&card->lock, flags);
2184 qeth_release_buffer(iob->channel, iob);
2185 atomic_set(&card->write.irq_pending, 0);
2186 wake_up(&card->wait_q);
2187 return rc;
2188 }
2189
2190
2191
2192 if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
2193 cmd->hdr.prot_version == QETH_PROT_IPV4) {
2194 if (!wait_event_timeout(reply->wait_q,
2195 atomic_read(&reply->received), event_timeout))
2196 goto time_err;
2197 } else {
2198 while (!atomic_read(&reply->received)) {
2199 if (time_after(jiffies, timeout))
2200 goto time_err;
2201 cpu_relax();
2202 }
2203 }
2204
2205 if (reply->rc == -EIO)
2206 goto error;
2207 rc = reply->rc;
2208 qeth_put_reply(reply);
2209 return rc;
2210
2211time_err:
2212 reply->rc = -ETIME;
2213 spin_lock_irqsave(&reply->card->lock, flags);
2214 list_del_init(&reply->list);
2215 spin_unlock_irqrestore(&reply->card->lock, flags);
2216 atomic_inc(&reply->received);
2217error:
2218 atomic_set(&card->write.irq_pending, 0);
2219 qeth_release_buffer(iob->channel, iob);
2220 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2221 rc = reply->rc;
2222 qeth_put_reply(reply);
2223 return rc;
2224}
2225EXPORT_SYMBOL_GPL(qeth_send_control_data);
2226
2227static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2228 unsigned long data)
2229{
2230 struct qeth_cmd_buffer *iob;
2231
2232 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2233
2234 iob = (struct qeth_cmd_buffer *) data;
2235 memcpy(&card->token.cm_filter_r,
2236 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2237 QETH_MPC_TOKEN_LENGTH);
2238 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2239 return 0;
2240}
2241
2242static int qeth_cm_enable(struct qeth_card *card)
2243{
2244 int rc;
2245 struct qeth_cmd_buffer *iob;
2246
2247 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2248
2249 iob = qeth_wait_for_buffer(&card->write);
2250 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2251 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2252 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2253 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2254 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2255
2256 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2257 qeth_cm_enable_cb, NULL);
2258 return rc;
2259}
2260
2261static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2262 unsigned long data)
2263{
2264
2265 struct qeth_cmd_buffer *iob;
2266
2267 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2268
2269 iob = (struct qeth_cmd_buffer *) data;
2270 memcpy(&card->token.cm_connection_r,
2271 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2272 QETH_MPC_TOKEN_LENGTH);
2273 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2274 return 0;
2275}
2276
2277static int qeth_cm_setup(struct qeth_card *card)
2278{
2279 int rc;
2280 struct qeth_cmd_buffer *iob;
2281
2282 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2283
2284 iob = qeth_wait_for_buffer(&card->write);
2285 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2286 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2287 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2288 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2289 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2290 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2291 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2292 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2293 qeth_cm_setup_cb, NULL);
2294 return rc;
2295
2296}
2297
2298static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2299{
2300 switch (card->info.type) {
2301 case QETH_CARD_TYPE_IQD:
2302 return card->info.max_mtu;
2303 case QETH_CARD_TYPE_OSD:
2304 case QETH_CARD_TYPE_OSX:
2305 if (!card->options.layer2)
2306 return ETH_DATA_LEN - 8;
2307
2308 default:
2309 return ETH_DATA_LEN;
2310 }
2311}
2312
2313static int qeth_get_mtu_outof_framesize(int framesize)
2314{
2315 switch (framesize) {
2316 case 0x4000:
2317 return 8192;
2318 case 0x6000:
2319 return 16384;
2320 case 0xa000:
2321 return 32768;
2322 case 0xffff:
2323 return 57344;
2324 default:
2325 return 0;
2326 }
2327}
2328
2329static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2330{
2331 switch (card->info.type) {
2332 case QETH_CARD_TYPE_OSD:
2333 case QETH_CARD_TYPE_OSM:
2334 case QETH_CARD_TYPE_OSX:
2335 case QETH_CARD_TYPE_IQD:
2336 return ((mtu >= 576) &&
2337 (mtu <= card->info.max_mtu));
2338 case QETH_CARD_TYPE_OSN:
2339 default:
2340 return 1;
2341 }
2342}
2343
2344static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2345 unsigned long data)
2346{
2347
2348 __u16 mtu, framesize;
2349 __u16 len;
2350 __u8 link_type;
2351 struct qeth_cmd_buffer *iob;
2352
2353 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2354
2355 iob = (struct qeth_cmd_buffer *) data;
2356 memcpy(&card->token.ulp_filter_r,
2357 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2358 QETH_MPC_TOKEN_LENGTH);
2359 if (card->info.type == QETH_CARD_TYPE_IQD) {
2360 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2361 mtu = qeth_get_mtu_outof_framesize(framesize);
2362 if (!mtu) {
2363 iob->rc = -EINVAL;
2364 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2365 return 0;
2366 }
2367 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2368
2369 if (card->dev &&
2370 ((card->dev->mtu == card->info.initial_mtu) ||
2371 (card->dev->mtu > mtu)))
2372 card->dev->mtu = mtu;
2373 qeth_free_qdio_buffers(card);
2374 }
2375 card->info.initial_mtu = mtu;
2376 card->info.max_mtu = mtu;
2377 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2378 } else {
2379 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2380 iob->data);
2381 card->info.initial_mtu = min(card->info.max_mtu,
2382 qeth_get_initial_mtu_for_card(card));
2383 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2384 }
2385
2386 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2387 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2388 memcpy(&link_type,
2389 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2390 card->info.link_type = link_type;
2391 } else
2392 card->info.link_type = 0;
2393 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2394 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2395 return 0;
2396}
2397
2398static int qeth_ulp_enable(struct qeth_card *card)
2399{
2400 int rc;
2401 char prot_type;
2402 struct qeth_cmd_buffer *iob;
2403
2404
2405 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2406
2407 iob = qeth_wait_for_buffer(&card->write);
2408 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2409
2410 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2411 (__u8) card->info.portno;
2412 if (card->options.layer2)
2413 if (card->info.type == QETH_CARD_TYPE_OSN)
2414 prot_type = QETH_PROT_OSN2;
2415 else
2416 prot_type = QETH_PROT_LAYER2;
2417 else
2418 prot_type = QETH_PROT_TCPIP;
2419
2420 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2421 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2422 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2423 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2424 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2425 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2426 qeth_ulp_enable_cb, NULL);
2427 return rc;
2428
2429}
2430
2431static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2432 unsigned long data)
2433{
2434 struct qeth_cmd_buffer *iob;
2435
2436 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2437
2438 iob = (struct qeth_cmd_buffer *) data;
2439 memcpy(&card->token.ulp_connection_r,
2440 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2441 QETH_MPC_TOKEN_LENGTH);
2442 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2443 3)) {
2444 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2445 dev_err(&card->gdev->dev, "A connection could not be "
2446 "established because of an OLM limit\n");
2447 iob->rc = -EMLINK;
2448 }
2449 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2450 return 0;
2451}
2452
2453static int qeth_ulp_setup(struct qeth_card *card)
2454{
2455 int rc;
2456 __u16 temp;
2457 struct qeth_cmd_buffer *iob;
2458 struct ccw_dev_id dev_id;
2459
2460 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2461
2462 iob = qeth_wait_for_buffer(&card->write);
2463 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2464
2465 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2466 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2467 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2468 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2469 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2470 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2471
2472 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2473 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2474 temp = (card->info.cula << 8) + card->info.unit_addr2;
2475 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2476 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2477 qeth_ulp_setup_cb, NULL);
2478 return rc;
2479}
2480
2481static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2482{
2483 int rc;
2484 struct qeth_qdio_out_buffer *newbuf;
2485
2486 rc = 0;
2487 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2488 if (!newbuf) {
2489 rc = -ENOMEM;
2490 goto out;
2491 }
2492 newbuf->buffer = q->qdio_bufs[bidx];
2493 skb_queue_head_init(&newbuf->skb_list);
2494 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2495 newbuf->q = q;
2496 newbuf->aob = NULL;
2497 newbuf->next_pending = q->bufs[bidx];
2498 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2499 q->bufs[bidx] = newbuf;
2500 if (q->bufstates) {
2501 q->bufstates[bidx].user = newbuf;
2502 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2503 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2504 QETH_CARD_TEXT_(q->card, 2, "%lx",
2505 (long) newbuf->next_pending);
2506 }
2507out:
2508 return rc;
2509}
2510
2511static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2512{
2513 if (!q)
2514 return;
2515
2516 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2517 kfree(q);
2518}
2519
2520static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2521{
2522 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2523
2524 if (!q)
2525 return NULL;
2526
2527 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2528 kfree(q);
2529 return NULL;
2530 }
2531 return q;
2532}
2533
2534static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2535{
2536 int i, j;
2537
2538 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2539
2540 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2541 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2542 return 0;
2543
2544 QETH_DBF_TEXT(SETUP, 2, "inq");
2545 card->qdio.in_q = qeth_alloc_qdio_queue();
2546 if (!card->qdio.in_q)
2547 goto out_nomem;
2548
2549
2550 if (qeth_alloc_buffer_pool(card))
2551 goto out_freeinq;
2552
2553
2554 card->qdio.out_qs =
2555 kzalloc(card->qdio.no_out_queues *
2556 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2557 if (!card->qdio.out_qs)
2558 goto out_freepool;
2559 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2560 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
2561 if (!card->qdio.out_qs[i])
2562 goto out_freeoutq;
2563 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2564 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2565 card->qdio.out_qs[i]->queue_no = i;
2566
2567 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2568 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2569 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2570 goto out_freeoutqbufs;
2571 }
2572 }
2573
2574
2575 if (qeth_alloc_cq(card))
2576 goto out_freeoutq;
2577
2578 return 0;
2579
2580out_freeoutqbufs:
2581 while (j > 0) {
2582 --j;
2583 kmem_cache_free(qeth_qdio_outbuf_cache,
2584 card->qdio.out_qs[i]->bufs[j]);
2585 card->qdio.out_qs[i]->bufs[j] = NULL;
2586 }
2587out_freeoutq:
2588 while (i > 0) {
2589 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
2590 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2591 }
2592 kfree(card->qdio.out_qs);
2593 card->qdio.out_qs = NULL;
2594out_freepool:
2595 qeth_free_buffer_pool(card);
2596out_freeinq:
2597 qeth_free_qdio_queue(card->qdio.in_q);
2598 card->qdio.in_q = NULL;
2599out_nomem:
2600 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2601 return -ENOMEM;
2602}
2603
2604static void qeth_free_qdio_buffers(struct qeth_card *card)
2605{
2606 int i, j;
2607
2608 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2609 QETH_QDIO_UNINITIALIZED)
2610 return;
2611
2612 qeth_free_cq(card);
2613 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2614 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2615 if (card->qdio.in_q->bufs[j].rx_skb)
2616 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2617 }
2618 qeth_free_qdio_queue(card->qdio.in_q);
2619 card->qdio.in_q = NULL;
2620
2621 qeth_free_buffer_pool(card);
2622
2623 if (card->qdio.out_qs) {
2624 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2625 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2626 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2627 }
2628 kfree(card->qdio.out_qs);
2629 card->qdio.out_qs = NULL;
2630 }
2631}
2632
2633static void qeth_create_qib_param_field(struct qeth_card *card,
2634 char *param_field)
2635{
2636
2637 param_field[0] = _ascebc['P'];
2638 param_field[1] = _ascebc['C'];
2639 param_field[2] = _ascebc['I'];
2640 param_field[3] = _ascebc['T'];
2641 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2642 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2643 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2644}
2645
2646static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2647 char *param_field)
2648{
2649 param_field[16] = _ascebc['B'];
2650 param_field[17] = _ascebc['L'];
2651 param_field[18] = _ascebc['K'];
2652 param_field[19] = _ascebc['T'];
2653 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2654 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2655 *((unsigned int *) (¶m_field[28])) =
2656 card->info.blkt.inter_packet_jumbo;
2657}
2658
2659static int qeth_qdio_activate(struct qeth_card *card)
2660{
2661 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2662 return qdio_activate(CARD_DDEV(card));
2663}
2664
2665static int qeth_dm_act(struct qeth_card *card)
2666{
2667 int rc;
2668 struct qeth_cmd_buffer *iob;
2669
2670 QETH_DBF_TEXT(SETUP, 2, "dmact");
2671
2672 iob = qeth_wait_for_buffer(&card->write);
2673 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2674
2675 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2676 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2677 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2678 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2679 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2680 return rc;
2681}
2682
2683static int qeth_mpc_initialize(struct qeth_card *card)
2684{
2685 int rc;
2686
2687 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2688
2689 rc = qeth_issue_next_read(card);
2690 if (rc) {
2691 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2692 return rc;
2693 }
2694 rc = qeth_cm_enable(card);
2695 if (rc) {
2696 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2697 goto out_qdio;
2698 }
2699 rc = qeth_cm_setup(card);
2700 if (rc) {
2701 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2702 goto out_qdio;
2703 }
2704 rc = qeth_ulp_enable(card);
2705 if (rc) {
2706 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2707 goto out_qdio;
2708 }
2709 rc = qeth_ulp_setup(card);
2710 if (rc) {
2711 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2712 goto out_qdio;
2713 }
2714 rc = qeth_alloc_qdio_buffers(card);
2715 if (rc) {
2716 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2717 goto out_qdio;
2718 }
2719 rc = qeth_qdio_establish(card);
2720 if (rc) {
2721 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2722 qeth_free_qdio_buffers(card);
2723 goto out_qdio;
2724 }
2725 rc = qeth_qdio_activate(card);
2726 if (rc) {
2727 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2728 goto out_qdio;
2729 }
2730 rc = qeth_dm_act(card);
2731 if (rc) {
2732 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2733 goto out_qdio;
2734 }
2735
2736 return 0;
2737out_qdio:
2738 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2739 qdio_free(CARD_DDEV(card));
2740 return rc;
2741}
2742
2743void qeth_print_status_message(struct qeth_card *card)
2744{
2745 switch (card->info.type) {
2746 case QETH_CARD_TYPE_OSD:
2747 case QETH_CARD_TYPE_OSM:
2748 case QETH_CARD_TYPE_OSX:
2749
2750
2751
2752
2753 if (!card->info.mcl_level[0]) {
2754 sprintf(card->info.mcl_level, "%02x%02x",
2755 card->info.mcl_level[2],
2756 card->info.mcl_level[3]);
2757 break;
2758 }
2759
2760 case QETH_CARD_TYPE_IQD:
2761 if ((card->info.guestlan) ||
2762 (card->info.mcl_level[0] & 0x80)) {
2763 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2764 card->info.mcl_level[0]];
2765 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2766 card->info.mcl_level[1]];
2767 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2768 card->info.mcl_level[2]];
2769 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2770 card->info.mcl_level[3]];
2771 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2772 }
2773 break;
2774 default:
2775 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2776 }
2777 dev_info(&card->gdev->dev,
2778 "Device is a%s card%s%s%s\nwith link type %s.\n",
2779 qeth_get_cardname(card),
2780 (card->info.mcl_level[0]) ? " (level: " : "",
2781 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2782 (card->info.mcl_level[0]) ? ")" : "",
2783 qeth_get_cardname_short(card));
2784}
2785EXPORT_SYMBOL_GPL(qeth_print_status_message);
2786
2787static void qeth_initialize_working_pool_list(struct qeth_card *card)
2788{
2789 struct qeth_buffer_pool_entry *entry;
2790
2791 QETH_CARD_TEXT(card, 5, "inwrklst");
2792
2793 list_for_each_entry(entry,
2794 &card->qdio.init_pool.entry_list, init_list) {
2795 qeth_put_buffer_pool_entry(card, entry);
2796 }
2797}
2798
2799static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2800 struct qeth_card *card)
2801{
2802 struct list_head *plh;
2803 struct qeth_buffer_pool_entry *entry;
2804 int i, free;
2805 struct page *page;
2806
2807 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2808 return NULL;
2809
2810 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2811 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2812 free = 1;
2813 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2814 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2815 free = 0;
2816 break;
2817 }
2818 }
2819 if (free) {
2820 list_del_init(&entry->list);
2821 return entry;
2822 }
2823 }
2824
2825
2826 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2827 struct qeth_buffer_pool_entry, list);
2828 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2829 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2830 page = alloc_page(GFP_ATOMIC);
2831 if (!page) {
2832 return NULL;
2833 } else {
2834 free_page((unsigned long)entry->elements[i]);
2835 entry->elements[i] = page_address(page);
2836 if (card->options.performance_stats)
2837 card->perf_stats.sg_alloc_page_rx++;
2838 }
2839 }
2840 }
2841 list_del_init(&entry->list);
2842 return entry;
2843}
2844
2845static int qeth_init_input_buffer(struct qeth_card *card,
2846 struct qeth_qdio_buffer *buf)
2847{
2848 struct qeth_buffer_pool_entry *pool_entry;
2849 int i;
2850
2851 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2852 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2853 if (!buf->rx_skb)
2854 return 1;
2855 }
2856
2857 pool_entry = qeth_find_free_buffer_pool_entry(card);
2858 if (!pool_entry)
2859 return 1;
2860
2861
2862
2863
2864
2865
2866
2867
2868 buf->pool_entry = pool_entry;
2869 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2870 buf->buffer->element[i].length = PAGE_SIZE;
2871 buf->buffer->element[i].addr = pool_entry->elements[i];
2872 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2873 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2874 else
2875 buf->buffer->element[i].eflags = 0;
2876 buf->buffer->element[i].sflags = 0;
2877 }
2878 return 0;
2879}
2880
2881int qeth_init_qdio_queues(struct qeth_card *card)
2882{
2883 int i, j;
2884 int rc;
2885
2886 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2887
2888
2889 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2890 QDIO_MAX_BUFFERS_PER_Q);
2891 qeth_initialize_working_pool_list(card);
2892
2893 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2894 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2895 card->qdio.in_q->next_buf_to_init =
2896 card->qdio.in_buf_pool.buf_count - 1;
2897 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2898 card->qdio.in_buf_pool.buf_count - 1);
2899 if (rc) {
2900 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2901 return rc;
2902 }
2903
2904
2905 rc = qeth_cq_init(card);
2906 if (rc) {
2907 return rc;
2908 }
2909
2910
2911 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2912 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2913 QDIO_MAX_BUFFERS_PER_Q);
2914 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2915 qeth_clear_output_buffer(card->qdio.out_qs[i],
2916 card->qdio.out_qs[i]->bufs[j],
2917 QETH_QDIO_BUF_EMPTY);
2918 }
2919 card->qdio.out_qs[i]->card = card;
2920 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2921 card->qdio.out_qs[i]->do_pack = 0;
2922 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2923 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2924 atomic_set(&card->qdio.out_qs[i]->state,
2925 QETH_OUT_Q_UNLOCKED);
2926 }
2927 return 0;
2928}
2929EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2930
2931static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2932{
2933 switch (link_type) {
2934 case QETH_LINK_TYPE_HSTR:
2935 return 2;
2936 default:
2937 return 1;
2938 }
2939}
2940
2941static void qeth_fill_ipacmd_header(struct qeth_card *card,
2942 struct qeth_ipa_cmd *cmd, __u8 command,
2943 enum qeth_prot_versions prot)
2944{
2945 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2946 cmd->hdr.command = command;
2947 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2948
2949 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2950 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2951 if (card->options.layer2)
2952 cmd->hdr.prim_version_no = 2;
2953 else
2954 cmd->hdr.prim_version_no = 1;
2955 cmd->hdr.param_count = 1;
2956 cmd->hdr.prot_version = prot;
2957 cmd->hdr.ipa_supported = 0;
2958 cmd->hdr.ipa_enabled = 0;
2959}
2960
2961struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2962 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2963{
2964 struct qeth_cmd_buffer *iob;
2965 struct qeth_ipa_cmd *cmd;
2966
2967 iob = qeth_get_buffer(&card->write);
2968 if (iob) {
2969 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2970 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2971 } else {
2972 dev_warn(&card->gdev->dev,
2973 "The qeth driver ran out of channel command buffers\n");
2974 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2975 dev_name(&card->gdev->dev));
2976 }
2977
2978 return iob;
2979}
2980EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2981
2982void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2983 char prot_type)
2984{
2985 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2986 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2987 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2988 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2989}
2990EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2991
2992
2993
2994
2995
2996
2997
2998int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2999 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
3000 unsigned long),
3001 void *reply_param)
3002{
3003 int rc;
3004 char prot_type;
3005
3006 QETH_CARD_TEXT(card, 4, "sendipa");
3007
3008 if (card->options.layer2)
3009 if (card->info.type == QETH_CARD_TYPE_OSN)
3010 prot_type = QETH_PROT_OSN2;
3011 else
3012 prot_type = QETH_PROT_LAYER2;
3013 else
3014 prot_type = QETH_PROT_TCPIP;
3015 qeth_prepare_ipa_cmd(card, iob, prot_type);
3016 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
3017 iob, reply_cb, reply_param);
3018 if (rc == -ETIME) {
3019 qeth_clear_ipacmd_list(card);
3020 qeth_schedule_recovery(card);
3021 }
3022 return rc;
3023}
3024EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
3025
3026static int qeth_send_startlan(struct qeth_card *card)
3027{
3028 int rc;
3029 struct qeth_cmd_buffer *iob;
3030
3031 QETH_DBF_TEXT(SETUP, 2, "strtlan");
3032
3033 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
3034 if (!iob)
3035 return -ENOMEM;
3036 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
3037 return rc;
3038}
3039
3040static int qeth_default_setadapterparms_cb(struct qeth_card *card,
3041 struct qeth_reply *reply, unsigned long data)
3042{
3043 struct qeth_ipa_cmd *cmd;
3044
3045 QETH_CARD_TEXT(card, 4, "defadpcb");
3046
3047 cmd = (struct qeth_ipa_cmd *) data;
3048 if (cmd->hdr.return_code == 0)
3049 cmd->hdr.return_code =
3050 cmd->data.setadapterparms.hdr.return_code;
3051 return 0;
3052}
3053
3054static int qeth_query_setadapterparms_cb(struct qeth_card *card,
3055 struct qeth_reply *reply, unsigned long data)
3056{
3057 struct qeth_ipa_cmd *cmd;
3058
3059 QETH_CARD_TEXT(card, 3, "quyadpcb");
3060
3061 cmd = (struct qeth_ipa_cmd *) data;
3062 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
3063 card->info.link_type =
3064 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
3065 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
3066 }
3067 card->options.adp.supported_funcs =
3068 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
3069 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3070}
3071
3072static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
3073 __u32 command, __u32 cmdlen)
3074{
3075 struct qeth_cmd_buffer *iob;
3076 struct qeth_ipa_cmd *cmd;
3077
3078 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3079 QETH_PROT_IPV4);
3080 if (iob) {
3081 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3082 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3083 cmd->data.setadapterparms.hdr.command_code = command;
3084 cmd->data.setadapterparms.hdr.used_total = 1;
3085 cmd->data.setadapterparms.hdr.seq_no = 1;
3086 }
3087
3088 return iob;
3089}
3090
3091int qeth_query_setadapterparms(struct qeth_card *card)
3092{
3093 int rc;
3094 struct qeth_cmd_buffer *iob;
3095
3096 QETH_CARD_TEXT(card, 3, "queryadp");
3097 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3098 sizeof(struct qeth_ipacmd_setadpparms));
3099 if (!iob)
3100 return -ENOMEM;
3101 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3102 return rc;
3103}
3104EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3105
3106static int qeth_query_ipassists_cb(struct qeth_card *card,
3107 struct qeth_reply *reply, unsigned long data)
3108{
3109 struct qeth_ipa_cmd *cmd;
3110
3111 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3112
3113 cmd = (struct qeth_ipa_cmd *) data;
3114
3115 switch (cmd->hdr.return_code) {
3116 case IPA_RC_NOTSUPP:
3117 case IPA_RC_L2_UNSUPPORTED_CMD:
3118 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3119 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3120 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3121 return -0;
3122 default:
3123 if (cmd->hdr.return_code) {
3124 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3125 "rc=%d\n",
3126 dev_name(&card->gdev->dev),
3127 cmd->hdr.return_code);
3128 return 0;
3129 }
3130 }
3131
3132 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3133 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3134 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
3135 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
3136 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3137 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
3138 } else
3139 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3140 "\n", dev_name(&card->gdev->dev));
3141 return 0;
3142}
3143
3144int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3145{
3146 int rc;
3147 struct qeth_cmd_buffer *iob;
3148
3149 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3150 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3151 if (!iob)
3152 return -ENOMEM;
3153 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3154 return rc;
3155}
3156EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3157
3158static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3159 struct qeth_reply *reply, unsigned long data)
3160{
3161 struct qeth_ipa_cmd *cmd;
3162 struct qeth_switch_info *sw_info;
3163 struct qeth_query_switch_attributes *attrs;
3164
3165 QETH_CARD_TEXT(card, 2, "qswiatcb");
3166 cmd = (struct qeth_ipa_cmd *) data;
3167 sw_info = (struct qeth_switch_info *)reply->param;
3168 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3169 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3170 sw_info->capabilities = attrs->capabilities;
3171 sw_info->settings = attrs->settings;
3172 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3173 sw_info->settings);
3174 }
3175 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3176
3177 return 0;
3178}
3179
3180int qeth_query_switch_attributes(struct qeth_card *card,
3181 struct qeth_switch_info *sw_info)
3182{
3183 struct qeth_cmd_buffer *iob;
3184
3185 QETH_CARD_TEXT(card, 2, "qswiattr");
3186 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3187 return -EOPNOTSUPP;
3188 if (!netif_carrier_ok(card->dev))
3189 return -ENOMEDIUM;
3190 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3191 sizeof(struct qeth_ipacmd_setadpparms_hdr));
3192 if (!iob)
3193 return -ENOMEM;
3194 return qeth_send_ipa_cmd(card, iob,
3195 qeth_query_switch_attributes_cb, sw_info);
3196}
3197EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3198
3199static int qeth_query_setdiagass_cb(struct qeth_card *card,
3200 struct qeth_reply *reply, unsigned long data)
3201{
3202 struct qeth_ipa_cmd *cmd;
3203 __u16 rc;
3204
3205 cmd = (struct qeth_ipa_cmd *)data;
3206 rc = cmd->hdr.return_code;
3207 if (rc)
3208 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3209 else
3210 card->info.diagass_support = cmd->data.diagass.ext;
3211 return 0;
3212}
3213
3214static int qeth_query_setdiagass(struct qeth_card *card)
3215{
3216 struct qeth_cmd_buffer *iob;
3217 struct qeth_ipa_cmd *cmd;
3218
3219 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3220 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3221 if (!iob)
3222 return -ENOMEM;
3223 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3224 cmd->data.diagass.subcmd_len = 16;
3225 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3226 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3227}
3228
3229static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3230{
3231 unsigned long info = get_zeroed_page(GFP_KERNEL);
3232 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3233 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3234 struct ccw_dev_id ccwid;
3235 int level;
3236
3237 tid->chpid = card->info.chpid;
3238 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3239 tid->ssid = ccwid.ssid;
3240 tid->devno = ccwid.devno;
3241 if (!info)
3242 return;
3243 level = stsi(NULL, 0, 0, 0);
3244 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3245 tid->lparnr = info222->lpar_number;
3246 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3247 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3248 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3249 }
3250 free_page(info);
3251 return;
3252}
3253
3254static int qeth_hw_trap_cb(struct qeth_card *card,
3255 struct qeth_reply *reply, unsigned long data)
3256{
3257 struct qeth_ipa_cmd *cmd;
3258 __u16 rc;
3259
3260 cmd = (struct qeth_ipa_cmd *)data;
3261 rc = cmd->hdr.return_code;
3262 if (rc)
3263 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3264 return 0;
3265}
3266
3267int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3268{
3269 struct qeth_cmd_buffer *iob;
3270 struct qeth_ipa_cmd *cmd;
3271
3272 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3273 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3274 if (!iob)
3275 return -ENOMEM;
3276 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3277 cmd->data.diagass.subcmd_len = 80;
3278 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3279 cmd->data.diagass.type = 1;
3280 cmd->data.diagass.action = action;
3281 switch (action) {
3282 case QETH_DIAGS_TRAP_ARM:
3283 cmd->data.diagass.options = 0x0003;
3284 cmd->data.diagass.ext = 0x00010000 +
3285 sizeof(struct qeth_trap_id);
3286 qeth_get_trap_id(card,
3287 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3288 break;
3289 case QETH_DIAGS_TRAP_DISARM:
3290 cmd->data.diagass.options = 0x0001;
3291 break;
3292 case QETH_DIAGS_TRAP_CAPTURE:
3293 break;
3294 }
3295 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3296}
3297EXPORT_SYMBOL_GPL(qeth_hw_trap);
3298
3299static int qeth_check_qdio_errors(struct qeth_card *card,
3300 struct qdio_buffer *buf,
3301 unsigned int qdio_error,
3302 const char *dbftext)
3303{
3304 if (qdio_error) {
3305 QETH_CARD_TEXT(card, 2, dbftext);
3306 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3307 buf->element[15].sflags);
3308 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3309 buf->element[14].sflags);
3310 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3311 if ((buf->element[15].sflags) == 0x12) {
3312 card->stats.rx_dropped++;
3313 return 0;
3314 } else
3315 return 1;
3316 }
3317 return 0;
3318}
3319
3320static void qeth_queue_input_buffer(struct qeth_card *card, int index)
3321{
3322 struct qeth_qdio_q *queue = card->qdio.in_q;
3323 struct list_head *lh;
3324 int count;
3325 int i;
3326 int rc;
3327 int newcount = 0;
3328
3329 count = (index < queue->next_buf_to_init)?
3330 card->qdio.in_buf_pool.buf_count -
3331 (queue->next_buf_to_init - index) :
3332 card->qdio.in_buf_pool.buf_count -
3333 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3334
3335 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3336 for (i = queue->next_buf_to_init;
3337 i < queue->next_buf_to_init + count; ++i) {
3338 if (qeth_init_input_buffer(card,
3339 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3340 break;
3341 } else {
3342 newcount++;
3343 }
3344 }
3345
3346 if (newcount < count) {
3347
3348
3349 atomic_set(&card->force_alloc_skb, 3);
3350 count = newcount;
3351 } else {
3352 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3353 }
3354
3355 if (!count) {
3356 i = 0;
3357 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3358 i++;
3359 if (i == card->qdio.in_buf_pool.buf_count) {
3360 QETH_CARD_TEXT(card, 2, "qsarbw");
3361 card->reclaim_index = index;
3362 schedule_delayed_work(
3363 &card->buffer_reclaim_work,
3364 QETH_RECLAIM_WORK_TIME);
3365 }
3366 return;
3367 }
3368
3369
3370
3371
3372
3373
3374
3375
3376 if (card->options.performance_stats) {
3377 card->perf_stats.inbound_do_qdio_cnt++;
3378 card->perf_stats.inbound_do_qdio_start_time =
3379 qeth_get_micros();
3380 }
3381 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3382 queue->next_buf_to_init, count);
3383 if (card->options.performance_stats)
3384 card->perf_stats.inbound_do_qdio_time +=
3385 qeth_get_micros() -
3386 card->perf_stats.inbound_do_qdio_start_time;
3387 if (rc) {
3388 QETH_CARD_TEXT(card, 2, "qinberr");
3389 }
3390 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3391 QDIO_MAX_BUFFERS_PER_Q;
3392 }
3393}
3394
3395static void qeth_buffer_reclaim_work(struct work_struct *work)
3396{
3397 struct qeth_card *card = container_of(work, struct qeth_card,
3398 buffer_reclaim_work.work);
3399
3400 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3401 qeth_queue_input_buffer(card, card->reclaim_index);
3402}
3403
3404static void qeth_handle_send_error(struct qeth_card *card,
3405 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3406{
3407 int sbalf15 = buffer->buffer->element[15].sflags;
3408
3409 QETH_CARD_TEXT(card, 6, "hdsnderr");
3410 if (card->info.type == QETH_CARD_TYPE_IQD) {
3411 if (sbalf15 == 0) {
3412 qdio_err = 0;
3413 } else {
3414 qdio_err = 1;
3415 }
3416 }
3417 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3418
3419 if (!qdio_err)
3420 return;
3421
3422 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3423 return;
3424
3425 QETH_CARD_TEXT(card, 1, "lnkfail");
3426 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3427 (u16)qdio_err, (u8)sbalf15);
3428}
3429
3430
3431
3432
3433
3434
3435
3436static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3437{
3438 struct qeth_qdio_out_buffer *buffer;
3439
3440 buffer = queue->bufs[queue->next_buf_to_fill];
3441 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3442 (buffer->next_element_to_fill > 0)) {
3443
3444 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3445 queue->next_buf_to_fill =
3446 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3447 return 1;
3448 }
3449 return 0;
3450}
3451
3452
3453
3454
3455
3456static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3457{
3458 if (!queue->do_pack) {
3459 if (atomic_read(&queue->used_buffers)
3460 >= QETH_HIGH_WATERMARK_PACK){
3461
3462 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3463 if (queue->card->options.performance_stats)
3464 queue->card->perf_stats.sc_dp_p++;
3465 queue->do_pack = 1;
3466 }
3467 }
3468}
3469
3470
3471
3472
3473
3474
3475
3476static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3477{
3478 if (queue->do_pack) {
3479 if (atomic_read(&queue->used_buffers)
3480 <= QETH_LOW_WATERMARK_PACK) {
3481
3482 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3483 if (queue->card->options.performance_stats)
3484 queue->card->perf_stats.sc_p_dp++;
3485 queue->do_pack = 0;
3486 return qeth_prep_flush_pack_buffer(queue);
3487 }
3488 }
3489 return 0;
3490}
3491
3492static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3493 int count)
3494{
3495 struct qeth_qdio_out_buffer *buf;
3496 int rc;
3497 int i;
3498 unsigned int qdio_flags;
3499
3500 for (i = index; i < index + count; ++i) {
3501 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3502 buf = queue->bufs[bidx];
3503 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3504 SBAL_EFLAGS_LAST_ENTRY;
3505
3506 if (queue->bufstates)
3507 queue->bufstates[bidx].user = buf;
3508
3509 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3510 continue;
3511
3512 if (!queue->do_pack) {
3513 if ((atomic_read(&queue->used_buffers) >=
3514 (QETH_HIGH_WATERMARK_PACK -
3515 QETH_WATERMARK_PACK_FUZZ)) &&
3516 !atomic_read(&queue->set_pci_flags_count)) {
3517
3518
3519 atomic_inc(&queue->set_pci_flags_count);
3520 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3521 }
3522 } else {
3523 if (!atomic_read(&queue->set_pci_flags_count)) {
3524
3525
3526
3527
3528
3529
3530
3531
3532 atomic_inc(&queue->set_pci_flags_count);
3533 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3534 }
3535 }
3536 }
3537
3538 netif_trans_update(queue->card->dev);
3539 if (queue->card->options.performance_stats) {
3540 queue->card->perf_stats.outbound_do_qdio_cnt++;
3541 queue->card->perf_stats.outbound_do_qdio_start_time =
3542 qeth_get_micros();
3543 }
3544 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3545 if (atomic_read(&queue->set_pci_flags_count))
3546 qdio_flags |= QDIO_FLAG_PCI_OUT;
3547 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3548 queue->queue_no, index, count);
3549 if (queue->card->options.performance_stats)
3550 queue->card->perf_stats.outbound_do_qdio_time +=
3551 qeth_get_micros() -
3552 queue->card->perf_stats.outbound_do_qdio_start_time;
3553 atomic_add(count, &queue->used_buffers);
3554 if (rc) {
3555 queue->card->stats.tx_errors += count;
3556
3557 if (rc == -ENOBUFS)
3558 return;
3559 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3560 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3561 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3562 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3563 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3564
3565
3566
3567 qeth_schedule_recovery(queue->card);
3568 return;
3569 }
3570 if (queue->card->options.performance_stats)
3571 queue->card->perf_stats.bufs_sent += count;
3572}
3573
3574static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3575{
3576 int index;
3577 int flush_cnt = 0;
3578 int q_was_packing = 0;
3579
3580
3581
3582
3583
3584 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3585 !atomic_read(&queue->set_pci_flags_count)) {
3586 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3587 QETH_OUT_Q_UNLOCKED) {
3588
3589
3590
3591
3592
3593 netif_stop_queue(queue->card->dev);
3594 index = queue->next_buf_to_fill;
3595 q_was_packing = queue->do_pack;
3596
3597 barrier();
3598 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3599 if (!flush_cnt &&
3600 !atomic_read(&queue->set_pci_flags_count))
3601 flush_cnt += qeth_prep_flush_pack_buffer(queue);
3602 if (queue->card->options.performance_stats &&
3603 q_was_packing)
3604 queue->card->perf_stats.bufs_sent_pack +=
3605 flush_cnt;
3606 if (flush_cnt)
3607 qeth_flush_buffers(queue, index, flush_cnt);
3608 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3609 }
3610 }
3611}
3612
3613void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3614 unsigned long card_ptr)
3615{
3616 struct qeth_card *card = (struct qeth_card *)card_ptr;
3617
3618 if (card->dev && (card->dev->flags & IFF_UP))
3619 napi_schedule(&card->napi);
3620}
3621EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3622
3623int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3624{
3625 int rc;
3626
3627 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3628 rc = -1;
3629 goto out;
3630 } else {
3631 if (card->options.cq == cq) {
3632 rc = 0;
3633 goto out;
3634 }
3635
3636 if (card->state != CARD_STATE_DOWN &&
3637 card->state != CARD_STATE_RECOVER) {
3638 rc = -1;
3639 goto out;
3640 }
3641
3642 qeth_free_qdio_buffers(card);
3643 card->options.cq = cq;
3644 rc = 0;
3645 }
3646out:
3647 return rc;
3648
3649}
3650EXPORT_SYMBOL_GPL(qeth_configure_cq);
3651
3652
3653static void qeth_qdio_cq_handler(struct qeth_card *card,
3654 unsigned int qdio_err,
3655 unsigned int queue, int first_element, int count) {
3656 struct qeth_qdio_q *cq = card->qdio.c_q;
3657 int i;
3658 int rc;
3659
3660 if (!qeth_is_cq(card, queue))
3661 goto out;
3662
3663 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3664 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3665 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3666
3667 if (qdio_err) {
3668 netif_stop_queue(card->dev);
3669 qeth_schedule_recovery(card);
3670 goto out;
3671 }
3672
3673 if (card->options.performance_stats) {
3674 card->perf_stats.cq_cnt++;
3675 card->perf_stats.cq_start_time = qeth_get_micros();
3676 }
3677
3678 for (i = first_element; i < first_element + count; ++i) {
3679 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3680 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
3681 int e;
3682
3683 e = 0;
3684 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3685 buffer->element[e].addr) {
3686 unsigned long phys_aob_addr;
3687
3688 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3689 qeth_qdio_handle_aob(card, phys_aob_addr);
3690 buffer->element[e].addr = NULL;
3691 buffer->element[e].eflags = 0;
3692 buffer->element[e].sflags = 0;
3693 buffer->element[e].length = 0;
3694
3695 ++e;
3696 }
3697
3698 buffer->element[15].eflags = 0;
3699 buffer->element[15].sflags = 0;
3700 }
3701 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3702 card->qdio.c_q->next_buf_to_init,
3703 count);
3704 if (rc) {
3705 dev_warn(&card->gdev->dev,
3706 "QDIO reported an error, rc=%i\n", rc);
3707 QETH_CARD_TEXT(card, 2, "qcqherr");
3708 }
3709 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3710 + count) % QDIO_MAX_BUFFERS_PER_Q;
3711
3712 netif_wake_queue(card->dev);
3713
3714 if (card->options.performance_stats) {
3715 int delta_t = qeth_get_micros();
3716 delta_t -= card->perf_stats.cq_start_time;
3717 card->perf_stats.cq_time += delta_t;
3718 }
3719out:
3720 return;
3721}
3722
3723void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3724 unsigned int queue, int first_elem, int count,
3725 unsigned long card_ptr)
3726{
3727 struct qeth_card *card = (struct qeth_card *)card_ptr;
3728
3729 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3730 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3731
3732 if (qeth_is_cq(card, queue))
3733 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3734 else if (qdio_err)
3735 qeth_schedule_recovery(card);
3736
3737
3738}
3739EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3740
3741void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3742 unsigned int qdio_error, int __queue, int first_element,
3743 int count, unsigned long card_ptr)
3744{
3745 struct qeth_card *card = (struct qeth_card *) card_ptr;
3746 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3747 struct qeth_qdio_out_buffer *buffer;
3748 int i;
3749
3750 QETH_CARD_TEXT(card, 6, "qdouhdl");
3751 if (qdio_error & QDIO_ERROR_FATAL) {
3752 QETH_CARD_TEXT(card, 2, "achkcond");
3753 netif_stop_queue(card->dev);
3754 qeth_schedule_recovery(card);
3755 return;
3756 }
3757 if (card->options.performance_stats) {
3758 card->perf_stats.outbound_handler_cnt++;
3759 card->perf_stats.outbound_handler_start_time =
3760 qeth_get_micros();
3761 }
3762 for (i = first_element; i < (first_element + count); ++i) {
3763 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3764 buffer = queue->bufs[bidx];
3765 qeth_handle_send_error(card, buffer, qdio_error);
3766
3767 if (queue->bufstates &&
3768 (queue->bufstates[bidx].flags &
3769 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3770 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
3771
3772 if (atomic_cmpxchg(&buffer->state,
3773 QETH_QDIO_BUF_PRIMED,
3774 QETH_QDIO_BUF_PENDING) ==
3775 QETH_QDIO_BUF_PRIMED) {
3776 qeth_notify_skbs(queue, buffer,
3777 TX_NOTIFY_PENDING);
3778 }
3779 buffer->aob = queue->bufstates[bidx].aob;
3780 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3781 QETH_CARD_TEXT(queue->card, 5, "aob");
3782 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3783 virt_to_phys(buffer->aob));
3784 if (qeth_init_qdio_out_buf(queue, bidx)) {
3785 QETH_CARD_TEXT(card, 2, "outofbuf");
3786 qeth_schedule_recovery(card);
3787 }
3788 } else {
3789 if (card->options.cq == QETH_CQ_ENABLED) {
3790 enum iucv_tx_notify n;
3791
3792 n = qeth_compute_cq_notification(
3793 buffer->buffer->element[15].sflags, 0);
3794 qeth_notify_skbs(queue, buffer, n);
3795 }
3796
3797 qeth_clear_output_buffer(queue, buffer,
3798 QETH_QDIO_BUF_EMPTY);
3799 }
3800 qeth_cleanup_handled_pending(queue, bidx, 0);
3801 }
3802 atomic_sub(count, &queue->used_buffers);
3803
3804 if (card->info.type != QETH_CARD_TYPE_IQD)
3805 qeth_check_outbound_queue(queue);
3806
3807 netif_wake_queue(queue->card->dev);
3808 if (card->options.performance_stats)
3809 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3810 card->perf_stats.outbound_handler_start_time;
3811}
3812EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3813
3814
3815static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3816{
3817 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3818 return 2;
3819 return queue_num;
3820}
3821
3822
3823
3824
3825int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3826 int ipv, int cast_type)
3827{
3828 __be16 *tci;
3829 u8 tos;
3830
3831 if (cast_type && card->info.is_multicast_different)
3832 return card->info.is_multicast_different &
3833 (card->qdio.no_out_queues - 1);
3834
3835 switch (card->qdio.do_prio_queueing) {
3836 case QETH_PRIO_Q_ING_TOS:
3837 case QETH_PRIO_Q_ING_PREC:
3838 switch (ipv) {
3839 case 4:
3840 tos = ipv4_get_dsfield(ip_hdr(skb));
3841 break;
3842 case 6:
3843 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3844 break;
3845 default:
3846 return card->qdio.default_out_queue;
3847 }
3848 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
3849 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
3850 if (tos & IPTOS_MINCOST)
3851 return qeth_cut_iqd_prio(card, 3);
3852 if (tos & IPTOS_RELIABILITY)
3853 return 2;
3854 if (tos & IPTOS_THROUGHPUT)
3855 return 1;
3856 if (tos & IPTOS_LOWDELAY)
3857 return 0;
3858 break;
3859 case QETH_PRIO_Q_ING_SKB:
3860 if (skb->priority > 5)
3861 return 0;
3862 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
3863 case QETH_PRIO_Q_ING_VLAN:
3864 tci = &((struct ethhdr *)skb->data)->h_proto;
3865 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3866 return qeth_cut_iqd_prio(card,
3867 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
3868 break;
3869 default:
3870 break;
3871 }
3872 return card->qdio.default_out_queue;
3873}
3874EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3875
3876
3877
3878
3879
3880
3881
3882
3883int qeth_get_elements_for_frags(struct sk_buff *skb)
3884{
3885 int cnt, elements = 0;
3886
3887 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3888 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3889
3890 elements += qeth_get_elements_for_range(
3891 (addr_t)skb_frag_address(frag),
3892 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
3893 }
3894 return elements;
3895}
3896EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910int qeth_get_elements_no(struct qeth_card *card,
3911 struct sk_buff *skb, int extra_elems, int data_offset)
3912{
3913 addr_t end = (addr_t)skb->data + skb_headlen(skb);
3914 int elements = qeth_get_elements_for_frags(skb);
3915 addr_t start = (addr_t)skb->data + data_offset;
3916
3917 if (start != end)
3918 elements += qeth_get_elements_for_range(start, end);
3919
3920 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3921 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3922 "(Number=%d / Length=%d). Discarded.\n",
3923 elements + extra_elems, skb->len);
3924 return 0;
3925 }
3926 return elements;
3927}
3928EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3929
3930int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
3931{
3932 int hroom, inpage, rest;
3933
3934 if (((unsigned long)skb->data & PAGE_MASK) !=
3935 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3936 hroom = skb_headroom(skb);
3937 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3938 rest = len - inpage;
3939 if (rest > hroom)
3940 return 1;
3941 memmove(skb->data - rest, skb->data, skb_headlen(skb));
3942 skb->data -= rest;
3943 skb->tail -= rest;
3944 *hdr = (struct qeth_hdr *)skb->data;
3945 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3946 }
3947 return 0;
3948}
3949EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
3964{
3965 if (skb_headroom(skb) >= len &&
3966 qeth_get_elements_for_range((addr_t)skb->data - len,
3967 (addr_t)skb->data) == 1) {
3968 *hdr = skb_push(skb, len);
3969 return len;
3970 }
3971
3972 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3973 if (!*hdr)
3974 return -ENOMEM;
3975 return 0;
3976}
3977EXPORT_SYMBOL_GPL(qeth_push_hdr);
3978
3979static void __qeth_fill_buffer(struct sk_buff *skb,
3980 struct qeth_qdio_out_buffer *buf,
3981 bool is_first_elem, unsigned int offset)
3982{
3983 struct qdio_buffer *buffer = buf->buffer;
3984 int element = buf->next_element_to_fill;
3985 int length = skb_headlen(skb) - offset;
3986 char *data = skb->data + offset;
3987 int length_here, cnt;
3988
3989
3990 while (length > 0) {
3991
3992 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3993 if (length < length_here)
3994 length_here = length;
3995
3996 buffer->element[element].addr = data;
3997 buffer->element[element].length = length_here;
3998 length -= length_here;
3999 if (is_first_elem) {
4000 is_first_elem = false;
4001 if (length || skb_is_nonlinear(skb))
4002
4003 buffer->element[element].eflags =
4004 SBAL_EFLAGS_FIRST_FRAG;
4005 else
4006 buffer->element[element].eflags = 0;
4007 } else {
4008 buffer->element[element].eflags =
4009 SBAL_EFLAGS_MIDDLE_FRAG;
4010 }
4011 data += length_here;
4012 element++;
4013 }
4014
4015
4016 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
4017 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
4018
4019 data = skb_frag_address(frag);
4020 length = skb_frag_size(frag);
4021 while (length > 0) {
4022 length_here = PAGE_SIZE -
4023 ((unsigned long) data % PAGE_SIZE);
4024 if (length < length_here)
4025 length_here = length;
4026
4027 buffer->element[element].addr = data;
4028 buffer->element[element].length = length_here;
4029 buffer->element[element].eflags =
4030 SBAL_EFLAGS_MIDDLE_FRAG;
4031 length -= length_here;
4032 data += length_here;
4033 element++;
4034 }
4035 }
4036
4037 if (buffer->element[element - 1].eflags)
4038 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4039 buf->next_element_to_fill = element;
4040}
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
4053 struct qeth_qdio_out_buffer *buf,
4054 struct sk_buff *skb, struct qeth_hdr *hdr,
4055 unsigned int offset, unsigned int hd_len)
4056{
4057 struct qdio_buffer *buffer = buf->buffer;
4058 bool is_first_elem = true;
4059 int flush_cnt = 0;
4060
4061 refcount_inc(&skb->users);
4062 skb_queue_tail(&buf->skb_list, skb);
4063
4064
4065 if (hd_len) {
4066 int element = buf->next_element_to_fill;
4067 is_first_elem = false;
4068
4069 buffer->element[element].addr = hdr;
4070 buffer->element[element].length = hd_len;
4071 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4072
4073 buf->is_header[element] = ((void *)hdr != skb->data);
4074 buf->next_element_to_fill++;
4075 }
4076
4077 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4078
4079 if (!queue->do_pack) {
4080 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4081
4082 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4083 flush_cnt = 1;
4084 } else {
4085 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4086 if (queue->card->options.performance_stats)
4087 queue->card->perf_stats.skbs_sent_pack++;
4088 if (buf->next_element_to_fill >=
4089 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4090
4091
4092
4093
4094 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4095 flush_cnt = 1;
4096 }
4097 }
4098 return flush_cnt;
4099}
4100
4101int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
4102 struct qeth_hdr *hdr, unsigned int offset,
4103 unsigned int hd_len)
4104{
4105 int index = queue->next_buf_to_fill;
4106 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4107
4108
4109
4110
4111
4112 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4113 return -EBUSY;
4114 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
4115 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4116 qeth_flush_buffers(queue, index, 1);
4117 return 0;
4118}
4119EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4120
4121int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4122 struct sk_buff *skb, struct qeth_hdr *hdr,
4123 unsigned int offset, unsigned int hd_len,
4124 int elements_needed)
4125{
4126 struct qeth_qdio_out_buffer *buffer;
4127 int start_index;
4128 int flush_count = 0;
4129 int do_pack = 0;
4130 int tmp;
4131 int rc = 0;
4132
4133
4134 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4135 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4136 start_index = queue->next_buf_to_fill;
4137 buffer = queue->bufs[queue->next_buf_to_fill];
4138
4139
4140
4141
4142 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4143 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4144 return -EBUSY;
4145 }
4146
4147 qeth_switch_to_packing_if_needed(queue);
4148 if (queue->do_pack) {
4149 do_pack = 1;
4150
4151 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4152 buffer->next_element_to_fill) < elements_needed) {
4153
4154 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4155 flush_count++;
4156 queue->next_buf_to_fill =
4157 (queue->next_buf_to_fill + 1) %
4158 QDIO_MAX_BUFFERS_PER_Q;
4159 buffer = queue->bufs[queue->next_buf_to_fill];
4160
4161
4162 if (atomic_read(&buffer->state) !=
4163 QETH_QDIO_BUF_EMPTY) {
4164 qeth_flush_buffers(queue, start_index,
4165 flush_count);
4166 atomic_set(&queue->state,
4167 QETH_OUT_Q_UNLOCKED);
4168 rc = -EBUSY;
4169 goto out;
4170 }
4171 }
4172 }
4173 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4174 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4175 QDIO_MAX_BUFFERS_PER_Q;
4176 flush_count += tmp;
4177 if (flush_count)
4178 qeth_flush_buffers(queue, start_index, flush_count);
4179 else if (!atomic_read(&queue->set_pci_flags_count))
4180 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4181
4182
4183
4184
4185
4186
4187 while (atomic_dec_return(&queue->state)) {
4188 start_index = queue->next_buf_to_fill;
4189
4190 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4191
4192
4193
4194
4195 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4196 tmp = qeth_prep_flush_pack_buffer(queue);
4197 if (tmp) {
4198 qeth_flush_buffers(queue, start_index, tmp);
4199 flush_count += tmp;
4200 }
4201 }
4202out:
4203
4204 if (queue->card->options.performance_stats && do_pack)
4205 queue->card->perf_stats.bufs_sent_pack += flush_count;
4206
4207 return rc;
4208}
4209EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4210
4211static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4212 struct qeth_reply *reply, unsigned long data)
4213{
4214 struct qeth_ipa_cmd *cmd;
4215 struct qeth_ipacmd_setadpparms *setparms;
4216
4217 QETH_CARD_TEXT(card, 4, "prmadpcb");
4218
4219 cmd = (struct qeth_ipa_cmd *) data;
4220 setparms = &(cmd->data.setadapterparms);
4221
4222 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4223 if (cmd->hdr.return_code) {
4224 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4225 setparms->data.mode = SET_PROMISC_MODE_OFF;
4226 }
4227 card->info.promisc_mode = setparms->data.mode;
4228 return 0;
4229}
4230
4231void qeth_setadp_promisc_mode(struct qeth_card *card)
4232{
4233 enum qeth_ipa_promisc_modes mode;
4234 struct net_device *dev = card->dev;
4235 struct qeth_cmd_buffer *iob;
4236 struct qeth_ipa_cmd *cmd;
4237
4238 QETH_CARD_TEXT(card, 4, "setprom");
4239
4240 if (((dev->flags & IFF_PROMISC) &&
4241 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4242 (!(dev->flags & IFF_PROMISC) &&
4243 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4244 return;
4245 mode = SET_PROMISC_MODE_OFF;
4246 if (dev->flags & IFF_PROMISC)
4247 mode = SET_PROMISC_MODE_ON;
4248 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4249
4250 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4251 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
4252 if (!iob)
4253 return;
4254 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4255 cmd->data.setadapterparms.data.mode = mode;
4256 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4257}
4258EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4259
4260int qeth_change_mtu(struct net_device *dev, int new_mtu)
4261{
4262 struct qeth_card *card;
4263 char dbf_text[15];
4264
4265 card = dev->ml_priv;
4266
4267 QETH_CARD_TEXT(card, 4, "chgmtu");
4268 sprintf(dbf_text, "%8x", new_mtu);
4269 QETH_CARD_TEXT(card, 4, dbf_text);
4270
4271 if (!qeth_mtu_is_valid(card, new_mtu))
4272 return -EINVAL;
4273 dev->mtu = new_mtu;
4274 return 0;
4275}
4276EXPORT_SYMBOL_GPL(qeth_change_mtu);
4277
4278struct net_device_stats *qeth_get_stats(struct net_device *dev)
4279{
4280 struct qeth_card *card;
4281
4282 card = dev->ml_priv;
4283
4284 QETH_CARD_TEXT(card, 5, "getstat");
4285
4286 return &card->stats;
4287}
4288EXPORT_SYMBOL_GPL(qeth_get_stats);
4289
4290static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4291 struct qeth_reply *reply, unsigned long data)
4292{
4293 struct qeth_ipa_cmd *cmd;
4294
4295 QETH_CARD_TEXT(card, 4, "chgmaccb");
4296
4297 cmd = (struct qeth_ipa_cmd *) data;
4298 if (!card->options.layer2 ||
4299 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4300 ether_addr_copy(card->dev->dev_addr,
4301 cmd->data.setadapterparms.data.change_addr.addr);
4302 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4303 }
4304 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4305 return 0;
4306}
4307
4308int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4309{
4310 int rc;
4311 struct qeth_cmd_buffer *iob;
4312 struct qeth_ipa_cmd *cmd;
4313
4314 QETH_CARD_TEXT(card, 4, "chgmac");
4315
4316 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4317 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4318 sizeof(struct qeth_change_addr));
4319 if (!iob)
4320 return -ENOMEM;
4321 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4322 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4323 cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
4324 ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
4325 card->dev->dev_addr);
4326 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4327 NULL);
4328 return rc;
4329}
4330EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4331
4332static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4333 struct qeth_reply *reply, unsigned long data)
4334{
4335 struct qeth_ipa_cmd *cmd;
4336 struct qeth_set_access_ctrl *access_ctrl_req;
4337 int fallback = *(int *)reply->param;
4338
4339 QETH_CARD_TEXT(card, 4, "setaccb");
4340
4341 cmd = (struct qeth_ipa_cmd *) data;
4342 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4343 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4344 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4345 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4346 cmd->data.setadapterparms.hdr.return_code);
4347 if (cmd->data.setadapterparms.hdr.return_code !=
4348 SET_ACCESS_CTRL_RC_SUCCESS)
4349 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4350 card->gdev->dev.kobj.name,
4351 access_ctrl_req->subcmd_code,
4352 cmd->data.setadapterparms.hdr.return_code);
4353 switch (cmd->data.setadapterparms.hdr.return_code) {
4354 case SET_ACCESS_CTRL_RC_SUCCESS:
4355 if (card->options.isolation == ISOLATION_MODE_NONE) {
4356 dev_info(&card->gdev->dev,
4357 "QDIO data connection isolation is deactivated\n");
4358 } else {
4359 dev_info(&card->gdev->dev,
4360 "QDIO data connection isolation is activated\n");
4361 }
4362 break;
4363 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4364 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4365 "deactivated\n", dev_name(&card->gdev->dev));
4366 if (fallback)
4367 card->options.isolation = card->options.prev_isolation;
4368 break;
4369 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4370 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4371 " activated\n", dev_name(&card->gdev->dev));
4372 if (fallback)
4373 card->options.isolation = card->options.prev_isolation;
4374 break;
4375 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4376 dev_err(&card->gdev->dev, "Adapter does not "
4377 "support QDIO data connection isolation\n");
4378 break;
4379 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4380 dev_err(&card->gdev->dev,
4381 "Adapter is dedicated. "
4382 "QDIO data connection isolation not supported\n");
4383 if (fallback)
4384 card->options.isolation = card->options.prev_isolation;
4385 break;
4386 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4387 dev_err(&card->gdev->dev,
4388 "TSO does not permit QDIO data connection isolation\n");
4389 if (fallback)
4390 card->options.isolation = card->options.prev_isolation;
4391 break;
4392 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4393 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4394 "support reflective relay mode\n");
4395 if (fallback)
4396 card->options.isolation = card->options.prev_isolation;
4397 break;
4398 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4399 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4400 "enabled at the adjacent switch port");
4401 if (fallback)
4402 card->options.isolation = card->options.prev_isolation;
4403 break;
4404 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4405 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4406 "at the adjacent switch failed\n");
4407 break;
4408 default:
4409
4410 if (fallback)
4411 card->options.isolation = card->options.prev_isolation;
4412 break;
4413 }
4414 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4415 return 0;
4416}
4417
4418static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4419 enum qeth_ipa_isolation_modes isolation, int fallback)
4420{
4421 int rc;
4422 struct qeth_cmd_buffer *iob;
4423 struct qeth_ipa_cmd *cmd;
4424 struct qeth_set_access_ctrl *access_ctrl_req;
4425
4426 QETH_CARD_TEXT(card, 4, "setacctl");
4427
4428 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4429 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4430
4431 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4432 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4433 sizeof(struct qeth_set_access_ctrl));
4434 if (!iob)
4435 return -ENOMEM;
4436 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4437 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4438 access_ctrl_req->subcmd_code = isolation;
4439
4440 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4441 &fallback);
4442 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4443 return rc;
4444}
4445
4446int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
4447{
4448 int rc = 0;
4449
4450 QETH_CARD_TEXT(card, 4, "setactlo");
4451
4452 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4453 card->info.type == QETH_CARD_TYPE_OSX) &&
4454 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4455 rc = qeth_setadpparms_set_access_ctrl(card,
4456 card->options.isolation, fallback);
4457 if (rc) {
4458 QETH_DBF_MESSAGE(3,
4459 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4460 card->gdev->dev.kobj.name,
4461 rc);
4462 rc = -EOPNOTSUPP;
4463 }
4464 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4465 card->options.isolation = ISOLATION_MODE_NONE;
4466
4467 dev_err(&card->gdev->dev, "Adapter does not "
4468 "support QDIO data connection isolation\n");
4469 rc = -EOPNOTSUPP;
4470 }
4471 return rc;
4472}
4473EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4474
4475void qeth_tx_timeout(struct net_device *dev)
4476{
4477 struct qeth_card *card;
4478
4479 card = dev->ml_priv;
4480 QETH_CARD_TEXT(card, 4, "txtimeo");
4481 card->stats.tx_errors++;
4482 qeth_schedule_recovery(card);
4483}
4484EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4485
4486static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4487{
4488 struct qeth_card *card = dev->ml_priv;
4489 int rc = 0;
4490
4491 switch (regnum) {
4492 case MII_BMCR:
4493 rc = BMCR_FULLDPLX;
4494 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4495 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4496 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4497 rc |= BMCR_SPEED100;
4498 break;
4499 case MII_BMSR:
4500 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4501 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4502 BMSR_100BASE4;
4503 break;
4504 case MII_PHYSID1:
4505 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4506 dev->dev_addr[2];
4507 rc = (rc >> 5) & 0xFFFF;
4508 break;
4509 case MII_PHYSID2:
4510 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4511 break;
4512 case MII_ADVERTISE:
4513 rc = ADVERTISE_ALL;
4514 break;
4515 case MII_LPA:
4516 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4517 LPA_100BASE4 | LPA_LPACK;
4518 break;
4519 case MII_EXPANSION:
4520 break;
4521 case MII_DCOUNTER:
4522 break;
4523 case MII_FCSCOUNTER:
4524 break;
4525 case MII_NWAYTEST:
4526 break;
4527 case MII_RERRCOUNTER:
4528 rc = card->stats.rx_errors;
4529 break;
4530 case MII_SREVISION:
4531 break;
4532 case MII_RESV1:
4533 break;
4534 case MII_LBRERROR:
4535 break;
4536 case MII_PHYADDR:
4537 break;
4538 case MII_RESV2:
4539 break;
4540 case MII_TPISTATUS:
4541 break;
4542 case MII_NCONFIG:
4543 break;
4544 default:
4545 break;
4546 }
4547 return rc;
4548}
4549
4550static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4551 struct qeth_cmd_buffer *iob, int len,
4552 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4553 unsigned long),
4554 void *reply_param)
4555{
4556 u16 s1, s2;
4557
4558 QETH_CARD_TEXT(card, 4, "sendsnmp");
4559
4560 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4561 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4562 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4563
4564 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4565 s2 = (u32) len;
4566 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4567 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4568 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4569 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4570 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4571 reply_cb, reply_param);
4572}
4573
4574static int qeth_snmp_command_cb(struct qeth_card *card,
4575 struct qeth_reply *reply, unsigned long sdata)
4576{
4577 struct qeth_ipa_cmd *cmd;
4578 struct qeth_arp_query_info *qinfo;
4579 struct qeth_snmp_cmd *snmp;
4580 unsigned char *data;
4581 __u16 data_len;
4582
4583 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4584
4585 cmd = (struct qeth_ipa_cmd *) sdata;
4586 data = (unsigned char *)((char *)cmd - reply->offset);
4587 qinfo = (struct qeth_arp_query_info *) reply->param;
4588 snmp = &cmd->data.setadapterparms.data.snmp;
4589
4590 if (cmd->hdr.return_code) {
4591 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4592 return 0;
4593 }
4594 if (cmd->data.setadapterparms.hdr.return_code) {
4595 cmd->hdr.return_code =
4596 cmd->data.setadapterparms.hdr.return_code;
4597 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4598 return 0;
4599 }
4600 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4601 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4602 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4603 else
4604 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4605
4606
4607 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4608 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4609 cmd->hdr.return_code = IPA_RC_ENOMEM;
4610 return 0;
4611 }
4612 QETH_CARD_TEXT_(card, 4, "snore%i",
4613 cmd->data.setadapterparms.hdr.used_total);
4614 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4615 cmd->data.setadapterparms.hdr.seq_no);
4616
4617 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4618 memcpy(qinfo->udata + qinfo->udata_offset,
4619 (char *)snmp,
4620 data_len + offsetof(struct qeth_snmp_cmd, data));
4621 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4622 } else {
4623 memcpy(qinfo->udata + qinfo->udata_offset,
4624 (char *)&snmp->request, data_len);
4625 }
4626 qinfo->udata_offset += data_len;
4627
4628 QETH_CARD_TEXT_(card, 4, "srtot%i",
4629 cmd->data.setadapterparms.hdr.used_total);
4630 QETH_CARD_TEXT_(card, 4, "srseq%i",
4631 cmd->data.setadapterparms.hdr.seq_no);
4632 if (cmd->data.setadapterparms.hdr.seq_no <
4633 cmd->data.setadapterparms.hdr.used_total)
4634 return 1;
4635 return 0;
4636}
4637
4638static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4639{
4640 struct qeth_cmd_buffer *iob;
4641 struct qeth_ipa_cmd *cmd;
4642 struct qeth_snmp_ureq *ureq;
4643 unsigned int req_len;
4644 struct qeth_arp_query_info qinfo = {0, };
4645 int rc = 0;
4646
4647 QETH_CARD_TEXT(card, 3, "snmpcmd");
4648
4649 if (card->info.guestlan)
4650 return -EOPNOTSUPP;
4651
4652 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4653 (!card->options.layer2)) {
4654 return -EOPNOTSUPP;
4655 }
4656
4657 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4658 return -EFAULT;
4659 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4660 sizeof(struct qeth_ipacmd_hdr) -
4661 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4662 return -EINVAL;
4663 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4664 if (IS_ERR(ureq)) {
4665 QETH_CARD_TEXT(card, 2, "snmpnome");
4666 return PTR_ERR(ureq);
4667 }
4668 qinfo.udata_len = ureq->hdr.data_len;
4669 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4670 if (!qinfo.udata) {
4671 kfree(ureq);
4672 return -ENOMEM;
4673 }
4674 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4675
4676 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4677 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4678 if (!iob) {
4679 rc = -ENOMEM;
4680 goto out;
4681 }
4682 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4683 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4684 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4685 qeth_snmp_command_cb, (void *)&qinfo);
4686 if (rc)
4687 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4688 QETH_CARD_IFNAME(card), rc);
4689 else {
4690 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4691 rc = -EFAULT;
4692 }
4693out:
4694 kfree(ureq);
4695 kfree(qinfo.udata);
4696 return rc;
4697}
4698
4699static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4700 struct qeth_reply *reply, unsigned long data)
4701{
4702 struct qeth_ipa_cmd *cmd;
4703 struct qeth_qoat_priv *priv;
4704 char *resdata;
4705 int resdatalen;
4706
4707 QETH_CARD_TEXT(card, 3, "qoatcb");
4708
4709 cmd = (struct qeth_ipa_cmd *)data;
4710 priv = (struct qeth_qoat_priv *)reply->param;
4711 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4712 resdata = (char *)data + 28;
4713
4714 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4715 cmd->hdr.return_code = IPA_RC_FFFF;
4716 return 0;
4717 }
4718
4719 memcpy((priv->buffer + priv->response_len), resdata,
4720 resdatalen);
4721 priv->response_len += resdatalen;
4722
4723 if (cmd->data.setadapterparms.hdr.seq_no <
4724 cmd->data.setadapterparms.hdr.used_total)
4725 return 1;
4726 return 0;
4727}
4728
4729static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4730{
4731 int rc = 0;
4732 struct qeth_cmd_buffer *iob;
4733 struct qeth_ipa_cmd *cmd;
4734 struct qeth_query_oat *oat_req;
4735 struct qeth_query_oat_data oat_data;
4736 struct qeth_qoat_priv priv;
4737 void __user *tmp;
4738
4739 QETH_CARD_TEXT(card, 3, "qoatcmd");
4740
4741 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4742 rc = -EOPNOTSUPP;
4743 goto out;
4744 }
4745
4746 if (copy_from_user(&oat_data, udata,
4747 sizeof(struct qeth_query_oat_data))) {
4748 rc = -EFAULT;
4749 goto out;
4750 }
4751
4752 priv.buffer_len = oat_data.buffer_len;
4753 priv.response_len = 0;
4754 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4755 if (!priv.buffer) {
4756 rc = -ENOMEM;
4757 goto out;
4758 }
4759
4760 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4761 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4762 sizeof(struct qeth_query_oat));
4763 if (!iob) {
4764 rc = -ENOMEM;
4765 goto out_free;
4766 }
4767 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4768 oat_req = &cmd->data.setadapterparms.data.query_oat;
4769 oat_req->subcmd_code = oat_data.command;
4770
4771 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4772 &priv);
4773 if (!rc) {
4774 if (is_compat_task())
4775 tmp = compat_ptr(oat_data.ptr);
4776 else
4777 tmp = (void __user *)(unsigned long)oat_data.ptr;
4778
4779 if (copy_to_user(tmp, priv.buffer,
4780 priv.response_len)) {
4781 rc = -EFAULT;
4782 goto out_free;
4783 }
4784
4785 oat_data.response_len = priv.response_len;
4786
4787 if (copy_to_user(udata, &oat_data,
4788 sizeof(struct qeth_query_oat_data)))
4789 rc = -EFAULT;
4790 } else
4791 if (rc == IPA_RC_FFFF)
4792 rc = -EFAULT;
4793
4794out_free:
4795 kfree(priv.buffer);
4796out:
4797 return rc;
4798}
4799
4800static int qeth_query_card_info_cb(struct qeth_card *card,
4801 struct qeth_reply *reply, unsigned long data)
4802{
4803 struct qeth_ipa_cmd *cmd;
4804 struct qeth_query_card_info *card_info;
4805 struct carrier_info *carrier_info;
4806
4807 QETH_CARD_TEXT(card, 2, "qcrdincb");
4808 carrier_info = (struct carrier_info *)reply->param;
4809 cmd = (struct qeth_ipa_cmd *)data;
4810 card_info = &cmd->data.setadapterparms.data.card_info;
4811 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4812 carrier_info->card_type = card_info->card_type;
4813 carrier_info->port_mode = card_info->port_mode;
4814 carrier_info->port_speed = card_info->port_speed;
4815 }
4816
4817 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4818 return 0;
4819}
4820
4821static int qeth_query_card_info(struct qeth_card *card,
4822 struct carrier_info *carrier_info)
4823{
4824 struct qeth_cmd_buffer *iob;
4825
4826 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4827 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4828 return -EOPNOTSUPP;
4829 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4830 sizeof(struct qeth_ipacmd_setadpparms_hdr));
4831 if (!iob)
4832 return -ENOMEM;
4833 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4834 (void *)carrier_info);
4835}
4836
4837
4838
4839
4840
4841
4842
4843
4844
4845int qeth_vm_request_mac(struct qeth_card *card)
4846{
4847 struct diag26c_mac_resp *response;
4848 struct diag26c_mac_req *request;
4849 struct ccw_dev_id id;
4850 int rc;
4851
4852 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4853
4854 if (!card->dev)
4855 return -ENODEV;
4856
4857 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4858 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4859 if (!request || !response) {
4860 rc = -ENOMEM;
4861 goto out;
4862 }
4863
4864 ccw_device_get_id(CARD_DDEV(card), &id);
4865 request->resp_buf_len = sizeof(*response);
4866 request->resp_version = DIAG26C_VERSION2;
4867 request->op_code = DIAG26C_GET_MAC;
4868 request->devno = id.devno;
4869
4870 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
4871 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
4872 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
4873 if (rc)
4874 goto out;
4875 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
4876
4877 if (request->resp_buf_len < sizeof(*response) ||
4878 response->version != request->resp_version) {
4879 rc = -EIO;
4880 QETH_DBF_TEXT(SETUP, 2, "badresp");
4881 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4882 sizeof(request->resp_buf_len));
4883 } else if (!is_valid_ether_addr(response->mac)) {
4884 rc = -EINVAL;
4885 QETH_DBF_TEXT(SETUP, 2, "badmac");
4886 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4887 } else {
4888 ether_addr_copy(card->dev->dev_addr, response->mac);
4889 }
4890
4891out:
4892 kfree(response);
4893 kfree(request);
4894 return rc;
4895}
4896EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4897
4898static int qeth_get_qdio_q_format(struct qeth_card *card)
4899{
4900 if (card->info.type == QETH_CARD_TYPE_IQD)
4901 return QDIO_IQDIO_QFMT;
4902 else
4903 return QDIO_QETH_QFMT;
4904}
4905
4906static void qeth_determine_capabilities(struct qeth_card *card)
4907{
4908 int rc;
4909 int length;
4910 char *prcd;
4911 struct ccw_device *ddev;
4912 int ddev_offline = 0;
4913
4914 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4915 ddev = CARD_DDEV(card);
4916 if (!ddev->online) {
4917 ddev_offline = 1;
4918 rc = ccw_device_set_online(ddev);
4919 if (rc) {
4920 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4921 goto out;
4922 }
4923 }
4924
4925 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4926 if (rc) {
4927 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4928 dev_name(&card->gdev->dev), rc);
4929 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4930 goto out_offline;
4931 }
4932 qeth_configure_unitaddr(card, prcd);
4933 if (ddev_offline)
4934 qeth_configure_blkt_default(card, prcd);
4935 kfree(prcd);
4936
4937 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4938 if (rc)
4939 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4940
4941 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4942 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4943 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4944 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
4945 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4946 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4947 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4948 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4949 dev_info(&card->gdev->dev,
4950 "Completion Queueing supported\n");
4951 } else {
4952 card->options.cq = QETH_CQ_NOTAVAILABLE;
4953 }
4954
4955
4956out_offline:
4957 if (ddev_offline == 1)
4958 ccw_device_set_offline(ddev);
4959out:
4960 return;
4961}
4962
4963static void qeth_qdio_establish_cq(struct qeth_card *card,
4964 struct qdio_buffer **in_sbal_ptrs,
4965 void (**queue_start_poll)
4966 (struct ccw_device *, int,
4967 unsigned long))
4968{
4969 int i;
4970
4971 if (card->options.cq == QETH_CQ_ENABLED) {
4972 int offset = QDIO_MAX_BUFFERS_PER_Q *
4973 (card->qdio.no_in_queues - 1);
4974 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4975 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4976 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4977 }
4978
4979 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4980 }
4981}
4982
4983static int qeth_qdio_establish(struct qeth_card *card)
4984{
4985 struct qdio_initialize init_data;
4986 char *qib_param_field;
4987 struct qdio_buffer **in_sbal_ptrs;
4988 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4989 struct qdio_buffer **out_sbal_ptrs;
4990 int i, j, k;
4991 int rc = 0;
4992
4993 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4994
4995 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4996 GFP_KERNEL);
4997 if (!qib_param_field) {
4998 rc = -ENOMEM;
4999 goto out_free_nothing;
5000 }
5001
5002 qeth_create_qib_param_field(card, qib_param_field);
5003 qeth_create_qib_param_field_blkt(card, qib_param_field);
5004
5005 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
5006 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
5007 GFP_KERNEL);
5008 if (!in_sbal_ptrs) {
5009 rc = -ENOMEM;
5010 goto out_free_qib_param;
5011 }
5012 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
5013 in_sbal_ptrs[i] = (struct qdio_buffer *)
5014 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
5015 }
5016
5017 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
5018 GFP_KERNEL);
5019 if (!queue_start_poll) {
5020 rc = -ENOMEM;
5021 goto out_free_in_sbals;
5022 }
5023 for (i = 0; i < card->qdio.no_in_queues; ++i)
5024 queue_start_poll[i] = card->discipline->start_poll;
5025
5026 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
5027
5028 out_sbal_ptrs =
5029 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
5030 sizeof(void *), GFP_KERNEL);
5031 if (!out_sbal_ptrs) {
5032 rc = -ENOMEM;
5033 goto out_free_queue_start_poll;
5034 }
5035 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
5036 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
5037 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
5038 card->qdio.out_qs[i]->bufs[j]->buffer);
5039 }
5040
5041 memset(&init_data, 0, sizeof(struct qdio_initialize));
5042 init_data.cdev = CARD_DDEV(card);
5043 init_data.q_format = qeth_get_qdio_q_format(card);
5044 init_data.qib_param_field_format = 0;
5045 init_data.qib_param_field = qib_param_field;
5046 init_data.no_input_qs = card->qdio.no_in_queues;
5047 init_data.no_output_qs = card->qdio.no_out_queues;
5048 init_data.input_handler = card->discipline->input_handler;
5049 init_data.output_handler = card->discipline->output_handler;
5050 init_data.queue_start_poll_array = queue_start_poll;
5051 init_data.int_parm = (unsigned long) card;
5052 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
5053 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
5054 init_data.output_sbal_state_array = card->qdio.out_bufstates;
5055 init_data.scan_threshold =
5056 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
5057
5058 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
5059 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
5060 rc = qdio_allocate(&init_data);
5061 if (rc) {
5062 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
5063 goto out;
5064 }
5065 rc = qdio_establish(&init_data);
5066 if (rc) {
5067 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
5068 qdio_free(CARD_DDEV(card));
5069 }
5070 }
5071
5072 switch (card->options.cq) {
5073 case QETH_CQ_ENABLED:
5074 dev_info(&card->gdev->dev, "Completion Queue support enabled");
5075 break;
5076 case QETH_CQ_DISABLED:
5077 dev_info(&card->gdev->dev, "Completion Queue support disabled");
5078 break;
5079 default:
5080 break;
5081 }
5082out:
5083 kfree(out_sbal_ptrs);
5084out_free_queue_start_poll:
5085 kfree(queue_start_poll);
5086out_free_in_sbals:
5087 kfree(in_sbal_ptrs);
5088out_free_qib_param:
5089 kfree(qib_param_field);
5090out_free_nothing:
5091 return rc;
5092}
5093
5094static void qeth_core_free_card(struct qeth_card *card)
5095{
5096
5097 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5098 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
5099 qeth_clean_channel(&card->read);
5100 qeth_clean_channel(&card->write);
5101 qeth_free_qdio_buffers(card);
5102 unregister_service_level(&card->qeth_service_level);
5103 kfree(card);
5104}
5105
5106void qeth_trace_features(struct qeth_card *card)
5107{
5108 QETH_CARD_TEXT(card, 2, "features");
5109 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5110 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5111 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5112 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5113 sizeof(card->info.diagass_support));
5114}
5115EXPORT_SYMBOL_GPL(qeth_trace_features);
5116
5117static struct ccw_device_id qeth_ids[] = {
5118 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5119 .driver_info = QETH_CARD_TYPE_OSD},
5120 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5121 .driver_info = QETH_CARD_TYPE_IQD},
5122 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5123 .driver_info = QETH_CARD_TYPE_OSN},
5124 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5125 .driver_info = QETH_CARD_TYPE_OSM},
5126 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5127 .driver_info = QETH_CARD_TYPE_OSX},
5128 {},
5129};
5130MODULE_DEVICE_TABLE(ccw, qeth_ids);
5131
5132static struct ccw_driver qeth_ccw_driver = {
5133 .driver = {
5134 .owner = THIS_MODULE,
5135 .name = "qeth",
5136 },
5137 .ids = qeth_ids,
5138 .probe = ccwgroup_probe_ccwdev,
5139 .remove = ccwgroup_remove_ccwdev,
5140};
5141
5142int qeth_core_hardsetup_card(struct qeth_card *card)
5143{
5144 int retries = 3;
5145 int rc;
5146
5147 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
5148 atomic_set(&card->force_alloc_skb, 0);
5149 qeth_update_from_chp_desc(card);
5150retry:
5151 if (retries < 3)
5152 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5153 dev_name(&card->gdev->dev));
5154 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
5155 ccw_device_set_offline(CARD_DDEV(card));
5156 ccw_device_set_offline(CARD_WDEV(card));
5157 ccw_device_set_offline(CARD_RDEV(card));
5158 qdio_free(CARD_DDEV(card));
5159 rc = ccw_device_set_online(CARD_RDEV(card));
5160 if (rc)
5161 goto retriable;
5162 rc = ccw_device_set_online(CARD_WDEV(card));
5163 if (rc)
5164 goto retriable;
5165 rc = ccw_device_set_online(CARD_DDEV(card));
5166 if (rc)
5167 goto retriable;
5168retriable:
5169 if (rc == -ERESTARTSYS) {
5170 QETH_DBF_TEXT(SETUP, 2, "break1");
5171 return rc;
5172 } else if (rc) {
5173 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
5174 if (--retries < 0)
5175 goto out;
5176 else
5177 goto retry;
5178 }
5179 qeth_determine_capabilities(card);
5180 qeth_init_tokens(card);
5181 qeth_init_func_level(card);
5182 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5183 if (rc == -ERESTARTSYS) {
5184 QETH_DBF_TEXT(SETUP, 2, "break2");
5185 return rc;
5186 } else if (rc) {
5187 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5188 if (--retries < 0)
5189 goto out;
5190 else
5191 goto retry;
5192 }
5193 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5194 if (rc == -ERESTARTSYS) {
5195 QETH_DBF_TEXT(SETUP, 2, "break3");
5196 return rc;
5197 } else if (rc) {
5198 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
5199 if (--retries < 0)
5200 goto out;
5201 else
5202 goto retry;
5203 }
5204 card->read_or_write_problem = 0;
5205 rc = qeth_mpc_initialize(card);
5206 if (rc) {
5207 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
5208 goto out;
5209 }
5210
5211 rc = qeth_send_startlan(card);
5212 if (rc) {
5213 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5214 if (rc == IPA_RC_LAN_OFFLINE) {
5215 dev_warn(&card->gdev->dev,
5216 "The LAN is offline\n");
5217 card->lan_online = 0;
5218 } else {
5219 rc = -ENODEV;
5220 goto out;
5221 }
5222 } else
5223 card->lan_online = 1;
5224
5225 card->options.ipa4.supported_funcs = 0;
5226 card->options.ipa6.supported_funcs = 0;
5227 card->options.adp.supported_funcs = 0;
5228 card->options.sbp.supported_funcs = 0;
5229 card->info.diagass_support = 0;
5230 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5231 if (rc == -ENOMEM)
5232 goto out;
5233 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5234 rc = qeth_query_setadapterparms(card);
5235 if (rc < 0) {
5236 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
5237 goto out;
5238 }
5239 }
5240 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5241 rc = qeth_query_setdiagass(card);
5242 if (rc < 0) {
5243 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
5244 goto out;
5245 }
5246 }
5247 return 0;
5248out:
5249 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5250 "an error on the device\n");
5251 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5252 dev_name(&card->gdev->dev), rc);
5253 return rc;
5254}
5255EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5256
5257static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5258 struct sk_buff *skb, int offset, int data_len)
5259{
5260 struct page *page = virt_to_page(element->addr);
5261 unsigned int next_frag;
5262
5263
5264 if (!skb->len) {
5265 unsigned int linear = min(data_len, skb_tailroom(skb));
5266
5267 skb_put_data(skb, element->addr + offset, linear);
5268 data_len -= linear;
5269 if (!data_len)
5270 return;
5271 offset += linear;
5272
5273 }
5274
5275 next_frag = skb_shinfo(skb)->nr_frags;
5276 get_page(page);
5277 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
5278}
5279
5280static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5281{
5282 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5283}
5284
5285struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
5286 struct qeth_qdio_buffer *qethbuffer,
5287 struct qdio_buffer_element **__element, int *__offset,
5288 struct qeth_hdr **hdr)
5289{
5290 struct qdio_buffer_element *element = *__element;
5291 struct qdio_buffer *buffer = qethbuffer->buffer;
5292 int offset = *__offset;
5293 struct sk_buff *skb;
5294 int skb_len = 0;
5295 void *data_ptr;
5296 int data_len;
5297 int headroom = 0;
5298 int use_rx_sg = 0;
5299
5300
5301 while (element->length < offset + sizeof(struct qeth_hdr)) {
5302 if (qeth_is_last_sbale(element))
5303 return NULL;
5304 element++;
5305 offset = 0;
5306 }
5307 *hdr = element->addr + offset;
5308
5309 offset += sizeof(struct qeth_hdr);
5310 switch ((*hdr)->hdr.l2.id) {
5311 case QETH_HEADER_TYPE_LAYER2:
5312 skb_len = (*hdr)->hdr.l2.pkt_length;
5313 break;
5314 case QETH_HEADER_TYPE_LAYER3:
5315 skb_len = (*hdr)->hdr.l3.length;
5316 headroom = ETH_HLEN;
5317 break;
5318 case QETH_HEADER_TYPE_OSN:
5319 skb_len = (*hdr)->hdr.osn.pdu_length;
5320 headroom = sizeof(struct qeth_hdr);
5321 break;
5322 default:
5323 break;
5324 }
5325
5326 if (!skb_len)
5327 return NULL;
5328
5329 if (((skb_len >= card->options.rx_sg_cb) &&
5330 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5331 (!atomic_read(&card->force_alloc_skb))) ||
5332 (card->options.cq == QETH_CQ_ENABLED))
5333 use_rx_sg = 1;
5334
5335 if (use_rx_sg && qethbuffer->rx_skb) {
5336
5337 skb = qethbuffer->rx_skb;
5338 qethbuffer->rx_skb = NULL;
5339 } else {
5340 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5341
5342 skb = dev_alloc_skb(linear + headroom);
5343 }
5344 if (!skb)
5345 goto no_mem;
5346 if (headroom)
5347 skb_reserve(skb, headroom);
5348
5349 data_ptr = element->addr + offset;
5350 while (skb_len) {
5351 data_len = min(skb_len, (int)(element->length - offset));
5352 if (data_len) {
5353 if (use_rx_sg)
5354 qeth_create_skb_frag(element, skb, offset,
5355 data_len);
5356 else
5357 skb_put_data(skb, data_ptr, data_len);
5358 }
5359 skb_len -= data_len;
5360 if (skb_len) {
5361 if (qeth_is_last_sbale(element)) {
5362 QETH_CARD_TEXT(card, 4, "unexeob");
5363 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
5364 dev_kfree_skb_any(skb);
5365 card->stats.rx_errors++;
5366 return NULL;
5367 }
5368 element++;
5369 offset = 0;
5370 data_ptr = element->addr;
5371 } else {
5372 offset += data_len;
5373 }
5374 }
5375 *__element = element;
5376 *__offset = offset;
5377 if (use_rx_sg && card->options.performance_stats) {
5378 card->perf_stats.sg_skbs_rx++;
5379 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5380 }
5381 return skb;
5382no_mem:
5383 if (net_ratelimit()) {
5384 QETH_CARD_TEXT(card, 2, "noskbmem");
5385 }
5386 card->stats.rx_dropped++;
5387 return NULL;
5388}
5389EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5390
5391int qeth_poll(struct napi_struct *napi, int budget)
5392{
5393 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5394 int work_done = 0;
5395 struct qeth_qdio_buffer *buffer;
5396 int done;
5397 int new_budget = budget;
5398
5399 if (card->options.performance_stats) {
5400 card->perf_stats.inbound_cnt++;
5401 card->perf_stats.inbound_start_time = qeth_get_micros();
5402 }
5403
5404 while (1) {
5405 if (!card->rx.b_count) {
5406 card->rx.qdio_err = 0;
5407 card->rx.b_count = qdio_get_next_buffers(
5408 card->data.ccwdev, 0, &card->rx.b_index,
5409 &card->rx.qdio_err);
5410 if (card->rx.b_count <= 0) {
5411 card->rx.b_count = 0;
5412 break;
5413 }
5414 card->rx.b_element =
5415 &card->qdio.in_q->bufs[card->rx.b_index]
5416 .buffer->element[0];
5417 card->rx.e_offset = 0;
5418 }
5419
5420 while (card->rx.b_count) {
5421 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5422 if (!(card->rx.qdio_err &&
5423 qeth_check_qdio_errors(card, buffer->buffer,
5424 card->rx.qdio_err, "qinerr")))
5425 work_done +=
5426 card->discipline->process_rx_buffer(
5427 card, new_budget, &done);
5428 else
5429 done = 1;
5430
5431 if (done) {
5432 if (card->options.performance_stats)
5433 card->perf_stats.bufs_rec++;
5434 qeth_put_buffer_pool_entry(card,
5435 buffer->pool_entry);
5436 qeth_queue_input_buffer(card, card->rx.b_index);
5437 card->rx.b_count--;
5438 if (card->rx.b_count) {
5439 card->rx.b_index =
5440 (card->rx.b_index + 1) %
5441 QDIO_MAX_BUFFERS_PER_Q;
5442 card->rx.b_element =
5443 &card->qdio.in_q
5444 ->bufs[card->rx.b_index]
5445 .buffer->element[0];
5446 card->rx.e_offset = 0;
5447 }
5448 }
5449
5450 if (work_done >= budget)
5451 goto out;
5452 else
5453 new_budget = budget - work_done;
5454 }
5455 }
5456
5457 napi_complete_done(napi, work_done);
5458 if (qdio_start_irq(card->data.ccwdev, 0))
5459 napi_schedule(&card->napi);
5460out:
5461 if (card->options.performance_stats)
5462 card->perf_stats.inbound_time += qeth_get_micros() -
5463 card->perf_stats.inbound_start_time;
5464 return work_done;
5465}
5466EXPORT_SYMBOL_GPL(qeth_poll);
5467
5468static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
5469{
5470 if (!cmd->hdr.return_code)
5471 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5472 return cmd->hdr.return_code;
5473}
5474
5475int qeth_setassparms_cb(struct qeth_card *card,
5476 struct qeth_reply *reply, unsigned long data)
5477{
5478 struct qeth_ipa_cmd *cmd;
5479
5480 QETH_CARD_TEXT(card, 4, "defadpcb");
5481
5482 cmd = (struct qeth_ipa_cmd *) data;
5483 if (cmd->hdr.return_code == 0) {
5484 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5485 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5486 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5487 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5488 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5489 }
5490 return 0;
5491}
5492EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
5493
5494struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5495 enum qeth_ipa_funcs ipa_func,
5496 __u16 cmd_code, __u16 len,
5497 enum qeth_prot_versions prot)
5498{
5499 struct qeth_cmd_buffer *iob;
5500 struct qeth_ipa_cmd *cmd;
5501
5502 QETH_CARD_TEXT(card, 4, "getasscm");
5503 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5504
5505 if (iob) {
5506 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5507 cmd->data.setassparms.hdr.assist_no = ipa_func;
5508 cmd->data.setassparms.hdr.length = 8 + len;
5509 cmd->data.setassparms.hdr.command_code = cmd_code;
5510 cmd->data.setassparms.hdr.return_code = 0;
5511 cmd->data.setassparms.hdr.seq_no = 0;
5512 }
5513
5514 return iob;
5515}
5516EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
5517
5518int qeth_send_setassparms(struct qeth_card *card,
5519 struct qeth_cmd_buffer *iob, __u16 len, long data,
5520 int (*reply_cb)(struct qeth_card *,
5521 struct qeth_reply *, unsigned long),
5522 void *reply_param)
5523{
5524 int rc;
5525 struct qeth_ipa_cmd *cmd;
5526
5527 QETH_CARD_TEXT(card, 4, "sendassp");
5528
5529 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5530 if (len <= sizeof(__u32))
5531 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5532 else
5533 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5534
5535 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5536 return rc;
5537}
5538EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5539
5540int qeth_send_simple_setassparms(struct qeth_card *card,
5541 enum qeth_ipa_funcs ipa_func,
5542 __u16 cmd_code, long data)
5543{
5544 int rc;
5545 int length = 0;
5546 struct qeth_cmd_buffer *iob;
5547
5548 QETH_CARD_TEXT(card, 4, "simassp4");
5549 if (data)
5550 length = sizeof(__u32);
5551 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5552 length, QETH_PROT_IPV4);
5553 if (!iob)
5554 return -ENOMEM;
5555 rc = qeth_send_setassparms(card, iob, length, data,
5556 qeth_setassparms_cb, NULL);
5557 return rc;
5558}
5559EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5560
5561static void qeth_unregister_dbf_views(void)
5562{
5563 int x;
5564 for (x = 0; x < QETH_DBF_INFOS; x++) {
5565 debug_unregister(qeth_dbf[x].id);
5566 qeth_dbf[x].id = NULL;
5567 }
5568}
5569
5570void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
5571{
5572 char dbf_txt_buf[32];
5573 va_list args;
5574
5575 if (!debug_level_enabled(id, level))
5576 return;
5577 va_start(args, fmt);
5578 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5579 va_end(args);
5580 debug_text_event(id, level, dbf_txt_buf);
5581}
5582EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5583
5584static int qeth_register_dbf_views(void)
5585{
5586 int ret;
5587 int x;
5588
5589 for (x = 0; x < QETH_DBF_INFOS; x++) {
5590
5591 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5592 qeth_dbf[x].pages,
5593 qeth_dbf[x].areas,
5594 qeth_dbf[x].len);
5595 if (qeth_dbf[x].id == NULL) {
5596 qeth_unregister_dbf_views();
5597 return -ENOMEM;
5598 }
5599
5600
5601 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5602 if (ret) {
5603 qeth_unregister_dbf_views();
5604 return ret;
5605 }
5606
5607
5608 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5609 }
5610
5611 return 0;
5612}
5613
5614int qeth_core_load_discipline(struct qeth_card *card,
5615 enum qeth_discipline_id discipline)
5616{
5617 int rc = 0;
5618
5619 mutex_lock(&qeth_mod_mutex);
5620 switch (discipline) {
5621 case QETH_DISCIPLINE_LAYER3:
5622 card->discipline = try_then_request_module(
5623 symbol_get(qeth_l3_discipline), "qeth_l3");
5624 break;
5625 case QETH_DISCIPLINE_LAYER2:
5626 card->discipline = try_then_request_module(
5627 symbol_get(qeth_l2_discipline), "qeth_l2");
5628 break;
5629 default:
5630 break;
5631 }
5632
5633 if (!card->discipline) {
5634 dev_err(&card->gdev->dev, "There is no kernel module to "
5635 "support discipline %d\n", discipline);
5636 rc = -EINVAL;
5637 }
5638 mutex_unlock(&qeth_mod_mutex);
5639 return rc;
5640}
5641
5642void qeth_core_free_discipline(struct qeth_card *card)
5643{
5644 if (card->options.layer2)
5645 symbol_put(qeth_l2_discipline);
5646 else
5647 symbol_put(qeth_l3_discipline);
5648 card->discipline = NULL;
5649}
5650
5651const struct device_type qeth_generic_devtype = {
5652 .name = "qeth_generic",
5653 .groups = qeth_generic_attr_groups,
5654};
5655EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5656
5657static const struct device_type qeth_osn_devtype = {
5658 .name = "qeth_osn",
5659 .groups = qeth_osn_attr_groups,
5660};
5661
5662#define DBF_NAME_LEN 20
5663
5664struct qeth_dbf_entry {
5665 char dbf_name[DBF_NAME_LEN];
5666 debug_info_t *dbf_info;
5667 struct list_head dbf_list;
5668};
5669
5670static LIST_HEAD(qeth_dbf_list);
5671static DEFINE_MUTEX(qeth_dbf_list_mutex);
5672
5673static debug_info_t *qeth_get_dbf_entry(char *name)
5674{
5675 struct qeth_dbf_entry *entry;
5676 debug_info_t *rc = NULL;
5677
5678 mutex_lock(&qeth_dbf_list_mutex);
5679 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5680 if (strcmp(entry->dbf_name, name) == 0) {
5681 rc = entry->dbf_info;
5682 break;
5683 }
5684 }
5685 mutex_unlock(&qeth_dbf_list_mutex);
5686 return rc;
5687}
5688
5689static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5690{
5691 struct qeth_dbf_entry *new_entry;
5692
5693 card->debug = debug_register(name, 2, 1, 8);
5694 if (!card->debug) {
5695 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5696 goto err;
5697 }
5698 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5699 goto err_dbg;
5700 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5701 if (!new_entry)
5702 goto err_dbg;
5703 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5704 new_entry->dbf_info = card->debug;
5705 mutex_lock(&qeth_dbf_list_mutex);
5706 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5707 mutex_unlock(&qeth_dbf_list_mutex);
5708
5709 return 0;
5710
5711err_dbg:
5712 debug_unregister(card->debug);
5713err:
5714 return -ENOMEM;
5715}
5716
5717static void qeth_clear_dbf_list(void)
5718{
5719 struct qeth_dbf_entry *entry, *tmp;
5720
5721 mutex_lock(&qeth_dbf_list_mutex);
5722 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5723 list_del(&entry->dbf_list);
5724 debug_unregister(entry->dbf_info);
5725 kfree(entry);
5726 }
5727 mutex_unlock(&qeth_dbf_list_mutex);
5728}
5729
5730static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5731{
5732 struct qeth_card *card;
5733 struct device *dev;
5734 int rc;
5735 enum qeth_discipline_id enforced_disc;
5736 unsigned long flags;
5737 char dbf_name[DBF_NAME_LEN];
5738
5739 QETH_DBF_TEXT(SETUP, 2, "probedev");
5740
5741 dev = &gdev->dev;
5742 if (!get_device(dev))
5743 return -ENODEV;
5744
5745 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5746
5747 card = qeth_alloc_card();
5748 if (!card) {
5749 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5750 rc = -ENOMEM;
5751 goto err_dev;
5752 }
5753
5754 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5755 dev_name(&gdev->dev));
5756 card->debug = qeth_get_dbf_entry(dbf_name);
5757 if (!card->debug) {
5758 rc = qeth_add_dbf_entry(card, dbf_name);
5759 if (rc)
5760 goto err_card;
5761 }
5762
5763 card->read.ccwdev = gdev->cdev[0];
5764 card->write.ccwdev = gdev->cdev[1];
5765 card->data.ccwdev = gdev->cdev[2];
5766 dev_set_drvdata(&gdev->dev, card);
5767 card->gdev = gdev;
5768 gdev->cdev[0]->handler = qeth_irq;
5769 gdev->cdev[1]->handler = qeth_irq;
5770 gdev->cdev[2]->handler = qeth_irq;
5771
5772 qeth_determine_card_type(card);
5773 rc = qeth_setup_card(card);
5774 if (rc) {
5775 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5776 goto err_card;
5777 }
5778
5779 qeth_determine_capabilities(card);
5780 enforced_disc = qeth_enforce_discipline(card);
5781 switch (enforced_disc) {
5782 case QETH_DISCIPLINE_UNDETERMINED:
5783 gdev->dev.type = &qeth_generic_devtype;
5784 break;
5785 default:
5786 card->info.layer_enforced = true;
5787 rc = qeth_core_load_discipline(card, enforced_disc);
5788 if (rc)
5789 goto err_card;
5790
5791 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5792 ? card->discipline->devtype
5793 : &qeth_osn_devtype;
5794 rc = card->discipline->setup(card->gdev);
5795 if (rc)
5796 goto err_disc;
5797 break;
5798 }
5799
5800 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5801 list_add_tail(&card->list, &qeth_core_card_list.list);
5802 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5803 return 0;
5804
5805err_disc:
5806 qeth_core_free_discipline(card);
5807err_card:
5808 qeth_core_free_card(card);
5809err_dev:
5810 put_device(dev);
5811 return rc;
5812}
5813
5814static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5815{
5816 unsigned long flags;
5817 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5818
5819 QETH_DBF_TEXT(SETUP, 2, "removedv");
5820
5821 if (card->discipline) {
5822 card->discipline->remove(gdev);
5823 qeth_core_free_discipline(card);
5824 }
5825
5826 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5827 list_del(&card->list);
5828 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5829 qeth_core_free_card(card);
5830 dev_set_drvdata(&gdev->dev, NULL);
5831 put_device(&gdev->dev);
5832 return;
5833}
5834
5835static int qeth_core_set_online(struct ccwgroup_device *gdev)
5836{
5837 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5838 int rc = 0;
5839 enum qeth_discipline_id def_discipline;
5840
5841 if (!card->discipline) {
5842 if (card->info.type == QETH_CARD_TYPE_IQD)
5843 def_discipline = QETH_DISCIPLINE_LAYER3;
5844 else
5845 def_discipline = QETH_DISCIPLINE_LAYER2;
5846 rc = qeth_core_load_discipline(card, def_discipline);
5847 if (rc)
5848 goto err;
5849 rc = card->discipline->setup(card->gdev);
5850 if (rc) {
5851 qeth_core_free_discipline(card);
5852 goto err;
5853 }
5854 }
5855 rc = card->discipline->set_online(gdev);
5856err:
5857 return rc;
5858}
5859
5860static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5861{
5862 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5863 return card->discipline->set_offline(gdev);
5864}
5865
5866static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5867{
5868 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5869 qeth_set_allowed_threads(card, 0, 1);
5870 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5871 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5872 qeth_qdio_clear_card(card, 0);
5873 qeth_clear_qdio_buffers(card);
5874 qdio_free(CARD_DDEV(card));
5875}
5876
5877static int qeth_core_freeze(struct ccwgroup_device *gdev)
5878{
5879 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5880 if (card->discipline && card->discipline->freeze)
5881 return card->discipline->freeze(gdev);
5882 return 0;
5883}
5884
5885static int qeth_core_thaw(struct ccwgroup_device *gdev)
5886{
5887 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5888 if (card->discipline && card->discipline->thaw)
5889 return card->discipline->thaw(gdev);
5890 return 0;
5891}
5892
5893static int qeth_core_restore(struct ccwgroup_device *gdev)
5894{
5895 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5896 if (card->discipline && card->discipline->restore)
5897 return card->discipline->restore(gdev);
5898 return 0;
5899}
5900
5901static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5902 .driver = {
5903 .owner = THIS_MODULE,
5904 .name = "qeth",
5905 },
5906 .ccw_driver = &qeth_ccw_driver,
5907 .setup = qeth_core_probe_device,
5908 .remove = qeth_core_remove_device,
5909 .set_online = qeth_core_set_online,
5910 .set_offline = qeth_core_set_offline,
5911 .shutdown = qeth_core_shutdown,
5912 .prepare = NULL,
5913 .complete = NULL,
5914 .freeze = qeth_core_freeze,
5915 .thaw = qeth_core_thaw,
5916 .restore = qeth_core_restore,
5917};
5918
5919static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5920 size_t count)
5921{
5922 int err;
5923
5924 err = ccwgroup_create_dev(qeth_core_root_dev,
5925 &qeth_core_ccwgroup_driver, 3, buf);
5926
5927 return err ? err : count;
5928}
5929static DRIVER_ATTR_WO(group);
5930
5931static struct attribute *qeth_drv_attrs[] = {
5932 &driver_attr_group.attr,
5933 NULL,
5934};
5935static struct attribute_group qeth_drv_attr_group = {
5936 .attrs = qeth_drv_attrs,
5937};
5938static const struct attribute_group *qeth_drv_attr_groups[] = {
5939 &qeth_drv_attr_group,
5940 NULL,
5941};
5942
5943int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5944{
5945 struct qeth_card *card = dev->ml_priv;
5946 struct mii_ioctl_data *mii_data;
5947 int rc = 0;
5948
5949 if (!card)
5950 return -ENODEV;
5951
5952 if (!qeth_card_hw_is_reachable(card))
5953 return -ENODEV;
5954
5955 if (card->info.type == QETH_CARD_TYPE_OSN)
5956 return -EPERM;
5957
5958 switch (cmd) {
5959 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5960 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5961 break;
5962 case SIOC_QETH_GET_CARD_TYPE:
5963 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5964 card->info.type == QETH_CARD_TYPE_OSM ||
5965 card->info.type == QETH_CARD_TYPE_OSX) &&
5966 !card->info.guestlan)
5967 return 1;
5968 else
5969 return 0;
5970 case SIOCGMIIPHY:
5971 mii_data = if_mii(rq);
5972 mii_data->phy_id = 0;
5973 break;
5974 case SIOCGMIIREG:
5975 mii_data = if_mii(rq);
5976 if (mii_data->phy_id != 0)
5977 rc = -EINVAL;
5978 else
5979 mii_data->val_out = qeth_mdio_read(dev,
5980 mii_data->phy_id, mii_data->reg_num);
5981 break;
5982 case SIOC_QETH_QUERY_OAT:
5983 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5984 break;
5985 default:
5986 if (card->discipline->do_ioctl)
5987 rc = card->discipline->do_ioctl(dev, rq, cmd);
5988 else
5989 rc = -EOPNOTSUPP;
5990 }
5991 if (rc)
5992 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5993 return rc;
5994}
5995EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5996
5997static struct {
5998 const char str[ETH_GSTRING_LEN];
5999} qeth_ethtool_stats_keys[] = {
6000{"rx skbs"},
6001 {"rx buffers"},
6002 {"tx skbs"},
6003 {"tx buffers"},
6004 {"tx skbs no packing"},
6005 {"tx buffers no packing"},
6006 {"tx skbs packing"},
6007 {"tx buffers packing"},
6008 {"tx sg skbs"},
6009 {"tx sg frags"},
6010{"rx sg skbs"},
6011 {"rx sg frags"},
6012 {"rx sg page allocs"},
6013 {"tx large kbytes"},
6014 {"tx large count"},
6015 {"tx pk state ch n->p"},
6016 {"tx pk state ch p->n"},
6017 {"tx pk watermark low"},
6018 {"tx pk watermark high"},
6019 {"queue 0 buffer usage"},
6020{"queue 1 buffer usage"},
6021 {"queue 2 buffer usage"},
6022 {"queue 3 buffer usage"},
6023 {"rx poll time"},
6024 {"rx poll count"},
6025 {"rx do_QDIO time"},
6026 {"rx do_QDIO count"},
6027 {"tx handler time"},
6028 {"tx handler count"},
6029 {"tx time"},
6030{"tx count"},
6031 {"tx do_QDIO time"},
6032 {"tx do_QDIO count"},
6033 {"tx csum"},
6034 {"tx lin"},
6035 {"tx linfail"},
6036 {"cq handler count"},
6037 {"cq handler time"}
6038};
6039
6040int qeth_core_get_sset_count(struct net_device *dev, int stringset)
6041{
6042 switch (stringset) {
6043 case ETH_SS_STATS:
6044 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
6045 default:
6046 return -EINVAL;
6047 }
6048}
6049EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
6050
6051void qeth_core_get_ethtool_stats(struct net_device *dev,
6052 struct ethtool_stats *stats, u64 *data)
6053{
6054 struct qeth_card *card = dev->ml_priv;
6055 data[0] = card->stats.rx_packets -
6056 card->perf_stats.initial_rx_packets;
6057 data[1] = card->perf_stats.bufs_rec;
6058 data[2] = card->stats.tx_packets -
6059 card->perf_stats.initial_tx_packets;
6060 data[3] = card->perf_stats.bufs_sent;
6061 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
6062 - card->perf_stats.skbs_sent_pack;
6063 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
6064 data[6] = card->perf_stats.skbs_sent_pack;
6065 data[7] = card->perf_stats.bufs_sent_pack;
6066 data[8] = card->perf_stats.sg_skbs_sent;
6067 data[9] = card->perf_stats.sg_frags_sent;
6068 data[10] = card->perf_stats.sg_skbs_rx;
6069 data[11] = card->perf_stats.sg_frags_rx;
6070 data[12] = card->perf_stats.sg_alloc_page_rx;
6071 data[13] = (card->perf_stats.large_send_bytes >> 10);
6072 data[14] = card->perf_stats.large_send_cnt;
6073 data[15] = card->perf_stats.sc_dp_p;
6074 data[16] = card->perf_stats.sc_p_dp;
6075 data[17] = QETH_LOW_WATERMARK_PACK;
6076 data[18] = QETH_HIGH_WATERMARK_PACK;
6077 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
6078 data[20] = (card->qdio.no_out_queues > 1) ?
6079 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
6080 data[21] = (card->qdio.no_out_queues > 2) ?
6081 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
6082 data[22] = (card->qdio.no_out_queues > 3) ?
6083 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
6084 data[23] = card->perf_stats.inbound_time;
6085 data[24] = card->perf_stats.inbound_cnt;
6086 data[25] = card->perf_stats.inbound_do_qdio_time;
6087 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6088 data[27] = card->perf_stats.outbound_handler_time;
6089 data[28] = card->perf_stats.outbound_handler_cnt;
6090 data[29] = card->perf_stats.outbound_time;
6091 data[30] = card->perf_stats.outbound_cnt;
6092 data[31] = card->perf_stats.outbound_do_qdio_time;
6093 data[32] = card->perf_stats.outbound_do_qdio_cnt;
6094 data[33] = card->perf_stats.tx_csum;
6095 data[34] = card->perf_stats.tx_lin;
6096 data[35] = card->perf_stats.tx_linfail;
6097 data[36] = card->perf_stats.cq_cnt;
6098 data[37] = card->perf_stats.cq_time;
6099}
6100EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6101
6102void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6103{
6104 switch (stringset) {
6105 case ETH_SS_STATS:
6106 memcpy(data, &qeth_ethtool_stats_keys,
6107 sizeof(qeth_ethtool_stats_keys));
6108 break;
6109 default:
6110 WARN_ON(1);
6111 break;
6112 }
6113}
6114EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6115
6116void qeth_core_get_drvinfo(struct net_device *dev,
6117 struct ethtool_drvinfo *info)
6118{
6119 struct qeth_card *card = dev->ml_priv;
6120
6121 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6122 sizeof(info->driver));
6123 strlcpy(info->version, "1.0", sizeof(info->version));
6124 strlcpy(info->fw_version, card->info.mcl_level,
6125 sizeof(info->fw_version));
6126 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6127 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
6128}
6129EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6130
6131
6132
6133
6134
6135static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
6136 int maxspeed, int porttype)
6137{
6138 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6139 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6140 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
6141
6142 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6143 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
6144
6145 switch (porttype) {
6146 case PORT_TP:
6147 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6148 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
6149 break;
6150 case PORT_FIBRE:
6151 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6152 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
6153 break;
6154 default:
6155 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6156 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
6157 WARN_ON_ONCE(1);
6158 }
6159
6160
6161 switch (maxspeed) {
6162 case SPEED_10000:
6163 ethtool_link_ksettings_add_link_mode(cmd, supported,
6164 10000baseT_Full);
6165 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6166 10000baseT_Full);
6167 case SPEED_1000:
6168 ethtool_link_ksettings_add_link_mode(cmd, supported,
6169 1000baseT_Full);
6170 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6171 1000baseT_Full);
6172 ethtool_link_ksettings_add_link_mode(cmd, supported,
6173 1000baseT_Half);
6174 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6175 1000baseT_Half);
6176 case SPEED_100:
6177 ethtool_link_ksettings_add_link_mode(cmd, supported,
6178 100baseT_Full);
6179 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6180 100baseT_Full);
6181 ethtool_link_ksettings_add_link_mode(cmd, supported,
6182 100baseT_Half);
6183 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6184 100baseT_Half);
6185 case SPEED_10:
6186 ethtool_link_ksettings_add_link_mode(cmd, supported,
6187 10baseT_Full);
6188 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6189 10baseT_Full);
6190 ethtool_link_ksettings_add_link_mode(cmd, supported,
6191 10baseT_Half);
6192 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6193 10baseT_Half);
6194
6195 break;
6196 default:
6197 ethtool_link_ksettings_add_link_mode(cmd, supported,
6198 10baseT_Full);
6199 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6200 10baseT_Full);
6201 ethtool_link_ksettings_add_link_mode(cmd, supported,
6202 10baseT_Half);
6203 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6204 10baseT_Half);
6205 WARN_ON_ONCE(1);
6206 }
6207}
6208
6209int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6210 struct ethtool_link_ksettings *cmd)
6211{
6212 struct qeth_card *card = netdev->ml_priv;
6213 enum qeth_link_types link_type;
6214 struct carrier_info carrier_info;
6215 int rc;
6216
6217 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6218 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6219 else
6220 link_type = card->info.link_type;
6221
6222 cmd->base.duplex = DUPLEX_FULL;
6223 cmd->base.autoneg = AUTONEG_ENABLE;
6224 cmd->base.phy_address = 0;
6225 cmd->base.mdio_support = 0;
6226 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6227 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
6228
6229 switch (link_type) {
6230 case QETH_LINK_TYPE_FAST_ETH:
6231 case QETH_LINK_TYPE_LANE_ETH100:
6232 cmd->base.speed = SPEED_100;
6233 cmd->base.port = PORT_TP;
6234 break;
6235 case QETH_LINK_TYPE_GBIT_ETH:
6236 case QETH_LINK_TYPE_LANE_ETH1000:
6237 cmd->base.speed = SPEED_1000;
6238 cmd->base.port = PORT_FIBRE;
6239 break;
6240 case QETH_LINK_TYPE_10GBIT_ETH:
6241 cmd->base.speed = SPEED_10000;
6242 cmd->base.port = PORT_FIBRE;
6243 break;
6244 default:
6245 cmd->base.speed = SPEED_10;
6246 cmd->base.port = PORT_TP;
6247 }
6248 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
6249
6250
6251
6252
6253 if (!qeth_card_hw_is_reachable(card))
6254 return -ENODEV;
6255 rc = qeth_query_card_info(card, &carrier_info);
6256 if (rc == -EOPNOTSUPP)
6257 return 0;
6258 if (rc)
6259 return rc;
6260
6261
6262 netdev_dbg(netdev,
6263 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6264 carrier_info.card_type,
6265 carrier_info.port_mode,
6266 carrier_info.port_speed);
6267
6268
6269
6270 switch (carrier_info.card_type) {
6271 case CARD_INFO_TYPE_1G_COPPER_A:
6272 case CARD_INFO_TYPE_1G_COPPER_B:
6273 cmd->base.port = PORT_TP;
6274 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
6275 break;
6276 case CARD_INFO_TYPE_1G_FIBRE_A:
6277 case CARD_INFO_TYPE_1G_FIBRE_B:
6278 cmd->base.port = PORT_FIBRE;
6279 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
6280 break;
6281 case CARD_INFO_TYPE_10G_FIBRE_A:
6282 case CARD_INFO_TYPE_10G_FIBRE_B:
6283 cmd->base.port = PORT_FIBRE;
6284 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
6285 break;
6286 }
6287
6288 switch (carrier_info.port_mode) {
6289 case CARD_INFO_PORTM_FULLDUPLEX:
6290 cmd->base.duplex = DUPLEX_FULL;
6291 break;
6292 case CARD_INFO_PORTM_HALFDUPLEX:
6293 cmd->base.duplex = DUPLEX_HALF;
6294 break;
6295 }
6296
6297 switch (carrier_info.port_speed) {
6298 case CARD_INFO_PORTS_10M:
6299 cmd->base.speed = SPEED_10;
6300 break;
6301 case CARD_INFO_PORTS_100M:
6302 cmd->base.speed = SPEED_100;
6303 break;
6304 case CARD_INFO_PORTS_1G:
6305 cmd->base.speed = SPEED_1000;
6306 break;
6307 case CARD_INFO_PORTS_10G:
6308 cmd->base.speed = SPEED_10000;
6309 break;
6310 }
6311
6312 return 0;
6313}
6314EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
6315
6316
6317
6318
6319
6320
6321
6322static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6323 struct qeth_reply *reply,
6324 unsigned long data)
6325{
6326 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6327 struct qeth_checksum_cmd *chksum_cb =
6328 (struct qeth_checksum_cmd *)reply->param;
6329
6330 QETH_CARD_TEXT(card, 4, "chkdoccb");
6331 if (qeth_setassparms_inspect_rc(cmd))
6332 return 0;
6333
6334 memset(chksum_cb, 0, sizeof(*chksum_cb));
6335 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6336 chksum_cb->supported =
6337 cmd->data.setassparms.data.chksum.supported;
6338 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6339 }
6340 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6341 chksum_cb->supported =
6342 cmd->data.setassparms.data.chksum.supported;
6343 chksum_cb->enabled =
6344 cmd->data.setassparms.data.chksum.enabled;
6345 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6346 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6347 }
6348 return 0;
6349}
6350
6351
6352static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6353 enum qeth_ipa_funcs ipa_func,
6354 __u16 cmd_code, long data,
6355 struct qeth_checksum_cmd *chksum_cb)
6356{
6357 struct qeth_cmd_buffer *iob;
6358 int rc = -ENOMEM;
6359
6360 QETH_CARD_TEXT(card, 4, "chkdocmd");
6361 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6362 sizeof(__u32), QETH_PROT_IPV4);
6363 if (iob)
6364 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6365 qeth_ipa_checksum_run_cmd_cb,
6366 chksum_cb);
6367 return rc;
6368}
6369
6370static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
6371{
6372 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6373 QETH_IPA_CHECKSUM_UDP |
6374 QETH_IPA_CHECKSUM_TCP;
6375 struct qeth_checksum_cmd chksum_cb;
6376 int rc;
6377
6378 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6379 &chksum_cb);
6380 if (!rc) {
6381 if ((required_features & chksum_cb.supported) !=
6382 required_features)
6383 rc = -EIO;
6384 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6385 cstype == IPA_INBOUND_CHECKSUM)
6386 dev_warn(&card->gdev->dev,
6387 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6388 QETH_CARD_IFNAME(card));
6389 }
6390 if (rc) {
6391 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
6392 dev_warn(&card->gdev->dev,
6393 "Starting HW checksumming for %s failed, using SW checksumming\n",
6394 QETH_CARD_IFNAME(card));
6395 return rc;
6396 }
6397 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6398 chksum_cb.supported, &chksum_cb);
6399 if (!rc) {
6400 if ((required_features & chksum_cb.enabled) !=
6401 required_features)
6402 rc = -EIO;
6403 }
6404 if (rc) {
6405 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
6406 dev_warn(&card->gdev->dev,
6407 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6408 QETH_CARD_IFNAME(card));
6409 return rc;
6410 }
6411
6412 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6413 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
6414 return 0;
6415}
6416
6417static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
6418{
6419 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6420 : qeth_send_simple_setassparms(card, cstype,
6421 IPA_CMD_ASS_STOP, 0);
6422 return rc ? -EIO : 0;
6423}
6424
6425static int qeth_set_ipa_tso(struct qeth_card *card, int on)
6426{
6427 int rc;
6428
6429 QETH_CARD_TEXT(card, 3, "sttso");
6430
6431 if (on) {
6432 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6433 IPA_CMD_ASS_START, 0);
6434 if (rc) {
6435 dev_warn(&card->gdev->dev,
6436 "Starting outbound TCP segmentation offload for %s failed\n",
6437 QETH_CARD_IFNAME(card));
6438 return -EIO;
6439 }
6440 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6441 } else {
6442 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6443 IPA_CMD_ASS_STOP, 0);
6444 }
6445 return rc;
6446}
6447
6448#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO)
6449
6450
6451
6452
6453
6454
6455
6456void qeth_recover_features(struct net_device *dev)
6457{
6458 netdev_features_t features = dev->features;
6459 struct qeth_card *card = dev->ml_priv;
6460
6461
6462
6463
6464 dev->features &= ~QETH_HW_FEATURES;
6465 netdev_update_features(dev);
6466
6467 if (features == dev->features)
6468 return;
6469 dev_warn(&card->gdev->dev,
6470 "Device recovery failed to restore all offload features\n");
6471}
6472EXPORT_SYMBOL_GPL(qeth_recover_features);
6473
6474int qeth_set_features(struct net_device *dev, netdev_features_t features)
6475{
6476 struct qeth_card *card = dev->ml_priv;
6477 netdev_features_t changed = dev->features ^ features;
6478 int rc = 0;
6479
6480 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6481 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6482
6483 if ((changed & NETIF_F_IP_CSUM)) {
6484 rc = qeth_set_ipa_csum(card,
6485 features & NETIF_F_IP_CSUM ? 1 : 0,
6486 IPA_OUTBOUND_CHECKSUM);
6487 if (rc)
6488 changed ^= NETIF_F_IP_CSUM;
6489 }
6490 if ((changed & NETIF_F_RXCSUM)) {
6491 rc = qeth_set_ipa_csum(card,
6492 features & NETIF_F_RXCSUM ? 1 : 0,
6493 IPA_INBOUND_CHECKSUM);
6494 if (rc)
6495 changed ^= NETIF_F_RXCSUM;
6496 }
6497 if ((changed & NETIF_F_TSO)) {
6498 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6499 if (rc)
6500 changed ^= NETIF_F_TSO;
6501 }
6502
6503
6504 if ((dev->features ^ features) == changed)
6505 return 0;
6506
6507 dev->features ^= changed;
6508 return -EIO;
6509}
6510EXPORT_SYMBOL_GPL(qeth_set_features);
6511
6512netdev_features_t qeth_fix_features(struct net_device *dev,
6513 netdev_features_t features)
6514{
6515 struct qeth_card *card = dev->ml_priv;
6516
6517 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6518 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6519 features &= ~NETIF_F_IP_CSUM;
6520 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6521 features &= ~NETIF_F_RXCSUM;
6522 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
6523 features &= ~NETIF_F_TSO;
6524
6525 if (card->state == CARD_STATE_DOWN ||
6526 card->state == CARD_STATE_RECOVER)
6527 features &= ~QETH_HW_FEATURES;
6528 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6529 return features;
6530}
6531EXPORT_SYMBOL_GPL(qeth_fix_features);
6532
6533netdev_features_t qeth_features_check(struct sk_buff *skb,
6534 struct net_device *dev,
6535 netdev_features_t features)
6536{
6537
6538
6539
6540
6541
6542
6543
6544 if (netif_needs_gso(skb, features)) {
6545
6546 unsigned int doffset = skb->data - skb_mac_header(skb);
6547 unsigned int hsize = skb_shinfo(skb)->gso_size;
6548 unsigned int hroom = skb_headroom(skb);
6549
6550
6551 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6552 features &= ~NETIF_F_SG;
6553 }
6554
6555 return vlan_features_check(skb, features);
6556}
6557EXPORT_SYMBOL_GPL(qeth_features_check);
6558
6559static int __init qeth_core_init(void)
6560{
6561 int rc;
6562
6563 pr_info("loading core functions\n");
6564 INIT_LIST_HEAD(&qeth_core_card_list.list);
6565 INIT_LIST_HEAD(&qeth_dbf_list);
6566 rwlock_init(&qeth_core_card_list.rwlock);
6567 mutex_init(&qeth_mod_mutex);
6568
6569 qeth_wq = create_singlethread_workqueue("qeth_wq");
6570
6571 rc = qeth_register_dbf_views();
6572 if (rc)
6573 goto out_err;
6574 qeth_core_root_dev = root_device_register("qeth");
6575 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
6576 if (rc)
6577 goto register_err;
6578 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6579 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6580 if (!qeth_core_header_cache) {
6581 rc = -ENOMEM;
6582 goto slab_err;
6583 }
6584 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6585 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6586 if (!qeth_qdio_outbuf_cache) {
6587 rc = -ENOMEM;
6588 goto cqslab_err;
6589 }
6590 rc = ccw_driver_register(&qeth_ccw_driver);
6591 if (rc)
6592 goto ccw_err;
6593 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6594 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6595 if (rc)
6596 goto ccwgroup_err;
6597
6598 return 0;
6599
6600ccwgroup_err:
6601 ccw_driver_unregister(&qeth_ccw_driver);
6602ccw_err:
6603 kmem_cache_destroy(qeth_qdio_outbuf_cache);
6604cqslab_err:
6605 kmem_cache_destroy(qeth_core_header_cache);
6606slab_err:
6607 root_device_unregister(qeth_core_root_dev);
6608register_err:
6609 qeth_unregister_dbf_views();
6610out_err:
6611 pr_err("Initializing the qeth device driver failed\n");
6612 return rc;
6613}
6614
6615static void __exit qeth_core_exit(void)
6616{
6617 qeth_clear_dbf_list();
6618 destroy_workqueue(qeth_wq);
6619 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6620 ccw_driver_unregister(&qeth_ccw_driver);
6621 kmem_cache_destroy(qeth_qdio_outbuf_cache);
6622 kmem_cache_destroy(qeth_core_header_cache);
6623 root_device_unregister(qeth_core_root_dev);
6624 qeth_unregister_dbf_views();
6625 pr_info("core functions removed\n");
6626}
6627
6628module_init(qeth_core_init);
6629module_exit(qeth_core_exit);
6630MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6631MODULE_DESCRIPTION("qeth core functions");
6632MODULE_LICENSE("GPL");
6633