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26#include "../wifi.h"
27#include "../pci.h"
28#include "../base.h"
29#include "../stats.h"
30#include "reg.h"
31#include "def.h"
32#include "phy.h"
33#include "trx.h"
34#include "led.h"
35#include "fw.h"
36
37#include <linux/vermagic.h>
38
39static u8 _rtl8822be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
40{
41 switch (hw_queue) {
42 case BEACON_QUEUE:
43 return QSLT_BEACON;
44 case H2C_QUEUE:
45 return QSLT_CMD;
46 case MGNT_QUEUE:
47 return QSLT_MGNT;
48 case HIGH_QUEUE:
49 return QSLT_HIGH;
50 default:
51 return skb->priority;
52 }
53}
54
55static void _rtl8822be_query_rxphystatus(struct ieee80211_hw *hw, u8 *phystrpt,
56 struct ieee80211_hdr *hdr,
57 struct rtl_stats *pstatus)
58{
59 struct rtl_priv *rtlpriv = rtl_priv(hw);
60
61 rtlpriv->phydm.ops->phydm_query_phy_status(rtlpriv, phystrpt, hdr,
62 pstatus);
63
64
65
66
67 pstatus->signalstrength =
68 (u8)(rtl_signal_scale_mapping(hw, pstatus->rx_pwdb_all));
69}
70
71static void _rtl8822be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
72 struct sk_buff *skb,
73 struct rtl_stats *pstatus,
74 u8 *p_phystrpt)
75{
76 struct ieee80211_hdr *hdr;
77 u8 *tmp_buf;
78
79 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift +
80 24;
81
82 hdr = (struct ieee80211_hdr *)tmp_buf;
83
84
85 _rtl8822be_query_rxphystatus(hw, p_phystrpt, hdr, pstatus);
86
87
88 if (pstatus->packet_beacon && pstatus->packet_matchbssid)
89 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
90
91 if (pstatus->packet_matchbssid &&
92 ieee80211_is_data_qos(hdr->frame_control) &&
93 !is_multicast_ether_addr(ieee80211_get_DA(hdr))) {
94 struct ieee80211_qos_hdr *hdr_qos =
95 (struct ieee80211_qos_hdr *)tmp_buf;
96 u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf;
97
98 if (tid != 0 && tid != 3)
99 rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++;
100 }
101
102
103 if (p_phystrpt)
104 rtl_process_phyinfo(hw, tmp_buf, pstatus);
105}
106
107static void _rtl8822be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
108 u8 *virtualaddress)
109{
110 u32 dwtmp = 0;
111
112 memset(virtualaddress, 0, 8);
113
114 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
115 if (ptcb_desc->empkt_num == 1) {
116 dwtmp = ptcb_desc->empkt_len[0];
117 } else {
118 dwtmp = ptcb_desc->empkt_len[0];
119 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
120 dwtmp += ptcb_desc->empkt_len[1];
121 }
122 SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
123
124 if (ptcb_desc->empkt_num <= 3) {
125 dwtmp = ptcb_desc->empkt_len[2];
126 } else {
127 dwtmp = ptcb_desc->empkt_len[2];
128 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
129 dwtmp += ptcb_desc->empkt_len[3];
130 }
131 SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
132 if (ptcb_desc->empkt_num <= 5) {
133 dwtmp = ptcb_desc->empkt_len[4];
134 } else {
135 dwtmp = ptcb_desc->empkt_len[4];
136 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
137 dwtmp += ptcb_desc->empkt_len[5];
138 }
139 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
140 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
141 if (ptcb_desc->empkt_num <= 7) {
142 dwtmp = ptcb_desc->empkt_len[6];
143 } else {
144 dwtmp = ptcb_desc->empkt_len[6];
145 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
146 dwtmp += ptcb_desc->empkt_len[7];
147 }
148 SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
149 if (ptcb_desc->empkt_num <= 9) {
150 dwtmp = ptcb_desc->empkt_len[8];
151 } else {
152 dwtmp = ptcb_desc->empkt_len[8];
153 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
154 dwtmp += ptcb_desc->empkt_len[9];
155 }
156 SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
157}
158
159static bool rtl8822be_get_rxdesc_is_ht(struct ieee80211_hw *hw, u8 *pdesc)
160{
161 struct rtl_priv *rtlpriv = rtl_priv(hw);
162 u8 rx_rate = 0;
163
164 rx_rate = GET_RX_DESC_RX_RATE(pdesc);
165
166 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
167
168 if (rx_rate >= DESC_RATEMCS0 && rx_rate <= DESC_RATEMCS15)
169 return true;
170 else
171 return false;
172}
173
174static bool rtl8822be_get_rxdesc_is_vht(struct ieee80211_hw *hw, u8 *pdesc)
175{
176 struct rtl_priv *rtlpriv = rtl_priv(hw);
177 u8 rx_rate = 0;
178
179 rx_rate = GET_RX_DESC_RX_RATE(pdesc);
180
181 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
182
183 if (rx_rate >= DESC_RATEVHT1SS_MCS0)
184 return true;
185 else
186 return false;
187}
188
189static u8 rtl8822be_get_rx_vht_nss(struct ieee80211_hw *hw, u8 *pdesc)
190{
191 u8 rx_rate = 0;
192 u8 vht_nss = 0;
193
194 rx_rate = GET_RX_DESC_RX_RATE(pdesc);
195
196 if (rx_rate >= DESC_RATEVHT1SS_MCS0 &&
197 rx_rate <= DESC_RATEVHT1SS_MCS9)
198 vht_nss = 1;
199 else if ((rx_rate >= DESC_RATEVHT2SS_MCS0) &&
200 (rx_rate <= DESC_RATEVHT2SS_MCS9))
201 vht_nss = 2;
202
203 return vht_nss;
204}
205
206bool rtl8822be_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *status,
207 struct ieee80211_rx_status *rx_status, u8 *pdesc,
208 struct sk_buff *skb)
209{
210 struct rtl_priv *rtlpriv = rtl_priv(hw);
211 u8 *p_phystrpt = NULL;
212 struct ieee80211_hdr *hdr;
213
214 u32 phystatus = GET_RX_DESC_PHYST(pdesc);
215
216 if (GET_RX_DESC_C2H(pdesc) == 0)
217 status->packet_report_type = NORMAL_RX;
218 else
219 status->packet_report_type = C2H_PACKET;
220
221 status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
222 status->rx_drvinfo_size =
223 (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) * RX_DRV_INFO_SIZE_UNIT;
224 status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
225 status->icv = (u16)GET_RX_DESC_ICV_ERR(pdesc);
226 status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
227 status->hwerror = (status->crc | status->icv);
228 status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
229 status->rate = (u8)GET_RX_DESC_RX_RATE(pdesc);
230 status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
231 status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
232 status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
233 status->is_ht = rtl8822be_get_rxdesc_is_ht(hw, pdesc);
234 status->is_vht = rtl8822be_get_rxdesc_is_vht(hw, pdesc);
235 status->vht_nss = rtl8822be_get_rx_vht_nss(hw, pdesc);
236 status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
237
238 status->macid = GET_RX_DESC_MACID(pdesc);
239 if (GET_RX_DESC_PATTERN_MATCH(pdesc))
240 status->wake_match = BIT(2);
241 else if (GET_RX_DESC_MAGIC_WAKE(pdesc))
242 status->wake_match = BIT(1);
243 else if (GET_RX_DESC_UNICAST_WAKE(pdesc))
244 status->wake_match = BIT(0);
245 else
246 status->wake_match = 0;
247 if (status->wake_match)
248 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
249 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
250 status->wake_match);
251 rx_status->freq = hw->conf.chandef.chan->center_freq;
252 rx_status->band = hw->conf.chandef.chan->band;
253
254 if (phystatus)
255 p_phystrpt = (skb->data + status->rx_bufshift + 24);
256
257 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
258 status->rx_bufshift + 24);
259
260 if (status->crc)
261 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
262
263 if (status->is_ht)
264 rx_status->encoding = RX_ENC_HT;
265 if (status->is_vht)
266 rx_status->encoding = RX_ENC_VHT;
267
268 rx_status->nss = status->vht_nss;
269
270 rx_status->flag |= RX_FLAG_MACTIME_START;
271
272
273
274
275
276
277
278
279
280
281 if (status->decrypted) {
282 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
283 (ieee80211_has_protected(hdr->frame_control)))
284 rx_status->flag |= RX_FLAG_DECRYPTED;
285 else
286 rx_status->flag &= ~RX_FLAG_DECRYPTED;
287 }
288
289
290
291
292
293
294 rx_status->rate_idx = rtlwifi_rate_mapping(
295 hw, status->is_ht, status->is_vht, status->rate);
296
297 rx_status->mactime = status->timestamp_low;
298
299 _rtl8822be_translate_rx_signal_stuff(hw, skb, status, p_phystrpt);
300
301
302 if (!p_phystrpt)
303 goto label_no_physt;
304
305 rx_status->signal = status->recvsignalpower;
306
307 if (status->rx_packet_bw == HT_CHANNEL_WIDTH_20_40)
308 rx_status->bw = RATE_INFO_BW_40;
309 else if (status->rx_packet_bw == HT_CHANNEL_WIDTH_80)
310 rx_status->bw = RATE_INFO_BW_80;
311
312label_no_physt:
313
314 return true;
315}
316
317void rtl8822be_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc,
318 u8 queue_index)
319{
320 struct rtl_priv *rtlpriv = rtl_priv(hw);
321 u8 first_seg;
322 u8 last_seg;
323 u16 total_len;
324 u16 read_cnt = 0;
325
326 if (!header_desc)
327 return;
328
329 do {
330 total_len = (u16)GET_RX_BUFFER_DESC_TOTAL_LENGTH(header_desc);
331 first_seg = (u8)GET_RX_BUFFER_DESC_FS(header_desc);
332 last_seg = (u8)GET_RX_BUFFER_DESC_LS(header_desc);
333
334 if (read_cnt++ > 20) {
335 RT_TRACE(rtlpriv, COMP_RECV, DBG_DMESG,
336 "RX chk DMA over %d times\n", read_cnt);
337 break;
338 }
339
340 } while (total_len == 0 && first_seg == 0 && last_seg == 0);
341}
342
343u16 rtl8822be_rx_desc_buff_remained_cnt(struct ieee80211_hw *hw, u8 queue_index)
344{
345 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
346 struct rtl_priv *rtlpriv = rtl_priv(hw);
347 u16 desc_idx_hw = 0, desc_idx_host = 0, remind_cnt = 0;
348 u32 tmp_4byte = 0;
349
350 u32 rw_mask = 0x1ff;
351
352 tmp_4byte = rtl_read_dword(rtlpriv, REG_RXQ_RXBD_IDX_8822B);
353 desc_idx_hw = (u16)((tmp_4byte >> 16) & rw_mask);
354 desc_idx_host = (u16)(tmp_4byte & rw_mask);
355
356
357 if (desc_idx_hw == desc_idx_host)
358 return 0;
359
360 remind_cnt =
361 (desc_idx_hw > desc_idx_host) ?
362 (desc_idx_hw - desc_idx_host) :
363 (RX_DESC_NUM_8822BE - (desc_idx_host - desc_idx_hw));
364
365 rtlpci->rx_ring[queue_index].next_rx_rp = desc_idx_host;
366
367 return remind_cnt;
368}
369
370static u16 get_desc_address_from_queue_index(u16 queue_index)
371{
372
373
374
375 u16 desc_address = REG_BEQ_TXBD_IDX_8822B;
376
377 switch (queue_index) {
378 case BK_QUEUE:
379 desc_address = REG_BKQ_TXBD_IDX_8822B;
380 break;
381 case BE_QUEUE:
382 desc_address = REG_BEQ_TXBD_IDX_8822B;
383 break;
384 case VI_QUEUE:
385 desc_address = REG_VIQ_TXBD_IDX_8822B;
386 break;
387 case VO_QUEUE:
388 desc_address = REG_VOQ_TXBD_IDX_8822B;
389 break;
390 case BEACON_QUEUE:
391 desc_address = REG_BEQ_TXBD_IDX_8822B;
392 break;
393 case H2C_QUEUE:
394 desc_address = REG_H2CQ_TXBD_IDX_8822B;
395 break;
396 case MGNT_QUEUE:
397 desc_address = REG_MGQ_TXBD_IDX_8822B;
398 break;
399 case HIGH_QUEUE:
400 desc_address = REG_HI0Q_TXBD_IDX_8822B;
401 break;
402 case HCCA_QUEUE:
403 desc_address = REG_BEQ_TXBD_IDX_8822B;
404 break;
405 default:
406 break;
407 }
408 return desc_address;
409}
410
411
412u16 rtl8822be_get_available_desc(struct ieee80211_hw *hw, u8 q_idx)
413{
414 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
415 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[q_idx];
416
417 return calc_fifo_space(ring->cur_tx_rp, ring->cur_tx_wp,
418 TX_DESC_NUM_8822B);
419}
420
421void rtl8822be_pre_fill_tx_bd_desc(struct ieee80211_hw *hw, u8 *tx_bd_desc,
422 u8 *desc, u8 queue_index,
423 struct sk_buff *skb, dma_addr_t data_addr)
424{
425 struct rtl_priv *rtlpriv = rtl_priv(hw);
426 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
427 u32 pkt_len = skb->len;
428 u16 desc_size = 48;
429 u32 psblen = 0;
430 u32 total_packet_size = 0;
431 u16 current_bd_desc;
432 u8 i = 0;
433
434 u16 append_early_mode_size = 0;
435 u8 segmentnum = 1 << (RTL8822BE_SEG_NUM + 1);
436 dma_addr_t desc_dma_addr;
437 bool dma64 = rtlpriv->cfg->mod_params->dma64;
438
439 current_bd_desc = rtlpci->tx_ring[queue_index].cur_tx_wp;
440
441 total_packet_size = desc_size + pkt_len;
442
443 if (rtlpriv->rtlhal.earlymode_enable) {
444 if (queue_index < BEACON_QUEUE) {
445 append_early_mode_size = 8;
446 total_packet_size += append_early_mode_size;
447 }
448 }
449
450
451 psblen = (total_packet_size - 1) / 128 + 1;
452
453
454 desc_dma_addr = rtlpci->tx_ring[queue_index].dma +
455 (current_bd_desc * TX_DESC_SIZE);
456
457
458 SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, 0);
459 SET_TX_BUFF_DESC_PSB(tx_bd_desc, 0);
460 SET_TX_BUFF_DESC_OWN(tx_bd_desc, 0);
461
462 for (i = 1; i < segmentnum; i++) {
463 SET_TXBUFFER_DESC_LEN_WITH_OFFSET(tx_bd_desc, i, 0);
464 SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(tx_bd_desc, i, 0);
465 SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(tx_bd_desc, i, 0);
466 SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(tx_bd_desc, i, 0, dma64);
467 }
468
469
470 CLEAR_PCI_TX_DESC_CONTENT(desc, TX_DESC_SIZE);
471
472 if (rtlpriv->rtlhal.earlymode_enable) {
473 if (queue_index < BEACON_QUEUE)
474 SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size + 8);
475 else
476 SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size);
477 } else {
478 SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size);
479 }
480 SET_TX_BUFF_DESC_PSB(tx_bd_desc, psblen);
481 SET_TX_BUFF_DESC_ADDR_LOW_0(tx_bd_desc, desc_dma_addr);
482 SET_TX_BUFF_DESC_ADDR_HIGH_0(tx_bd_desc, ((u64)desc_dma_addr >> 32),
483 dma64);
484
485 SET_TXBUFFER_DESC_LEN_WITH_OFFSET(tx_bd_desc, 1, pkt_len);
486 SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(tx_bd_desc, 1, 0);
487 SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(tx_bd_desc, 1, data_addr);
488 SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(tx_bd_desc, 1,
489 ((u64)data_addr >> 32), dma64);
490
491 SET_TX_DESC_TXPKTSIZE(desc, (u16)(pkt_len));
492}
493
494static u8 rtl8822be_bw_mapping(struct ieee80211_hw *hw,
495 struct rtl_tcb_desc *ptcb_desc)
496{
497 struct rtl_priv *rtlpriv = rtl_priv(hw);
498 struct rtl_phy *rtlphy = &rtlpriv->phy;
499 u8 bw_setting_of_desc = 0;
500
501 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
502 "%s, current_chan_bw %d, packet_bw %d\n", __func__,
503 rtlphy->current_chan_bw, ptcb_desc->packet_bw);
504
505 if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
506 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)
507 bw_setting_of_desc = 2;
508 else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40)
509 bw_setting_of_desc = 1;
510 else
511 bw_setting_of_desc = 0;
512 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
513 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40 ||
514 ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)
515 bw_setting_of_desc = 1;
516 else
517 bw_setting_of_desc = 0;
518 } else {
519 bw_setting_of_desc = 0;
520 }
521
522 return bw_setting_of_desc;
523}
524
525static u8 rtl8822be_sc_mapping(struct ieee80211_hw *hw,
526 struct rtl_tcb_desc *ptcb_desc)
527{
528 struct rtl_priv *rtlpriv = rtl_priv(hw);
529 struct rtl_phy *rtlphy = &rtlpriv->phy;
530 struct rtl_mac *mac = rtl_mac(rtlpriv);
531 u8 sc_setting_of_desc = 0;
532
533 if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
534 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) {
535 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
536 } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
537 if (mac->cur_80_prime_sc == HAL_PRIME_CHNL_OFFSET_LOWER)
538 sc_setting_of_desc =
539 VHT_DATA_SC_40_LOWER_OF_80MHZ;
540 else if (mac->cur_80_prime_sc ==
541 HAL_PRIME_CHNL_OFFSET_UPPER)
542 sc_setting_of_desc =
543 VHT_DATA_SC_40_UPPER_OF_80MHZ;
544 else
545 RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
546 "%s: Not Correct Primary40MHz Setting\n",
547 __func__);
548 } else {
549 if (mac->cur_40_prime_sc ==
550 HAL_PRIME_CHNL_OFFSET_LOWER &&
551 mac->cur_80_prime_sc ==
552 HAL_PRIME_CHNL_OFFSET_LOWER)
553 sc_setting_of_desc =
554 VHT_DATA_SC_20_LOWEST_OF_80MHZ;
555 else if ((mac->cur_40_prime_sc ==
556 HAL_PRIME_CHNL_OFFSET_UPPER) &&
557 (mac->cur_80_prime_sc ==
558 HAL_PRIME_CHNL_OFFSET_LOWER))
559 sc_setting_of_desc =
560 VHT_DATA_SC_20_LOWER_OF_80MHZ;
561 else if ((mac->cur_40_prime_sc ==
562 HAL_PRIME_CHNL_OFFSET_LOWER) &&
563 (mac->cur_80_prime_sc ==
564 HAL_PRIME_CHNL_OFFSET_UPPER))
565 sc_setting_of_desc =
566 VHT_DATA_SC_20_UPPER_OF_80MHZ;
567 else if ((mac->cur_40_prime_sc ==
568 HAL_PRIME_CHNL_OFFSET_UPPER) &&
569 (mac->cur_80_prime_sc ==
570 HAL_PRIME_CHNL_OFFSET_UPPER))
571 sc_setting_of_desc =
572 VHT_DATA_SC_20_UPPERST_OF_80MHZ;
573 else
574 RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
575 "%s: Not Correct Primary40MHz Setting\n",
576 __func__);
577 }
578 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
579 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
580 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
581 } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20) {
582 if (mac->cur_40_prime_sc ==
583 HAL_PRIME_CHNL_OFFSET_UPPER) {
584 sc_setting_of_desc =
585 VHT_DATA_SC_20_UPPER_OF_80MHZ;
586 } else if (mac->cur_40_prime_sc ==
587 HAL_PRIME_CHNL_OFFSET_LOWER) {
588 sc_setting_of_desc =
589 VHT_DATA_SC_20_LOWER_OF_80MHZ;
590 } else {
591 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
592 }
593 }
594 } else {
595 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
596 }
597
598 return sc_setting_of_desc;
599}
600
601void rtl8822be_tx_fill_desc(struct ieee80211_hw *hw, struct ieee80211_hdr *hdr,
602 u8 *pdesc_tx, u8 *pbd_desc_tx,
603 struct ieee80211_tx_info *info,
604 struct ieee80211_sta *sta, struct sk_buff *skb,
605 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
606{
607 struct rtl_priv *rtlpriv = rtl_priv(hw);
608 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
609 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
610 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
611 struct rtl_phy *rtlphy = &rtlpriv->phy;
612 u8 *pdesc = (u8 *)pdesc_tx;
613 u16 seq_number;
614 __le16 fc = hdr->frame_control;
615 u8 fw_qsel = _rtl8822be_map_hwqueue_to_fwqueue(skb, hw_queue);
616 bool firstseg =
617 ((hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
618 bool lastseg = ((hdr->frame_control &
619 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
620 dma_addr_t mapping;
621 u8 short_gi = 0;
622
623 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
624 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
625
626 if (rtlhal->earlymode_enable) {
627 skb_push(skb, EM_HDR_LEN);
628 memset(skb->data, 0, EM_HDR_LEN);
629 }
630 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
631 PCI_DMA_TODEVICE);
632 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
633 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, "DMA mapping error");
634 return;
635 }
636
637 if (pbd_desc_tx)
638 rtl8822be_pre_fill_tx_bd_desc(hw, pbd_desc_tx, pdesc, hw_queue,
639 skb, mapping);
640
641 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
642 firstseg = true;
643 lastseg = true;
644 }
645 if (firstseg) {
646 if (rtlhal->earlymode_enable) {
647 SET_TX_DESC_PKT_OFFSET(pdesc, 1);
648 SET_TX_DESC_OFFSET(pdesc,
649 USB_HWDESC_HEADER_LEN + EM_HDR_LEN);
650 if (ptcb_desc->empkt_num) {
651 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
652 "Insert 8 byte.pTcb->EMPktNum:%d\n",
653 ptcb_desc->empkt_num);
654 _rtl8822be_insert_emcontent(ptcb_desc,
655 (u8 *)(skb->data));
656 }
657 } else {
658 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
659 }
660
661
662 rtl_get_tx_report(ptcb_desc, pdesc, hw);
663
664 if (rtlpriv->rtlhal.current_bandtype == BAND_ON_5G &&
665 ptcb_desc->hw_rate < DESC_RATE6M) {
666 RT_TRACE(rtlpriv, COMP_SEND, DBG_WARNING,
667 "hw_rate=0x%X is invalid in 5G\n",
668 ptcb_desc->hw_rate);
669 ptcb_desc->hw_rate = DESC_RATE6M;
670 }
671 SET_TX_DESC_DATARATE(pdesc, ptcb_desc->hw_rate);
672
673 if (ptcb_desc->hw_rate > DESC_RATEMCS0)
674 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
675 else
676 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
677
678 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
679 SET_TX_DESC_AGG_EN(pdesc, 1);
680 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x1F);
681 }
682 SET_TX_DESC_SW_SEQ(pdesc, seq_number);
683 SET_TX_DESC_RTSEN(pdesc, ((ptcb_desc->rts_enable &&
684 !ptcb_desc->cts_enable) ?
685 1 :
686 0));
687 SET_TX_DESC_HW_RTS_EN(pdesc, 0);
688 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
689
690 SET_TX_DESC_RTSRATE(pdesc, ptcb_desc->rts_rate);
691 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
692 SET_TX_DESC_RTS_SHORT(
693 pdesc,
694 ((ptcb_desc->rts_rate <= DESC_RATE54M) ?
695 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
696 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
697
698 if (ptcb_desc->tx_enable_sw_calc_duration)
699 SET_TX_DESC_NAVUSEHDR(pdesc, 1);
700
701 SET_TX_DESC_DATA_BW(pdesc, rtl8822be_bw_mapping(hw, ptcb_desc));
702 SET_TX_DESC_DATA_SC(pdesc, rtl8822be_sc_mapping(hw, ptcb_desc));
703
704 if (sta) {
705 u8 ampdu_density = sta->ht_cap.ampdu_density;
706
707 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
708 }
709 if (info->control.hw_key) {
710 struct ieee80211_key_conf *key = info->control.hw_key;
711
712 switch (key->cipher) {
713 case WLAN_CIPHER_SUITE_WEP40:
714 case WLAN_CIPHER_SUITE_WEP104:
715 case WLAN_CIPHER_SUITE_TKIP:
716 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
717 break;
718 case WLAN_CIPHER_SUITE_CCMP:
719 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
720 break;
721 default:
722 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
723 break;
724 }
725 }
726
727 SET_TX_DESC_QSEL(pdesc, fw_qsel);
728
729 if (rtlphy->current_channel > 14) {
730
731 SET_TX_DESC_DATA_RTY_LOWEST_RATE(pdesc, 4);
732 SET_TX_DESC_RTS_RTY_LOWEST_RATE(pdesc, 4);
733 } else {
734
735 SET_TX_DESC_DATA_RTY_LOWEST_RATE(pdesc, 0);
736 SET_TX_DESC_RTS_RTY_LOWEST_RATE(pdesc, 0);
737 }
738 SET_TX_DESC_DISDATAFB(pdesc,
739 ptcb_desc->disable_ratefallback ? 1 : 0);
740 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
741
742
743
744
745
746 if (!ptcb_desc->use_driver_rate) {
747
748
749 }
750 if (ieee80211_is_data_qos(fc)) {
751 if (mac->rdg_en) {
752 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
753 "Enable RDG function.\n");
754 SET_TX_DESC_RDG_EN(pdesc, 1);
755 SET_TX_DESC_HTC(pdesc, 1);
756 }
757 }
758
759 SET_TX_DESC_PORT_ID(pdesc, 0);
760 SET_TX_DESC_MULTIPLE_PORT(pdesc, 0);
761 }
762
763 SET_TX_DESC_LS(pdesc, (lastseg ? 1 : 0));
764 if (rtlpriv->dm.useramask) {
765 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
766 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
767 } else {
768 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
769 SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
770 }
771
772 SET_TX_DESC_MOREFRAG(pdesc, (lastseg ? 0 : 1));
773 if (ptcb_desc->multicast || ptcb_desc->broadcast) {
774 SET_TX_DESC_BMC(pdesc, 1);
775
776 SET_TX_DESC_AGG_EN(pdesc, 0);
777 }
778 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
779
780
781
782
783
784}
785
786void rtl8822be_tx_fill_special_desc(struct ieee80211_hw *hw, u8 *pdesc,
787 u8 *pbd_desc, struct sk_buff *skb,
788 u8 hw_queue)
789{
790 struct rtl_priv *rtlpriv = rtl_priv(hw);
791 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
792 u8 fw_queue;
793 u8 txdesc_len = 48;
794
795 dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
796 PCI_DMA_TODEVICE);
797
798 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
799 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, "DMA mapping error");
800 return;
801 }
802
803 rtl8822be_pre_fill_tx_bd_desc(hw, pbd_desc, pdesc, hw_queue, skb,
804 mapping);
805
806
807
808
809 fw_queue = _rtl8822be_map_hwqueue_to_fwqueue(NULL, hw_queue);
810
811 CLEAR_PCI_TX_DESC_CONTENT(pdesc, txdesc_len);
812
813
814 SET_TX_DESC_TXPKTSIZE((u8 *)pdesc, (u16)(skb->len));
815
816 SET_TX_DESC_QSEL(pdesc, fw_queue);
817
818 if (hw_queue == H2C_QUEUE) {
819
820 SET_TX_DESC_OFFSET(pdesc, 0);
821
822 } else {
823
824 SET_TX_DESC_OFFSET(pdesc, txdesc_len);
825
826 SET_TX_DESC_DATARATE(pdesc, DESC_RATE1M);
827
828 SET_TX_DESC_SW_SEQ(pdesc, 0);
829
830 SET_TX_DESC_RATE_ID(pdesc, 7);
831 SET_TX_DESC_MACID(pdesc, 0);
832
833 SET_TX_DESC_LS(pdesc, 1);
834
835 SET_TX_DESC_OFFSET(pdesc, 48);
836
837 SET_TX_DESC_USE_RATE(pdesc, 1);
838 }
839
840 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD, "H2C Tx Cmd Content\n",
841 pdesc, txdesc_len);
842}
843
844void rtl8822be_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
845 u8 desc_name, u8 *val)
846{
847 struct rtl_priv *rtlpriv = rtl_priv(hw);
848 u8 q_idx = *val;
849 bool dma64 = rtlpriv->cfg->mod_params->dma64;
850
851 if (istx) {
852 switch (desc_name) {
853 case HW_DESC_OWN: {
854 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
855 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[q_idx];
856 u16 max_tx_desc = ring->entries;
857
858 if (q_idx == BEACON_QUEUE) {
859
860 u8 *pbd_desc = pdesc;
861
862 ring->cur_tx_wp = 0;
863 ring->cur_tx_rp = 0;
864 SET_TX_BUFF_DESC_OWN(pbd_desc, 1);
865 return;
866 }
867
868
869 ring->cur_tx_wp = ((ring->cur_tx_wp + 1) % max_tx_desc);
870
871 rtl_write_word(
872 rtlpriv,
873 get_desc_address_from_queue_index(
874 q_idx),
875 ring->cur_tx_wp);
876 } break;
877 }
878 } else {
879 switch (desc_name) {
880 case HW_DESC_RX_PREPARE:
881 SET_RX_BUFFER_DESC_LS(pdesc, 0);
882 SET_RX_BUFFER_DESC_FS(pdesc, 0);
883 SET_RX_BUFFER_DESC_TOTAL_LENGTH(pdesc, 0);
884
885 SET_RX_BUFFER_DESC_DATA_LENGTH(
886 pdesc, MAX_RECEIVE_BUFFER_SIZE + RX_DESC_SIZE);
887
888 SET_RX_BUFFER_PHYSICAL_LOW(
889 pdesc, (*(dma_addr_t *)val) & DMA_BIT_MASK(32));
890 SET_RX_BUFFER_PHYSICAL_HIGH(
891 pdesc, ((u64)(*(dma_addr_t *)val) >> 32),
892 dma64);
893 break;
894 default:
895 WARN_ONCE(true, "ERR rxdesc :%d not process\n",
896 desc_name);
897 break;
898 }
899 }
900}
901
902u64 rtl8822be_get_desc(struct ieee80211_hw *hw,
903 u8 *pdesc, bool istx, u8 desc_name)
904{
905 struct rtl_priv *rtlpriv = rtl_priv(hw);
906 u64 ret = 0;
907 u8 *pbd_desc = pdesc;
908 bool dma64 = rtlpriv->cfg->mod_params->dma64;
909
910 if (istx) {
911 switch (desc_name) {
912 case HW_DESC_TXBUFF_ADDR:
913 ret = GET_TXBUFFER_DESC_ADDR_LOW(pbd_desc, 1);
914 ret |= (u64)GET_TXBUFFER_DESC_ADDR_HIGH(pbd_desc, 1,
915 dma64) << 32;
916 break;
917 default:
918 WARN_ONCE(true, "ERR txdesc :%d not process\n",
919 desc_name);
920 break;
921 }
922 } else {
923 switch (desc_name) {
924 case HW_DESC_RXPKT_LEN:
925 ret = GET_RX_DESC_PKT_LEN(pdesc);
926 break;
927 default:
928 WARN_ONCE(true, "ERR rxdesc :%d not process\n",
929 desc_name);
930 break;
931 }
932 }
933 return ret;
934}
935
936bool rtl8822be_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue,
937 u16 index)
938{
939 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
940 struct rtl_priv *rtlpriv = rtl_priv(hw);
941 bool ret = false;
942 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
943 u16 cur_tx_rp, cur_tx_wp;
944 u16 tmp16;
945
946
947
948
949
950
951 if (index == ring->cur_tx_rp) {
952
953 tmp16 = rtl_read_word(
954 rtlpriv,
955 get_desc_address_from_queue_index(hw_queue) + 2);
956
957 cur_tx_rp = tmp16 & 0x01ff;
958 cur_tx_wp = ring->cur_tx_wp;
959
960
961 ring->cur_tx_rp = cur_tx_rp;
962 }
963
964 if (index == ring->cur_tx_rp)
965 ret = false;
966 else
967 ret = true;
968
969 if (hw_queue == BEACON_QUEUE)
970 ret = true;
971
972 if (rtlpriv->rtlhal.driver_is_goingto_unload ||
973 rtlpriv->psc.rfoff_reason > RF_CHANGE_BY_PS)
974 ret = true;
975
976 return ret;
977}
978
979void rtl8822be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
980{
981 struct rtl_priv *rtlpriv = rtl_priv(hw);
982
983 if (hw_queue == BEACON_QUEUE) {
984
985 rtl_write_byte(
986 rtlpriv, REG_RX_RXBD_NUM_8822B + 1,
987 rtl_read_byte(rtlpriv, REG_RX_RXBD_NUM_8822B + 1) |
988 BIT(4));
989 }
990}
991
992u32 rtl8822be_rx_command_packet(struct ieee80211_hw *hw,
993 const struct rtl_stats *status,
994 struct sk_buff *skb)
995{
996 u32 result = 0;
997 struct rtl_priv *rtlpriv = rtl_priv(hw);
998
999 switch (status->packet_report_type) {
1000 case NORMAL_RX:
1001 result = 0;
1002 break;
1003 case C2H_PACKET:
1004 rtl8822be_c2h_packet_handler(hw, skb->data, (u8)skb->len);
1005 result = 1;
1006 break;
1007 default:
1008 RT_TRACE(rtlpriv, COMP_RECV, DBG_TRACE,
1009 "Unknown packet type %d\n",
1010 status->packet_report_type);
1011 break;
1012 }
1013
1014 return result;
1015}
1016
