linux/include/linux/platform_data/pwm_omap_dmtimer.h
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   1/*
   2 * include/linux/platform_data/pwm_omap_dmtimer.h
   3 *
   4 * OMAP Dual-Mode Timer PWM platform data
   5 *
   6 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   7 * Tarun Kanti DebBarma <tarun.kanti@ti.com>
   8 * Thara Gopinath <thara@ti.com>
   9 *
  10 * Platform device conversion and hwmod support.
  11 *
  12 * Copyright (C) 2005 Nokia Corporation
  13 * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com>
  14 * PWM and clock framework support by Timo Teras.
  15 *
  16 * This program is free software; you can redistribute it and/or modify it
  17 * under the terms of the GNU General Public License as published by the
  18 * Free Software Foundation; either version 2 of the License, or (at your
  19 * option) any later version.
  20 *
  21 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  22 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  24 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29 *
  30 * You should have received a copy of the  GNU General Public License along
  31 * with this program; if not, write  to the Free Software Foundation, Inc.,
  32 * 675 Mass Ave, Cambridge, MA 02139, USA.
  33 */
  34
  35#ifndef __PWM_OMAP_DMTIMER_PDATA_H
  36#define __PWM_OMAP_DMTIMER_PDATA_H
  37
  38/* clock sources */
  39#define PWM_OMAP_DMTIMER_SRC_SYS_CLK                    0x00
  40#define PWM_OMAP_DMTIMER_SRC_32_KHZ                     0x01
  41#define PWM_OMAP_DMTIMER_SRC_EXT_CLK                    0x02
  42
  43/* timer interrupt enable bits */
  44#define PWM_OMAP_DMTIMER_INT_CAPTURE                    (1 << 2)
  45#define PWM_OMAP_DMTIMER_INT_OVERFLOW                   (1 << 1)
  46#define PWM_OMAP_DMTIMER_INT_MATCH                      (1 << 0)
  47
  48/* trigger types */
  49#define PWM_OMAP_DMTIMER_TRIGGER_NONE                   0x00
  50#define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW               0x01
  51#define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE   0x02
  52
  53struct omap_dm_timer;
  54typedef struct omap_dm_timer pwm_omap_dmtimer;
  55
  56struct pwm_omap_dmtimer_pdata {
  57        pwm_omap_dmtimer *(*request_by_node)(struct device_node *np);
  58        pwm_omap_dmtimer *(*request_specific)(int timer_id);
  59        pwm_omap_dmtimer *(*request)(void);
  60
  61        int     (*free)(pwm_omap_dmtimer *timer);
  62
  63        void    (*enable)(pwm_omap_dmtimer *timer);
  64        void    (*disable)(pwm_omap_dmtimer *timer);
  65
  66        int     (*get_irq)(pwm_omap_dmtimer *timer);
  67        int     (*set_int_enable)(pwm_omap_dmtimer *timer, unsigned int value);
  68        int     (*set_int_disable)(pwm_omap_dmtimer *timer, u32 mask);
  69
  70        struct clk *(*get_fclk)(pwm_omap_dmtimer *timer);
  71
  72        int     (*start)(pwm_omap_dmtimer *timer);
  73        int     (*stop)(pwm_omap_dmtimer *timer);
  74        int     (*set_source)(pwm_omap_dmtimer *timer, int source);
  75
  76        int     (*set_load)(pwm_omap_dmtimer *timer, int autoreload,
  77                        unsigned int value);
  78        int     (*set_match)(pwm_omap_dmtimer *timer, int enable,
  79                        unsigned int match);
  80        int     (*set_pwm)(pwm_omap_dmtimer *timer, int def_on,
  81                        int toggle, int trigger);
  82        int     (*set_prescaler)(pwm_omap_dmtimer *timer, int prescaler);
  83
  84        unsigned int (*read_counter)(pwm_omap_dmtimer *timer);
  85        int     (*write_counter)(pwm_omap_dmtimer *timer, unsigned int value);
  86        unsigned int (*read_status)(pwm_omap_dmtimer *timer);
  87        int     (*write_status)(pwm_omap_dmtimer *timer, unsigned int value);
  88};
  89
  90#endif /* __PWM_OMAP_DMTIMER_PDATA_H */
  91