linux/Documentation/clk.txt
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   1========================
   2The Common Clk Framework
   3========================
   4
   5:Author: Mike Turquette <mturquette@ti.com>
   6
   7This document endeavours to explain the common clk framework details,
   8and how to port a platform over to this framework.  It is not yet a
   9detailed explanation of the clock api in include/linux/clk.h, but
  10perhaps someday it will include that information.
  11
  12Introduction and interface split
  13================================
  14
  15The common clk framework is an interface to control the clock nodes
  16available on various devices today.  This may come in the form of clock
  17gating, rate adjustment, muxing or other operations.  This framework is
  18enabled with the CONFIG_COMMON_CLK option.
  19
  20The interface itself is divided into two halves, each shielded from the
  21details of its counterpart.  First is the common definition of struct
  22clk which unifies the framework-level accounting and infrastructure that
  23has traditionally been duplicated across a variety of platforms.  Second
  24is a common implementation of the clk.h api, defined in
  25drivers/clk/clk.c.  Finally there is struct clk_ops, whose operations
  26are invoked by the clk api implementation.
  27
  28The second half of the interface is comprised of the hardware-specific
  29callbacks registered with struct clk_ops and the corresponding
  30hardware-specific structures needed to model a particular clock.  For
  31the remainder of this document any reference to a callback in struct
  32clk_ops, such as .enable or .set_rate, implies the hardware-specific
  33implementation of that code.  Likewise, references to struct clk_foo
  34serve as a convenient shorthand for the implementation of the
  35hardware-specific bits for the hypothetical "foo" hardware.
  36
  37Tying the two halves of this interface together is struct clk_hw, which
  38is defined in struct clk_foo and pointed to within struct clk_core.  This
  39allows for easy navigation between the two discrete halves of the common
  40clock interface.
  41
  42Common data structures and api
  43==============================
  44
  45Below is the common struct clk_core definition from
  46drivers/clk/clk.c, modified for brevity::
  47
  48        struct clk_core {
  49                const char              *name;
  50                const struct clk_ops    *ops;
  51                struct clk_hw           *hw;
  52                struct module           *owner;
  53                struct clk_core         *parent;
  54                const char              **parent_names;
  55                struct clk_core         **parents;
  56                u8                      num_parents;
  57                u8                      new_parent_index;
  58                ...
  59        };
  60
  61The members above make up the core of the clk tree topology.  The clk
  62api itself defines several driver-facing functions which operate on
  63struct clk.  That api is documented in include/linux/clk.h.
  64
  65Platforms and devices utilizing the common struct clk_core use the struct
  66clk_ops pointer in struct clk_core to perform the hardware-specific parts of
  67the operations defined in clk-provider.h::
  68
  69        struct clk_ops {
  70                int             (*prepare)(struct clk_hw *hw);
  71                void            (*unprepare)(struct clk_hw *hw);
  72                int             (*is_prepared)(struct clk_hw *hw);
  73                void            (*unprepare_unused)(struct clk_hw *hw);
  74                int             (*enable)(struct clk_hw *hw);
  75                void            (*disable)(struct clk_hw *hw);
  76                int             (*is_enabled)(struct clk_hw *hw);
  77                void            (*disable_unused)(struct clk_hw *hw);
  78                unsigned long   (*recalc_rate)(struct clk_hw *hw,
  79                                                unsigned long parent_rate);
  80                long            (*round_rate)(struct clk_hw *hw,
  81                                                unsigned long rate,
  82                                                unsigned long *parent_rate);
  83                int             (*determine_rate)(struct clk_hw *hw,
  84                                                  struct clk_rate_request *req);
  85                int             (*set_parent)(struct clk_hw *hw, u8 index);
  86                u8              (*get_parent)(struct clk_hw *hw);
  87                int             (*set_rate)(struct clk_hw *hw,
  88                                            unsigned long rate,
  89                                            unsigned long parent_rate);
  90                int             (*set_rate_and_parent)(struct clk_hw *hw,
  91                                            unsigned long rate,
  92                                            unsigned long parent_rate,
  93                                            u8 index);
  94                unsigned long   (*recalc_accuracy)(struct clk_hw *hw,
  95                                                unsigned long parent_accuracy);
  96                int             (*get_phase)(struct clk_hw *hw);
  97                int             (*set_phase)(struct clk_hw *hw, int degrees);
  98                void            (*init)(struct clk_hw *hw);
  99                int             (*debug_init)(struct clk_hw *hw,
 100                                              struct dentry *dentry);
 101        };
 102
 103Hardware clk implementations
 104============================
 105
 106The strength of the common struct clk_core comes from its .ops and .hw pointers
 107which abstract the details of struct clk from the hardware-specific bits, and
 108vice versa.  To illustrate consider the simple gateable clk implementation in
 109drivers/clk/clk-gate.c::
 110
 111        struct clk_gate {
 112                struct clk_hw   hw;
 113                void __iomem    *reg;
 114                u8              bit_idx;
 115                ...
 116        };
 117
 118struct clk_gate contains struct clk_hw hw as well as hardware-specific
 119knowledge about which register and bit controls this clk's gating.
 120Nothing about clock topology or accounting, such as enable_count or
 121notifier_count, is needed here.  That is all handled by the common
 122framework code and struct clk_core.
 123
 124Let's walk through enabling this clk from driver code::
 125
 126        struct clk *clk;
 127        clk = clk_get(NULL, "my_gateable_clk");
 128
 129        clk_prepare(clk);
 130        clk_enable(clk);
 131
 132The call graph for clk_enable is very simple::
 133
 134        clk_enable(clk);
 135                clk->ops->enable(clk->hw);
 136                [resolves to...]
 137                        clk_gate_enable(hw);
 138                        [resolves struct clk gate with to_clk_gate(hw)]
 139                                clk_gate_set_bit(gate);
 140
 141And the definition of clk_gate_set_bit::
 142
 143        static void clk_gate_set_bit(struct clk_gate *gate)
 144        {
 145                u32 reg;
 146
 147                reg = __raw_readl(gate->reg);
 148                reg |= BIT(gate->bit_idx);
 149                writel(reg, gate->reg);
 150        }
 151
 152Note that to_clk_gate is defined as::
 153
 154        #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
 155
 156This pattern of abstraction is used for every clock hardware
 157representation.
 158
 159Supporting your own clk hardware
 160================================
 161
 162When implementing support for a new type of clock it is only necessary to
 163include the following header::
 164
 165        #include <linux/clk-provider.h>
 166
 167To construct a clk hardware structure for your platform you must define
 168the following::
 169
 170        struct clk_foo {
 171                struct clk_hw hw;
 172                ... hardware specific data goes here ...
 173        };
 174
 175To take advantage of your data you'll need to support valid operations
 176for your clk::
 177
 178        struct clk_ops clk_foo_ops {
 179                .enable         = &clk_foo_enable;
 180                .disable        = &clk_foo_disable;
 181        };
 182
 183Implement the above functions using container_of::
 184
 185        #define to_clk_foo(_hw) container_of(_hw, struct clk_foo, hw)
 186
 187        int clk_foo_enable(struct clk_hw *hw)
 188        {
 189                struct clk_foo *foo;
 190
 191                foo = to_clk_foo(hw);
 192
 193                ... perform magic on foo ...
 194
 195                return 0;
 196        };
 197
 198Below is a matrix detailing which clk_ops are mandatory based upon the
 199hardware capabilities of that clock.  A cell marked as "y" means
 200mandatory, a cell marked as "n" implies that either including that
 201callback is invalid or otherwise unnecessary.  Empty cells are either
 202optional or must be evaluated on a case-by-case basis.
 203
 204.. table:: clock hardware characteristics
 205
 206   +----------------+------+-------------+---------------+-------------+------+
 207   |                | gate | change rate | single parent | multiplexer | root |
 208   +================+======+=============+===============+=============+======+
 209   |.prepare        |      |             |               |             |      |
 210   +----------------+------+-------------+---------------+-------------+------+
 211   |.unprepare      |      |             |               |             |      |
 212   +----------------+------+-------------+---------------+-------------+------+
 213   +----------------+------+-------------+---------------+-------------+------+
 214   |.enable         | y    |             |               |             |      |
 215   +----------------+------+-------------+---------------+-------------+------+
 216   |.disable        | y    |             |               |             |      |
 217   +----------------+------+-------------+---------------+-------------+------+
 218   |.is_enabled     | y    |             |               |             |      |
 219   +----------------+------+-------------+---------------+-------------+------+
 220   +----------------+------+-------------+---------------+-------------+------+
 221   |.recalc_rate    |      | y           |               |             |      |
 222   +----------------+------+-------------+---------------+-------------+------+
 223   |.round_rate     |      | y [1]_      |               |             |      |
 224   +----------------+------+-------------+---------------+-------------+------+
 225   |.determine_rate |      | y [1]_      |               |             |      |
 226   +----------------+------+-------------+---------------+-------------+------+
 227   |.set_rate       |      | y           |               |             |      |
 228   +----------------+------+-------------+---------------+-------------+------+
 229   +----------------+------+-------------+---------------+-------------+------+
 230   |.set_parent     |      |             | n             | y           | n    |
 231   +----------------+------+-------------+---------------+-------------+------+
 232   |.get_parent     |      |             | n             | y           | n    |
 233   +----------------+------+-------------+---------------+-------------+------+
 234   +----------------+------+-------------+---------------+-------------+------+
 235   |.recalc_accuracy|      |             |               |             |      |
 236   +----------------+------+-------------+---------------+-------------+------+
 237   +----------------+------+-------------+---------------+-------------+------+
 238   |.init           |      |             |               |             |      |
 239   +----------------+------+-------------+---------------+-------------+------+
 240
 241.. [1] either one of round_rate or determine_rate is required.
 242
 243Finally, register your clock at run-time with a hardware-specific
 244registration function.  This function simply populates struct clk_foo's
 245data and then passes the common struct clk parameters to the framework
 246with a call to::
 247
 248        clk_register(...)
 249
 250See the basic clock types in ``drivers/clk/clk-*.c`` for examples.
 251
 252Disabling clock gating of unused clocks
 253=======================================
 254
 255Sometimes during development it can be useful to be able to bypass the
 256default disabling of unused clocks. For example, if drivers aren't enabling
 257clocks properly but rely on them being on from the bootloader, bypassing
 258the disabling means that the driver will remain functional while the issues
 259are sorted out.
 260
 261To bypass this disabling, include "clk_ignore_unused" in the bootargs to the
 262kernel.
 263
 264Locking
 265=======
 266
 267The common clock framework uses two global locks, the prepare lock and the
 268enable lock.
 269
 270The enable lock is a spinlock and is held across calls to the .enable,
 271.disable operations. Those operations are thus not allowed to sleep,
 272and calls to the clk_enable(), clk_disable() API functions are allowed in
 273atomic context.
 274
 275For clk_is_enabled() API, it is also designed to be allowed to be used in
 276atomic context. However, it doesn't really make any sense to hold the enable
 277lock in core, unless you want to do something else with the information of
 278the enable state with that lock held. Otherwise, seeing if a clk is enabled is
 279a one-shot read of the enabled state, which could just as easily change after
 280the function returns because the lock is released. Thus the user of this API
 281needs to handle synchronizing the read of the state with whatever they're
 282using it for to make sure that the enable state doesn't change during that
 283time.
 284
 285The prepare lock is a mutex and is held across calls to all other operations.
 286All those operations are allowed to sleep, and calls to the corresponding API
 287functions are not allowed in atomic context.
 288
 289This effectively divides operations in two groups from a locking perspective.
 290
 291Drivers don't need to manually protect resources shared between the operations
 292of one group, regardless of whether those resources are shared by multiple
 293clocks or not. However, access to resources that are shared between operations
 294of the two groups needs to be protected by the drivers. An example of such a
 295resource would be a register that controls both the clock rate and the clock
 296enable/disable state.
 297
 298The clock framework is reentrant, in that a driver is allowed to call clock
 299framework functions from within its implementation of clock operations. This
 300can for instance cause a .set_rate operation of one clock being called from
 301within the .set_rate operation of another clock. This case must be considered
 302in the driver implementations, but the code flow is usually controlled by the
 303driver in that case.
 304
 305Note that locking must also be considered when code outside of the common
 306clock framework needs to access resources used by the clock operations. This
 307is considered out of scope of this document.
 308