LXR linux/arch/arm/mach-s3c24xx/include/mach/pm-core.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Copyright 2008 Simtec Electronics
   4 *      Ben Dooks <ben@simtec.co.uk>
   5 *      http://armlinux.simtec.co.uk/
   6 *
   7 * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c
   8 */
   9
  10#include <linux/delay.h>
  11#include <linux/io.h>
  12
  13#include "regs-clock.h"
  14#include "regs-irq.h"
  15
  16static inline void s3c_pm_debug_init_uart(void)
  17{
  18        unsigned long tmp = __raw_readl(S3C2410_CLKCON);
  19
  20        /* re-start uart clocks */
  21        tmp |= S3C2410_CLKCON_UART0;
  22        tmp |= S3C2410_CLKCON_UART1;
  23        tmp |= S3C2410_CLKCON_UART2;
  24
  25        __raw_writel(tmp, S3C2410_CLKCON);
  26        udelay(10);
  27}
  28
  29static inline void s3c_pm_arch_prepare_irqs(void)
  30{
  31        __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK);
  32        __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK);
  33
  34        /* ack any outstanding external interrupts before we go to sleep */
  35
  36        __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND);
  37        __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND);
  38        __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND);
  39
  40}
  41
  42static inline void s3c_pm_arch_stop_clocks(void)
  43{
  44        __raw_writel(0x00, S3C2410_CLKCON);  /* turn off clocks over sleep */
  45}
  46
  47/* s3c2410_pm_show_resume_irqs
  48 *
  49 * print any IRQs asserted at resume time (ie, we woke from)
  50*/
  51static inline void s3c_pm_show_resume_irqs(int start, unsigned long which,
  52                                           unsigned long mask)
  53{
  54        int i;
  55
  56        which &= ~mask;
  57
  58        for (i = 0; i <= 31; i++) {
  59                if (which & (1L<<i)) {
  60                        S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
  61                }
  62        }
  63}
  64
  65static inline void s3c_pm_arch_show_resume_irqs(void)
  66{
  67        S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n",
  68                  __raw_readl(S3C2410_SRCPND),
  69                  __raw_readl(S3C2410_EINTPEND));
  70
  71        s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND),
  72                                s3c_irqwake_intmask);
  73
  74        s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND),
  75                                s3c_irqwake_eintmask);
  76}
  77
  78static inline void s3c_pm_arch_update_uart(void __iomem *regs,
  79                                           struct pm_uart_save *save)
  80{
  81}
  82
  83static inline void s3c_pm_restored_gpios(void) { }
  84static inline void samsung_pm_saved_gpios(void) { }
  85
  86/* state for IRQs over sleep */
  87
  88/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
  89 *
  90 * set bit to 1 in allow bitfield to enable the wakeup settings on it
  91*/
  92#ifdef CONFIG_PM_SLEEP
  93#define s3c_irqwake_intallow    (1L << 30 | 0xfL)
  94#define s3c_irqwake_eintallow   (0x0000fff0L)
  95#else
  96#define s3c_irqwake_eintallow 0
  97#define s3c_irqwake_intallow  0
  98#endif
  99