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9#include <linux/kernel.h>
10#include <linux/list.h>
11#include <linux/serial_core.h>
12#include <linux/serial_s3c.h>
13#include <linux/platform_device.h>
14#include <linux/fb.h>
15#include <linux/io.h>
16#include <linux/init.h>
17#include <linux/gpio.h>
18#include <linux/leds.h>
19#include <linux/delay.h>
20#include <linux/mmc/host.h>
21#include <linux/regulator/machine.h>
22#include <linux/regulator/fixed.h>
23#include <linux/pwm.h>
24#include <linux/pwm_backlight.h>
25#include <linux/dm9000.h>
26#include <linux/gpio_keys.h>
27#include <linux/gpio/driver.h>
28#include <linux/spi/spi.h>
29
30#include <linux/platform_data/pca953x.h>
31#include <linux/platform_data/s3c-hsotg.h>
32
33#include <video/platform_lcd.h>
34
35#include <linux/mfd/wm831x/core.h>
36#include <linux/mfd/wm831x/pdata.h>
37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h>
39
40#include <sound/wm1250-ev1.h>
41
42#include <asm/mach/arch.h>
43#include <asm/mach-types.h>
44
45#include <video/samsung_fimd.h>
46#include <mach/hardware.h>
47#include <mach/map.h>
48#include <mach/regs-gpio.h>
49#include <mach/gpio-samsung.h>
50#include <mach/irqs.h>
51
52#include <plat/fb.h>
53#include <plat/sdhci.h>
54#include <plat/gpio-cfg.h>
55#include <linux/platform_data/spi-s3c64xx.h>
56
57#include <plat/keypad.h>
58#include <plat/devs.h>
59#include <plat/cpu.h>
60#include <plat/adc.h>
61#include <linux/platform_data/i2c-s3c2410.h>
62#include <plat/pm.h>
63#include <plat/samsung-time.h>
64
65#include "common.h"
66#include "crag6410.h"
67#include "regs-gpio-memport.h"
68#include "regs-modem.h"
69#include "regs-sys.h"
70
71
72
73#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
74#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
75#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
76
77static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
78 [0] = {
79 .hwport = 0,
80 .flags = 0,
81 .ucon = UCON,
82 .ulcon = ULCON,
83 .ufcon = UFCON,
84 },
85 [1] = {
86 .hwport = 1,
87 .flags = 0,
88 .ucon = UCON,
89 .ulcon = ULCON,
90 .ufcon = UFCON,
91 },
92 [2] = {
93 .hwport = 2,
94 .flags = 0,
95 .ucon = UCON,
96 .ulcon = ULCON,
97 .ufcon = UFCON,
98 },
99 [3] = {
100 .hwport = 3,
101 .flags = 0,
102 .ucon = UCON,
103 .ulcon = ULCON,
104 .ufcon = UFCON,
105 },
106};
107
108static struct pwm_lookup crag6410_pwm_lookup[] = {
109 PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight", NULL, 100000,
110 PWM_POLARITY_NORMAL),
111};
112
113static struct platform_pwm_backlight_data crag6410_backlight_data = {
114 .max_brightness = 1000,
115 .dft_brightness = 600,
116 .enable_gpio = -1,
117};
118
119static struct platform_device crag6410_backlight_device = {
120 .name = "pwm-backlight",
121 .id = -1,
122 .dev = {
123 .parent = &samsung_device_pwm.dev,
124 .platform_data = &crag6410_backlight_data,
125 },
126};
127
128static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
129{
130 pr_debug("%s: setting power %d\n", __func__, power);
131
132 if (power) {
133 gpio_set_value(S3C64XX_GPB(0), 1);
134 msleep(1);
135 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
136 } else {
137 gpio_direction_output(S3C64XX_GPF(14), 0);
138 gpio_set_value(S3C64XX_GPB(0), 0);
139 }
140}
141
142static struct platform_device crag6410_lcd_powerdev = {
143 .name = "platform-lcd",
144 .id = -1,
145 .dev.parent = &s3c_device_fb.dev,
146 .dev.platform_data = &(struct plat_lcd_data) {
147 .set_power = crag6410_lcd_power_set,
148 },
149};
150
151
152static struct s3c_fb_pd_win crag6410_fb_win0 = {
153 .max_bpp = 32,
154 .default_bpp = 16,
155 .xres = 640,
156 .yres = 480,
157 .virtual_y = 480 * 2,
158 .virtual_x = 640,
159};
160
161static struct fb_videomode crag6410_lcd_timing = {
162 .left_margin = 150,
163 .right_margin = 80,
164 .upper_margin = 40,
165 .lower_margin = 5,
166 .hsync_len = 40,
167 .vsync_len = 5,
168 .xres = 640,
169 .yres = 480,
170};
171
172
173static struct s3c_fb_platdata crag6410_lcd_pdata = {
174 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
175 .vtiming = &crag6410_lcd_timing,
176 .win[0] = &crag6410_fb_win0,
177 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
178 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
179};
180
181
182
183static uint32_t crag6410_keymap[] = {
184
185 KEY(0, 0, KEY_VOLUMEUP),
186 KEY(0, 1, KEY_HOME),
187 KEY(0, 2, KEY_VOLUMEDOWN),
188 KEY(0, 3, KEY_HELP),
189 KEY(0, 4, KEY_MENU),
190 KEY(0, 5, KEY_MEDIA),
191 KEY(1, 0, 232),
192 KEY(1, 1, KEY_DOWN),
193 KEY(1, 2, KEY_LEFT),
194 KEY(1, 3, KEY_UP),
195 KEY(1, 4, KEY_RIGHT),
196 KEY(1, 5, KEY_CAMERA),
197};
198
199static struct matrix_keymap_data crag6410_keymap_data = {
200 .keymap = crag6410_keymap,
201 .keymap_size = ARRAY_SIZE(crag6410_keymap),
202};
203
204static struct samsung_keypad_platdata crag6410_keypad_data = {
205 .keymap_data = &crag6410_keymap_data,
206 .rows = 2,
207 .cols = 6,
208};
209
210static struct gpio_keys_button crag6410_gpio_keys[] = {
211 [0] = {
212 .code = KEY_SUSPEND,
213 .gpio = S3C64XX_GPL(10),
214 .type = EV_KEY,
215 .wakeup = 1,
216 .active_low = 1,
217 },
218 [1] = {
219 .code = SW_FRONT_PROXIMITY,
220 .gpio = S3C64XX_GPN(11),
221 .type = EV_SW,
222 },
223};
224
225static struct gpio_keys_platform_data crag6410_gpio_keydata = {
226 .buttons = crag6410_gpio_keys,
227 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
228};
229
230static struct platform_device crag6410_gpio_keydev = {
231 .name = "gpio-keys",
232 .id = 0,
233 .dev.platform_data = &crag6410_gpio_keydata,
234};
235
236static struct resource crag6410_dm9k_resource[] = {
237 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
238 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
239 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
240 | IORESOURCE_IRQ_HIGHLEVEL),
241};
242
243static struct dm9000_plat_data mini6410_dm9k_pdata = {
244 .flags = DM9000_PLATF_16BITONLY,
245};
246
247static struct platform_device crag6410_dm9k_device = {
248 .name = "dm9000",
249 .id = -1,
250 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
251 .resource = crag6410_dm9k_resource,
252 .dev.platform_data = &mini6410_dm9k_pdata,
253};
254
255static struct resource crag6410_mmgpio_resource[] = {
256 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
257};
258
259static struct platform_device crag6410_mmgpio = {
260 .name = "basic-mmio-gpio",
261 .id = -1,
262 .resource = crag6410_mmgpio_resource,
263 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
264 .dev.platform_data = &(struct bgpio_pdata) {
265 .base = MMGPIO_GPIO_BASE,
266 },
267};
268
269static struct platform_device speyside_device = {
270 .name = "speyside",
271 .id = -1,
272};
273
274static struct platform_device lowland_device = {
275 .name = "lowland",
276 .id = -1,
277};
278
279static struct platform_device tobermory_device = {
280 .name = "tobermory",
281 .id = -1,
282};
283
284static struct platform_device littlemill_device = {
285 .name = "littlemill",
286 .id = -1,
287};
288
289static struct platform_device bells_wm2200_device = {
290 .name = "bells",
291 .id = 0,
292};
293
294static struct platform_device bells_wm5102_device = {
295 .name = "bells",
296 .id = 1,
297};
298
299static struct platform_device bells_wm5110_device = {
300 .name = "bells",
301 .id = 2,
302};
303
304static struct regulator_consumer_supply wallvdd_consumers[] = {
305 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
306 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
307 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
308 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
309 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
310
311 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
312 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
313
314 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
315 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
316 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
317 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
318 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
319 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
320 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
321 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
323 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
324 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
325 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
326 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
327
328 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
329 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
330 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
331 REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
332 REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
333 REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
334 REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
335 REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
336 REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
337 REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
338 REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
339 REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
340 REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
341};
342
343static struct regulator_init_data wallvdd_data = {
344 .constraints = {
345 .always_on = 1,
346 },
347 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
348 .consumer_supplies = wallvdd_consumers,
349};
350
351static struct fixed_voltage_config wallvdd_pdata = {
352 .supply_name = "WALLVDD",
353 .microvolts = 5000000,
354 .init_data = &wallvdd_data,
355 .gpio = -EINVAL,
356};
357
358static struct platform_device wallvdd_device = {
359 .name = "reg-fixed-voltage",
360 .id = -1,
361 .dev = {
362 .platform_data = &wallvdd_pdata,
363 },
364};
365
366static struct platform_device *crag6410_devices[] __initdata = {
367 &s3c_device_hsmmc0,
368 &s3c_device_hsmmc2,
369 &s3c_device_i2c0,
370 &s3c_device_i2c1,
371 &s3c_device_fb,
372 &s3c_device_ohci,
373 &s3c_device_usb_hsotg,
374 &samsung_device_pwm,
375 &s3c64xx_device_iis0,
376 &s3c64xx_device_iis1,
377 &samsung_device_keypad,
378 &crag6410_gpio_keydev,
379 &crag6410_dm9k_device,
380 &s3c64xx_device_spi0,
381 &crag6410_mmgpio,
382 &crag6410_lcd_powerdev,
383 &crag6410_backlight_device,
384 &speyside_device,
385 &tobermory_device,
386 &littlemill_device,
387 &lowland_device,
388 &bells_wm2200_device,
389 &bells_wm5102_device,
390 &bells_wm5110_device,
391 &wallvdd_device,
392};
393
394static struct pca953x_platform_data crag6410_pca_data = {
395 .gpio_base = PCA935X_GPIO_BASE,
396 .irq_base = -1,
397};
398
399
400static struct wm831x_buckv_pdata vddarm_pdata = {
401 .dvs_control_src = 1,
402 .dvs_gpio = S3C64XX_GPK(0),
403};
404
405static struct regulator_consumer_supply vddarm_consumers[] = {
406 REGULATOR_SUPPLY("vddarm", NULL),
407};
408
409static struct regulator_init_data vddarm = {
410 .constraints = {
411 .name = "VDDARM",
412 .min_uV = 1000000,
413 .max_uV = 1300000,
414 .always_on = 1,
415 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
416 },
417 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
418 .consumer_supplies = vddarm_consumers,
419 .supply_regulator = "WALLVDD",
420 .driver_data = &vddarm_pdata,
421};
422
423static struct regulator_consumer_supply vddint_consumers[] = {
424 REGULATOR_SUPPLY("vddint", NULL),
425};
426
427static struct regulator_init_data vddint = {
428 .constraints = {
429 .name = "VDDINT",
430 .min_uV = 1000000,
431 .max_uV = 1200000,
432 .always_on = 1,
433 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
434 },
435 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
436 .consumer_supplies = vddint_consumers,
437 .supply_regulator = "WALLVDD",
438};
439
440static struct regulator_init_data vddmem = {
441 .constraints = {
442 .name = "VDDMEM",
443 .always_on = 1,
444 },
445};
446
447static struct regulator_init_data vddsys = {
448 .constraints = {
449 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
450 .always_on = 1,
451 },
452};
453
454static struct regulator_consumer_supply vddmmc_consumers[] = {
455 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
456 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
457 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
458};
459
460static struct regulator_init_data vddmmc = {
461 .constraints = {
462 .name = "VDDMMC,UH",
463 .always_on = 1,
464 },
465 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
466 .consumer_supplies = vddmmc_consumers,
467 .supply_regulator = "WALLVDD",
468};
469
470static struct regulator_init_data vddotgi = {
471 .constraints = {
472 .name = "VDDOTGi",
473 .always_on = 1,
474 },
475 .supply_regulator = "WALLVDD",
476};
477
478static struct regulator_init_data vddotg = {
479 .constraints = {
480 .name = "VDDOTG",
481 .always_on = 1,
482 },
483 .supply_regulator = "WALLVDD",
484};
485
486static struct regulator_init_data vddhi = {
487 .constraints = {
488 .name = "VDDHI",
489 .always_on = 1,
490 },
491 .supply_regulator = "WALLVDD",
492};
493
494static struct regulator_init_data vddadc = {
495 .constraints = {
496 .name = "VDDADC,VDDDAC",
497 .always_on = 1,
498 },
499 .supply_regulator = "WALLVDD",
500};
501
502static struct regulator_init_data vddmem0 = {
503 .constraints = {
504 .name = "VDDMEM0",
505 .always_on = 1,
506 },
507 .supply_regulator = "WALLVDD",
508};
509
510static struct regulator_init_data vddpll = {
511 .constraints = {
512 .name = "VDDPLL",
513 .always_on = 1,
514 },
515 .supply_regulator = "WALLVDD",
516};
517
518static struct regulator_init_data vddlcd = {
519 .constraints = {
520 .name = "VDDLCD",
521 .always_on = 1,
522 },
523 .supply_regulator = "WALLVDD",
524};
525
526static struct regulator_init_data vddalive = {
527 .constraints = {
528 .name = "VDDALIVE",
529 .always_on = 1,
530 },
531 .supply_regulator = "WALLVDD",
532};
533
534static struct wm831x_backup_pdata banff_backup_pdata = {
535 .charger_enable = 1,
536 .vlim = 2500,
537 .ilim = 200,
538};
539
540static struct wm831x_status_pdata banff_red_led = {
541 .name = "banff:red:",
542 .default_src = WM831X_STATUS_MANUAL,
543};
544
545static struct wm831x_status_pdata banff_green_led = {
546 .name = "banff:green:",
547 .default_src = WM831X_STATUS_MANUAL,
548};
549
550static struct wm831x_touch_pdata touch_pdata = {
551 .data_irq = S3C_EINT(26),
552 .pd_irq = S3C_EINT(27),
553};
554
555static struct wm831x_pdata crag_pmic_pdata = {
556 .wm831x_num = 1,
557 .irq_base = BANFF_PMIC_IRQ_BASE,
558 .gpio_base = BANFF_PMIC_GPIO_BASE,
559 .soft_shutdown = true,
560
561 .backup = &banff_backup_pdata,
562
563 .gpio_defaults = {
564
565 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
566
567 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
568
569 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
570 },
571
572 .dcdc = {
573 &vddarm,
574 &vddint,
575 &vddmem,
576 },
577
578 .ldo = {
579 &vddsys,
580 &vddmmc,
581 NULL,
582 &vddotgi,
583 &vddotg,
584 &vddhi,
585 &vddadc,
586 &vddmem0,
587 &vddpll,
588 &vddlcd,
589 &vddalive,
590 },
591
592 .status = {
593 &banff_green_led,
594 &banff_red_led,
595 },
596
597 .touch = &touch_pdata,
598};
599
600static struct i2c_board_info i2c_devs0[] = {
601 { I2C_BOARD_INFO("24c08", 0x50), },
602 { I2C_BOARD_INFO("tca6408", 0x20),
603 .platform_data = &crag6410_pca_data,
604 },
605 { I2C_BOARD_INFO("wm8312", 0x34),
606 .platform_data = &crag_pmic_pdata,
607 .irq = S3C_EINT(23),
608 },
609};
610
611static struct s3c2410_platform_i2c i2c0_pdata = {
612 .frequency = 400000,
613};
614
615static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
616 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
617 REGULATOR_SUPPLY("AVDD", "spi0.0"),
618 REGULATOR_SUPPLY("AVDD", "spi0.1"),
619};
620
621static struct regulator_init_data pvdd_1v2 = {
622 .constraints = {
623 .name = "PVDD_1V2",
624 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
625 },
626
627 .consumer_supplies = pvdd_1v2_consumers,
628 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
629};
630
631static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
632 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
633 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
634 REGULATOR_SUPPLY("DBVDD", "1-001a"),
635 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
636 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
637 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
638 REGULATOR_SUPPLY("CPVDD", "1-001a"),
639 REGULATOR_SUPPLY("AVDD2", "1-001a"),
640 REGULATOR_SUPPLY("DCVDD", "1-001a"),
641 REGULATOR_SUPPLY("AVDD", "1-001a"),
642 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
643
644 REGULATOR_SUPPLY("DBVDD", "1-003a"),
645 REGULATOR_SUPPLY("LDOVDD", "1-003a"),
646 REGULATOR_SUPPLY("CPVDD", "1-003a"),
647 REGULATOR_SUPPLY("AVDD", "1-003a"),
648 REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
649 REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
650 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
651 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
652 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
653};
654
655static struct regulator_init_data pvdd_1v8 = {
656 .constraints = {
657 .name = "PVDD_1V8",
658 .always_on = 1,
659 },
660
661 .consumer_supplies = pvdd_1v8_consumers,
662 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
663};
664
665static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
666 REGULATOR_SUPPLY("MICVDD", "1-001a"),
667 REGULATOR_SUPPLY("AVDD1", "1-001a"),
668};
669
670static struct regulator_init_data pvdd_3v3 = {
671 .constraints = {
672 .name = "PVDD_3V3",
673 .always_on = 1,
674 },
675
676 .consumer_supplies = pvdd_3v3_consumers,
677 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
678};
679
680static struct wm831x_pdata glenfarclas_pmic_pdata = {
681 .wm831x_num = 2,
682 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
683 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
684 .soft_shutdown = true,
685
686 .gpio_defaults = {
687
688 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
689 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
690 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
691 },
692
693 .dcdc = {
694 &pvdd_1v2,
695 &pvdd_1v8,
696 &pvdd_3v3,
697 },
698
699 .disable_touch = true,
700};
701
702static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
703 .gpios = {
704 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
705 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
706 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
707 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
708 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
709 },
710};
711
712static struct i2c_board_info i2c_devs1[] = {
713 { I2C_BOARD_INFO("wm8311", 0x34),
714 .irq = S3C_EINT(0),
715 .platform_data = &glenfarclas_pmic_pdata },
716
717 { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
718 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
719 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
720 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
721 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
722
723 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
724 .platform_data = &wm1250_ev1_pdata },
725};
726
727static struct s3c2410_platform_i2c i2c1_pdata = {
728 .frequency = 400000,
729 .bus_num = 1,
730};
731
732static void __init crag6410_map_io(void)
733{
734 s3c64xx_init_io(NULL, 0);
735 s3c64xx_set_xtal_freq(12000000);
736 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
737 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
738
739
740}
741
742static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
743 .max_width = 4,
744 .cd_type = S3C_SDHCI_CD_PERMANENT,
745 .host_caps = MMC_CAP_POWER_OFF_CARD,
746};
747
748static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
749{
750
751 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
752
753
754 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
755}
756
757static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
758 .max_width = 4,
759 .cd_type = S3C_SDHCI_CD_INTERNAL,
760 .cfg_gpio = crag6410_cfg_sdhci0,
761 .host_caps = MMC_CAP_POWER_OFF_CARD,
762};
763
764static const struct gpio_led gpio_leds[] = {
765 {
766 .name = "d13:green:",
767 .gpio = MMGPIO_GPIO_BASE + 0,
768 .default_state = LEDS_GPIO_DEFSTATE_ON,
769 },
770 {
771 .name = "d14:green:",
772 .gpio = MMGPIO_GPIO_BASE + 1,
773 .default_state = LEDS_GPIO_DEFSTATE_ON,
774 },
775 {
776 .name = "d15:green:",
777 .gpio = MMGPIO_GPIO_BASE + 2,
778 .default_state = LEDS_GPIO_DEFSTATE_ON,
779 },
780 {
781 .name = "d16:green:",
782 .gpio = MMGPIO_GPIO_BASE + 3,
783 .default_state = LEDS_GPIO_DEFSTATE_ON,
784 },
785 {
786 .name = "d17:green:",
787 .gpio = MMGPIO_GPIO_BASE + 4,
788 .default_state = LEDS_GPIO_DEFSTATE_ON,
789 },
790 {
791 .name = "d18:green:",
792 .gpio = MMGPIO_GPIO_BASE + 5,
793 .default_state = LEDS_GPIO_DEFSTATE_ON,
794 },
795 {
796 .name = "d19:green:",
797 .gpio = MMGPIO_GPIO_BASE + 6,
798 .default_state = LEDS_GPIO_DEFSTATE_ON,
799 },
800 {
801 .name = "d20:green:",
802 .gpio = MMGPIO_GPIO_BASE + 7,
803 .default_state = LEDS_GPIO_DEFSTATE_ON,
804 },
805};
806
807static const struct gpio_led_platform_data gpio_leds_pdata = {
808 .leds = gpio_leds,
809 .num_leds = ARRAY_SIZE(gpio_leds),
810};
811
812static struct dwc2_hsotg_plat crag6410_hsotg_pdata;
813
814static void __init crag6410_machine_init(void)
815{
816
817 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
818 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
819
820 gpio_request(S3C64XX_GPB(0), "LCD power");
821 gpio_direction_output(S3C64XX_GPB(0), 0);
822
823 gpio_request(S3C64XX_GPF(14), "LCD PWM");
824 gpio_direction_output(S3C64XX_GPF(14), 0);
825
826 gpio_request(S3C64XX_GPB(1), "SD power");
827 gpio_direction_output(S3C64XX_GPB(1), 0);
828
829 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
830 gpio_direction_output(S3C64XX_GPF(10), 1);
831
832 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
833 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
834
835 s3c_i2c0_set_platdata(&i2c0_pdata);
836 s3c_i2c1_set_platdata(&i2c1_pdata);
837 s3c_fb_set_platdata(&crag6410_lcd_pdata);
838 dwc2_hsotg_set_platdata(&crag6410_hsotg_pdata);
839
840 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
841 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
842
843 samsung_keypad_set_platdata(&crag6410_keypad_data);
844 s3c64xx_spi0_set_platdata(NULL, 0, 2);
845
846 pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup));
847 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
848
849 gpio_led_register_device(-1, &gpio_leds_pdata);
850
851 regulator_has_full_constraints();
852
853 s3c64xx_pm_init();
854}
855
856MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
857
858 .atag_offset = 0x100,
859 .nr_irqs = S3C64XX_NR_IRQS,
860 .init_irq = s3c6410_init_irq,
861 .map_io = crag6410_map_io,
862 .init_machine = crag6410_machine_init,
863 .init_time = samsung_timer_init,
864 .restart = s3c64xx_restart,
865MACHINE_END
866
