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5
6#include <linux/bcd.h>
7#include <linux/clockchips.h>
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/sched_clock.h>
12#include <linux/interrupt.h>
13#include <linux/kernel_stat.h>
14#include <linux/param.h>
15#include <linux/smp.h>
16#include <linux/time.h>
17#include <linux/timex.h>
18#include <linux/mm.h>
19#include <linux/platform_device.h>
20
21#include <asm/time.h>
22#include <asm/pgtable.h>
23#include <asm/sgialib.h>
24#include <asm/sn/ioc3.h>
25#include <asm/sn/klconfig.h>
26#include <asm/sn/arch.h>
27#include <asm/sn/addrs.h>
28#include <asm/sn/sn_private.h>
29#include <asm/sn/sn0/ip27.h>
30#include <asm/sn/sn0/hub.h>
31
32#define TICK_SIZE (tick_nsec / 1000)
33
34
35#include <asm/sn/types.h>
36#include <asm/sn/sn0/addrs.h>
37#include <asm/sn/sn0/hubni.h>
38#include <asm/sn/sn0/hubio.h>
39#include <asm/pci/bridge.h>
40
41static void enable_rt_irq(struct irq_data *d)
42{
43}
44
45static void disable_rt_irq(struct irq_data *d)
46{
47}
48
49static struct irq_chip rt_irq_type = {
50 .name = "SN HUB RT timer",
51 .irq_mask = disable_rt_irq,
52 .irq_unmask = enable_rt_irq,
53};
54
55static int rt_next_event(unsigned long delta, struct clock_event_device *evt)
56{
57 unsigned int cpu = smp_processor_id();
58 int slice = cputoslice(cpu);
59 unsigned long cnt;
60
61 cnt = LOCAL_HUB_L(PI_RT_COUNT);
62 cnt += delta;
63 LOCAL_HUB_S(PI_RT_COMPARE_A + PI_COUNT_OFFSET * slice, cnt);
64
65 return LOCAL_HUB_L(PI_RT_COUNT) >= cnt ? -ETIME : 0;
66}
67
68unsigned int rt_timer_irq;
69
70static DEFINE_PER_CPU(struct clock_event_device, hub_rt_clockevent);
71static DEFINE_PER_CPU(char [11], hub_rt_name);
72
73static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id)
74{
75 unsigned int cpu = smp_processor_id();
76 struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu);
77 int slice = cputoslice(cpu);
78
79
80
81
82 LOCAL_HUB_S(PI_RT_PEND_A + PI_COUNT_OFFSET * slice, 0);
83 cd->event_handler(cd);
84
85 return IRQ_HANDLED;
86}
87
88struct irqaction hub_rt_irqaction = {
89 .handler = hub_rt_counter_handler,
90 .flags = IRQF_PERCPU | IRQF_TIMER,
91 .name = "hub-rt",
92};
93
94
95
96
97
98
99
100
101
102#define NSEC_PER_CYCLE 800
103#define CYCLES_PER_SEC (NSEC_PER_SEC / NSEC_PER_CYCLE)
104
105void hub_rt_clock_event_init(void)
106{
107 unsigned int cpu = smp_processor_id();
108 struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu);
109 unsigned char *name = per_cpu(hub_rt_name, cpu);
110 int irq = rt_timer_irq;
111
112 sprintf(name, "hub-rt %d", cpu);
113 cd->name = name;
114 cd->features = CLOCK_EVT_FEAT_ONESHOT;
115 clockevent_set_clock(cd, CYCLES_PER_SEC);
116 cd->max_delta_ns = clockevent_delta2ns(0xfffffffffffff, cd);
117 cd->max_delta_ticks = 0xfffffffffffff;
118 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
119 cd->min_delta_ticks = 0x300;
120 cd->rating = 200;
121 cd->irq = irq;
122 cd->cpumask = cpumask_of(cpu);
123 cd->set_next_event = rt_next_event;
124 clockevents_register_device(cd);
125}
126
127static void __init hub_rt_clock_event_global_init(void)
128{
129 int irq;
130
131 do {
132 smp_wmb();
133 irq = rt_timer_irq;
134 if (irq)
135 break;
136
137 irq = allocate_irqno();
138 if (irq < 0)
139 panic("Allocation of irq number for timer failed");
140 } while (xchg(&rt_timer_irq, irq));
141
142 irq_set_chip_and_handler(irq, &rt_irq_type, handle_percpu_irq);
143 setup_irq(irq, &hub_rt_irqaction);
144}
145
146static u64 hub_rt_read(struct clocksource *cs)
147{
148 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
149}
150
151struct clocksource hub_rt_clocksource = {
152 .name = "HUB-RT",
153 .rating = 200,
154 .read = hub_rt_read,
155 .mask = CLOCKSOURCE_MASK(52),
156 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
157};
158
159static u64 notrace hub_rt_read_sched_clock(void)
160{
161 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
162}
163
164static void __init hub_rt_clocksource_init(void)
165{
166 struct clocksource *cs = &hub_rt_clocksource;
167
168 clocksource_register_hz(cs, CYCLES_PER_SEC);
169
170 sched_clock_register(hub_rt_read_sched_clock, 52, CYCLES_PER_SEC);
171}
172
173void __init plat_time_init(void)
174{
175 hub_rt_clocksource_init();
176 hub_rt_clock_event_global_init();
177 hub_rt_clock_event_init();
178}
179
180void cpu_time_init(void)
181{
182 lboard_t *board;
183 klcpu_t *cpu;
184 int cpuid;
185
186
187 board = find_lboard(KL_CONFIG_INFO(get_nasid()), KLTYPE_IP27);
188 if (!board)
189 panic("Can't find board info for myself.");
190
191 cpuid = LOCAL_HUB_L(PI_CPU_NUM) ? IP27_CPU0_INDEX : IP27_CPU1_INDEX;
192 cpu = (klcpu_t *) KLCF_COMP(board, cpuid);
193 if (!cpu)
194 panic("No information about myself?");
195
196 printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed);
197
198 set_c0_status(SRB_TIMOCLK);
199}
200
201void hub_rtc_init(cnodeid_t cnode)
202{
203
204
205
206
207
208
209 if (get_compact_nodeid() == cnode) {
210 LOCAL_HUB_S(PI_RT_EN_A, 1);
211 LOCAL_HUB_S(PI_RT_EN_B, 1);
212 LOCAL_HUB_S(PI_PROF_EN_A, 0);
213 LOCAL_HUB_S(PI_PROF_EN_B, 0);
214 LOCAL_HUB_S(PI_RT_COUNT, 0);
215 LOCAL_HUB_S(PI_RT_PEND_A, 0);
216 LOCAL_HUB_S(PI_RT_PEND_B, 0);
217 }
218}
219
220static int __init sgi_ip27_rtc_devinit(void)
221{
222 struct resource res;
223
224 memset(&res, 0, sizeof(res));
225 res.start = XPHYSADDR(KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base +
226 IOC3_BYTEBUS_DEV0);
227 res.end = res.start + 32767;
228 res.flags = IORESOURCE_MEM;
229
230 return IS_ERR(platform_device_register_simple("rtc-m48t35", -1,
231 &res, 1));
232}
233
234
235
236
237
238late_initcall(sgi_ip27_rtc_devinit);
239
