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17#include <linux/pci.h>
18#include <linux/export.h>
19#include <asm/pci-bridge.h>
20#include <asm/prom.h>
21
22
23
24
25static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
26{
27 const __be32 *prop;
28 int len;
29
30 prop = of_get_property(np, name, &len);
31 if (prop && len >= 4)
32 return of_read_number(prop, 1);
33 return def;
34}
35
36
37
38
39
40
41unsigned int pci_parse_of_flags(u32 addr0, int bridge)
42{
43 unsigned int flags = 0;
44
45 if (addr0 & 0x02000000) {
46 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
47 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
48 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
49 if (addr0 & 0x40000000)
50 flags |= IORESOURCE_PREFETCH
51 | PCI_BASE_ADDRESS_MEM_PREFETCH;
52
53
54
55
56
57 if (!bridge && (addr0 & 0xff) == 0x30)
58 flags |= IORESOURCE_READONLY;
59 } else if (addr0 & 0x01000000)
60 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
61 if (flags)
62 flags |= IORESOURCE_SIZEALIGN;
63 return flags;
64}
65
66
67
68
69
70
71
72
73
74static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
75{
76 u64 base, size;
77 unsigned int flags;
78 struct pci_bus_region region;
79 struct resource *res;
80 const __be32 *addrs;
81 u32 i;
82 int proplen;
83
84 addrs = of_get_property(node, "assigned-addresses", &proplen);
85 if (!addrs)
86 return;
87 pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
88 for (; proplen >= 20; proplen -= 20, addrs += 5) {
89 flags = pci_parse_of_flags(of_read_number(addrs, 1), 0);
90 if (!flags)
91 continue;
92 base = of_read_number(&addrs[1], 2);
93 size = of_read_number(&addrs[3], 2);
94 if (!size)
95 continue;
96 i = of_read_number(addrs, 1) & 0xff;
97 pr_debug(" base: %llx, size: %llx, i: %x\n",
98 (unsigned long long)base,
99 (unsigned long long)size, i);
100
101 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
102 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
103 } else if (i == dev->rom_base_reg) {
104 res = &dev->resource[PCI_ROM_RESOURCE];
105 flags |= IORESOURCE_READONLY;
106 } else {
107 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
108 continue;
109 }
110 res->flags = flags;
111 res->name = pci_name(dev);
112 region.start = base;
113 region.end = base + size - 1;
114 pcibios_bus_to_resource(dev->bus, res, ®ion);
115 }
116}
117
118
119
120
121
122
123
124struct pci_dev *of_create_pci_dev(struct device_node *node,
125 struct pci_bus *bus, int devfn)
126{
127 struct pci_dev *dev;
128 const char *type;
129
130 dev = pci_alloc_dev(bus);
131 if (!dev)
132 return NULL;
133 type = of_get_property(node, "device_type", NULL);
134 if (type == NULL)
135 type = "";
136
137 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
138
139 dev->dev.of_node = of_node_get(node);
140 dev->dev.parent = bus->bridge;
141 dev->dev.bus = &pci_bus_type;
142 dev->devfn = devfn;
143 dev->multifunction = 0;
144 dev->needs_freset = 0;
145 set_pcie_port_type(dev);
146
147 pci_dev_assign_slot(dev);
148 dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
149 dev->device = get_int_prop(node, "device-id", 0xffff);
150 dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
151 dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
152
153 dev->cfg_size = pci_cfg_space_size(dev);
154
155 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
156 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
157 dev->class = get_int_prop(node, "class-code", 0);
158 dev->revision = get_int_prop(node, "revision-id", 0);
159
160 pr_debug(" class: 0x%x\n", dev->class);
161 pr_debug(" revision: 0x%x\n", dev->revision);
162
163 dev->current_state = PCI_UNKNOWN;
164 dev->error_state = pci_channel_io_normal;
165 dev->dma_mask = 0xffffffff;
166
167
168 pci_fixup_device(pci_fixup_early, dev);
169
170 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
171
172 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
173 dev->rom_base_reg = PCI_ROM_ADDRESS1;
174 set_pcie_hotplug_bridge(dev);
175 } else if (!strcmp(type, "cardbus")) {
176 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
177 } else {
178 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
179 dev->rom_base_reg = PCI_ROM_ADDRESS;
180
181 dev->irq = 0;
182 }
183
184 of_pci_parse_addrs(node, dev);
185
186 pr_debug(" adding to system ...\n");
187
188 pci_device_add(dev, bus);
189
190 return dev;
191}
192EXPORT_SYMBOL(of_create_pci_dev);
193
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200
201
202void of_scan_pci_bridge(struct pci_dev *dev)
203{
204 struct device_node *node = dev->dev.of_node;
205 struct pci_bus *bus;
206 struct pci_controller *phb;
207 const __be32 *busrange, *ranges;
208 int len, i, mode;
209 struct pci_bus_region region;
210 struct resource *res;
211 unsigned int flags;
212 u64 size;
213
214 pr_debug("of_scan_pci_bridge(%pOF)\n", node);
215
216
217 busrange = of_get_property(node, "bus-range", &len);
218 if (busrange == NULL || len != 8) {
219 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %pOF\n",
220 node);
221 return;
222 }
223 ranges = of_get_property(node, "ranges", &len);
224 if (ranges == NULL) {
225 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %pOF\n",
226 node);
227 return;
228 }
229
230 bus = pci_find_bus(pci_domain_nr(dev->bus),
231 of_read_number(busrange, 1));
232 if (!bus) {
233 bus = pci_add_new_bus(dev->bus, dev,
234 of_read_number(busrange, 1));
235 if (!bus) {
236 printk(KERN_ERR "Failed to create pci bus for %pOF\n",
237 node);
238 return;
239 }
240 }
241
242 bus->primary = dev->bus->number;
243 pci_bus_insert_busn_res(bus, of_read_number(busrange, 1),
244 of_read_number(busrange+1, 1));
245 bus->bridge_ctl = 0;
246
247
248
249 res = &dev->resource[PCI_BRIDGE_RESOURCES];
250 for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
251 res->flags = 0;
252 bus->resource[i] = res;
253 ++res;
254 }
255 i = 1;
256 for (; len >= 32; len -= 32, ranges += 8) {
257 flags = pci_parse_of_flags(of_read_number(ranges, 1), 1);
258 size = of_read_number(&ranges[6], 2);
259 if (flags == 0 || size == 0)
260 continue;
261 if (flags & IORESOURCE_IO) {
262 res = bus->resource[0];
263 if (res->flags) {
264 printk(KERN_ERR "PCI: ignoring extra I/O range"
265 " for bridge %pOF\n", node);
266 continue;
267 }
268 } else {
269 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
270 printk(KERN_ERR "PCI: too many memory ranges"
271 " for bridge %pOF\n", node);
272 continue;
273 }
274 res = bus->resource[i];
275 ++i;
276 }
277 res->flags = flags;
278 region.start = of_read_number(&ranges[1], 2);
279 region.end = region.start + size - 1;
280 pcibios_bus_to_resource(dev->bus, res, ®ion);
281 }
282 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
283 bus->number);
284 pr_debug(" bus name: %s\n", bus->name);
285
286 phb = pci_bus_to_host(bus);
287
288 mode = PCI_PROBE_NORMAL;
289 if (phb->controller_ops.probe_mode)
290 mode = phb->controller_ops.probe_mode(bus);
291 pr_debug(" probe mode: %d\n", mode);
292
293 if (mode == PCI_PROBE_DEVTREE)
294 of_scan_bus(node, bus);
295 else if (mode == PCI_PROBE_NORMAL)
296 pci_scan_child_bus(bus);
297}
298EXPORT_SYMBOL(of_scan_pci_bridge);
299
300static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
301 struct device_node *dn)
302{
303 struct pci_dev *dev = NULL;
304 const __be32 *reg;
305 int reglen, devfn;
306#ifdef CONFIG_EEH
307 struct eeh_dev *edev = pdn_to_eeh_dev(PCI_DN(dn));
308#endif
309
310 pr_debug(" * %pOF\n", dn);
311 if (!of_device_is_available(dn))
312 return NULL;
313
314 reg = of_get_property(dn, "reg", ®len);
315 if (reg == NULL || reglen < 20)
316 return NULL;
317 devfn = (of_read_number(reg, 1) >> 8) & 0xff;
318
319
320 dev = pci_get_slot(bus, devfn);
321 if (dev) {
322 pci_dev_put(dev);
323 return dev;
324 }
325
326
327#ifdef CONFIG_EEH
328 if (edev && (edev->mode & EEH_DEV_REMOVED))
329 return NULL;
330#endif
331
332
333 dev = of_create_pci_dev(dn, bus, devfn);
334 if (!dev)
335 return NULL;
336
337 pr_debug(" dev header type: %x\n", dev->hdr_type);
338 return dev;
339}
340
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342
343
344
345
346
347static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
348 int rescan_existing)
349{
350 struct device_node *child;
351 struct pci_dev *dev;
352
353 pr_debug("of_scan_bus(%pOF) bus no %d...\n",
354 node, bus->number);
355
356
357 for_each_child_of_node(node, child) {
358 dev = of_scan_pci_dev(bus, child);
359 if (!dev)
360 continue;
361 pr_debug(" dev header type: %x\n", dev->hdr_type);
362 }
363
364
365
366
367 if (!rescan_existing)
368 pcibios_setup_bus_self(bus);
369 pcibios_setup_bus_devices(bus);
370
371
372 for_each_pci_bridge(dev, bus)
373 of_scan_pci_bridge(dev);
374}
375
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377
378
379
380
381void of_scan_bus(struct device_node *node, struct pci_bus *bus)
382{
383 __of_scan_bus(node, bus, 0);
384}
385EXPORT_SYMBOL_GPL(of_scan_bus);
386
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393
394
395void of_rescan_bus(struct device_node *node, struct pci_bus *bus)
396{
397 __of_scan_bus(node, bus, 1);
398}
399EXPORT_SYMBOL_GPL(of_rescan_bus);
400
401